1/*
2 * include/asm-sh/cpu-sh4/timer.h
3 *
4 * Copyright (C) 2004 Lineo Solutions, Inc.
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License.  See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#ifndef __ASM_CPU_SH4_TIMER_H
11#define __ASM_CPU_SH4_TIMER_H
12
13/*
14 * ---------------------------------------------------------------------------
15 * TMU Common definitions for SH4 processors
16 *	SH7750S/SH7750R
17 *	SH7751/SH7751R
18 *	SH7760
19 * ---------------------------------------------------------------------------
20 */
21
22#if !defined(CONFIG_CPU_SUBTYPE_SH7760)
23#define TMU_TOCR        0xffd80000      /* Byte access */
24#endif
25#define TMU_TSTR        0xffd80004      /* Byte access */
26
27#define TMU0_TCOR       0xffd80008      /* Long access */
28#define TMU0_TCNT       0xffd8000c      /* Long access */
29#define TMU0_TCR        0xffd80010      /* Word access */
30
31#define TMU1_TCOR       0xffd80014      /* Long access */
32#define TMU1_TCNT       0xffd80018      /* Long access */
33#define TMU1_TCR        0xffd8001c      /* Word access */
34
35#define TMU2_TCOR       0xffd80020      /* Long access */
36#define TMU2_TCNT       0xffd80024      /* Long access */
37#define TMU2_TCR        0xffd80028      /* Word access */
38#define TMU2_TCPR	0xffd8002c	/* Long access */
39
40#if !defined(CONFIG_CPU_SUBTYPE_SH7760)
41#define TMU3_TCOR       0xfe100008      /* Long access */
42#define TMU3_TCNT       0xfe10000c      /* Long access */
43#define TMU3_TCR        0xfe100010      /* Word access */
44
45#define TMU4_TCOR       0xfe100014      /* Long access */
46#define TMU4_TCNT       0xfe100018      /* Long access */
47#define TMU4_TCR        0xfe10001c      /* Word access */
48#endif
49
50#endif /* __ASM_CPU_SH4_TIMER_H */
51