1#ifndef _ASM_IA64_TLB_H
2#define _ASM_IA64_TLB_H
3/*
4 * Based on <asm-generic/tlb.h>.
5 *
6 * Copyright (C) 2002-2003 Hewlett-Packard Co
7 *	David Mosberger-Tang <davidm@hpl.hp.com>
8 */
9/*
10 * Removing a translation from a page table (including TLB-shootdown) is a four-step
11 * procedure:
12 *
13 *	(1) Flush (virtual) caches --- ensures virtual memory is coherent with kernel memory
14 *	    (this is a no-op on ia64).
15 *	(2) Clear the relevant portions of the page-table
16 *	(3) Flush the TLBs --- ensures that stale content is gone from CPU TLBs
17 *	(4) Release the pages that were freed up in step (2).
18 *
19 * Note that the ordering of these steps is crucial to avoid races on MP machines.
20 *
21 * The Linux kernel defines several platform-specific hooks for TLB-shootdown.  When
22 * unmapping a portion of the virtual address space, these hooks are called according to
23 * the following template:
24 *
25 *	tlb <- tlb_gather_mmu(mm, full_mm_flush);	// start unmap for address space MM
26 *	{
27 *	  for each vma that needs a shootdown do {
28 *	    tlb_start_vma(tlb, vma);
29 *	      for each page-table-entry PTE that needs to be removed do {
30 *		tlb_remove_tlb_entry(tlb, pte, address);
31 *		if (pte refers to a normal page) {
32 *		  tlb_remove_page(tlb, page);
33 *		}
34 *	      }
35 *	    tlb_end_vma(tlb, vma);
36 *	  }
37 *	}
38 *	tlb_finish_mmu(tlb, start, end);	// finish unmap for address space MM
39 */
40#include <linux/mm.h>
41#include <linux/pagemap.h>
42#include <linux/swap.h>
43
44#include <asm/pgalloc.h>
45#include <asm/processor.h>
46#include <asm/tlbflush.h>
47#include <asm/machvec.h>
48
49#ifdef CONFIG_SMP
50# define FREE_PTE_NR		2048
51# define tlb_fast_mode(tlb)	((tlb)->nr == ~0U)
52#else
53# define FREE_PTE_NR		0
54# define tlb_fast_mode(tlb)	(1)
55#endif
56
57struct mmu_gather {
58	struct mm_struct	*mm;
59	unsigned int		nr;		/* == ~0U => fast mode */
60	unsigned char		fullmm;		/* non-zero means full mm flush */
61	unsigned char		need_flush;	/* really unmapped some PTEs? */
62	unsigned long		start_addr;
63	unsigned long		end_addr;
64	struct page 		*pages[FREE_PTE_NR];
65};
66
67/* Users of the generic TLB shootdown code must declare this storage space. */
68DECLARE_PER_CPU(struct mmu_gather, mmu_gathers);
69
70/*
71 * Flush the TLB for address range START to END and, if not in fast mode, release the
72 * freed pages that where gathered up to this point.
73 */
74static inline void
75ia64_tlb_flush_mmu (struct mmu_gather *tlb, unsigned long start, unsigned long end)
76{
77	unsigned int nr;
78
79	if (!tlb->need_flush)
80		return;
81	tlb->need_flush = 0;
82
83	if (tlb->fullmm) {
84		/*
85		 * Tearing down the entire address space.  This happens both as a result
86		 * of exit() and execve().  The latter case necessitates the call to
87		 * flush_tlb_mm() here.
88		 */
89		flush_tlb_mm(tlb->mm);
90	} else if (unlikely (end - start >= 1024*1024*1024*1024UL
91			     || REGION_NUMBER(start) != REGION_NUMBER(end - 1)))
92	{
93		/*
94		 * If we flush more than a tera-byte or across regions, we're probably
95		 * better off just flushing the entire TLB(s).  This should be very rare
96		 * and is not worth optimizing for.
97		 */
98		flush_tlb_all();
99	} else {
100		struct vm_area_struct vma;
101
102		vma.vm_mm = tlb->mm;
103		/* flush the address range from the tlb: */
104		flush_tlb_range(&vma, start, end);
105		/* now flush the virt. page-table area mapping the address range: */
106		flush_tlb_range(&vma, ia64_thash(start), ia64_thash(end));
107	}
108
109	/* lastly, release the freed pages */
110	nr = tlb->nr;
111	if (!tlb_fast_mode(tlb)) {
112		unsigned long i;
113		tlb->nr = 0;
114		tlb->start_addr = ~0UL;
115		for (i = 0; i < nr; ++i)
116			free_page_and_swap_cache(tlb->pages[i]);
117	}
118}
119
120/*
121 * Return a pointer to an initialized struct mmu_gather.
122 */
123static inline struct mmu_gather *
124tlb_gather_mmu (struct mm_struct *mm, unsigned int full_mm_flush)
125{
126	struct mmu_gather *tlb = &get_cpu_var(mmu_gathers);
127
128	tlb->mm = mm;
129	/*
130	 * Use fast mode if only 1 CPU is online.
131	 *
132	 * It would be tempting to turn on fast-mode for full_mm_flush as well.  But this
133	 * doesn't work because of speculative accesses and software prefetching: the page
134	 * table of "mm" may (and usually is) the currently active page table and even
135	 * though the kernel won't do any user-space accesses during the TLB shoot down, a
136	 * compiler might use speculation or lfetch.fault on what happens to be a valid
137	 * user-space address.  This in turn could trigger a TLB miss fault (or a VHPT
138	 * walk) and re-insert a TLB entry we just removed.  Slow mode avoids such
139	 * problems.  (We could make fast-mode work by switching the current task to a
140	 * different "mm" during the shootdown.) --davidm 08/02/2002
141	 */
142	tlb->nr = (num_online_cpus() == 1) ? ~0U : 0;
143	tlb->fullmm = full_mm_flush;
144	tlb->start_addr = ~0UL;
145	return tlb;
146}
147
148/*
149 * Called at the end of the shootdown operation to free up any resources that were
150 * collected.
151 */
152static inline void
153tlb_finish_mmu (struct mmu_gather *tlb, unsigned long start, unsigned long end)
154{
155	/*
156	 * Note: tlb->nr may be 0 at this point, so we can't rely on tlb->start_addr and
157	 * tlb->end_addr.
158	 */
159	ia64_tlb_flush_mmu(tlb, start, end);
160
161	/* keep the page table cache within bounds */
162	check_pgt_cache();
163
164	put_cpu_var(mmu_gathers);
165}
166
167/*
168 * Logically, this routine frees PAGE.  On MP machines, the actual freeing of the page
169 * must be delayed until after the TLB has been flushed (see comments at the beginning of
170 * this file).
171 */
172static inline void
173tlb_remove_page (struct mmu_gather *tlb, struct page *page)
174{
175	tlb->need_flush = 1;
176
177	if (tlb_fast_mode(tlb)) {
178		free_page_and_swap_cache(page);
179		return;
180	}
181	tlb->pages[tlb->nr++] = page;
182	if (tlb->nr >= FREE_PTE_NR)
183		ia64_tlb_flush_mmu(tlb, tlb->start_addr, tlb->end_addr);
184}
185
186/*
187 * Remove TLB entry for PTE mapped at virtual address ADDRESS.  This is called for any
188 * PTE, not just those pointing to (normal) physical memory.
189 */
190static inline void
191__tlb_remove_tlb_entry (struct mmu_gather *tlb, pte_t *ptep, unsigned long address)
192{
193	if (tlb->start_addr == ~0UL)
194		tlb->start_addr = address;
195	tlb->end_addr = address + PAGE_SIZE;
196}
197
198#define tlb_migrate_finish(mm)	platform_tlb_migrate_finish(mm)
199
200#define tlb_start_vma(tlb, vma)			do { } while (0)
201#define tlb_end_vma(tlb, vma)			do { } while (0)
202
203#define tlb_remove_tlb_entry(tlb, ptep, addr)		\
204do {							\
205	tlb->need_flush = 1;				\
206	__tlb_remove_tlb_entry(tlb, ptep, addr);	\
207} while (0)
208
209#define pte_free_tlb(tlb, ptep)				\
210do {							\
211	tlb->need_flush = 1;				\
212	__pte_free_tlb(tlb, ptep);			\
213} while (0)
214
215#define pmd_free_tlb(tlb, ptep)				\
216do {							\
217	tlb->need_flush = 1;				\
218	__pmd_free_tlb(tlb, ptep);			\
219} while (0)
220
221#define pud_free_tlb(tlb, pudp)				\
222do {							\
223	tlb->need_flush = 1;				\
224	__pud_free_tlb(tlb, pudp);			\
225} while (0)
226
227#endif /* _ASM_IA64_TLB_H */
228