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  • only in /netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/include/asm-arm/arch-pnx4008/
1/*
2 * PNX4008-specific tweaks for I2C IP3204 block
3 *
4 * Author: Vitaly Wool <vwool@ru.mvista.com>
5 *
6 * 2005 (c) MontaVista Software, Inc. This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied.
10 */
11
12#ifndef __ASM_ARCH_I2C_H__
13#define __ASM_ARCH_I2C_H__
14
15#include <linux/pm.h>
16#include <linux/platform_device.h>
17
18enum {
19	mstatus_tdi = 0x00000001,
20	mstatus_afi = 0x00000002,
21	mstatus_nai = 0x00000004,
22	mstatus_drmi = 0x00000008,
23	mstatus_active = 0x00000020,
24	mstatus_scl = 0x00000040,
25	mstatus_sda = 0x00000080,
26	mstatus_rff = 0x00000100,
27	mstatus_rfe = 0x00000200,
28	mstatus_tff = 0x00000400,
29	mstatus_tfe = 0x00000800,
30};
31
32enum {
33	mcntrl_tdie = 0x00000001,
34	mcntrl_afie = 0x00000002,
35	mcntrl_naie = 0x00000004,
36	mcntrl_drmie = 0x00000008,
37	mcntrl_daie = 0x00000020,
38	mcntrl_rffie = 0x00000040,
39	mcntrl_tffie = 0x00000080,
40	mcntrl_reset = 0x00000100,
41	mcntrl_cdbmode = 0x00000400,
42};
43
44enum {
45	rw_bit = 1 << 0,
46	start_bit = 1 << 8,
47	stop_bit = 1 << 9,
48};
49
50#define I2C_REG_RX(a)	((a)->ioaddr)		/* Rx FIFO reg (RO) */
51#define I2C_REG_TX(a)	((a)->ioaddr)		/* Tx FIFO reg (WO) */
52#define I2C_REG_STS(a)	((a)->ioaddr + 0x04)	/* Status reg (RO) */
53#define I2C_REG_CTL(a)	((a)->ioaddr + 0x08)	/* Ctl reg */
54#define I2C_REG_CKL(a)	((a)->ioaddr + 0x0c)	/* Clock divider low */
55#define I2C_REG_CKH(a)	((a)->ioaddr + 0x10)	/* Clock divider high */
56#define I2C_REG_ADR(a)	((a)->ioaddr + 0x14)	/* I2C address */
57#define I2C_REG_RFL(a)	((a)->ioaddr + 0x18)	/* Rx FIFO level (RO) */
58#define I2C_REG_TFL(a)	((a)->ioaddr + 0x1c)	/* Tx FIFO level (RO) */
59#define I2C_REG_RXB(a)	((a)->ioaddr + 0x20)	/* Num of bytes Rx-ed (RO) */
60#define I2C_REG_TXB(a)	((a)->ioaddr + 0x24)	/* Num of bytes Tx-ed (RO) */
61#define I2C_REG_TXS(a)	((a)->ioaddr + 0x28)	/* Tx slave FIFO (RO) */
62#define I2C_REG_STFL(a)	((a)->ioaddr + 0x2c)	/* Tx slave FIFO level (RO) */
63
64#define HCLK_MHZ		13
65#define I2C_CHIP_NAME		"PNX4008-I2C"
66
67#endif				/* __ASM_ARCH_I2C_H___ */
68