1// include/asm-arm/mach-omap/usb.h 2 3#ifndef __ASM_ARCH_OMAP_USB_H 4#define __ASM_ARCH_OMAP_USB_H 5 6#include <asm/arch/board.h> 7 8/*-------------------------------------------------------------------------*/ 9 10#define OMAP1_OTG_BASE 0xfffb0400 11#define OMAP1_UDC_BASE 0xfffb4000 12#define OMAP1_OHCI_BASE 0xfffba000 13 14#define OMAP2_OHCI_BASE 0x4805e000 15#define OMAP2_UDC_BASE 0x4805e200 16#define OMAP2_OTG_BASE 0x4805e300 17 18#ifdef CONFIG_ARCH_OMAP1 19 20#define OTG_BASE OMAP1_OTG_BASE 21#define UDC_BASE OMAP1_UDC_BASE 22#define OMAP_OHCI_BASE OMAP1_OHCI_BASE 23 24#else 25 26#define OTG_BASE OMAP2_OTG_BASE 27#define UDC_BASE OMAP2_UDC_BASE 28#define OMAP_OHCI_BASE OMAP2_OHCI_BASE 29 30#endif 31 32/*-------------------------------------------------------------------------*/ 33 34/* 35 * OTG and transceiver registers, for OMAPs starting with ARM926 36 */ 37#define OTG_REG32(offset) __REG32(OTG_BASE + (offset)) 38#define OTG_REG16(offset) __REG16(OTG_BASE + (offset)) 39 40#define OTG_REV_REG OTG_REG32(0x00) 41#define OTG_SYSCON_1_REG OTG_REG32(0x04) 42# define USB2_TRX_MODE(w) (((w)>>24)&0x07) 43# define USB1_TRX_MODE(w) (((w)>>20)&0x07) 44# define USB0_TRX_MODE(w) (((w)>>16)&0x07) 45# define OTG_IDLE_EN (1 << 15) 46# define HST_IDLE_EN (1 << 14) 47# define DEV_IDLE_EN (1 << 13) 48# define OTG_RESET_DONE (1 << 2) 49# define OTG_SOFT_RESET (1 << 1) 50#define OTG_SYSCON_2_REG OTG_REG32(0x08) 51# define OTG_EN (1 << 31) 52# define USBX_SYNCHRO (1 << 30) 53# define OTG_MST16 (1 << 29) 54# define SRP_GPDATA (1 << 28) 55# define SRP_GPDVBUS (1 << 27) 56# define SRP_GPUVBUS(w) (((w)>>24)&0x07) 57# define A_WAIT_VRISE(w) (((w)>>20)&0x07) 58# define B_ASE_BRST(w) (((w)>>16)&0x07) 59# define SRP_DPW (1 << 14) 60# define SRP_DATA (1 << 13) 61# define SRP_VBUS (1 << 12) 62# define OTG_PADEN (1 << 10) 63# define HMC_PADEN (1 << 9) 64# define UHOST_EN (1 << 8) 65# define HMC_TLLSPEED (1 << 7) 66# define HMC_TLLATTACH (1 << 6) 67# define OTG_HMC(w) (((w)>>0)&0x3f) 68#define OTG_CTRL_REG OTG_REG32(0x0c) 69# define OTG_USB2_EN (1 << 29) 70# define OTG_USB2_DP (1 << 28) 71# define OTG_USB2_DM (1 << 27) 72# define OTG_USB1_EN (1 << 26) 73# define OTG_USB1_DP (1 << 25) 74# define OTG_USB1_DM (1 << 24) 75# define OTG_USB0_EN (1 << 23) 76# define OTG_USB0_DP (1 << 22) 77# define OTG_USB0_DM (1 << 21) 78# define OTG_ASESSVLD (1 << 20) 79# define OTG_BSESSEND (1 << 19) 80# define OTG_BSESSVLD (1 << 18) 81# define OTG_VBUSVLD (1 << 17) 82# define OTG_ID (1 << 16) 83# define OTG_DRIVER_SEL (1 << 15) 84# define OTG_A_SETB_HNPEN (1 << 12) 85# define OTG_A_BUSREQ (1 << 11) 86# define OTG_B_HNPEN (1 << 9) 87# define OTG_B_BUSREQ (1 << 8) 88# define OTG_BUSDROP (1 << 7) 89# define OTG_PULLDOWN (1 << 5) 90# define OTG_PULLUP (1 << 4) 91# define OTG_DRV_VBUS (1 << 3) 92# define OTG_PD_VBUS (1 << 2) 93# define OTG_PU_VBUS (1 << 1) 94# define OTG_PU_ID (1 << 0) 95#define OTG_IRQ_EN_REG OTG_REG16(0x10) 96# define DRIVER_SWITCH (1 << 15) 97# define A_VBUS_ERR (1 << 13) 98# define A_REQ_TMROUT (1 << 12) 99# define A_SRP_DETECT (1 << 11) 100# define B_HNP_FAIL (1 << 10) 101# define B_SRP_TMROUT (1 << 9) 102# define B_SRP_DONE (1 << 8) 103# define B_SRP_STARTED (1 << 7) 104# define OPRT_CHG (1 << 0) 105#define OTG_IRQ_SRC_REG OTG_REG16(0x14) 106 // same bits as in IRQ_EN 107#define OTG_OUTCTRL_REG OTG_REG16(0x18) 108# define OTGVPD (1 << 14) 109# define OTGVPU (1 << 13) 110# define OTGPUID (1 << 12) 111# define USB2VDR (1 << 10) 112# define USB2PDEN (1 << 9) 113# define USB2PUEN (1 << 8) 114# define USB1VDR (1 << 6) 115# define USB1PDEN (1 << 5) 116# define USB1PUEN (1 << 4) 117# define USB0VDR (1 << 2) 118# define USB0PDEN (1 << 1) 119# define USB0PUEN (1 << 0) 120#define OTG_TEST_REG OTG_REG16(0x20) 121#define OTG_VENDOR_CODE_REG OTG_REG32(0xfc) 122 123/*-------------------------------------------------------------------------*/ 124 125/* OMAP1 */ 126#define USB_TRANSCEIVER_CTRL_REG __REG32(0xfffe1000 + 0x0064) 127# define CONF_USB2_UNI_R (1 << 8) 128# define CONF_USB1_UNI_R (1 << 7) 129# define CONF_USB_PORT0_R(x) (((x)>>4)&0x7) 130# define CONF_USB0_ISOLATE_R (1 << 3) 131# define CONF_USB_PWRDN_DM_R (1 << 2) 132# define CONF_USB_PWRDN_DP_R (1 << 1) 133 134/* OMAP2 */ 135#define CONTROL_DEVCONF_REG __REG32(L4_24XX_BASE + 0x0274) 136# define USB_UNIDIR 0x0 137# define USB_UNIDIR_TLL 0x1 138# define USB_BIDIR 0x2 139# define USB_BIDIR_TLL 0x3 140# define USBT0WRMODEI(x) ((x) << 22) 141# define USBT1WRMODEI(x) ((x) << 20) 142# define USBT2WRMODEI(x) ((x) << 18) 143# define USBT2TLL5PI (1 << 17) 144# define USB0PUENACTLOI (1 << 16) 145# define USBSTANDBYCTRL (1 << 15) 146 147#endif /* __ASM_ARCH_OMAP_USB_H */ 148