1/*
2 * include/asm-arm/arch-at91/at91sam9261_matrix.h
3 *
4 * Memory Controllers (MATRIX, EBI) - System peripherals registers.
5 * Based on AT91SAM9261 datasheet revision D.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 */
12
13#ifndef AT91SAM9261_MATRIX_H
14#define AT91SAM9261_MATRIX_H
15
16#define AT91_MATRIX_MCFG	(AT91_MATRIX + 0x00)	/* Master Configuration Register */
17#define		AT91_MATRIX_RCB0	(1 << 0)		/* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */
18#define		AT91_MATRIX_RCB1	(1 << 1)		/* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */
19
20#define AT91_MATRIX_SCFG0	(AT91_MATRIX + 0x04)	/* Slave Configuration Register 0 */
21#define AT91_MATRIX_SCFG1	(AT91_MATRIX + 0x08)	/* Slave Configuration Register 1 */
22#define AT91_MATRIX_SCFG2	(AT91_MATRIX + 0x0C)	/* Slave Configuration Register 2 */
23#define AT91_MATRIX_SCFG3	(AT91_MATRIX + 0x10)	/* Slave Configuration Register 3 */
24#define AT91_MATRIX_SCFG4	(AT91_MATRIX + 0x14)	/* Slave Configuration Register 4 */
25#define		AT91_MATRIX_SLOT_CYCLE		(0xff << 0)	/* Maximum Number of Allowed Cycles for a Burst */
26#define		AT91_MATRIX_DEFMSTR_TYPE	(3    << 16)	/* Default Master Type */
27#define			AT91_MATRIX_DEFMSTR_TYPE_NONE	(0 << 16)
28#define			AT91_MATRIX_DEFMSTR_TYPE_LAST	(1 << 16)
29#define			AT91_MATRIX_DEFMSTR_TYPE_FIXED	(2 << 16)
30#define		AT91_MATRIX_FIXED_DEFMSTR	(7    << 18)	/* Fixed Index of Default Master */
31
32#define AT91_MATRIX_TCR		(AT91_MATRIX + 0x24)	/* TCM Configuration Register */
33#define		AT91_MATRIX_ITCM_SIZE		(0xf << 0)	/* Size of ITCM enabled memory block */
34#define			AT91_MATRIX_ITCM_0		(0 << 0)
35#define			AT91_MATRIX_ITCM_16		(5 << 0)
36#define			AT91_MATRIX_ITCM_32		(6 << 0)
37#define			AT91_MATRIX_ITCM_64		(7 << 0)
38#define		AT91_MATRIX_DTCM_SIZE		(0xf << 4)	/* Size of DTCM enabled memory block */
39#define			AT91_MATRIX_DTCM_0		(0 << 4)
40#define			AT91_MATRIX_DTCM_16		(5 << 4)
41#define			AT91_MATRIX_DTCM_32		(6 << 4)
42#define			AT91_MATRIX_DTCM_64		(7 << 4)
43
44#define AT91_MATRIX_EBICSA	(AT91_MATRIX + 0x30)	/* EBI Chip Select Assignment Register */
45#define		AT91_MATRIX_CS1A		(1 << 1)	/* Chip Select 1 Assignment */
46#define			AT91_MATRIX_CS1A_SMC		(0 << 1)
47#define			AT91_MATRIX_CS1A_SDRAMC		(1 << 1)
48#define		AT91_MATRIX_CS3A		(1 << 3)	/* Chip Select 3 Assignment */
49#define			AT91_MATRIX_CS3A_SMC		(0 << 3)
50#define			AT91_MATRIX_CS3A_SMC_SMARTMEDIA	(1 << 3)
51#define		AT91_MATRIX_CS4A		(1 << 4)	/* Chip Select 4 Assignment */
52#define			AT91_MATRIX_CS4A_SMC		(0 << 4)
53#define			AT91_MATRIX_CS4A_SMC_CF1	(1 << 4)
54#define		AT91_MATRIX_CS5A		(1 << 5)	/* Chip Select 5 Assignment */
55#define			AT91_MATRIX_CS5A_SMC		(0 << 5)
56#define			AT91_MATRIX_CS5A_SMC_CF2	(1 << 5)
57#define		AT91_MATRIX_DBPUC		(1 << 8)	/* Data Bus Pull-up Configuration */
58
59#define AT91_MATRIX_USBPUCR	(AT91_MATRIX + 0x34)	/* USB Pad Pull-Up Control Register */
60#define		AT91_MATRIX_USBPUCR_PUON	(1 << 30)	/* USB Device PAD Pull-up Enable */
61
62#endif
63