1/*
2 * Copyright (c) 2001-2002 by David Brownell
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
11 * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
12 * for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software Foundation,
16 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 */
18
19/* this file is part of ehci-hcd.c */
20
21#define ehci_dbg(ehci, fmt, args...) \
22	dev_dbg (ehci_to_hcd(ehci)->self.controller , fmt , ## args )
23#define ehci_err(ehci, fmt, args...) \
24	dev_err (ehci_to_hcd(ehci)->self.controller , fmt , ## args )
25#define ehci_info(ehci, fmt, args...) \
26	dev_info (ehci_to_hcd(ehci)->self.controller , fmt , ## args )
27#define ehci_warn(ehci, fmt, args...) \
28	dev_warn (ehci_to_hcd(ehci)->self.controller , fmt , ## args )
29
30#ifdef EHCI_VERBOSE_DEBUG
31#	define vdbg dbg
32#	define ehci_vdbg ehci_dbg
33#else
34#	define vdbg(fmt,args...) do { } while (0)
35#	define ehci_vdbg(ehci, fmt, args...) do { } while (0)
36#endif
37
38#ifdef	DEBUG
39
40/* check the values in the HCSPARAMS register
41 * (host controller _Structural_ parameters)
42 * see EHCI spec, Table 2-4 for each value
43 */
44static void dbg_hcs_params (struct ehci_hcd *ehci, char *label)
45{
46	u32	params = ehci_readl(ehci, &ehci->caps->hcs_params);
47
48	ehci_dbg (ehci,
49		"%s hcs_params 0x%x dbg=%d%s cc=%d pcc=%d%s%s ports=%d\n",
50		label, params,
51		HCS_DEBUG_PORT (params),
52		HCS_INDICATOR (params) ? " ind" : "",
53		HCS_N_CC (params),
54		HCS_N_PCC (params),
55	        HCS_PORTROUTED (params) ? "" : " ordered",
56		HCS_PPC (params) ? "" : " !ppc",
57		HCS_N_PORTS (params)
58		);
59	/* Port routing, per EHCI 0.95 Spec, Section 2.2.5 */
60	if (HCS_PORTROUTED (params)) {
61		int i;
62		char buf [46], tmp [7], byte;
63
64		buf[0] = 0;
65		for (i = 0; i < HCS_N_PORTS (params); i++) {
66			byte = readb (&ehci->caps->portroute[(i>>1)]);
67			sprintf(tmp, "%d ",
68				((i & 0x1) ? ((byte)&0xf) : ((byte>>4)&0xf)));
69			strcat(buf, tmp);
70		}
71		ehci_dbg (ehci, "%s portroute %s\n",
72				label, buf);
73	}
74}
75#else
76
77static inline void dbg_hcs_params (struct ehci_hcd *ehci, char *label) {}
78
79#endif
80
81#ifdef	DEBUG
82
83/* check the values in the HCCPARAMS register
84 * (host controller _Capability_ parameters)
85 * see EHCI Spec, Table 2-5 for each value
86 * */
87static void dbg_hcc_params (struct ehci_hcd *ehci, char *label)
88{
89	u32	params = ehci_readl(ehci, &ehci->caps->hcc_params);
90
91	if (HCC_ISOC_CACHE (params)) {
92		ehci_dbg (ehci,
93		     "%s hcc_params %04x caching frame %s%s%s\n",
94		     label, params,
95		     HCC_PGM_FRAMELISTLEN (params) ? "256/512/1024" : "1024",
96		     HCC_CANPARK (params) ? " park" : "",
97		     HCC_64BIT_ADDR (params) ? " 64 bit addr" : "");
98	} else {
99		ehci_dbg (ehci,
100		     "%s hcc_params %04x thresh %d uframes %s%s%s\n",
101		     label,
102		     params,
103		     HCC_ISOC_THRES (params),
104		     HCC_PGM_FRAMELISTLEN (params) ? "256/512/1024" : "1024",
105		     HCC_CANPARK (params) ? " park" : "",
106		     HCC_64BIT_ADDR (params) ? " 64 bit addr" : "");
107	}
108}
109#else
110
111static inline void dbg_hcc_params (struct ehci_hcd *ehci, char *label) {}
112
113#endif
114
115#ifdef	DEBUG
116
117static void __attribute__((__unused__))
118dbg_qtd (const char *label, struct ehci_hcd *ehci, struct ehci_qtd *qtd)
119{
120	ehci_dbg (ehci, "%s td %p n%08x %08x t%08x p0=%08x\n", label, qtd,
121		le32_to_cpup (&qtd->hw_next),
122		le32_to_cpup (&qtd->hw_alt_next),
123		le32_to_cpup (&qtd->hw_token),
124		le32_to_cpup (&qtd->hw_buf [0]));
125	if (qtd->hw_buf [1])
126		ehci_dbg (ehci, "  p1=%08x p2=%08x p3=%08x p4=%08x\n",
127			le32_to_cpup (&qtd->hw_buf [1]),
128			le32_to_cpup (&qtd->hw_buf [2]),
129			le32_to_cpup (&qtd->hw_buf [3]),
130			le32_to_cpup (&qtd->hw_buf [4]));
131}
132
133static void __attribute__((__unused__))
134dbg_qh (const char *label, struct ehci_hcd *ehci, struct ehci_qh *qh)
135{
136	ehci_dbg (ehci, "%s qh %p n%08x info %x %x qtd %x\n", label,
137		qh, qh->hw_next, qh->hw_info1, qh->hw_info2,
138		qh->hw_current);
139	dbg_qtd ("overlay", ehci, (struct ehci_qtd *) &qh->hw_qtd_next);
140}
141
142static void __attribute__((__unused__))
143dbg_itd (const char *label, struct ehci_hcd *ehci, struct ehci_itd *itd)
144{
145	ehci_dbg (ehci, "%s [%d] itd %p, next %08x, urb %p\n",
146		label, itd->frame, itd, le32_to_cpu(itd->hw_next), itd->urb);
147	ehci_dbg (ehci,
148		"  trans: %08x %08x %08x %08x %08x %08x %08x %08x\n",
149		le32_to_cpu(itd->hw_transaction[0]),
150		le32_to_cpu(itd->hw_transaction[1]),
151		le32_to_cpu(itd->hw_transaction[2]),
152		le32_to_cpu(itd->hw_transaction[3]),
153		le32_to_cpu(itd->hw_transaction[4]),
154		le32_to_cpu(itd->hw_transaction[5]),
155		le32_to_cpu(itd->hw_transaction[6]),
156		le32_to_cpu(itd->hw_transaction[7]));
157	ehci_dbg (ehci,
158		"  buf:   %08x %08x %08x %08x %08x %08x %08x\n",
159		le32_to_cpu(itd->hw_bufp[0]),
160		le32_to_cpu(itd->hw_bufp[1]),
161		le32_to_cpu(itd->hw_bufp[2]),
162		le32_to_cpu(itd->hw_bufp[3]),
163		le32_to_cpu(itd->hw_bufp[4]),
164		le32_to_cpu(itd->hw_bufp[5]),
165		le32_to_cpu(itd->hw_bufp[6]));
166	ehci_dbg (ehci, "  index: %d %d %d %d %d %d %d %d\n",
167		itd->index[0], itd->index[1], itd->index[2],
168		itd->index[3], itd->index[4], itd->index[5],
169		itd->index[6], itd->index[7]);
170}
171
172static void __attribute__((__unused__))
173dbg_sitd (const char *label, struct ehci_hcd *ehci, struct ehci_sitd *sitd)
174{
175	ehci_dbg (ehci, "%s [%d] sitd %p, next %08x, urb %p\n",
176		label, sitd->frame, sitd, le32_to_cpu(sitd->hw_next), sitd->urb);
177	ehci_dbg (ehci,
178		"  addr %08x sched %04x result %08x buf %08x %08x\n",
179		le32_to_cpu(sitd->hw_fullspeed_ep),
180		le32_to_cpu(sitd->hw_uframe),
181		le32_to_cpu(sitd->hw_results),
182		le32_to_cpu(sitd->hw_buf [0]),
183		le32_to_cpu(sitd->hw_buf [1]));
184}
185
186static int __attribute__((__unused__))
187dbg_status_buf (char *buf, unsigned len, const char *label, u32 status)
188{
189	return scnprintf (buf, len,
190		"%s%sstatus %04x%s%s%s%s%s%s%s%s%s%s",
191		label, label [0] ? " " : "", status,
192		(status & STS_ASS) ? " Async" : "",
193		(status & STS_PSS) ? " Periodic" : "",
194		(status & STS_RECL) ? " Recl" : "",
195		(status & STS_HALT) ? " Halt" : "",
196		(status & STS_IAA) ? " IAA" : "",
197		(status & STS_FATAL) ? " FATAL" : "",
198		(status & STS_FLR) ? " FLR" : "",
199		(status & STS_PCD) ? " PCD" : "",
200		(status & STS_ERR) ? " ERR" : "",
201		(status & STS_INT) ? " INT" : ""
202		);
203}
204
205static int __attribute__((__unused__))
206dbg_intr_buf (char *buf, unsigned len, const char *label, u32 enable)
207{
208	return scnprintf (buf, len,
209		"%s%sintrenable %02x%s%s%s%s%s%s",
210		label, label [0] ? " " : "", enable,
211		(enable & STS_IAA) ? " IAA" : "",
212		(enable & STS_FATAL) ? " FATAL" : "",
213		(enable & STS_FLR) ? " FLR" : "",
214		(enable & STS_PCD) ? " PCD" : "",
215		(enable & STS_ERR) ? " ERR" : "",
216		(enable & STS_INT) ? " INT" : ""
217		);
218}
219
220static const char *const fls_strings [] =
221    { "1024", "512", "256", "??" };
222
223static int
224dbg_command_buf (char *buf, unsigned len, const char *label, u32 command)
225{
226	return scnprintf (buf, len,
227		"%s%scommand %06x %s=%d ithresh=%d%s%s%s%s period=%s%s %s",
228		label, label [0] ? " " : "", command,
229		(command & CMD_PARK) ? "park" : "(park)",
230		CMD_PARK_CNT (command),
231		(command >> 16) & 0x3f,
232		(command & CMD_LRESET) ? " LReset" : "",
233		(command & CMD_IAAD) ? " IAAD" : "",
234		(command & CMD_ASE) ? " Async" : "",
235		(command & CMD_PSE) ? " Periodic" : "",
236		fls_strings [(command >> 2) & 0x3],
237		(command & CMD_RESET) ? " Reset" : "",
238		(command & CMD_RUN) ? "RUN" : "HALT"
239		);
240}
241
242static int
243dbg_port_buf (char *buf, unsigned len, const char *label, int port, u32 status)
244{
245	char	*sig;
246
247	/* signaling state */
248	switch (status & (3 << 10)) {
249	case 0 << 10: sig = "se0"; break;
250	case 1 << 10: sig = "k"; break;		/* low speed */
251	case 2 << 10: sig = "j"; break;
252	default: sig = "?"; break;
253	}
254
255	return scnprintf (buf, len,
256		"%s%sport %d status %06x%s%s sig=%s%s%s%s%s%s%s%s%s%s",
257		label, label [0] ? " " : "", port, status,
258		(status & PORT_POWER) ? " POWER" : "",
259		(status & PORT_OWNER) ? " OWNER" : "",
260		sig,
261		(status & PORT_RESET) ? " RESET" : "",
262		(status & PORT_SUSPEND) ? " SUSPEND" : "",
263		(status & PORT_RESUME) ? " RESUME" : "",
264		(status & PORT_OCC) ? " OCC" : "",
265		(status & PORT_OC) ? " OC" : "",
266		(status & PORT_PEC) ? " PEC" : "",
267		(status & PORT_PE) ? " PE" : "",
268		(status & PORT_CSC) ? " CSC" : "",
269		(status & PORT_CONNECT) ? " CONNECT" : ""
270	    );
271}
272
273#else
274static inline void __attribute__((__unused__))
275dbg_qh (char *label, struct ehci_hcd *ehci, struct ehci_qh *qh)
276{}
277
278static inline int __attribute__((__unused__))
279dbg_status_buf (char *buf, unsigned len, const char *label, u32 status)
280{ return 0; }
281
282static inline int __attribute__((__unused__))
283dbg_command_buf (char *buf, unsigned len, const char *label, u32 command)
284{ return 0; }
285
286static inline int __attribute__((__unused__))
287dbg_intr_buf (char *buf, unsigned len, const char *label, u32 enable)
288{ return 0; }
289
290static inline int __attribute__((__unused__))
291dbg_port_buf (char *buf, unsigned len, const char *label, int port, u32 status)
292{ return 0; }
293
294#endif	/* DEBUG */
295
296/* functions have the "wrong" filename when they're output... */
297#define dbg_status(ehci, label, status) { \
298	char _buf [80]; \
299	dbg_status_buf (_buf, sizeof _buf, label, status); \
300	ehci_dbg (ehci, "%s\n", _buf); \
301}
302
303#define dbg_cmd(ehci, label, command) { \
304	char _buf [80]; \
305	dbg_command_buf (_buf, sizeof _buf, label, command); \
306	ehci_dbg (ehci, "%s\n", _buf); \
307}
308
309#define dbg_port(ehci, label, port, status) { \
310	char _buf [80]; \
311	dbg_port_buf (_buf, sizeof _buf, label, port, status); \
312	ehci_dbg (ehci, "%s\n", _buf); \
313}
314
315/*-------------------------------------------------------------------------*/
316
317#ifdef STUB_DEBUG_FILES
318
319static inline void create_debug_files (struct ehci_hcd *bus) { }
320static inline void remove_debug_files (struct ehci_hcd *bus) { }
321
322#else
323
324/* troubleshooting help: expose state in sysfs */
325
326#define speed_char(info1) ({ char tmp; \
327		switch (info1 & (3 << 12)) { \
328		case 0 << 12: tmp = 'f'; break; \
329		case 1 << 12: tmp = 'l'; break; \
330		case 2 << 12: tmp = 'h'; break; \
331		default: tmp = '?'; break; \
332		}; tmp; })
333
334static inline char token_mark (__le32 token)
335{
336	__u32 v = le32_to_cpu (token);
337	if (v & QTD_STS_ACTIVE)
338		return '*';
339	if (v & QTD_STS_HALT)
340		return '-';
341	if (!IS_SHORT_READ (v))
342		return ' ';
343	/* tries to advance through hw_alt_next */
344	return '/';
345}
346
347static void qh_lines (
348	struct ehci_hcd *ehci,
349	struct ehci_qh *qh,
350	char **nextp,
351	unsigned *sizep
352)
353{
354	u32			scratch;
355	u32			hw_curr;
356	struct list_head	*entry;
357	struct ehci_qtd		*td;
358	unsigned		temp;
359	unsigned		size = *sizep;
360	char			*next = *nextp;
361	char			mark;
362
363	if (qh->hw_qtd_next == EHCI_LIST_END)	/* NEC does this */
364		mark = '@';
365	else
366		mark = token_mark (qh->hw_token);
367	if (mark == '/') {	/* qh_alt_next controls qh advance? */
368		if ((qh->hw_alt_next & QTD_MASK) == ehci->async->hw_alt_next)
369			mark = '#';	/* blocked */
370		else if (qh->hw_alt_next == EHCI_LIST_END)
371			mark = '.';	/* use hw_qtd_next */
372		/* else alt_next points to some other qtd */
373	}
374	scratch = le32_to_cpup (&qh->hw_info1);
375	hw_curr = (mark == '*') ? le32_to_cpup (&qh->hw_current) : 0;
376	temp = scnprintf (next, size,
377			"qh/%p dev%d %cs ep%d %08x %08x (%08x%c %s nak%d)",
378			qh, scratch & 0x007f,
379			speed_char (scratch),
380			(scratch >> 8) & 0x000f,
381			scratch, le32_to_cpup (&qh->hw_info2),
382			le32_to_cpup (&qh->hw_token), mark,
383			(__constant_cpu_to_le32 (QTD_TOGGLE) & qh->hw_token)
384				? "data1" : "data0",
385			(le32_to_cpup (&qh->hw_alt_next) >> 1) & 0x0f);
386	size -= temp;
387	next += temp;
388
389	/* hc may be modifying the list as we read it ... */
390	list_for_each (entry, &qh->qtd_list) {
391		td = list_entry (entry, struct ehci_qtd, qtd_list);
392		scratch = le32_to_cpup (&td->hw_token);
393		mark = ' ';
394		if (hw_curr == td->qtd_dma)
395			mark = '*';
396		else if (qh->hw_qtd_next == cpu_to_le32(td->qtd_dma))
397			mark = '+';
398		else if (QTD_LENGTH (scratch)) {
399			if (td->hw_alt_next == ehci->async->hw_alt_next)
400				mark = '#';
401			else if (td->hw_alt_next != EHCI_LIST_END)
402				mark = '/';
403		}
404		temp = snprintf (next, size,
405				"\n\t%p%c%s len=%d %08x urb %p",
406				td, mark, ({ char *tmp;
407				 switch ((scratch>>8)&0x03) {
408				 case 0: tmp = "out"; break;
409				 case 1: tmp = "in"; break;
410				 case 2: tmp = "setup"; break;
411				 default: tmp = "?"; break;
412				 } tmp;}),
413				(scratch >> 16) & 0x7fff,
414				scratch,
415				td->urb);
416		if (temp < 0)
417			temp = 0;
418		else if (size < temp)
419			temp = size;
420		size -= temp;
421		next += temp;
422		if (temp == size)
423			goto done;
424	}
425
426	temp = snprintf (next, size, "\n");
427	if (temp < 0)
428		temp = 0;
429	else if (size < temp)
430		temp = size;
431	size -= temp;
432	next += temp;
433
434done:
435	*sizep = size;
436	*nextp = next;
437}
438
439static ssize_t
440show_async (struct class_device *class_dev, char *buf)
441{
442	struct usb_bus		*bus;
443	struct usb_hcd		*hcd;
444	struct ehci_hcd		*ehci;
445	unsigned long		flags;
446	unsigned		temp, size;
447	char			*next;
448	struct ehci_qh		*qh;
449
450	*buf = 0;
451
452	bus = class_get_devdata(class_dev);
453	hcd = bus_to_hcd(bus);
454	ehci = hcd_to_ehci (hcd);
455	next = buf;
456	size = PAGE_SIZE;
457
458	/* dumps a snapshot of the async schedule.
459	 * usually empty except for long-term bulk reads, or head.
460	 * one QH per line, and TDs we know about
461	 */
462	spin_lock_irqsave (&ehci->lock, flags);
463	for (qh = ehci->async->qh_next.qh; size > 0 && qh; qh = qh->qh_next.qh)
464		qh_lines (ehci, qh, &next, &size);
465	if (ehci->reclaim && size > 0) {
466		temp = scnprintf (next, size, "\nreclaim =\n");
467		size -= temp;
468		next += temp;
469
470		for (qh = ehci->reclaim; size > 0 && qh; qh = qh->reclaim)
471			qh_lines (ehci, qh, &next, &size);
472	}
473	spin_unlock_irqrestore (&ehci->lock, flags);
474
475	return strlen (buf);
476}
477static CLASS_DEVICE_ATTR (async, S_IRUGO, show_async, NULL);
478
479#define DBG_SCHED_LIMIT 64
480
481static ssize_t
482show_periodic (struct class_device *class_dev, char *buf)
483{
484	struct usb_bus		*bus;
485	struct usb_hcd		*hcd;
486	struct ehci_hcd		*ehci;
487	unsigned long		flags;
488	union ehci_shadow	p, *seen;
489	unsigned		temp, size, seen_count;
490	char			*next;
491	unsigned		i;
492	__le32			tag;
493
494	if (!(seen = kmalloc (DBG_SCHED_LIMIT * sizeof *seen, GFP_ATOMIC)))
495		return 0;
496	seen_count = 0;
497
498	bus = class_get_devdata(class_dev);
499	hcd = bus_to_hcd(bus);
500	ehci = hcd_to_ehci (hcd);
501	next = buf;
502	size = PAGE_SIZE;
503
504	temp = scnprintf (next, size, "size = %d\n", ehci->periodic_size);
505	size -= temp;
506	next += temp;
507
508	/* dump a snapshot of the periodic schedule.
509	 * iso changes, interrupt usually doesn't.
510	 */
511	spin_lock_irqsave (&ehci->lock, flags);
512	for (i = 0; i < ehci->periodic_size; i++) {
513		p = ehci->pshadow [i];
514		if (likely (!p.ptr))
515			continue;
516		tag = Q_NEXT_TYPE (ehci->periodic [i]);
517
518		temp = scnprintf (next, size, "%4d: ", i);
519		size -= temp;
520		next += temp;
521
522		do {
523			switch (tag) {
524			case Q_TYPE_QH:
525				temp = scnprintf (next, size, " qh%d-%04x/%p",
526						p.qh->period,
527						le32_to_cpup (&p.qh->hw_info2)
528							/* uframe masks */
529							& (QH_CMASK | QH_SMASK),
530						p.qh);
531				size -= temp;
532				next += temp;
533				/* don't repeat what follows this qh */
534				for (temp = 0; temp < seen_count; temp++) {
535					if (seen [temp].ptr != p.ptr)
536						continue;
537					if (p.qh->qh_next.ptr)
538						temp = scnprintf (next, size,
539							" ...");
540					p.ptr = NULL;
541					break;
542				}
543				/* show more info the first time around */
544				if (temp == seen_count && p.ptr) {
545					u32	scratch = le32_to_cpup (
546							&p.qh->hw_info1);
547					struct ehci_qtd	*qtd;
548					char		*type = "";
549
550					/* count tds, get ep direction */
551					temp = 0;
552					list_for_each_entry (qtd,
553							&p.qh->qtd_list,
554							qtd_list) {
555						temp++;
556						switch (0x03 & (le32_to_cpu (
557							qtd->hw_token) >> 8)) {
558						case 0: type = "out"; continue;
559						case 1: type = "in"; continue;
560						}
561					}
562
563					temp = scnprintf (next, size,
564						" (%c%d ep%d%s "
565						"[%d/%d] q%d p%d)",
566						speed_char (scratch),
567						scratch & 0x007f,
568						(scratch >> 8) & 0x000f, type,
569						p.qh->usecs, p.qh->c_usecs,
570						temp,
571						0x7ff & (scratch >> 16));
572
573					if (seen_count < DBG_SCHED_LIMIT)
574						seen [seen_count++].qh = p.qh;
575				} else
576					temp = 0;
577				if (p.qh) {
578					tag = Q_NEXT_TYPE (p.qh->hw_next);
579					p = p.qh->qh_next;
580				}
581				break;
582			case Q_TYPE_FSTN:
583				temp = scnprintf (next, size,
584					" fstn-%8x/%p", p.fstn->hw_prev,
585					p.fstn);
586				tag = Q_NEXT_TYPE (p.fstn->hw_next);
587				p = p.fstn->fstn_next;
588				break;
589			case Q_TYPE_ITD:
590				temp = scnprintf (next, size,
591					" itd/%p", p.itd);
592				tag = Q_NEXT_TYPE (p.itd->hw_next);
593				p = p.itd->itd_next;
594				break;
595			case Q_TYPE_SITD:
596				temp = scnprintf (next, size,
597					" sitd%d-%04x/%p",
598					p.sitd->stream->interval,
599					le32_to_cpup (&p.sitd->hw_uframe)
600						& 0x0000ffff,
601					p.sitd);
602				tag = Q_NEXT_TYPE (p.sitd->hw_next);
603				p = p.sitd->sitd_next;
604				break;
605			}
606			size -= temp;
607			next += temp;
608		} while (p.ptr);
609
610		temp = scnprintf (next, size, "\n");
611		size -= temp;
612		next += temp;
613	}
614	spin_unlock_irqrestore (&ehci->lock, flags);
615	kfree (seen);
616
617	return PAGE_SIZE - size;
618}
619static CLASS_DEVICE_ATTR (periodic, S_IRUGO, show_periodic, NULL);
620
621#undef DBG_SCHED_LIMIT
622
623static ssize_t
624show_registers (struct class_device *class_dev, char *buf)
625{
626	struct usb_bus		*bus;
627	struct usb_hcd		*hcd;
628	struct ehci_hcd		*ehci;
629	unsigned long		flags;
630	unsigned		temp, size, i;
631	char			*next, scratch [80];
632	static char		fmt [] = "%*s\n";
633	static char		label [] = "";
634
635	bus = class_get_devdata(class_dev);
636	hcd = bus_to_hcd(bus);
637	ehci = hcd_to_ehci (hcd);
638	next = buf;
639	size = PAGE_SIZE;
640
641	spin_lock_irqsave (&ehci->lock, flags);
642
643	if (bus->controller->power.power_state.event) {
644		size = scnprintf (next, size,
645			"bus %s, device %s (driver " DRIVER_VERSION ")\n"
646			"%s\n"
647			"SUSPENDED (no register access)\n",
648			hcd->self.controller->bus->name,
649			hcd->self.controller->bus_id,
650			hcd->product_desc);
651		goto done;
652	}
653
654	/* Capability Registers */
655	i = HC_VERSION(ehci_readl(ehci, &ehci->caps->hc_capbase));
656	temp = scnprintf (next, size,
657		"bus %s, device %s (driver " DRIVER_VERSION ")\n"
658		"%s\n"
659		"EHCI %x.%02x, hcd state %d\n",
660		hcd->self.controller->bus->name,
661		hcd->self.controller->bus_id,
662		hcd->product_desc,
663		i >> 8, i & 0x0ff, hcd->state);
664	size -= temp;
665	next += temp;
666
667#ifdef	CONFIG_PCI
668	/* EHCI 0.96 and later may have "extended capabilities" */
669	if (hcd->self.controller->bus == &pci_bus_type) {
670		struct pci_dev	*pdev;
671		u32		offset, cap, cap2;
672		unsigned	count = 256/4;
673
674		pdev = to_pci_dev(ehci_to_hcd(ehci)->self.controller);
675		offset = HCC_EXT_CAPS (ehci_readl(ehci, &ehci->caps->hcc_params));
676		while (offset && count--) {
677			pci_read_config_dword (pdev, offset, &cap);
678			switch (cap & 0xff) {
679			case 1:
680				temp = scnprintf (next, size,
681					"ownership %08x%s%s\n", cap,
682					(cap & (1 << 24)) ? " linux" : "",
683					(cap & (1 << 16)) ? " firmware" : "");
684				size -= temp;
685				next += temp;
686
687				offset += 4;
688				pci_read_config_dword (pdev, offset, &cap2);
689				temp = scnprintf (next, size,
690					"SMI sts/enable 0x%08x\n", cap2);
691				size -= temp;
692				next += temp;
693				break;
694			case 0:		/* illegal reserved capability */
695				cap = 0;
696				/* FALLTHROUGH */
697			default:		/* unknown */
698				break;
699			}
700			temp = (cap >> 8) & 0xff;
701		}
702	}
703#endif
704
705	i = ehci_readl(ehci, &ehci->caps->hcs_params);
706	temp = scnprintf (next, size, "structural params 0x%08x\n", i);
707	size -= temp;
708	next += temp;
709
710	i = ehci_readl(ehci, &ehci->caps->hcc_params);
711	temp = scnprintf (next, size, "capability params 0x%08x\n", i);
712	size -= temp;
713	next += temp;
714
715	/* Operational Registers */
716	temp = dbg_status_buf (scratch, sizeof scratch, label,
717			ehci_readl(ehci, &ehci->regs->status));
718	temp = scnprintf (next, size, fmt, temp, scratch);
719	size -= temp;
720	next += temp;
721
722	temp = dbg_command_buf (scratch, sizeof scratch, label,
723			ehci_readl(ehci, &ehci->regs->command));
724	temp = scnprintf (next, size, fmt, temp, scratch);
725	size -= temp;
726	next += temp;
727
728	temp = dbg_intr_buf (scratch, sizeof scratch, label,
729			ehci_readl(ehci, &ehci->regs->intr_enable));
730	temp = scnprintf (next, size, fmt, temp, scratch);
731	size -= temp;
732	next += temp;
733
734	temp = scnprintf (next, size, "uframe %04x\n",
735			ehci_readl(ehci, &ehci->regs->frame_index));
736	size -= temp;
737	next += temp;
738
739	for (i = 1; i <= HCS_N_PORTS (ehci->hcs_params); i++) {
740		temp = dbg_port_buf (scratch, sizeof scratch, label, i,
741				ehci_readl(ehci, &ehci->regs->port_status [i - 1]));
742		temp = scnprintf (next, size, fmt, temp, scratch);
743		size -= temp;
744		next += temp;
745		if (i == HCS_DEBUG_PORT(ehci->hcs_params) && ehci->debug) {
746			temp = scnprintf (next, size,
747					"    debug control %08x\n",
748					ehci_readl(ehci, &ehci->debug->control));
749			size -= temp;
750			next += temp;
751		}
752	}
753
754	if (ehci->reclaim) {
755		temp = scnprintf (next, size, "reclaim qh %p%s\n",
756				ehci->reclaim,
757				ehci->reclaim_ready ? " ready" : "");
758		size -= temp;
759		next += temp;
760	}
761
762#ifdef EHCI_STATS
763	temp = scnprintf (next, size,
764		"irq normal %ld err %ld reclaim %ld (lost %ld)\n",
765		ehci->stats.normal, ehci->stats.error, ehci->stats.reclaim,
766		ehci->stats.lost_iaa);
767	size -= temp;
768	next += temp;
769
770	temp = scnprintf (next, size, "complete %ld unlink %ld\n",
771		ehci->stats.complete, ehci->stats.unlink);
772	size -= temp;
773	next += temp;
774#endif
775
776done:
777	spin_unlock_irqrestore (&ehci->lock, flags);
778
779	return PAGE_SIZE - size;
780}
781static CLASS_DEVICE_ATTR (registers, S_IRUGO, show_registers, NULL);
782
783static inline void create_debug_files (struct ehci_hcd *ehci)
784{
785	struct class_device *cldev = ehci_to_hcd(ehci)->self.class_dev;
786	int retval;
787
788	retval = class_device_create_file(cldev, &class_device_attr_async);
789	retval = class_device_create_file(cldev, &class_device_attr_periodic);
790	retval = class_device_create_file(cldev, &class_device_attr_registers);
791}
792
793static inline void remove_debug_files (struct ehci_hcd *ehci)
794{
795	struct class_device *cldev = ehci_to_hcd(ehci)->self.class_dev;
796
797	class_device_remove_file(cldev, &class_device_attr_async);
798	class_device_remove_file(cldev, &class_device_attr_periodic);
799	class_device_remove_file(cldev, &class_device_attr_registers);
800}
801
802#endif /* STUB_DEBUG_FILES */
803