1/* 2 * dz.c: Serial port driver for DECstations equipped 3 * with the DZ chipset. 4 * 5 * Copyright (C) 1998 Olivier A. D. Lebaillif 6 * 7 * Email: olivier.lebaillif@ifrsys.com 8 * 9 * Copyright (C) 2004, 2006 Maciej W. Rozycki 10 * 11 * [31-AUG-98] triemer 12 * Changed IRQ to use Harald's dec internals interrupts.h 13 * removed base_addr code - moving address assignment to setup.c 14 * Changed name of dz_init to rs_init to be consistent with tc code 15 * [13-NOV-98] triemer fixed code to receive characters 16 * after patches by harald to irq code. 17 * [09-JAN-99] triemer minor fix for schedule - due to removal of timeout 18 * field from "current" - somewhere between 2.1.121 and 2.1.131 19 Qua Jun 27 15:02:26 BRT 2001 20 * [27-JUN-2001] Arnaldo Carvalho de Melo <acme@conectiva.com.br> - cleanups 21 * 22 * Parts (C) 1999 David Airlie, airlied@linux.ie 23 * [07-SEP-99] Bugfixes 24 * 25 * [06-Jan-2002] Russell King <rmk@arm.linux.org.uk> 26 * Converted to new serial core 27 */ 28 29#undef DEBUG_DZ 30 31#if defined(CONFIG_SERIAL_DZ_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) 32#define SUPPORT_SYSRQ 33#endif 34 35#include <linux/delay.h> 36#include <linux/module.h> 37#include <linux/interrupt.h> 38#include <linux/init.h> 39#include <linux/console.h> 40#include <linux/sysrq.h> 41#include <linux/tty.h> 42#include <linux/tty_flip.h> 43#include <linux/serial_core.h> 44#include <linux/serial.h> 45 46#include <asm/bootinfo.h> 47#include <asm/dec/interrupts.h> 48#include <asm/dec/kn01.h> 49#include <asm/dec/kn02.h> 50#include <asm/dec/machtype.h> 51#include <asm/dec/prom.h> 52#include <asm/irq.h> 53#include <asm/system.h> 54#include <asm/uaccess.h> 55 56#include "dz.h" 57 58static char *dz_name = "DECstation DZ serial driver version "; 59static char *dz_version = "1.03"; 60 61struct dz_port { 62 struct uart_port port; 63 unsigned int cflag; 64}; 65 66static struct dz_port dz_ports[DZ_NB_PORT]; 67 68/* 69 * ------------------------------------------------------------ 70 * dz_in () and dz_out () 71 * 72 * These routines are used to access the registers of the DZ 73 * chip, hiding relocation differences between implementation. 74 * ------------------------------------------------------------ 75 */ 76 77static inline unsigned short dz_in(struct dz_port *dport, unsigned offset) 78{ 79 volatile unsigned short *addr = 80 (volatile unsigned short *) (dport->port.membase + offset); 81 82 return *addr; 83} 84 85static inline void dz_out(struct dz_port *dport, unsigned offset, 86 unsigned short value) 87{ 88 volatile unsigned short *addr = 89 (volatile unsigned short *) (dport->port.membase + offset); 90 91 *addr = value; 92} 93 94/* 95 * ------------------------------------------------------------ 96 * rs_stop () and rs_start () 97 * 98 * These routines are called before setting or resetting 99 * tty->stopped. They enable or disable transmitter interrupts, 100 * as necessary. 101 * ------------------------------------------------------------ 102 */ 103 104static void dz_stop_tx(struct uart_port *uport) 105{ 106 struct dz_port *dport = (struct dz_port *)uport; 107 unsigned short tmp, mask = 1 << dport->port.line; 108 unsigned long flags; 109 110 spin_lock_irqsave(&dport->port.lock, flags); 111 tmp = dz_in(dport, DZ_TCR); /* read the TX flag */ 112 tmp &= ~mask; /* clear the TX flag */ 113 dz_out(dport, DZ_TCR, tmp); 114 spin_unlock_irqrestore(&dport->port.lock, flags); 115} 116 117static void dz_start_tx(struct uart_port *uport) 118{ 119 struct dz_port *dport = (struct dz_port *)uport; 120 unsigned short tmp, mask = 1 << dport->port.line; 121 unsigned long flags; 122 123 spin_lock_irqsave(&dport->port.lock, flags); 124 tmp = dz_in(dport, DZ_TCR); /* read the TX flag */ 125 tmp |= mask; /* set the TX flag */ 126 dz_out(dport, DZ_TCR, tmp); 127 spin_unlock_irqrestore(&dport->port.lock, flags); 128} 129 130static void dz_stop_rx(struct uart_port *uport) 131{ 132 struct dz_port *dport = (struct dz_port *)uport; 133 unsigned long flags; 134 135 spin_lock_irqsave(&dport->port.lock, flags); 136 dport->cflag &= ~DZ_CREAD; 137 dz_out(dport, DZ_LPR, dport->cflag | dport->port.line); 138 spin_unlock_irqrestore(&dport->port.lock, flags); 139} 140 141static void dz_enable_ms(struct uart_port *port) 142{ 143 /* nothing to do */ 144} 145 146/* 147 * ------------------------------------------------------------ 148 * 149 * Here start the interrupt handling routines. All of the following 150 * subroutines are declared as inline and are folded into 151 * dz_interrupt. They were separated out for readability's sake. 152 * 153 * Note: dz_interrupt() is a "fast" interrupt, which means that it 154 * runs with interrupts turned off. People who may want to modify 155 * dz_interrupt() should try to keep the interrupt handler as fast as 156 * possible. After you are done making modifications, it is not a bad 157 * idea to do: 158 * 159 * make drivers/serial/dz.s 160 * 161 * and look at the resulting assemble code in dz.s. 162 * 163 * ------------------------------------------------------------ 164 */ 165 166/* 167 * ------------------------------------------------------------ 168 * receive_char () 169 * 170 * This routine deals with inputs from any lines. 171 * ------------------------------------------------------------ 172 */ 173static inline void dz_receive_chars(struct dz_port *dport_in) 174{ 175 struct dz_port *dport; 176 struct tty_struct *tty = NULL; 177 struct uart_icount *icount; 178 int lines_rx[DZ_NB_PORT] = { [0 ... DZ_NB_PORT - 1] = 0 }; 179 unsigned short status; 180 unsigned char ch, flag; 181 int i; 182 183 while ((status = dz_in(dport_in, DZ_RBUF)) & DZ_DVAL) { 184 dport = &dz_ports[LINE(status)]; 185 tty = dport->port.info->tty; /* point to the proper dev */ 186 187 ch = UCHAR(status); /* grab the char */ 188 189 icount = &dport->port.icount; 190 icount->rx++; 191 192 flag = TTY_NORMAL; 193 if (status & DZ_FERR) { /* frame error */ 194 /* 195 * There is no separate BREAK status bit, so 196 * treat framing errors as BREAKs for Magic SysRq 197 * and SAK; normally, otherwise. 198 */ 199 if (uart_handle_break(&dport->port)) 200 continue; 201 if (dport->port.flags & UPF_SAK) 202 flag = TTY_BREAK; 203 else 204 flag = TTY_FRAME; 205 } else if (status & DZ_OERR) /* overrun error */ 206 flag = TTY_OVERRUN; 207 else if (status & DZ_PERR) /* parity error */ 208 flag = TTY_PARITY; 209 210 /* keep track of the statistics */ 211 switch (flag) { 212 case TTY_FRAME: 213 icount->frame++; 214 break; 215 case TTY_PARITY: 216 icount->parity++; 217 break; 218 case TTY_OVERRUN: 219 icount->overrun++; 220 break; 221 case TTY_BREAK: 222 icount->brk++; 223 break; 224 default: 225 break; 226 } 227 228 if (uart_handle_sysrq_char(&dport->port, ch)) 229 continue; 230 231 if ((status & dport->port.ignore_status_mask) == 0) { 232 uart_insert_char(&dport->port, 233 status, DZ_OERR, ch, flag); 234 lines_rx[LINE(status)] = 1; 235 } 236 } 237 for (i = 0; i < DZ_NB_PORT; i++) 238 if (lines_rx[i]) 239 tty_flip_buffer_push(dz_ports[i].port.info->tty); 240} 241 242/* 243 * ------------------------------------------------------------ 244 * transmit_char () 245 * 246 * This routine deals with outputs to any lines. 247 * ------------------------------------------------------------ 248 */ 249static inline void dz_transmit_chars(struct dz_port *dport_in) 250{ 251 struct dz_port *dport; 252 struct circ_buf *xmit; 253 unsigned short status; 254 unsigned char tmp; 255 256 status = dz_in(dport_in, DZ_CSR); 257 dport = &dz_ports[LINE(status)]; 258 xmit = &dport->port.info->xmit; 259 260 if (dport->port.x_char) { /* XON/XOFF chars */ 261 dz_out(dport, DZ_TDR, dport->port.x_char); 262 dport->port.icount.tx++; 263 dport->port.x_char = 0; 264 return; 265 } 266 /* If nothing to do or stopped or hardware stopped. */ 267 if (uart_circ_empty(xmit) || uart_tx_stopped(&dport->port)) { 268 dz_stop_tx(&dport->port); 269 return; 270 } 271 272 /* 273 * If something to do... (remember the dz has no output fifo, 274 * so we go one char at a time) :-< 275 */ 276 tmp = xmit->buf[xmit->tail]; 277 xmit->tail = (xmit->tail + 1) & (DZ_XMIT_SIZE - 1); 278 dz_out(dport, DZ_TDR, tmp); 279 dport->port.icount.tx++; 280 281 if (uart_circ_chars_pending(xmit) < DZ_WAKEUP_CHARS) 282 uart_write_wakeup(&dport->port); 283 284 /* Are we are done. */ 285 if (uart_circ_empty(xmit)) 286 dz_stop_tx(&dport->port); 287} 288 289/* 290 * ------------------------------------------------------------ 291 * check_modem_status() 292 * 293 * DS 3100 & 5100: Only valid for the MODEM line, duh! 294 * DS 5000/200: Valid for the MODEM and PRINTER line. 295 * ------------------------------------------------------------ 296 */ 297static inline void check_modem_status(struct dz_port *dport) 298{ 299 unsigned short status; 300 301 /* If not the modem line just return. */ 302 if (dport->port.line != DZ_MODEM) 303 return; 304 305 status = dz_in(dport, DZ_MSR); 306 307 /* it's easy, since DSR2 is the only bit in the register */ 308 if (status) 309 dport->port.icount.dsr++; 310} 311 312/* 313 * ------------------------------------------------------------ 314 * dz_interrupt () 315 * 316 * this is the main interrupt routine for the DZ chip. 317 * It deals with the multiple ports. 318 * ------------------------------------------------------------ 319 */ 320static irqreturn_t dz_interrupt(int irq, void *dev) 321{ 322 struct dz_port *dport = (struct dz_port *)dev; 323 unsigned short status; 324 325 /* get the reason why we just got an irq */ 326 status = dz_in(dport, DZ_CSR); 327 328 if ((status & (DZ_RDONE | DZ_RIE)) == (DZ_RDONE | DZ_RIE)) 329 dz_receive_chars(dport); 330 331 if ((status & (DZ_TRDY | DZ_TIE)) == (DZ_TRDY | DZ_TIE)) 332 dz_transmit_chars(dport); 333 334 return IRQ_HANDLED; 335} 336 337/* 338 * ------------------------------------------------------------------- 339 * Here ends the DZ interrupt routines. 340 * ------------------------------------------------------------------- 341 */ 342 343static unsigned int dz_get_mctrl(struct uart_port *uport) 344{ 345 struct dz_port *dport = (struct dz_port *)uport; 346 unsigned int mctrl = TIOCM_CAR | TIOCM_DSR | TIOCM_CTS; 347 348 if (dport->port.line == DZ_MODEM) { 349 if (dz_in(dport, DZ_MSR) & DZ_MODEM_DSR) 350 mctrl &= ~TIOCM_DSR; 351 } 352 353 return mctrl; 354} 355 356static void dz_set_mctrl(struct uart_port *uport, unsigned int mctrl) 357{ 358 struct dz_port *dport = (struct dz_port *)uport; 359 unsigned short tmp; 360 361 if (dport->port.line == DZ_MODEM) { 362 tmp = dz_in(dport, DZ_TCR); 363 if (mctrl & TIOCM_DTR) 364 tmp &= ~DZ_MODEM_DTR; 365 else 366 tmp |= DZ_MODEM_DTR; 367 dz_out(dport, DZ_TCR, tmp); 368 } 369} 370 371/* 372 * ------------------------------------------------------------------- 373 * startup () 374 * 375 * various initialization tasks 376 * ------------------------------------------------------------------- 377 */ 378static int dz_startup(struct uart_port *uport) 379{ 380 struct dz_port *dport = (struct dz_port *)uport; 381 unsigned long flags; 382 unsigned short tmp; 383 384 spin_lock_irqsave(&dport->port.lock, flags); 385 386 /* enable the interrupt and the scanning */ 387 tmp = dz_in(dport, DZ_CSR); 388 tmp |= DZ_RIE | DZ_TIE | DZ_MSE; 389 dz_out(dport, DZ_CSR, tmp); 390 391 spin_unlock_irqrestore(&dport->port.lock, flags); 392 393 return 0; 394} 395 396/* 397 * ------------------------------------------------------------------- 398 * shutdown () 399 * 400 * This routine will shutdown a serial port; interrupts are disabled, and 401 * DTR is dropped if the hangup on close termio flag is on. 402 * ------------------------------------------------------------------- 403 */ 404static void dz_shutdown(struct uart_port *uport) 405{ 406 dz_stop_tx(uport); 407} 408 409/* 410 * ------------------------------------------------------------------- 411 * dz_tx_empty() -- get the transmitter empty status 412 * 413 * Purpose: Let user call ioctl() to get info when the UART physically 414 * is emptied. On bus types like RS485, the transmitter must 415 * release the bus after transmitting. This must be done when 416 * the transmit shift register is empty, not be done when the 417 * transmit holding register is empty. This functionality 418 * allows an RS485 driver to be written in user space. 419 * ------------------------------------------------------------------- 420 */ 421static unsigned int dz_tx_empty(struct uart_port *uport) 422{ 423 struct dz_port *dport = (struct dz_port *)uport; 424 unsigned short tmp, mask = 1 << dport->port.line; 425 426 tmp = dz_in(dport, DZ_TCR); 427 tmp &= mask; 428 429 return tmp ? 0 : TIOCSER_TEMT; 430} 431 432static void dz_break_ctl(struct uart_port *uport, int break_state) 433{ 434 struct dz_port *dport = (struct dz_port *)uport; 435 unsigned long flags; 436 unsigned short tmp, mask = 1 << dport->port.line; 437 438 spin_lock_irqsave(&uport->lock, flags); 439 tmp = dz_in(dport, DZ_TCR); 440 if (break_state) 441 tmp |= mask; 442 else 443 tmp &= ~mask; 444 dz_out(dport, DZ_TCR, tmp); 445 spin_unlock_irqrestore(&uport->lock, flags); 446} 447 448static void dz_set_termios(struct uart_port *uport, struct ktermios *termios, 449 struct ktermios *old_termios) 450{ 451 struct dz_port *dport = (struct dz_port *)uport; 452 unsigned long flags; 453 unsigned int cflag, baud; 454 455 cflag = dport->port.line; 456 457 switch (termios->c_cflag & CSIZE) { 458 case CS5: 459 cflag |= DZ_CS5; 460 break; 461 case CS6: 462 cflag |= DZ_CS6; 463 break; 464 case CS7: 465 cflag |= DZ_CS7; 466 break; 467 case CS8: 468 default: 469 cflag |= DZ_CS8; 470 } 471 472 if (termios->c_cflag & CSTOPB) 473 cflag |= DZ_CSTOPB; 474 if (termios->c_cflag & PARENB) 475 cflag |= DZ_PARENB; 476 if (termios->c_cflag & PARODD) 477 cflag |= DZ_PARODD; 478 479 baud = uart_get_baud_rate(uport, termios, old_termios, 50, 9600); 480 switch (baud) { 481 case 50: 482 cflag |= DZ_B50; 483 break; 484 case 75: 485 cflag |= DZ_B75; 486 break; 487 case 110: 488 cflag |= DZ_B110; 489 break; 490 case 134: 491 cflag |= DZ_B134; 492 break; 493 case 150: 494 cflag |= DZ_B150; 495 break; 496 case 300: 497 cflag |= DZ_B300; 498 break; 499 case 600: 500 cflag |= DZ_B600; 501 break; 502 case 1200: 503 cflag |= DZ_B1200; 504 break; 505 case 1800: 506 cflag |= DZ_B1800; 507 break; 508 case 2000: 509 cflag |= DZ_B2000; 510 break; 511 case 2400: 512 cflag |= DZ_B2400; 513 break; 514 case 3600: 515 cflag |= DZ_B3600; 516 break; 517 case 4800: 518 cflag |= DZ_B4800; 519 break; 520 case 7200: 521 cflag |= DZ_B7200; 522 break; 523 case 9600: 524 default: 525 cflag |= DZ_B9600; 526 } 527 528 if (termios->c_cflag & CREAD) 529 cflag |= DZ_RXENAB; 530 531 spin_lock_irqsave(&dport->port.lock, flags); 532 533 dz_out(dport, DZ_LPR, cflag | dport->port.line); 534 dport->cflag = cflag; 535 536 /* setup accept flag */ 537 dport->port.read_status_mask = DZ_OERR; 538 if (termios->c_iflag & INPCK) 539 dport->port.read_status_mask |= DZ_FERR | DZ_PERR; 540 541 /* characters to ignore */ 542 uport->ignore_status_mask = 0; 543 if (termios->c_iflag & IGNPAR) 544 dport->port.ignore_status_mask |= DZ_FERR | DZ_PERR; 545 546 spin_unlock_irqrestore(&dport->port.lock, flags); 547} 548 549static const char *dz_type(struct uart_port *port) 550{ 551 return "DZ"; 552} 553 554static void dz_release_port(struct uart_port *port) 555{ 556 /* nothing to do */ 557} 558 559static int dz_request_port(struct uart_port *port) 560{ 561 return 0; 562} 563 564static void dz_config_port(struct uart_port *port, int flags) 565{ 566 if (flags & UART_CONFIG_TYPE) 567 port->type = PORT_DZ; 568} 569 570/* 571 * verify the new serial_struct (for TIOCSSERIAL). 572 */ 573static int dz_verify_port(struct uart_port *port, struct serial_struct *ser) 574{ 575 int ret = 0; 576 if (ser->type != PORT_UNKNOWN && ser->type != PORT_DZ) 577 ret = -EINVAL; 578 if (ser->irq != port->irq) 579 ret = -EINVAL; 580 return ret; 581} 582 583static struct uart_ops dz_ops = { 584 .tx_empty = dz_tx_empty, 585 .get_mctrl = dz_get_mctrl, 586 .set_mctrl = dz_set_mctrl, 587 .stop_tx = dz_stop_tx, 588 .start_tx = dz_start_tx, 589 .stop_rx = dz_stop_rx, 590 .enable_ms = dz_enable_ms, 591 .break_ctl = dz_break_ctl, 592 .startup = dz_startup, 593 .shutdown = dz_shutdown, 594 .set_termios = dz_set_termios, 595 .type = dz_type, 596 .release_port = dz_release_port, 597 .request_port = dz_request_port, 598 .config_port = dz_config_port, 599 .verify_port = dz_verify_port, 600}; 601 602static void __init dz_init_ports(void) 603{ 604 static int first = 1; 605 struct dz_port *dport; 606 unsigned long base; 607 int i; 608 609 if (!first) 610 return; 611 first = 0; 612 613 if (mips_machtype == MACH_DS23100 || 614 mips_machtype == MACH_DS5100) 615 base = CKSEG1ADDR(KN01_SLOT_BASE + KN01_DZ11); 616 else 617 base = CKSEG1ADDR(KN02_SLOT_BASE + KN02_DZ11); 618 619 for (i = 0, dport = dz_ports; i < DZ_NB_PORT; i++, dport++) { 620 spin_lock_init(&dport->port.lock); 621 dport->port.membase = (char *) base; 622 dport->port.iotype = UPIO_MEM; 623 dport->port.irq = dec_interrupt[DEC_IRQ_DZ11]; 624 dport->port.line = i; 625 dport->port.fifosize = 1; 626 dport->port.ops = &dz_ops; 627 dport->port.flags = UPF_BOOT_AUTOCONF; 628 } 629} 630 631static void dz_reset(struct dz_port *dport) 632{ 633 dz_out(dport, DZ_CSR, DZ_CLR); 634 while (dz_in(dport, DZ_CSR) & DZ_CLR); 635 iob(); 636 637 /* enable scanning */ 638 dz_out(dport, DZ_CSR, DZ_MSE); 639} 640 641#ifdef CONFIG_SERIAL_DZ_CONSOLE 642/* 643 * ------------------------------------------------------------------- 644 * dz_console_putchar() -- transmit a character 645 * 646 * Polled transmission. This is tricky. We need to mask transmit 647 * interrupts so that they do not interfere, enable the transmitter 648 * for the line requested and then wait till the transmit scanner 649 * requests data for this line. But it may request data for another 650 * line first, in which case we have to disable its transmitter and 651 * repeat waiting till our line pops up. Only then the character may 652 * be transmitted. Finally, the state of the transmitter mask is 653 * restored. Welcome to the world of PDP-11! 654 * ------------------------------------------------------------------- 655 */ 656static void dz_console_putchar(struct uart_port *uport, int ch) 657{ 658 struct dz_port *dport = (struct dz_port *)uport; 659 unsigned long flags; 660 unsigned short csr, tcr, trdy, mask; 661 int loops = 10000; 662 663 spin_lock_irqsave(&dport->port.lock, flags); 664 csr = dz_in(dport, DZ_CSR); 665 dz_out(dport, DZ_CSR, csr & ~DZ_TIE); 666 tcr = dz_in(dport, DZ_TCR); 667 tcr |= 1 << dport->port.line; 668 mask = tcr; 669 dz_out(dport, DZ_TCR, mask); 670 iob(); 671 spin_unlock_irqrestore(&dport->port.lock, flags); 672 673 while (loops--) { 674 trdy = dz_in(dport, DZ_CSR); 675 if (!(trdy & DZ_TRDY)) 676 continue; 677 trdy = (trdy & DZ_TLINE) >> 8; 678 if (trdy == dport->port.line) 679 break; 680 mask &= ~(1 << trdy); 681 dz_out(dport, DZ_TCR, mask); 682 iob(); 683 udelay(2); 684 } 685 686 if (loops) /* Cannot send otherwise. */ 687 dz_out(dport, DZ_TDR, ch); 688 689 dz_out(dport, DZ_TCR, tcr); 690 dz_out(dport, DZ_CSR, csr); 691} 692 693/* 694 * ------------------------------------------------------------------- 695 * dz_console_print () 696 * 697 * dz_console_print is registered for printk. 698 * The console must be locked when we get here. 699 * ------------------------------------------------------------------- 700 */ 701static void dz_console_print(struct console *co, 702 const char *str, 703 unsigned int count) 704{ 705 struct dz_port *dport = &dz_ports[co->index]; 706#ifdef DEBUG_DZ 707 prom_printf((char *) str); 708#endif 709 uart_console_write(&dport->port, str, count, dz_console_putchar); 710} 711 712static int __init dz_console_setup(struct console *co, char *options) 713{ 714 struct dz_port *dport = &dz_ports[co->index]; 715 int baud = 9600; 716 int bits = 8; 717 int parity = 'n'; 718 int flow = 'n'; 719 720 if (options) 721 uart_parse_options(options, &baud, &parity, &bits, &flow); 722 723 dz_reset(dport); 724 725 return uart_set_options(&dport->port, co, baud, parity, bits, flow); 726} 727 728static struct uart_driver dz_reg; 729static struct console dz_sercons = { 730 .name = "ttyS", 731 .write = dz_console_print, 732 .device = uart_console_device, 733 .setup = dz_console_setup, 734 .flags = CON_PRINTBUFFER, 735 .index = -1, 736 .data = &dz_reg, 737}; 738 739static int __init dz_serial_console_init(void) 740{ 741 if (!IOASIC) { 742 dz_init_ports(); 743 register_console(&dz_sercons); 744 return 0; 745 } else 746 return -ENXIO; 747} 748 749console_initcall(dz_serial_console_init); 750 751#define SERIAL_DZ_CONSOLE &dz_sercons 752#else 753#define SERIAL_DZ_CONSOLE NULL 754#endif /* CONFIG_SERIAL_DZ_CONSOLE */ 755 756static struct uart_driver dz_reg = { 757 .owner = THIS_MODULE, 758 .driver_name = "serial", 759 .dev_name = "ttyS", 760 .major = TTY_MAJOR, 761 .minor = 64, 762 .nr = DZ_NB_PORT, 763 .cons = SERIAL_DZ_CONSOLE, 764}; 765 766static int __init dz_init(void) 767{ 768 int ret, i; 769 770 if (IOASIC) 771 return -ENXIO; 772 773 printk("%s%s\n", dz_name, dz_version); 774 775 dz_init_ports(); 776 777#ifndef CONFIG_SERIAL_DZ_CONSOLE 778 /* reset the chip */ 779 dz_reset(&dz_ports[0]); 780#endif 781 782 if (request_irq(dz_ports[0].port.irq, dz_interrupt, 783 IRQF_DISABLED, "DZ", &dz_ports[0])) 784 panic("Unable to register DZ interrupt"); 785 786 ret = uart_register_driver(&dz_reg); 787 if (ret != 0) 788 return ret; 789 790 for (i = 0; i < DZ_NB_PORT; i++) 791 uart_add_one_port(&dz_reg, &dz_ports[i].port); 792 793 return ret; 794} 795 796module_init(dz_init); 797 798MODULE_DESCRIPTION("DECstation DZ serial driver"); 799MODULE_LICENSE("GPL"); 800