1
2
3#include <linux/module.h>
4#include <linux/moduleparam.h>
5#include <linux/kernel.h>
6#include <linux/string.h>
7#include <linux/timer.h>
8#include <linux/errno.h>
9#include <linux/ioport.h>
10#include <linux/slab.h>
11#include <linux/interrupt.h>
12#include <linux/pci.h>
13#include <linux/netdevice.h>
14#include <linux/init.h>
15#include <linux/mii.h>
16#include <linux/etherdevice.h>
17#include <linux/skbuff.h>
18#include <linux/delay.h>
19#include <linux/ethtool.h>
20#include <linux/crc32.h>
21#include <linux/bitops.h>
22#include <linux/dma-mapping.h>
23
24#include <asm/processor.h>      /* Processor type for cache alignment. */
25#include <asm/io.h>
26#include <asm/irq.h>
27#include <asm/uaccess.h>	/* User space memory access functions */
28
29#include "sis900.h"
30
31#define SIS900_MODULE_NAME "sis900"
32#define SIS900_DRV_VERSION "v1.08.10 Apr. 2 2006"
33
34static char version[] __devinitdata =
35KERN_INFO "sis900.c: " SIS900_DRV_VERSION "\n";
36
37static int max_interrupt_work = 40;
38static int multicast_filter_limit = 128;
39
40static int sis900_debug = -1; /* Use SIS900_DEF_MSG as value */
41
42#define SIS900_DEF_MSG \
43	(NETIF_MSG_DRV		| \
44	 NETIF_MSG_LINK		| \
45	 NETIF_MSG_RX_ERR	| \
46	 NETIF_MSG_TX_ERR)
47
48/* Time in jiffies before concluding the transmitter is hung. */
49#define TX_TIMEOUT  (4*HZ)
50
51enum {
52	SIS_900 = 0,
53	SIS_7016
54};
55static const char * card_names[] = {
56	"SiS 900 PCI Fast Ethernet",
57	"SiS 7016 PCI Fast Ethernet"
58};
59static struct pci_device_id sis900_pci_tbl [] = {
60	{PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_900,
61	 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_900},
62	{PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_7016,
63	 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_7016},
64	{0,}
65};
66MODULE_DEVICE_TABLE (pci, sis900_pci_tbl);
67
68static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex);
69
70static const struct mii_chip_info {
71	const char * name;
72	u16 phy_id0;
73	u16 phy_id1;
74	u8  phy_types;
75#define	HOME 	0x0001
76#define LAN	0x0002
77#define MIX	0x0003
78#define UNKNOWN	0x0
79} mii_chip_table[] = {
80	{ "SiS 900 Internal MII PHY", 		0x001d, 0x8000, LAN },
81	{ "SiS 7014 Physical Layer Solution", 	0x0016, 0xf830, LAN },
82	{ "SiS 900 on Foxconn 661 7MI",         0x0143, 0xBC70, LAN },
83	{ "Altimata AC101LF PHY",               0x0022, 0x5520, LAN },
84	{ "ADM 7001 LAN PHY",			0x002e, 0xcc60, LAN },
85	{ "AMD 79C901 10BASE-T PHY",  		0x0000, 0x6B70, LAN },
86	{ "AMD 79C901 HomePNA PHY",		0x0000, 0x6B90, HOME},
87	{ "ICS LAN PHY",			0x0015, 0xF440, LAN },
88	{ "ICS LAN PHY",			0x0143, 0xBC70, LAN },
89	{ "NS 83851 PHY",			0x2000, 0x5C20, MIX },
90	{ "NS 83847 PHY",                       0x2000, 0x5C30, MIX },
91	{ "Realtek RTL8201 PHY",		0x0000, 0x8200, LAN },
92	{ "VIA 6103 PHY",			0x0101, 0x8f20, LAN },
93	{NULL,},
94};
95
96struct mii_phy {
97	struct mii_phy * next;
98	int phy_addr;
99	u16 phy_id0;
100	u16 phy_id1;
101	u16 status;
102	u8  phy_types;
103};
104
105typedef struct _BufferDesc {
106	u32 link;
107	u32 cmdsts;
108	u32 bufptr;
109} BufferDesc;
110
111struct sis900_private {
112	struct net_device_stats stats;
113	struct pci_dev * pci_dev;
114
115	spinlock_t lock;
116
117	struct mii_phy * mii;
118	struct mii_phy * first_mii; /* record the first mii structure */
119	unsigned int cur_phy;
120	struct mii_if_info mii_info;
121
122	struct timer_list timer; /* Link status detection timer. */
123	u8 autong_complete; /* 1: auto-negotiate complete  */
124
125	u32 msg_enable;
126
127	unsigned int cur_rx, dirty_rx; /* producer/comsumer pointers for Tx/Rx ring */
128	unsigned int cur_tx, dirty_tx;
129
130	/* The saved address of a sent/receive-in-place packet buffer */
131	struct sk_buff *tx_skbuff[NUM_TX_DESC];
132	struct sk_buff *rx_skbuff[NUM_RX_DESC];
133	BufferDesc *tx_ring;
134	BufferDesc *rx_ring;
135
136	dma_addr_t tx_ring_dma;
137	dma_addr_t rx_ring_dma;
138
139	unsigned int tx_full; /* The Tx queue is full. */
140	u8 host_bridge_rev;
141	u8 chipset_rev;
142};
143
144MODULE_AUTHOR("Jim Huang <cmhuang@sis.com.tw>, Ollie Lho <ollie@sis.com.tw>");
145MODULE_DESCRIPTION("SiS 900 PCI Fast Ethernet driver");
146MODULE_LICENSE("GPL");
147
148module_param(multicast_filter_limit, int, 0444);
149module_param(max_interrupt_work, int, 0444);
150module_param(sis900_debug, int, 0444);
151MODULE_PARM_DESC(multicast_filter_limit, "SiS 900/7016 maximum number of filtered multicast addresses");
152MODULE_PARM_DESC(max_interrupt_work, "SiS 900/7016 maximum events handled per interrupt");
153MODULE_PARM_DESC(sis900_debug, "SiS 900/7016 bitmapped debugging message level");
154
155#ifdef CONFIG_NET_POLL_CONTROLLER
156static void sis900_poll(struct net_device *dev);
157#endif
158static int sis900_open(struct net_device *net_dev);
159static int sis900_mii_probe (struct net_device * net_dev);
160static void sis900_init_rxfilter (struct net_device * net_dev);
161static u16 read_eeprom(long ioaddr, int location);
162static int mdio_read(struct net_device *net_dev, int phy_id, int location);
163static void mdio_write(struct net_device *net_dev, int phy_id, int location, int val);
164static void sis900_timer(unsigned long data);
165static void sis900_check_mode (struct net_device *net_dev, struct mii_phy *mii_phy);
166static void sis900_tx_timeout(struct net_device *net_dev);
167static void sis900_init_tx_ring(struct net_device *net_dev);
168static void sis900_init_rx_ring(struct net_device *net_dev);
169static int sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev);
170static int sis900_rx(struct net_device *net_dev);
171static void sis900_finish_xmit (struct net_device *net_dev);
172static irqreturn_t sis900_interrupt(int irq, void *dev_instance);
173static int sis900_close(struct net_device *net_dev);
174static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd);
175static struct net_device_stats *sis900_get_stats(struct net_device *net_dev);
176static u16 sis900_mcast_bitnr(u8 *addr, u8 revision);
177static void set_rx_mode(struct net_device *net_dev);
178static void sis900_reset(struct net_device *net_dev);
179static void sis630_set_eq(struct net_device *net_dev, u8 revision);
180static int sis900_set_config(struct net_device *dev, struct ifmap *map);
181static u16 sis900_default_phy(struct net_device * net_dev);
182static void sis900_set_capability( struct net_device *net_dev ,struct mii_phy *phy);
183static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr);
184static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr);
185static void sis900_set_mode (long ioaddr, int speed, int duplex);
186static const struct ethtool_ops sis900_ethtool_ops;
187
188/**
189 *	sis900_get_mac_addr - Get MAC address for stand alone SiS900 model
190 *	@pci_dev: the sis900 pci device
191 *	@net_dev: the net device to get address for
192 *
193 *	Older SiS900 and friends, use EEPROM to store MAC address.
194 *	MAC address is read from read_eeprom() into @net_dev->dev_addr.
195 */
196
197static int __devinit sis900_get_mac_addr(struct pci_dev * pci_dev, struct net_device *net_dev)
198{
199	long ioaddr = pci_resource_start(pci_dev, 0);
200	u16 signature;
201	int i;
202
203	/* check to see if we have sane EEPROM */
204	signature = (u16) read_eeprom(ioaddr, EEPROMSignature);
205	if (signature == 0xffff || signature == 0x0000) {
206		printk (KERN_WARNING "%s: Error EERPOM read %x\n",
207			pci_name(pci_dev), signature);
208		return 0;
209	}
210
211	/* get MAC address from EEPROM */
212	for (i = 0; i < 3; i++)
213	        ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr);
214
215	return 1;
216}
217
218/**
219 *	sis630e_get_mac_addr - Get MAC address for SiS630E model
220 *	@pci_dev: the sis900 pci device
221 *	@net_dev: the net device to get address for
222 *
223 *	SiS630E model, use APC CMOS RAM to store MAC address.
224 *	APC CMOS RAM is accessed through ISA bridge.
225 *	MAC address is read into @net_dev->dev_addr.
226 */
227
228static int __devinit sis630e_get_mac_addr(struct pci_dev * pci_dev,
229					struct net_device *net_dev)
230{
231	struct pci_dev *isa_bridge = NULL;
232	u8 reg;
233	int i;
234
235	isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0008, isa_bridge);
236	if (!isa_bridge)
237		isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0018, isa_bridge);
238	if (!isa_bridge) {
239		printk(KERN_WARNING "%s: Can not find ISA bridge\n",
240		       pci_name(pci_dev));
241		return 0;
242	}
243	pci_read_config_byte(isa_bridge, 0x48, &reg);
244	pci_write_config_byte(isa_bridge, 0x48, reg | 0x40);
245
246	for (i = 0; i < 6; i++) {
247		outb(0x09 + i, 0x70);
248		((u8 *)(net_dev->dev_addr))[i] = inb(0x71);
249	}
250	pci_write_config_byte(isa_bridge, 0x48, reg & ~0x40);
251	pci_dev_put(isa_bridge);
252
253	return 1;
254}
255
256
257/**
258 *	sis635_get_mac_addr - Get MAC address for SIS635 model
259 *	@pci_dev: the sis900 pci device
260 *	@net_dev: the net device to get address for
261 *
262 *	SiS635 model, set MAC Reload Bit to load Mac address from APC
263 *	to rfdr. rfdr is accessed through rfcr. MAC address is read into
264 *	@net_dev->dev_addr.
265 */
266
267static int __devinit sis635_get_mac_addr(struct pci_dev * pci_dev,
268					struct net_device *net_dev)
269{
270	long ioaddr = net_dev->base_addr;
271	u32 rfcrSave;
272	u32 i;
273
274	rfcrSave = inl(rfcr + ioaddr);
275
276	outl(rfcrSave | RELOAD, ioaddr + cr);
277	outl(0, ioaddr + cr);
278
279	/* disable packet filtering before setting filter */
280	outl(rfcrSave & ~RFEN, rfcr + ioaddr);
281
282	/* load MAC addr to filter data register */
283	for (i = 0 ; i < 3 ; i++) {
284		outl((i << RFADDR_shift), ioaddr + rfcr);
285		*( ((u16 *)net_dev->dev_addr) + i) = inw(ioaddr + rfdr);
286	}
287
288	/* enable packet filtering */
289	outl(rfcrSave | RFEN, rfcr + ioaddr);
290
291	return 1;
292}
293
294/**
295 *	sis96x_get_mac_addr - Get MAC address for SiS962 or SiS963 model
296 *	@pci_dev: the sis900 pci device
297 *	@net_dev: the net device to get address for
298 *
299 *	SiS962 or SiS963 model, use EEPROM to store MAC address. And EEPROM
300 *	is shared by
301 *	LAN and 1394. When access EEPROM, send EEREQ signal to hardware first
302 *	and wait for EEGNT. If EEGNT is ON, EEPROM is permitted to be access
303 *	by LAN, otherwise is not. After MAC address is read from EEPROM, send
304 *	EEDONE signal to refuse EEPROM access by LAN.
305 *	The EEPROM map of SiS962 or SiS963 is different to SiS900.
306 *	The signature field in SiS962 or SiS963 spec is meaningless.
307 *	MAC address is read into @net_dev->dev_addr.
308 */
309
310static int __devinit sis96x_get_mac_addr(struct pci_dev * pci_dev,
311					struct net_device *net_dev)
312{
313	long ioaddr = net_dev->base_addr;
314	long ee_addr = ioaddr + mear;
315	u32 waittime = 0;
316	int i;
317
318	outl(EEREQ, ee_addr);
319	while(waittime < 2000) {
320		if(inl(ee_addr) & EEGNT) {
321
322			/* get MAC address from EEPROM */
323			for (i = 0; i < 3; i++)
324			        ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr);
325
326			outl(EEDONE, ee_addr);
327			return 1;
328		} else {
329			udelay(1);
330			waittime ++;
331		}
332	}
333	outl(EEDONE, ee_addr);
334	return 0;
335}
336
337/**
338 *	sis900_probe - Probe for sis900 device
339 *	@pci_dev: the sis900 pci device
340 *	@pci_id: the pci device ID
341 *
342 *	Check and probe sis900 net device for @pci_dev.
343 *	Get mac address according to the chip revision,
344 *	and assign SiS900-specific entries in the device structure.
345 *	ie: sis900_open(), sis900_start_xmit(), sis900_close(), etc.
346 */
347
348static int __devinit sis900_probe(struct pci_dev *pci_dev,
349				const struct pci_device_id *pci_id)
350{
351	struct sis900_private *sis_priv;
352	struct net_device *net_dev;
353	struct pci_dev *dev;
354	dma_addr_t ring_dma;
355	void *ring_space;
356	long ioaddr;
357	int i, ret;
358	const char *card_name = card_names[pci_id->driver_data];
359	const char *dev_name = pci_name(pci_dev);
360
361/* when built into the kernel, we only print version if device is found */
362#ifndef MODULE
363	static int printed_version;
364	if (!printed_version++)
365		printk(version);
366#endif
367
368	/* setup various bits in PCI command register */
369	ret = pci_enable_device(pci_dev);
370	if(ret) return ret;
371
372	i = pci_set_dma_mask(pci_dev, DMA_32BIT_MASK);
373	if(i){
374		printk(KERN_ERR "sis900.c: architecture does not support"
375			"32bit PCI busmaster DMA\n");
376		return i;
377	}
378
379	pci_set_master(pci_dev);
380
381	net_dev = alloc_etherdev(sizeof(struct sis900_private));
382	if (!net_dev)
383		return -ENOMEM;
384	SET_MODULE_OWNER(net_dev);
385	SET_NETDEV_DEV(net_dev, &pci_dev->dev);
386
387	/* We do a request_region() to register /proc/ioports info. */
388	ioaddr = pci_resource_start(pci_dev, 0);
389	ret = pci_request_regions(pci_dev, "sis900");
390	if (ret)
391		goto err_out;
392
393	sis_priv = net_dev->priv;
394	net_dev->base_addr = ioaddr;
395	net_dev->irq = pci_dev->irq;
396	sis_priv->pci_dev = pci_dev;
397	spin_lock_init(&sis_priv->lock);
398
399	pci_set_drvdata(pci_dev, net_dev);
400
401	ring_space = pci_alloc_consistent(pci_dev, TX_TOTAL_SIZE, &ring_dma);
402	if (!ring_space) {
403		ret = -ENOMEM;
404		goto err_out_cleardev;
405	}
406	sis_priv->tx_ring = (BufferDesc *)ring_space;
407	sis_priv->tx_ring_dma = ring_dma;
408
409	ring_space = pci_alloc_consistent(pci_dev, RX_TOTAL_SIZE, &ring_dma);
410	if (!ring_space) {
411		ret = -ENOMEM;
412		goto err_unmap_tx;
413	}
414	sis_priv->rx_ring = (BufferDesc *)ring_space;
415	sis_priv->rx_ring_dma = ring_dma;
416
417	/* The SiS900-specific entries in the device structure. */
418	net_dev->open = &sis900_open;
419	net_dev->hard_start_xmit = &sis900_start_xmit;
420	net_dev->stop = &sis900_close;
421	net_dev->get_stats = &sis900_get_stats;
422	net_dev->set_config = &sis900_set_config;
423	net_dev->set_multicast_list = &set_rx_mode;
424	net_dev->do_ioctl = &mii_ioctl;
425	net_dev->tx_timeout = sis900_tx_timeout;
426	net_dev->watchdog_timeo = TX_TIMEOUT;
427	net_dev->ethtool_ops = &sis900_ethtool_ops;
428
429#ifdef CONFIG_NET_POLL_CONTROLLER
430        net_dev->poll_controller = &sis900_poll;
431#endif
432
433	if (sis900_debug > 0)
434		sis_priv->msg_enable = sis900_debug;
435	else
436		sis_priv->msg_enable = SIS900_DEF_MSG;
437
438	sis_priv->mii_info.dev = net_dev;
439	sis_priv->mii_info.mdio_read = mdio_read;
440	sis_priv->mii_info.mdio_write = mdio_write;
441	sis_priv->mii_info.phy_id_mask = 0x1f;
442	sis_priv->mii_info.reg_num_mask = 0x1f;
443
444	/* Get Mac address according to the chip revision */
445	pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &(sis_priv->chipset_rev));
446	if(netif_msg_probe(sis_priv))
447		printk(KERN_DEBUG "%s: detected revision %2.2x, "
448				"trying to get MAC address...\n",
449				dev_name, sis_priv->chipset_rev);
450
451	ret = 0;
452	if (sis_priv->chipset_rev == SIS630E_900_REV)
453		ret = sis630e_get_mac_addr(pci_dev, net_dev);
454	else if ((sis_priv->chipset_rev > 0x81) && (sis_priv->chipset_rev <= 0x90) )
455		ret = sis635_get_mac_addr(pci_dev, net_dev);
456	else if (sis_priv->chipset_rev == SIS96x_900_REV)
457		ret = sis96x_get_mac_addr(pci_dev, net_dev);
458	else
459		ret = sis900_get_mac_addr(pci_dev, net_dev);
460
461	if (ret == 0) {
462		printk(KERN_WARNING "%s: Cannot read MAC address.\n", dev_name);
463		ret = -ENODEV;
464		goto err_unmap_rx;
465	}
466
467	/* 630ET : set the mii access mode as software-mode */
468	if (sis_priv->chipset_rev == SIS630ET_900_REV)
469		outl(ACCESSMODE | inl(ioaddr + cr), ioaddr + cr);
470
471	/* probe for mii transceiver */
472	if (sis900_mii_probe(net_dev) == 0) {
473		printk(KERN_WARNING "%s: Error probing MII device.\n",
474		       dev_name);
475		ret = -ENODEV;
476		goto err_unmap_rx;
477	}
478
479	/* save our host bridge revision */
480	dev = pci_get_device(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_630, NULL);
481	if (dev) {
482		pci_read_config_byte(dev, PCI_CLASS_REVISION, &sis_priv->host_bridge_rev);
483		pci_dev_put(dev);
484	}
485
486	ret = register_netdev(net_dev);
487	if (ret)
488		goto err_unmap_rx;
489
490	/* print some information about our NIC */
491	printk(KERN_INFO "%s: %s at %#lx, IRQ %d, ", net_dev->name,
492	       card_name, ioaddr, net_dev->irq);
493	for (i = 0; i < 5; i++)
494		printk("%2.2x:", (u8)net_dev->dev_addr[i]);
495	printk("%2.2x.\n", net_dev->dev_addr[i]);
496
497	/* Detect Wake on Lan support */
498	ret = (inl(net_dev->base_addr + CFGPMC) & PMESP) >> 27;
499	if (netif_msg_probe(sis_priv) && (ret & PME_D3C) == 0)
500		printk(KERN_INFO "%s: Wake on LAN only available from suspend to RAM.", net_dev->name);
501
502	return 0;
503
504 err_unmap_rx:
505	pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring,
506		sis_priv->rx_ring_dma);
507 err_unmap_tx:
508	pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring,
509		sis_priv->tx_ring_dma);
510 err_out_cleardev:
511 	pci_set_drvdata(pci_dev, NULL);
512	pci_release_regions(pci_dev);
513 err_out:
514	free_netdev(net_dev);
515	return ret;
516}
517
518/**
519 *	sis900_mii_probe - Probe MII PHY for sis900
520 *	@net_dev: the net device to probe for
521 *
522 *	Search for total of 32 possible mii phy addresses.
523 *	Identify and set current phy if found one,
524 *	return error if it failed to found.
525 */
526
527static int __init sis900_mii_probe(struct net_device * net_dev)
528{
529	struct sis900_private * sis_priv = net_dev->priv;
530	const char *dev_name = pci_name(sis_priv->pci_dev);
531	u16 poll_bit = MII_STAT_LINK, status = 0;
532	unsigned long timeout = jiffies + 5 * HZ;
533	int phy_addr;
534
535	sis_priv->mii = NULL;
536
537	/* search for total of 32 possible mii phy addresses */
538	for (phy_addr = 0; phy_addr < 32; phy_addr++) {
539		struct mii_phy * mii_phy = NULL;
540		u16 mii_status;
541		int i;
542
543		mii_phy = NULL;
544		for(i = 0; i < 2; i++)
545			mii_status = mdio_read(net_dev, phy_addr, MII_STATUS);
546
547		if (mii_status == 0xffff || mii_status == 0x0000) {
548			if (netif_msg_probe(sis_priv))
549				printk(KERN_DEBUG "%s: MII at address %d"
550						" not accessible\n",
551						dev_name, phy_addr);
552			continue;
553		}
554
555		if ((mii_phy = kmalloc(sizeof(struct mii_phy), GFP_KERNEL)) == NULL) {
556			printk(KERN_WARNING "Cannot allocate mem for struct mii_phy\n");
557			mii_phy = sis_priv->first_mii;
558			while (mii_phy) {
559				struct mii_phy *phy;
560				phy = mii_phy;
561				mii_phy = mii_phy->next;
562				kfree(phy);
563			}
564			return 0;
565		}
566
567		mii_phy->phy_id0 = mdio_read(net_dev, phy_addr, MII_PHY_ID0);
568		mii_phy->phy_id1 = mdio_read(net_dev, phy_addr, MII_PHY_ID1);
569		mii_phy->phy_addr = phy_addr;
570		mii_phy->status = mii_status;
571		mii_phy->next = sis_priv->mii;
572		sis_priv->mii = mii_phy;
573		sis_priv->first_mii = mii_phy;
574
575		for (i = 0; mii_chip_table[i].phy_id1; i++)
576			if ((mii_phy->phy_id0 == mii_chip_table[i].phy_id0 ) &&
577			    ((mii_phy->phy_id1 & 0xFFF0) == mii_chip_table[i].phy_id1)){
578				mii_phy->phy_types = mii_chip_table[i].phy_types;
579				if (mii_chip_table[i].phy_types == MIX)
580					mii_phy->phy_types =
581					    (mii_status & (MII_STAT_CAN_TX_FDX | MII_STAT_CAN_TX)) ? LAN : HOME;
582				printk(KERN_INFO "%s: %s transceiver found "
583							"at address %d.\n",
584							dev_name,
585							mii_chip_table[i].name,
586							phy_addr);
587				break;
588			}
589
590		if( !mii_chip_table[i].phy_id1 ) {
591			printk(KERN_INFO "%s: Unknown PHY transceiver found at address %d.\n",
592			       dev_name, phy_addr);
593			mii_phy->phy_types = UNKNOWN;
594		}
595	}
596
597	if (sis_priv->mii == NULL) {
598		printk(KERN_INFO "%s: No MII transceivers found!\n", dev_name);
599		return 0;
600	}
601
602	/* select default PHY for mac */
603	sis_priv->mii = NULL;
604	sis900_default_phy( net_dev );
605
606	/* Reset phy if default phy is internal sis900 */
607        if ((sis_priv->mii->phy_id0 == 0x001D) &&
608	    ((sis_priv->mii->phy_id1&0xFFF0) == 0x8000))
609        	status = sis900_reset_phy(net_dev, sis_priv->cur_phy);
610
611        if ((sis_priv->mii->phy_id0 == 0x0015) &&
612            ((sis_priv->mii->phy_id1&0xFFF0) == 0xF440))
613            	mdio_write(net_dev, sis_priv->cur_phy, 0x0018, 0xD200);
614
615	if(status & MII_STAT_LINK){
616		while (poll_bit) {
617			yield();
618
619			poll_bit ^= (mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS) & poll_bit);
620			if (time_after_eq(jiffies, timeout)) {
621				printk(KERN_WARNING "%s: reset phy and link down now\n",
622				       dev_name);
623				return -ETIME;
624			}
625		}
626	}
627
628	if (sis_priv->chipset_rev == SIS630E_900_REV) {
629		/* SiS 630E has some bugs on default value of PHY registers */
630		mdio_write(net_dev, sis_priv->cur_phy, MII_ANADV, 0x05e1);
631		mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG1, 0x22);
632		mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG2, 0xff00);
633		mdio_write(net_dev, sis_priv->cur_phy, MII_MASK, 0xffc0);
634		//mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, 0x1000);
635	}
636
637	if (sis_priv->mii->status & MII_STAT_LINK)
638		netif_carrier_on(net_dev);
639	else
640		netif_carrier_off(net_dev);
641
642	return 1;
643}
644
645/**
646 *	sis900_default_phy - Select default PHY for sis900 mac.
647 *	@net_dev: the net device to probe for
648 *
649 *	Select first detected PHY with link as default.
650 *	If no one is link on, select PHY whose types is HOME as default.
651 *	If HOME doesn't exist, select LAN.
652 */
653
654static u16 sis900_default_phy(struct net_device * net_dev)
655{
656	struct sis900_private * sis_priv = net_dev->priv;
657 	struct mii_phy *phy = NULL, *phy_home = NULL,
658		*default_phy = NULL, *phy_lan = NULL;
659	u16 status;
660
661        for (phy=sis_priv->first_mii; phy; phy=phy->next) {
662		status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
663		status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
664
665		/* Link ON & Not select default PHY & not ghost PHY */
666		 if ((status & MII_STAT_LINK) && !default_phy &&
667					(phy->phy_types != UNKNOWN))
668		 	default_phy = phy;
669		 else {
670			status = mdio_read(net_dev, phy->phy_addr, MII_CONTROL);
671			mdio_write(net_dev, phy->phy_addr, MII_CONTROL,
672				status | MII_CNTL_AUTO | MII_CNTL_ISOLATE);
673			if (phy->phy_types == HOME)
674				phy_home = phy;
675			else if(phy->phy_types == LAN)
676				phy_lan = phy;
677		 }
678	}
679
680	if (!default_phy && phy_home)
681		default_phy = phy_home;
682	else if (!default_phy && phy_lan)
683		default_phy = phy_lan;
684	else if (!default_phy)
685		default_phy = sis_priv->first_mii;
686
687	if (sis_priv->mii != default_phy) {
688		sis_priv->mii = default_phy;
689		sis_priv->cur_phy = default_phy->phy_addr;
690		printk(KERN_INFO "%s: Using transceiver found at address %d as default\n",
691		       pci_name(sis_priv->pci_dev), sis_priv->cur_phy);
692	}
693
694	sis_priv->mii_info.phy_id = sis_priv->cur_phy;
695
696	status = mdio_read(net_dev, sis_priv->cur_phy, MII_CONTROL);
697	status &= (~MII_CNTL_ISOLATE);
698
699	mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, status);
700	status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
701	status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
702
703	return status;
704}
705
706
707/**
708 * 	sis900_set_capability - set the media capability of network adapter.
709 *	@net_dev : the net device to probe for
710 *	@phy : default PHY
711 *
712 *	Set the media capability of network adapter according to
713 *	mii status register. It's necessary before auto-negotiate.
714 */
715
716static void sis900_set_capability(struct net_device *net_dev, struct mii_phy *phy)
717{
718	u16 cap;
719	u16 status;
720
721	status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
722	status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
723
724	cap = MII_NWAY_CSMA_CD |
725		((phy->status & MII_STAT_CAN_TX_FDX)? MII_NWAY_TX_FDX:0) |
726		((phy->status & MII_STAT_CAN_TX)    ? MII_NWAY_TX:0) |
727		((phy->status & MII_STAT_CAN_T_FDX) ? MII_NWAY_T_FDX:0)|
728		((phy->status & MII_STAT_CAN_T)     ? MII_NWAY_T:0);
729
730	mdio_write(net_dev, phy->phy_addr, MII_ANADV, cap);
731}
732
733
734/* Delay between EEPROM clock transitions. */
735#define eeprom_delay()  inl(ee_addr)
736
737/**
738 *	read_eeprom - Read Serial EEPROM
739 *	@ioaddr: base i/o address
740 *	@location: the EEPROM location to read
741 *
742 *	Read Serial EEPROM through EEPROM Access Register.
743 *	Note that location is in word (16 bits) unit
744 */
745
746static u16 __devinit read_eeprom(long ioaddr, int location)
747{
748	int i;
749	u16 retval = 0;
750	long ee_addr = ioaddr + mear;
751	u32 read_cmd = location | EEread;
752
753	outl(0, ee_addr);
754	eeprom_delay();
755	outl(EECS, ee_addr);
756	eeprom_delay();
757
758	/* Shift the read command (9) bits out. */
759	for (i = 8; i >= 0; i--) {
760		u32 dataval = (read_cmd & (1 << i)) ? EEDI | EECS : EECS;
761		outl(dataval, ee_addr);
762		eeprom_delay();
763		outl(dataval | EECLK, ee_addr);
764		eeprom_delay();
765	}
766	outl(EECS, ee_addr);
767	eeprom_delay();
768
769	/* read the 16-bits data in */
770	for (i = 16; i > 0; i--) {
771		outl(EECS, ee_addr);
772		eeprom_delay();
773		outl(EECS | EECLK, ee_addr);
774		eeprom_delay();
775		retval = (retval << 1) | ((inl(ee_addr) & EEDO) ? 1 : 0);
776		eeprom_delay();
777	}
778
779	/* Terminate the EEPROM access. */
780	outl(0, ee_addr);
781	eeprom_delay();
782
783	return (retval);
784}
785
786/* Read and write the MII management registers using software-generated
787   serial MDIO protocol. Note that the command bits and data bits are
788   send out separately */
789#define mdio_delay()    inl(mdio_addr)
790
791static void mdio_idle(long mdio_addr)
792{
793	outl(MDIO | MDDIR, mdio_addr);
794	mdio_delay();
795	outl(MDIO | MDDIR | MDC, mdio_addr);
796}
797
798/* Syncronize the MII management interface by shifting 32 one bits out. */
799static void mdio_reset(long mdio_addr)
800{
801	int i;
802
803	for (i = 31; i >= 0; i--) {
804		outl(MDDIR | MDIO, mdio_addr);
805		mdio_delay();
806		outl(MDDIR | MDIO | MDC, mdio_addr);
807		mdio_delay();
808	}
809	return;
810}
811
812/**
813 *	mdio_read - read MII PHY register
814 *	@net_dev: the net device to read
815 *	@phy_id: the phy address to read
816 *	@location: the phy regiester id to read
817 *
818 *	Read MII registers through MDIO and MDC
819 *	using MDIO management frame structure and protocol(defined by ISO/IEC).
820 *	Please see SiS7014 or ICS spec
821 */
822
823static int mdio_read(struct net_device *net_dev, int phy_id, int location)
824{
825	long mdio_addr = net_dev->base_addr + mear;
826	int mii_cmd = MIIread|(phy_id<<MIIpmdShift)|(location<<MIIregShift);
827	u16 retval = 0;
828	int i;
829
830	mdio_reset(mdio_addr);
831	mdio_idle(mdio_addr);
832
833	for (i = 15; i >= 0; i--) {
834		int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
835		outl(dataval, mdio_addr);
836		mdio_delay();
837		outl(dataval | MDC, mdio_addr);
838		mdio_delay();
839	}
840
841	/* Read the 16 data bits. */
842	for (i = 16; i > 0; i--) {
843		outl(0, mdio_addr);
844		mdio_delay();
845		retval = (retval << 1) | ((inl(mdio_addr) & MDIO) ? 1 : 0);
846		outl(MDC, mdio_addr);
847		mdio_delay();
848	}
849	outl(0x00, mdio_addr);
850
851	return retval;
852}
853
854/**
855 *	mdio_write - write MII PHY register
856 *	@net_dev: the net device to write
857 *	@phy_id: the phy address to write
858 *	@location: the phy regiester id to write
859 *	@value: the register value to write with
860 *
861 *	Write MII registers with @value through MDIO and MDC
862 *	using MDIO management frame structure and protocol(defined by ISO/IEC)
863 *	please see SiS7014 or ICS spec
864 */
865
866static void mdio_write(struct net_device *net_dev, int phy_id, int location,
867			int value)
868{
869	long mdio_addr = net_dev->base_addr + mear;
870	int mii_cmd = MIIwrite|(phy_id<<MIIpmdShift)|(location<<MIIregShift);
871	int i;
872
873	mdio_reset(mdio_addr);
874	mdio_idle(mdio_addr);
875
876	/* Shift the command bits out. */
877	for (i = 15; i >= 0; i--) {
878		int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
879		outb(dataval, mdio_addr);
880		mdio_delay();
881		outb(dataval | MDC, mdio_addr);
882		mdio_delay();
883	}
884	mdio_delay();
885
886	/* Shift the value bits out. */
887	for (i = 15; i >= 0; i--) {
888		int dataval = (value & (1 << i)) ? MDDIR | MDIO : MDDIR;
889		outl(dataval, mdio_addr);
890		mdio_delay();
891		outl(dataval | MDC, mdio_addr);
892		mdio_delay();
893	}
894	mdio_delay();
895
896	/* Clear out extra bits. */
897	for (i = 2; i > 0; i--) {
898		outb(0, mdio_addr);
899		mdio_delay();
900		outb(MDC, mdio_addr);
901		mdio_delay();
902	}
903	outl(0x00, mdio_addr);
904
905	return;
906}
907
908
909/**
910 *	sis900_reset_phy - reset sis900 mii phy.
911 *	@net_dev: the net device to write
912 *	@phy_addr: default phy address
913 *
914 *	Some specific phy can't work properly without reset.
915 *	This function will be called during initialization and
916 *	link status change from ON to DOWN.
917 */
918
919static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr)
920{
921	int i;
922	u16 status;
923
924	for (i = 0; i < 2; i++)
925		status = mdio_read(net_dev, phy_addr, MII_STATUS);
926
927	mdio_write( net_dev, phy_addr, MII_CONTROL, MII_CNTL_RESET );
928
929	return status;
930}
931
932#ifdef CONFIG_NET_POLL_CONTROLLER
933/*
934 * Polling 'interrupt' - used by things like netconsole to send skbs
935 * without having to re-enable interrupts. It's not called while
936 * the interrupt routine is executing.
937*/
938static void sis900_poll(struct net_device *dev)
939{
940	disable_irq(dev->irq);
941	sis900_interrupt(dev->irq, dev);
942	enable_irq(dev->irq);
943}
944#endif
945
946/**
947 *	sis900_open - open sis900 device
948 *	@net_dev: the net device to open
949 *
950 *	Do some initialization and start net interface.
951 *	enable interrupts and set sis900 timer.
952 */
953
954static int
955sis900_open(struct net_device *net_dev)
956{
957	struct sis900_private *sis_priv = net_dev->priv;
958	long ioaddr = net_dev->base_addr;
959	int ret;
960
961	/* Soft reset the chip. */
962	sis900_reset(net_dev);
963
964	sis630_set_eq(net_dev, sis_priv->chipset_rev);
965
966	ret = request_irq(net_dev->irq, &sis900_interrupt, IRQF_SHARED,
967						net_dev->name, net_dev);
968	if (ret)
969		return ret;
970
971	sis900_init_rxfilter(net_dev);
972
973	sis900_init_tx_ring(net_dev);
974	sis900_init_rx_ring(net_dev);
975
976	set_rx_mode(net_dev);
977
978	netif_start_queue(net_dev);
979
980	sis900_set_mode(ioaddr, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED);
981
982	/* Enable all known interrupts by setting the interrupt mask. */
983	outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);
984	outl(RxENA | inl(ioaddr + cr), ioaddr + cr);
985	outl(IE, ioaddr + ier);
986
987	sis900_check_mode(net_dev, sis_priv->mii);
988
989	/* Set the timer to switch to check for link beat and perhaps switch
990	   to an alternate media type. */
991	init_timer(&sis_priv->timer);
992	sis_priv->timer.expires = jiffies + HZ;
993	sis_priv->timer.data = (unsigned long)net_dev;
994	sis_priv->timer.function = &sis900_timer;
995	add_timer(&sis_priv->timer);
996
997	return 0;
998}
999
1000/**
1001 *	sis900_init_rxfilter - Initialize the Rx filter
1002 *	@net_dev: the net device to initialize for
1003 *
1004 *	Set receive filter address to our MAC address
1005 *	and enable packet filtering.
1006 */
1007
1008static void
1009sis900_init_rxfilter (struct net_device * net_dev)
1010{
1011	struct sis900_private *sis_priv = net_dev->priv;
1012	long ioaddr = net_dev->base_addr;
1013	u32 rfcrSave;
1014	u32 i;
1015
1016	rfcrSave = inl(rfcr + ioaddr);
1017
1018	/* disable packet filtering before setting filter */
1019	outl(rfcrSave & ~RFEN, rfcr + ioaddr);
1020
1021	/* load MAC addr to filter data register */
1022	for (i = 0 ; i < 3 ; i++) {
1023		u32 w;
1024
1025		w = (u32) *((u16 *)(net_dev->dev_addr)+i);
1026		outl((i << RFADDR_shift), ioaddr + rfcr);
1027		outl(w, ioaddr + rfdr);
1028
1029		if (netif_msg_hw(sis_priv)) {
1030			printk(KERN_DEBUG "%s: Receive Filter Addrss[%d]=%x\n",
1031			       net_dev->name, i, inl(ioaddr + rfdr));
1032		}
1033	}
1034
1035	/* enable packet filtering */
1036	outl(rfcrSave | RFEN, rfcr + ioaddr);
1037}
1038
1039/**
1040 *	sis900_init_tx_ring - Initialize the Tx descriptor ring
1041 *	@net_dev: the net device to initialize for
1042 *
1043 *	Initialize the Tx descriptor ring,
1044 */
1045
1046static void
1047sis900_init_tx_ring(struct net_device *net_dev)
1048{
1049	struct sis900_private *sis_priv = net_dev->priv;
1050	long ioaddr = net_dev->base_addr;
1051	int i;
1052
1053	sis_priv->tx_full = 0;
1054	sis_priv->dirty_tx = sis_priv->cur_tx = 0;
1055
1056	for (i = 0; i < NUM_TX_DESC; i++) {
1057		sis_priv->tx_skbuff[i] = NULL;
1058
1059		sis_priv->tx_ring[i].link = sis_priv->tx_ring_dma +
1060			((i+1)%NUM_TX_DESC)*sizeof(BufferDesc);
1061		sis_priv->tx_ring[i].cmdsts = 0;
1062		sis_priv->tx_ring[i].bufptr = 0;
1063	}
1064
1065	/* load Transmit Descriptor Register */
1066	outl(sis_priv->tx_ring_dma, ioaddr + txdp);
1067	if (netif_msg_hw(sis_priv))
1068		printk(KERN_DEBUG "%s: TX descriptor register loaded with: %8.8x\n",
1069		       net_dev->name, inl(ioaddr + txdp));
1070}
1071
1072/**
1073 *	sis900_init_rx_ring - Initialize the Rx descriptor ring
1074 *	@net_dev: the net device to initialize for
1075 *
1076 *	Initialize the Rx descriptor ring,
1077 *	and pre-allocate recevie buffers (socket buffer)
1078 */
1079
1080static void
1081sis900_init_rx_ring(struct net_device *net_dev)
1082{
1083	struct sis900_private *sis_priv = net_dev->priv;
1084	long ioaddr = net_dev->base_addr;
1085	int i;
1086
1087	sis_priv->cur_rx = 0;
1088	sis_priv->dirty_rx = 0;
1089
1090	/* init RX descriptor */
1091	for (i = 0; i < NUM_RX_DESC; i++) {
1092		sis_priv->rx_skbuff[i] = NULL;
1093
1094		sis_priv->rx_ring[i].link = sis_priv->rx_ring_dma +
1095			((i+1)%NUM_RX_DESC)*sizeof(BufferDesc);
1096		sis_priv->rx_ring[i].cmdsts = 0;
1097		sis_priv->rx_ring[i].bufptr = 0;
1098	}
1099
1100	/* allocate sock buffers */
1101	for (i = 0; i < NUM_RX_DESC; i++) {
1102		struct sk_buff *skb;
1103
1104		if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) {
1105			/* not enough memory for skbuff, this makes a "hole"
1106			   on the buffer ring, it is not clear how the
1107			   hardware will react to this kind of degenerated
1108			   buffer */
1109			break;
1110		}
1111		sis_priv->rx_skbuff[i] = skb;
1112		sis_priv->rx_ring[i].cmdsts = RX_BUF_SIZE;
1113                sis_priv->rx_ring[i].bufptr = pci_map_single(sis_priv->pci_dev,
1114                        skb->data, RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1115	}
1116	sis_priv->dirty_rx = (unsigned int) (i - NUM_RX_DESC);
1117
1118	/* load Receive Descriptor Register */
1119	outl(sis_priv->rx_ring_dma, ioaddr + rxdp);
1120	if (netif_msg_hw(sis_priv))
1121		printk(KERN_DEBUG "%s: RX descriptor register loaded with: %8.8x\n",
1122		       net_dev->name, inl(ioaddr + rxdp));
1123}
1124
1125
1126static void sis630_set_eq(struct net_device *net_dev, u8 revision)
1127{
1128	struct sis900_private *sis_priv = net_dev->priv;
1129	u16 reg14h, eq_value=0, max_value=0, min_value=0;
1130	int i, maxcount=10;
1131
1132	if ( !(revision == SIS630E_900_REV || revision == SIS630EA1_900_REV ||
1133	       revision == SIS630A_900_REV || revision ==  SIS630ET_900_REV) )
1134		return;
1135
1136	if (netif_carrier_ok(net_dev)) {
1137		reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1138		mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1139					(0x2200 | reg14h) & 0xBFFF);
1140		for (i=0; i < maxcount; i++) {
1141			eq_value = (0x00F8 & mdio_read(net_dev,
1142					sis_priv->cur_phy, MII_RESV)) >> 3;
1143			if (i == 0)
1144				max_value=min_value=eq_value;
1145			max_value = (eq_value > max_value) ?
1146						eq_value : max_value;
1147			min_value = (eq_value < min_value) ?
1148						eq_value : min_value;
1149		}
1150		/* 630E rule to determine the equalizer value */
1151		if (revision == SIS630E_900_REV || revision == SIS630EA1_900_REV ||
1152		    revision == SIS630ET_900_REV) {
1153			if (max_value < 5)
1154				eq_value = max_value;
1155			else if (max_value >= 5 && max_value < 15)
1156				eq_value = (max_value == min_value) ?
1157						max_value+2 : max_value+1;
1158			else if (max_value >= 15)
1159				eq_value=(max_value == min_value) ?
1160						max_value+6 : max_value+5;
1161		}
1162		/* 630B0&B1 rule to determine the equalizer value */
1163		if (revision == SIS630A_900_REV &&
1164		    (sis_priv->host_bridge_rev == SIS630B0 ||
1165		     sis_priv->host_bridge_rev == SIS630B1)) {
1166			if (max_value == 0)
1167				eq_value = 3;
1168			else
1169				eq_value = (max_value + min_value + 1)/2;
1170		}
1171		/* write equalizer value and setting */
1172		reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1173		reg14h = (reg14h & 0xFF07) | ((eq_value << 3) & 0x00F8);
1174		reg14h = (reg14h | 0x6000) & 0xFDFF;
1175		mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, reg14h);
1176	} else {
1177		reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1178		if (revision == SIS630A_900_REV &&
1179		    (sis_priv->host_bridge_rev == SIS630B0 ||
1180		     sis_priv->host_bridge_rev == SIS630B1))
1181			mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1182						(reg14h | 0x2200) & 0xBFFF);
1183		else
1184			mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1185						(reg14h | 0x2000) & 0xBFFF);
1186	}
1187	return;
1188}
1189
1190/**
1191 *	sis900_timer - sis900 timer routine
1192 *	@data: pointer to sis900 net device
1193 *
1194 *	On each timer ticks we check two things,
1195 *	link status (ON/OFF) and link mode (10/100/Full/Half)
1196 */
1197
1198static void sis900_timer(unsigned long data)
1199{
1200	struct net_device *net_dev = (struct net_device *)data;
1201	struct sis900_private *sis_priv = net_dev->priv;
1202	struct mii_phy *mii_phy = sis_priv->mii;
1203	static const int next_tick = 5*HZ;
1204	u16 status;
1205
1206	if (!sis_priv->autong_complete){
1207		int speed, duplex = 0;
1208
1209		sis900_read_mode(net_dev, &speed, &duplex);
1210		if (duplex){
1211			sis900_set_mode(net_dev->base_addr, speed, duplex);
1212			sis630_set_eq(net_dev, sis_priv->chipset_rev);
1213			netif_start_queue(net_dev);
1214		}
1215
1216		sis_priv->timer.expires = jiffies + HZ;
1217		add_timer(&sis_priv->timer);
1218		return;
1219	}
1220
1221	status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
1222	status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
1223
1224	/* Link OFF -> ON */
1225	if (!netif_carrier_ok(net_dev)) {
1226	LookForLink:
1227		/* Search for new PHY */
1228		status = sis900_default_phy(net_dev);
1229		mii_phy = sis_priv->mii;
1230
1231		if (status & MII_STAT_LINK){
1232			sis900_check_mode(net_dev, mii_phy);
1233			netif_carrier_on(net_dev);
1234		}
1235	} else {
1236	/* Link ON -> OFF */
1237                if (!(status & MII_STAT_LINK)){
1238                	netif_carrier_off(net_dev);
1239			if(netif_msg_link(sis_priv))
1240                		printk(KERN_INFO "%s: Media Link Off\n", net_dev->name);
1241
1242                	/* Change mode issue */
1243                	if ((mii_phy->phy_id0 == 0x001D) &&
1244			    ((mii_phy->phy_id1 & 0xFFF0) == 0x8000))
1245               			sis900_reset_phy(net_dev,  sis_priv->cur_phy);
1246
1247			sis630_set_eq(net_dev, sis_priv->chipset_rev);
1248
1249                	goto LookForLink;
1250                }
1251	}
1252
1253	sis_priv->timer.expires = jiffies + next_tick;
1254	add_timer(&sis_priv->timer);
1255}
1256
1257/**
1258 *	sis900_check_mode - check the media mode for sis900
1259 *	@net_dev: the net device to be checked
1260 *	@mii_phy: the mii phy
1261 *
1262 *	Older driver gets the media mode from mii status output
1263 *	register. Now we set our media capability and auto-negotiate
1264 *	to get the upper bound of speed and duplex between two ends.
1265 *	If the types of mii phy is HOME, it doesn't need to auto-negotiate
1266 *	and autong_complete should be set to 1.
1267 */
1268
1269static void sis900_check_mode(struct net_device *net_dev, struct mii_phy *mii_phy)
1270{
1271	struct sis900_private *sis_priv = net_dev->priv;
1272	long ioaddr = net_dev->base_addr;
1273	int speed, duplex;
1274
1275	if (mii_phy->phy_types == LAN) {
1276		outl(~EXD & inl(ioaddr + cfg), ioaddr + cfg);
1277		sis900_set_capability(net_dev , mii_phy);
1278		sis900_auto_negotiate(net_dev, sis_priv->cur_phy);
1279	} else {
1280		outl(EXD | inl(ioaddr + cfg), ioaddr + cfg);
1281		speed = HW_SPEED_HOME;
1282		duplex = FDX_CAPABLE_HALF_SELECTED;
1283		sis900_set_mode(ioaddr, speed, duplex);
1284		sis_priv->autong_complete = 1;
1285	}
1286}
1287
1288/**
1289 *	sis900_set_mode - Set the media mode of mac register.
1290 *	@ioaddr: the address of the device
1291 *	@speed : the transmit speed to be determined
1292 *	@duplex: the duplex mode to be determined
1293 *
1294 *	Set the media mode of mac register txcfg/rxcfg according to
1295 *	speed and duplex of phy. Bit EDB_MASTER_EN indicates the EDB
1296 *	bus is used instead of PCI bus. When this bit is set 1, the
1297 *	Max DMA Burst Size for TX/RX DMA should be no larger than 16
1298 *	double words.
1299 */
1300
1301static void sis900_set_mode (long ioaddr, int speed, int duplex)
1302{
1303	u32 tx_flags = 0, rx_flags = 0;
1304
1305	if (inl(ioaddr + cfg) & EDB_MASTER_EN) {
1306		tx_flags = TxATP | (DMA_BURST_64 << TxMXDMA_shift) |
1307					(TX_FILL_THRESH << TxFILLT_shift);
1308		rx_flags = DMA_BURST_64 << RxMXDMA_shift;
1309	} else {
1310		tx_flags = TxATP | (DMA_BURST_512 << TxMXDMA_shift) |
1311					(TX_FILL_THRESH << TxFILLT_shift);
1312		rx_flags = DMA_BURST_512 << RxMXDMA_shift;
1313	}
1314
1315	if (speed == HW_SPEED_HOME || speed == HW_SPEED_10_MBPS) {
1316		rx_flags |= (RxDRNT_10 << RxDRNT_shift);
1317		tx_flags |= (TxDRNT_10 << TxDRNT_shift);
1318	} else {
1319		rx_flags |= (RxDRNT_100 << RxDRNT_shift);
1320		tx_flags |= (TxDRNT_100 << TxDRNT_shift);
1321	}
1322
1323	if (duplex == FDX_CAPABLE_FULL_SELECTED) {
1324		tx_flags |= (TxCSI | TxHBI);
1325		rx_flags |= RxATX;
1326	}
1327
1328#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
1329	/* Can accept Jumbo packet */
1330	rx_flags |= RxAJAB;
1331#endif
1332
1333	outl (tx_flags, ioaddr + txcfg);
1334	outl (rx_flags, ioaddr + rxcfg);
1335}
1336
1337/**
1338 *	sis900_auto_negotiate - Set the Auto-Negotiation Enable/Reset bit.
1339 *	@net_dev: the net device to read mode for
1340 *	@phy_addr: mii phy address
1341 *
1342 *	If the adapter is link-on, set the auto-negotiate enable/reset bit.
1343 *	autong_complete should be set to 0 when starting auto-negotiation.
1344 *	autong_complete should be set to 1 if we didn't start auto-negotiation.
1345 *	sis900_timer will wait for link on again if autong_complete = 0.
1346 */
1347
1348static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr)
1349{
1350	struct sis900_private *sis_priv = net_dev->priv;
1351	int i = 0;
1352	u32 status;
1353
1354	for (i = 0; i < 2; i++)
1355		status = mdio_read(net_dev, phy_addr, MII_STATUS);
1356
1357	if (!(status & MII_STAT_LINK)){
1358		if(netif_msg_link(sis_priv))
1359			printk(KERN_INFO "%s: Media Link Off\n", net_dev->name);
1360		sis_priv->autong_complete = 1;
1361		netif_carrier_off(net_dev);
1362		return;
1363	}
1364
1365	/* (Re)start AutoNegotiate */
1366	mdio_write(net_dev, phy_addr, MII_CONTROL,
1367		   MII_CNTL_AUTO | MII_CNTL_RST_AUTO);
1368	sis_priv->autong_complete = 0;
1369}
1370
1371
1372/**
1373 *	sis900_read_mode - read media mode for sis900 internal phy
1374 *	@net_dev: the net device to read mode for
1375 *	@speed  : the transmit speed to be determined
1376 *	@duplex : the duplex mode to be determined
1377 *
1378 *	The capability of remote end will be put in mii register autorec
1379 *	after auto-negotiation. Use AND operation to get the upper bound
1380 *	of speed and duplex between two ends.
1381 */
1382
1383static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex)
1384{
1385	struct sis900_private *sis_priv = net_dev->priv;
1386	struct mii_phy *phy = sis_priv->mii;
1387	int phy_addr = sis_priv->cur_phy;
1388	u32 status;
1389	u16 autoadv, autorec;
1390	int i;
1391
1392	for (i = 0; i < 2; i++)
1393		status = mdio_read(net_dev, phy_addr, MII_STATUS);
1394
1395	if (!(status & MII_STAT_LINK))
1396		return;
1397
1398	/* AutoNegotiate completed */
1399	autoadv = mdio_read(net_dev, phy_addr, MII_ANADV);
1400	autorec = mdio_read(net_dev, phy_addr, MII_ANLPAR);
1401	status = autoadv & autorec;
1402
1403	*speed = HW_SPEED_10_MBPS;
1404	*duplex = FDX_CAPABLE_HALF_SELECTED;
1405
1406	if (status & (MII_NWAY_TX | MII_NWAY_TX_FDX))
1407		*speed = HW_SPEED_100_MBPS;
1408	if (status & ( MII_NWAY_TX_FDX | MII_NWAY_T_FDX))
1409		*duplex = FDX_CAPABLE_FULL_SELECTED;
1410
1411	sis_priv->autong_complete = 1;
1412
1413	if ((phy->phy_id0 == 0x0000) && ((phy->phy_id1 & 0xFFF0) == 0x8200)) {
1414		if (mdio_read(net_dev, phy_addr, MII_CONTROL) & MII_CNTL_FDX)
1415			*duplex = FDX_CAPABLE_FULL_SELECTED;
1416		if (mdio_read(net_dev, phy_addr, 0x0019) & 0x01)
1417			*speed = HW_SPEED_100_MBPS;
1418	}
1419
1420	if(netif_msg_link(sis_priv))
1421		printk(KERN_INFO "%s: Media Link On %s %s-duplex \n",
1422	       				net_dev->name,
1423	       				*speed == HW_SPEED_100_MBPS ?
1424	       					"100mbps" : "10mbps",
1425	       				*duplex == FDX_CAPABLE_FULL_SELECTED ?
1426	       					"full" : "half");
1427}
1428
1429/**
1430 *	sis900_tx_timeout - sis900 transmit timeout routine
1431 *	@net_dev: the net device to transmit
1432 *
1433 *	print transmit timeout status
1434 *	disable interrupts and do some tasks
1435 */
1436
1437static void sis900_tx_timeout(struct net_device *net_dev)
1438{
1439	struct sis900_private *sis_priv = net_dev->priv;
1440	long ioaddr = net_dev->base_addr;
1441	unsigned long flags;
1442	int i;
1443
1444	if(netif_msg_tx_err(sis_priv))
1445		printk(KERN_INFO "%s: Transmit timeout, status %8.8x %8.8x \n",
1446	       		net_dev->name, inl(ioaddr + cr), inl(ioaddr + isr));
1447
1448	/* Disable interrupts by clearing the interrupt mask. */
1449	outl(0x0000, ioaddr + imr);
1450
1451	/* use spinlock to prevent interrupt handler accessing buffer ring */
1452	spin_lock_irqsave(&sis_priv->lock, flags);
1453
1454	/* discard unsent packets */
1455	sis_priv->dirty_tx = sis_priv->cur_tx = 0;
1456	for (i = 0; i < NUM_TX_DESC; i++) {
1457		struct sk_buff *skb = sis_priv->tx_skbuff[i];
1458
1459		if (skb) {
1460			pci_unmap_single(sis_priv->pci_dev,
1461				sis_priv->tx_ring[i].bufptr, skb->len,
1462				PCI_DMA_TODEVICE);
1463			dev_kfree_skb_irq(skb);
1464			sis_priv->tx_skbuff[i] = NULL;
1465			sis_priv->tx_ring[i].cmdsts = 0;
1466			sis_priv->tx_ring[i].bufptr = 0;
1467			sis_priv->stats.tx_dropped++;
1468		}
1469	}
1470	sis_priv->tx_full = 0;
1471	netif_wake_queue(net_dev);
1472
1473	spin_unlock_irqrestore(&sis_priv->lock, flags);
1474
1475	net_dev->trans_start = jiffies;
1476
1477	/* load Transmit Descriptor Register */
1478	outl(sis_priv->tx_ring_dma, ioaddr + txdp);
1479
1480	/* Enable all known interrupts by setting the interrupt mask. */
1481	outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);
1482	return;
1483}
1484
1485/**
1486 *	sis900_start_xmit - sis900 start transmit routine
1487 *	@skb: socket buffer pointer to put the data being transmitted
1488 *	@net_dev: the net device to transmit with
1489 *
1490 *	Set the transmit buffer descriptor,
1491 *	and write TxENA to enable transmit state machine.
1492 *	tell upper layer if the buffer is full
1493 */
1494
1495static int
1496sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev)
1497{
1498	struct sis900_private *sis_priv = net_dev->priv;
1499	long ioaddr = net_dev->base_addr;
1500	unsigned int  entry;
1501	unsigned long flags;
1502	unsigned int  index_cur_tx, index_dirty_tx;
1503	unsigned int  count_dirty_tx;
1504
1505	/* Don't transmit data before the complete of auto-negotiation */
1506	if(!sis_priv->autong_complete){
1507		netif_stop_queue(net_dev);
1508		return 1;
1509	}
1510
1511	spin_lock_irqsave(&sis_priv->lock, flags);
1512
1513	/* Calculate the next Tx descriptor entry. */
1514	entry = sis_priv->cur_tx % NUM_TX_DESC;
1515	sis_priv->tx_skbuff[entry] = skb;
1516
1517	/* set the transmit buffer descriptor and enable Transmit State Machine */
1518	sis_priv->tx_ring[entry].bufptr = pci_map_single(sis_priv->pci_dev,
1519		skb->data, skb->len, PCI_DMA_TODEVICE);
1520	sis_priv->tx_ring[entry].cmdsts = (OWN | skb->len);
1521	outl(TxENA | inl(ioaddr + cr), ioaddr + cr);
1522
1523	sis_priv->cur_tx ++;
1524	index_cur_tx = sis_priv->cur_tx;
1525	index_dirty_tx = sis_priv->dirty_tx;
1526
1527	for (count_dirty_tx = 0; index_cur_tx != index_dirty_tx; index_dirty_tx++)
1528		count_dirty_tx ++;
1529
1530	if (index_cur_tx == index_dirty_tx) {
1531		/* dirty_tx is met in the cycle of cur_tx, buffer full */
1532		sis_priv->tx_full = 1;
1533		netif_stop_queue(net_dev);
1534	} else if (count_dirty_tx < NUM_TX_DESC) {
1535		/* Typical path, tell upper layer that more transmission is possible */
1536		netif_start_queue(net_dev);
1537	} else {
1538		/* buffer full, tell upper layer no more transmission */
1539		sis_priv->tx_full = 1;
1540		netif_stop_queue(net_dev);
1541	}
1542
1543	spin_unlock_irqrestore(&sis_priv->lock, flags);
1544
1545	net_dev->trans_start = jiffies;
1546
1547	if (netif_msg_tx_queued(sis_priv))
1548		printk(KERN_DEBUG "%s: Queued Tx packet at %p size %d "
1549		       "to slot %d.\n",
1550		       net_dev->name, skb->data, (int)skb->len, entry);
1551
1552	return 0;
1553}
1554
1555/**
1556 *	sis900_interrupt - sis900 interrupt handler
1557 *	@irq: the irq number
1558 *	@dev_instance: the client data object
1559 *	@regs: snapshot of processor context
1560 *
1561 *	The interrupt handler does all of the Rx thread work,
1562 *	and cleans up after the Tx thread
1563 */
1564
1565static irqreturn_t sis900_interrupt(int irq, void *dev_instance)
1566{
1567	struct net_device *net_dev = dev_instance;
1568	struct sis900_private *sis_priv = net_dev->priv;
1569	int boguscnt = max_interrupt_work;
1570	long ioaddr = net_dev->base_addr;
1571	u32 status;
1572	unsigned int handled = 0;
1573
1574	spin_lock (&sis_priv->lock);
1575
1576	do {
1577		status = inl(ioaddr + isr);
1578
1579		if ((status & (HIBERR|TxURN|TxERR|TxIDLE|RxORN|RxERR|RxOK)) == 0)
1580			/* nothing intresting happened */
1581			break;
1582		handled = 1;
1583
1584		/* why dow't we break after Tx/Rx case ?? keyword: full-duplex */
1585		if (status & (RxORN | RxERR | RxOK))
1586			/* Rx interrupt */
1587			sis900_rx(net_dev);
1588
1589		if (status & (TxURN | TxERR | TxIDLE))
1590			/* Tx interrupt */
1591			sis900_finish_xmit(net_dev);
1592
1593		/* something strange happened !!! */
1594		if (status & HIBERR) {
1595			if(netif_msg_intr(sis_priv))
1596				printk(KERN_INFO "%s: Abnormal interrupt,"
1597					"status %#8.8x.\n", net_dev->name, status);
1598			break;
1599		}
1600		if (--boguscnt < 0) {
1601			if(netif_msg_intr(sis_priv))
1602				printk(KERN_INFO "%s: Too much work at interrupt, "
1603					"interrupt status = %#8.8x.\n",
1604					net_dev->name, status);
1605			break;
1606		}
1607	} while (1);
1608
1609	if(netif_msg_intr(sis_priv))
1610		printk(KERN_DEBUG "%s: exiting interrupt, "
1611		       "interrupt status = 0x%#8.8x.\n",
1612		       net_dev->name, inl(ioaddr + isr));
1613
1614	spin_unlock (&sis_priv->lock);
1615	return IRQ_RETVAL(handled);
1616}
1617
1618/**
1619 *	sis900_rx - sis900 receive routine
1620 *	@net_dev: the net device which receives data
1621 *
1622 *	Process receive interrupt events,
1623 *	put buffer to higher layer and refill buffer pool
1624 *	Note: This function is called by interrupt handler,
1625 *	don't do "too much" work here
1626 */
1627
1628static int sis900_rx(struct net_device *net_dev)
1629{
1630	struct sis900_private *sis_priv = net_dev->priv;
1631	long ioaddr = net_dev->base_addr;
1632	unsigned int entry = sis_priv->cur_rx % NUM_RX_DESC;
1633	u32 rx_status = sis_priv->rx_ring[entry].cmdsts;
1634	int rx_work_limit;
1635
1636	if (netif_msg_rx_status(sis_priv))
1637		printk(KERN_DEBUG "sis900_rx, cur_rx:%4.4d, dirty_rx:%4.4d "
1638		       "status:0x%8.8x\n",
1639		       sis_priv->cur_rx, sis_priv->dirty_rx, rx_status);
1640	rx_work_limit = sis_priv->dirty_rx + NUM_RX_DESC - sis_priv->cur_rx;
1641
1642	while (rx_status & OWN) {
1643		unsigned int rx_size;
1644		unsigned int data_size;
1645
1646		if (--rx_work_limit < 0)
1647			break;
1648
1649		data_size = rx_status & DSIZE;
1650		rx_size = data_size - CRC_SIZE;
1651
1652#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
1653		/* ``TOOLONG'' flag means jumbo packet recived. */
1654		if ((rx_status & TOOLONG) && data_size <= MAX_FRAME_SIZE)
1655			rx_status &= (~ ((unsigned int)TOOLONG));
1656#endif
1657
1658		if (rx_status & (ABORT|OVERRUN|TOOLONG|RUNT|RXISERR|CRCERR|FAERR)) {
1659			/* corrupted packet received */
1660			if (netif_msg_rx_err(sis_priv))
1661				printk(KERN_DEBUG "%s: Corrupted packet "
1662				       "received, buffer status = 0x%8.8x/%d.\n",
1663				       net_dev->name, rx_status, data_size);
1664			sis_priv->stats.rx_errors++;
1665			if (rx_status & OVERRUN)
1666				sis_priv->stats.rx_over_errors++;
1667			if (rx_status & (TOOLONG|RUNT))
1668				sis_priv->stats.rx_length_errors++;
1669			if (rx_status & (RXISERR | FAERR))
1670				sis_priv->stats.rx_frame_errors++;
1671			if (rx_status & CRCERR)
1672				sis_priv->stats.rx_crc_errors++;
1673			/* reset buffer descriptor state */
1674			sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1675		} else {
1676			struct sk_buff * skb;
1677			struct sk_buff * rx_skb;
1678
1679			pci_unmap_single(sis_priv->pci_dev,
1680				sis_priv->rx_ring[entry].bufptr, RX_BUF_SIZE,
1681				PCI_DMA_FROMDEVICE);
1682
1683			/* refill the Rx buffer, what if there is not enought
1684			 * memory for new socket buffer ?? */
1685			if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) {
1686				/*
1687				 * Not enough memory to refill the buffer
1688				 * so we need to recycle the old one so
1689				 * as to avoid creating a memory hole
1690				 * in the rx ring
1691				 */
1692				skb = sis_priv->rx_skbuff[entry];
1693				sis_priv->stats.rx_dropped++;
1694				goto refill_rx_ring;
1695			}
1696
1697			/* This situation should never happen, but due to
1698			   some unknow bugs, it is possible that
1699			   we are working on NULL sk_buff :-( */
1700			if (sis_priv->rx_skbuff[entry] == NULL) {
1701				if (netif_msg_rx_err(sis_priv))
1702					printk(KERN_WARNING "%s: NULL pointer "
1703					      "encountered in Rx ring\n"
1704					      "cur_rx:%4.4d, dirty_rx:%4.4d\n",
1705					      net_dev->name, sis_priv->cur_rx,
1706					      sis_priv->dirty_rx);
1707				break;
1708			}
1709
1710			/* give the socket buffer to upper layers */
1711			rx_skb = sis_priv->rx_skbuff[entry];
1712			skb_put(rx_skb, rx_size);
1713			rx_skb->protocol = eth_type_trans(rx_skb, net_dev);
1714			netif_rx(rx_skb);
1715
1716			/* some network statistics */
1717			if ((rx_status & BCAST) == MCAST)
1718				sis_priv->stats.multicast++;
1719			net_dev->last_rx = jiffies;
1720			sis_priv->stats.rx_bytes += rx_size;
1721			sis_priv->stats.rx_packets++;
1722			sis_priv->dirty_rx++;
1723refill_rx_ring:
1724			sis_priv->rx_skbuff[entry] = skb;
1725			sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1726                	sis_priv->rx_ring[entry].bufptr =
1727				pci_map_single(sis_priv->pci_dev, skb->data,
1728					RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1729		}
1730		sis_priv->cur_rx++;
1731		entry = sis_priv->cur_rx % NUM_RX_DESC;
1732		rx_status = sis_priv->rx_ring[entry].cmdsts;
1733	} // while
1734
1735	/* refill the Rx buffer, what if the rate of refilling is slower
1736	 * than consuming ?? */
1737	for (; sis_priv->cur_rx != sis_priv->dirty_rx; sis_priv->dirty_rx++) {
1738		struct sk_buff *skb;
1739
1740		entry = sis_priv->dirty_rx % NUM_RX_DESC;
1741
1742		if (sis_priv->rx_skbuff[entry] == NULL) {
1743			if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) {
1744				/* not enough memory for skbuff, this makes a
1745				 * "hole" on the buffer ring, it is not clear
1746				 * how the hardware will react to this kind
1747				 * of degenerated buffer */
1748				if (netif_msg_rx_err(sis_priv))
1749					printk(KERN_INFO "%s: Memory squeeze,"
1750						"deferring packet.\n",
1751						net_dev->name);
1752				sis_priv->stats.rx_dropped++;
1753				break;
1754			}
1755			sis_priv->rx_skbuff[entry] = skb;
1756			sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1757                	sis_priv->rx_ring[entry].bufptr =
1758				pci_map_single(sis_priv->pci_dev, skb->data,
1759					RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1760		}
1761	}
1762	/* re-enable the potentially idle receive state matchine */
1763	outl(RxENA | inl(ioaddr + cr), ioaddr + cr );
1764
1765	return 0;
1766}
1767
1768/**
1769 *	sis900_finish_xmit - finish up transmission of packets
1770 *	@net_dev: the net device to be transmitted on
1771 *
1772 *	Check for error condition and free socket buffer etc
1773 *	schedule for more transmission as needed
1774 *	Note: This function is called by interrupt handler,
1775 *	don't do "too much" work here
1776 */
1777
1778static void sis900_finish_xmit (struct net_device *net_dev)
1779{
1780	struct sis900_private *sis_priv = net_dev->priv;
1781
1782	for (; sis_priv->dirty_tx != sis_priv->cur_tx; sis_priv->dirty_tx++) {
1783		struct sk_buff *skb;
1784		unsigned int entry;
1785		u32 tx_status;
1786
1787		entry = sis_priv->dirty_tx % NUM_TX_DESC;
1788		tx_status = sis_priv->tx_ring[entry].cmdsts;
1789
1790		if (tx_status & OWN) {
1791			/* The packet is not transmitted yet (owned by hardware) !
1792			 * Note: the interrupt is generated only when Tx Machine
1793			 * is idle, so this is an almost impossible case */
1794			break;
1795		}
1796
1797		if (tx_status & (ABORT | UNDERRUN | OWCOLL)) {
1798			/* packet unsuccessfully transmitted */
1799			if (netif_msg_tx_err(sis_priv))
1800				printk(KERN_DEBUG "%s: Transmit "
1801				       "error, Tx status %8.8x.\n",
1802				       net_dev->name, tx_status);
1803			sis_priv->stats.tx_errors++;
1804			if (tx_status & UNDERRUN)
1805				sis_priv->stats.tx_fifo_errors++;
1806			if (tx_status & ABORT)
1807				sis_priv->stats.tx_aborted_errors++;
1808			if (tx_status & NOCARRIER)
1809				sis_priv->stats.tx_carrier_errors++;
1810			if (tx_status & OWCOLL)
1811				sis_priv->stats.tx_window_errors++;
1812		} else {
1813			/* packet successfully transmitted */
1814			sis_priv->stats.collisions += (tx_status & COLCNT) >> 16;
1815			sis_priv->stats.tx_bytes += tx_status & DSIZE;
1816			sis_priv->stats.tx_packets++;
1817		}
1818		/* Free the original skb. */
1819		skb = sis_priv->tx_skbuff[entry];
1820		pci_unmap_single(sis_priv->pci_dev,
1821			sis_priv->tx_ring[entry].bufptr, skb->len,
1822			PCI_DMA_TODEVICE);
1823		dev_kfree_skb_irq(skb);
1824		sis_priv->tx_skbuff[entry] = NULL;
1825		sis_priv->tx_ring[entry].bufptr = 0;
1826		sis_priv->tx_ring[entry].cmdsts = 0;
1827	}
1828
1829	if (sis_priv->tx_full && netif_queue_stopped(net_dev) &&
1830	    sis_priv->cur_tx - sis_priv->dirty_tx < NUM_TX_DESC - 4) {
1831		/* The ring is no longer full, clear tx_full and schedule
1832		 * more transmission by netif_wake_queue(net_dev) */
1833		sis_priv->tx_full = 0;
1834		netif_wake_queue (net_dev);
1835	}
1836}
1837
1838/**
1839 *	sis900_close - close sis900 device
1840 *	@net_dev: the net device to be closed
1841 *
1842 *	Disable interrupts, stop the Tx and Rx Status Machine
1843 *	free Tx and RX socket buffer
1844 */
1845
1846static int sis900_close(struct net_device *net_dev)
1847{
1848	long ioaddr = net_dev->base_addr;
1849	struct sis900_private *sis_priv = net_dev->priv;
1850	struct sk_buff *skb;
1851	int i;
1852
1853	netif_stop_queue(net_dev);
1854
1855	/* Disable interrupts by clearing the interrupt mask. */
1856	outl(0x0000, ioaddr + imr);
1857	outl(0x0000, ioaddr + ier);
1858
1859	/* Stop the chip's Tx and Rx Status Machine */
1860	outl(RxDIS | TxDIS | inl(ioaddr + cr), ioaddr + cr);
1861
1862	del_timer(&sis_priv->timer);
1863
1864	free_irq(net_dev->irq, net_dev);
1865
1866	/* Free Tx and RX skbuff */
1867	for (i = 0; i < NUM_RX_DESC; i++) {
1868		skb = sis_priv->rx_skbuff[i];
1869		if (skb) {
1870			pci_unmap_single(sis_priv->pci_dev,
1871				sis_priv->rx_ring[i].bufptr,
1872				RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1873			dev_kfree_skb(skb);
1874			sis_priv->rx_skbuff[i] = NULL;
1875		}
1876	}
1877	for (i = 0; i < NUM_TX_DESC; i++) {
1878		skb = sis_priv->tx_skbuff[i];
1879		if (skb) {
1880			pci_unmap_single(sis_priv->pci_dev,
1881				sis_priv->tx_ring[i].bufptr, skb->len,
1882				PCI_DMA_TODEVICE);
1883			dev_kfree_skb(skb);
1884			sis_priv->tx_skbuff[i] = NULL;
1885		}
1886	}
1887
1888	/* Green! Put the chip in low-power mode. */
1889
1890	return 0;
1891}
1892
1893/**
1894 *	sis900_get_drvinfo - Return information about driver
1895 *	@net_dev: the net device to probe
1896 *	@info: container for info returned
1897 *
1898 *	Process ethtool command such as "ehtool -i" to show information
1899 */
1900
1901static void sis900_get_drvinfo(struct net_device *net_dev,
1902			       struct ethtool_drvinfo *info)
1903{
1904 	struct sis900_private *sis_priv = net_dev->priv;
1905
1906	strcpy (info->driver, SIS900_MODULE_NAME);
1907	strcpy (info->version, SIS900_DRV_VERSION);
1908	strcpy (info->bus_info, pci_name(sis_priv->pci_dev));
1909}
1910
1911static u32 sis900_get_msglevel(struct net_device *net_dev)
1912{
1913	struct sis900_private *sis_priv = net_dev->priv;
1914	return sis_priv->msg_enable;
1915}
1916
1917static void sis900_set_msglevel(struct net_device *net_dev, u32 value)
1918{
1919	struct sis900_private *sis_priv = net_dev->priv;
1920	sis_priv->msg_enable = value;
1921}
1922
1923static u32 sis900_get_link(struct net_device *net_dev)
1924{
1925	struct sis900_private *sis_priv = net_dev->priv;
1926	return mii_link_ok(&sis_priv->mii_info);
1927}
1928
1929static int sis900_get_settings(struct net_device *net_dev,
1930				struct ethtool_cmd *cmd)
1931{
1932	struct sis900_private *sis_priv = net_dev->priv;
1933	spin_lock_irq(&sis_priv->lock);
1934	mii_ethtool_gset(&sis_priv->mii_info, cmd);
1935	spin_unlock_irq(&sis_priv->lock);
1936	return 0;
1937}
1938
1939static int sis900_set_settings(struct net_device *net_dev,
1940				struct ethtool_cmd *cmd)
1941{
1942	struct sis900_private *sis_priv = net_dev->priv;
1943	int rt;
1944	spin_lock_irq(&sis_priv->lock);
1945	rt = mii_ethtool_sset(&sis_priv->mii_info, cmd);
1946	spin_unlock_irq(&sis_priv->lock);
1947	return rt;
1948}
1949
1950static int sis900_nway_reset(struct net_device *net_dev)
1951{
1952	struct sis900_private *sis_priv = net_dev->priv;
1953	return mii_nway_restart(&sis_priv->mii_info);
1954}
1955
1956/**
1957 *	sis900_set_wol - Set up Wake on Lan registers
1958 *	@net_dev: the net device to probe
1959 *	@wol: container for info passed to the driver
1960 *
1961 *	Process ethtool command "wol" to setup wake on lan features.
1962 *	SiS900 supports sending WoL events if a correct packet is received,
1963 *	but there is no simple way to filter them to only a subset (broadcast,
1964 *	multicast, unicast or arp).
1965 */
1966
1967static int sis900_set_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol)
1968{
1969	struct sis900_private *sis_priv = net_dev->priv;
1970	long pmctrl_addr = net_dev->base_addr + pmctrl;
1971	u32 cfgpmcsr = 0, pmctrl_bits = 0;
1972
1973	if (wol->wolopts == 0) {
1974		pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr);
1975		cfgpmcsr &= ~PME_EN;
1976		pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr);
1977		outl(pmctrl_bits, pmctrl_addr);
1978		if (netif_msg_wol(sis_priv))
1979			printk(KERN_DEBUG "%s: Wake on LAN disabled\n", net_dev->name);
1980		return 0;
1981	}
1982
1983	if (wol->wolopts & (WAKE_MAGICSECURE | WAKE_UCAST | WAKE_MCAST
1984				| WAKE_BCAST | WAKE_ARP))
1985		return -EINVAL;
1986
1987	if (wol->wolopts & WAKE_MAGIC)
1988		pmctrl_bits |= MAGICPKT;
1989	if (wol->wolopts & WAKE_PHY)
1990		pmctrl_bits |= LINKON;
1991
1992	outl(pmctrl_bits, pmctrl_addr);
1993
1994	pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr);
1995	cfgpmcsr |= PME_EN;
1996	pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr);
1997	if (netif_msg_wol(sis_priv))
1998		printk(KERN_DEBUG "%s: Wake on LAN enabled\n", net_dev->name);
1999
2000	return 0;
2001}
2002
2003static void sis900_get_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol)
2004{
2005	long pmctrl_addr = net_dev->base_addr + pmctrl;
2006	u32 pmctrl_bits;
2007
2008	pmctrl_bits = inl(pmctrl_addr);
2009	if (pmctrl_bits & MAGICPKT)
2010		wol->wolopts |= WAKE_MAGIC;
2011	if (pmctrl_bits & LINKON)
2012		wol->wolopts |= WAKE_PHY;
2013
2014	wol->supported = (WAKE_PHY | WAKE_MAGIC);
2015}
2016
2017static const struct ethtool_ops sis900_ethtool_ops = {
2018	.get_drvinfo 	= sis900_get_drvinfo,
2019	.get_msglevel	= sis900_get_msglevel,
2020	.set_msglevel	= sis900_set_msglevel,
2021	.get_link	= sis900_get_link,
2022	.get_settings	= sis900_get_settings,
2023	.set_settings	= sis900_set_settings,
2024	.nway_reset	= sis900_nway_reset,
2025	.get_wol	= sis900_get_wol,
2026	.set_wol	= sis900_set_wol
2027};
2028
2029/**
2030 *	mii_ioctl - process MII i/o control command
2031 *	@net_dev: the net device to command for
2032 *	@rq: parameter for command
2033 *	@cmd: the i/o command
2034 *
2035 *	Process MII command like read/write MII register
2036 */
2037
2038static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd)
2039{
2040	struct sis900_private *sis_priv = net_dev->priv;
2041	struct mii_ioctl_data *data = if_mii(rq);
2042
2043	switch(cmd) {
2044	case SIOCGMIIPHY:		/* Get address of MII PHY in use. */
2045		data->phy_id = sis_priv->mii->phy_addr;
2046		/* Fall Through */
2047
2048	case SIOCGMIIREG:		/* Read MII PHY register. */
2049		data->val_out = mdio_read(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f);
2050		return 0;
2051
2052	case SIOCSMIIREG:		/* Write MII PHY register. */
2053		if (!capable(CAP_NET_ADMIN))
2054			return -EPERM;
2055		mdio_write(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in);
2056		return 0;
2057	default:
2058		return -EOPNOTSUPP;
2059	}
2060}
2061
2062/**
2063 *	sis900_get_stats - Get sis900 read/write statistics
2064 *	@net_dev: the net device to get statistics for
2065 *
2066 *	get tx/rx statistics for sis900
2067 */
2068
2069static struct net_device_stats *
2070sis900_get_stats(struct net_device *net_dev)
2071{
2072	struct sis900_private *sis_priv = net_dev->priv;
2073
2074	return &sis_priv->stats;
2075}
2076
2077/**
2078 *	sis900_set_config - Set media type by net_device.set_config
2079 *	@dev: the net device for media type change
2080 *	@map: ifmap passed by ifconfig
2081 *
2082 *	Set media type to 10baseT, 100baseT or 0(for auto) by ifconfig
2083 *	we support only port changes. All other runtime configuration
2084 *	changes will be ignored
2085 */
2086
2087static int sis900_set_config(struct net_device *dev, struct ifmap *map)
2088{
2089	struct sis900_private *sis_priv = dev->priv;
2090	struct mii_phy *mii_phy = sis_priv->mii;
2091
2092	u16 status;
2093
2094	if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) {
2095		/* we switch on the ifmap->port field. I couldn't find anything
2096		 * like a definition or standard for the values of that field.
2097		 * I think the meaning of those values is device specific. But
2098		 * since I would like to change the media type via the ifconfig
2099		 * command I use the definition from linux/netdevice.h
2100		 * (which seems to be different from the ifport(pcmcia) definition) */
2101		switch(map->port){
2102		case IF_PORT_UNKNOWN: /* use auto here */
2103			dev->if_port = map->port;
2104			/* we are going to change the media type, so the Link
2105			 * will be temporary down and we need to reflect that
2106			 * here. When the Link comes up again, it will be
2107			 * sensed by the sis_timer procedure, which also does
2108			 * all the rest for us */
2109			netif_carrier_off(dev);
2110
2111			/* read current state */
2112			status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
2113
2114			/* enable auto negotiation and reset the negotioation
2115			 * (I don't really know what the auto negatiotiation
2116			 * reset really means, but it sounds for me right to
2117			 * do one here) */
2118			mdio_write(dev, mii_phy->phy_addr,
2119				   MII_CONTROL, status | MII_CNTL_AUTO | MII_CNTL_RST_AUTO);
2120
2121			break;
2122
2123		case IF_PORT_10BASET: /* 10BaseT */
2124			dev->if_port = map->port;
2125
2126			/* we are going to change the media type, so the Link
2127			 * will be temporary down and we need to reflect that
2128			 * here. When the Link comes up again, it will be
2129			 * sensed by the sis_timer procedure, which also does
2130			 * all the rest for us */
2131			netif_carrier_off(dev);
2132
2133			/* set Speed to 10Mbps */
2134			/* read current state */
2135			status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
2136
2137			/* disable auto negotiation and force 10MBit mode*/
2138			mdio_write(dev, mii_phy->phy_addr,
2139				   MII_CONTROL, status & ~(MII_CNTL_SPEED |
2140					MII_CNTL_AUTO));
2141			break;
2142
2143		case IF_PORT_100BASET: /* 100BaseT */
2144		case IF_PORT_100BASETX: /* 100BaseTx */
2145			dev->if_port = map->port;
2146
2147			/* we are going to change the media type, so the Link
2148			 * will be temporary down and we need to reflect that
2149			 * here. When the Link comes up again, it will be
2150			 * sensed by the sis_timer procedure, which also does
2151			 * all the rest for us */
2152			netif_carrier_off(dev);
2153
2154			/* set Speed to 100Mbps */
2155			/* disable auto negotiation and enable 100MBit Mode */
2156			status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
2157			mdio_write(dev, mii_phy->phy_addr,
2158				   MII_CONTROL, (status & ~MII_CNTL_SPEED) |
2159				   MII_CNTL_SPEED);
2160
2161			break;
2162
2163		case IF_PORT_10BASE2: /* 10Base2 */
2164		case IF_PORT_AUI: /* AUI */
2165		case IF_PORT_100BASEFX: /* 100BaseFx */
2166                	/* These Modes are not supported (are they?)*/
2167			return -EOPNOTSUPP;
2168			break;
2169
2170		default:
2171			return -EINVAL;
2172		}
2173	}
2174	return 0;
2175}
2176
2177/**
2178 *	sis900_mcast_bitnr - compute hashtable index
2179 *	@addr: multicast address
2180 *	@revision: revision id of chip
2181 *
2182 *	SiS 900 uses the most sigificant 7 bits to index a 128 bits multicast
2183 *	hash table, which makes this function a little bit different from other drivers
2184 *	SiS 900 B0 & 635 M/B uses the most significat 8 bits to index 256 bits
2185 *   	multicast hash table.
2186 */
2187
2188static inline u16 sis900_mcast_bitnr(u8 *addr, u8 revision)
2189{
2190
2191	u32 crc = ether_crc(6, addr);
2192
2193	/* leave 8 or 7 most siginifant bits */
2194	if ((revision >= SIS635A_900_REV) || (revision == SIS900B_900_REV))
2195		return ((int)(crc >> 24));
2196	else
2197		return ((int)(crc >> 25));
2198}
2199
2200/**
2201 *	set_rx_mode - Set SiS900 receive mode
2202 *	@net_dev: the net device to be set
2203 *
2204 *	Set SiS900 receive mode for promiscuous, multicast, or broadcast mode.
2205 *	And set the appropriate multicast filter.
2206 *	Multicast hash table changes from 128 to 256 bits for 635M/B & 900B0.
2207 */
2208
2209static void set_rx_mode(struct net_device *net_dev)
2210{
2211	long ioaddr = net_dev->base_addr;
2212	struct sis900_private * sis_priv = net_dev->priv;
2213	u16 mc_filter[16] = {0};	/* 256/128 bits multicast hash table */
2214	int i, table_entries;
2215	u32 rx_mode;
2216
2217	/* 635 Hash Table entries = 256(2^16) */
2218	if((sis_priv->chipset_rev >= SIS635A_900_REV) ||
2219			(sis_priv->chipset_rev == SIS900B_900_REV))
2220		table_entries = 16;
2221	else
2222		table_entries = 8;
2223
2224	if (net_dev->flags & IFF_PROMISC) {
2225		/* Accept any kinds of packets */
2226		rx_mode = RFPromiscuous;
2227		for (i = 0; i < table_entries; i++)
2228			mc_filter[i] = 0xffff;
2229	} else if ((net_dev->mc_count > multicast_filter_limit) ||
2230		   (net_dev->flags & IFF_ALLMULTI)) {
2231		/* too many multicast addresses or accept all multicast packet */
2232		rx_mode = RFAAB | RFAAM;
2233		for (i = 0; i < table_entries; i++)
2234			mc_filter[i] = 0xffff;
2235	} else {
2236		/* Accept Broadcast packet, destination address matchs our
2237		 * MAC address, use Receive Filter to reject unwanted MCAST
2238		 * packets */
2239		struct dev_mc_list *mclist;
2240		rx_mode = RFAAB;
2241		for (i = 0, mclist = net_dev->mc_list;
2242			mclist && i < net_dev->mc_count;
2243			i++, mclist = mclist->next) {
2244			unsigned int bit_nr =
2245				sis900_mcast_bitnr(mclist->dmi_addr, sis_priv->chipset_rev);
2246			mc_filter[bit_nr >> 4] |= (1 << (bit_nr & 0xf));
2247		}
2248	}
2249
2250	/* update Multicast Hash Table in Receive Filter */
2251	for (i = 0; i < table_entries; i++) {
2252                /* why plus 0x04 ??, That makes the correct value for hash table. */
2253		outl((u32)(0x00000004+i) << RFADDR_shift, ioaddr + rfcr);
2254		outl(mc_filter[i], ioaddr + rfdr);
2255	}
2256
2257	outl(RFEN | rx_mode, ioaddr + rfcr);
2258
2259	/* sis900 is capable of looping back packets at MAC level for
2260	 * debugging purpose */
2261	if (net_dev->flags & IFF_LOOPBACK) {
2262		u32 cr_saved;
2263		/* We must disable Tx/Rx before setting loopback mode */
2264		cr_saved = inl(ioaddr + cr);
2265		outl(cr_saved | TxDIS | RxDIS, ioaddr + cr);
2266		/* enable loopback */
2267		outl(inl(ioaddr + txcfg) | TxMLB, ioaddr + txcfg);
2268		outl(inl(ioaddr + rxcfg) | RxATX, ioaddr + rxcfg);
2269		/* restore cr */
2270		outl(cr_saved, ioaddr + cr);
2271	}
2272
2273	return;
2274}
2275
2276/**
2277 *	sis900_reset - Reset sis900 MAC
2278 *	@net_dev: the net device to reset
2279 *
2280 *	reset sis900 MAC and wait until finished
2281 *	reset through command register
2282 *	change backoff algorithm for 900B0 & 635 M/B
2283 */
2284
2285static void sis900_reset(struct net_device *net_dev)
2286{
2287	struct sis900_private * sis_priv = net_dev->priv;
2288	long ioaddr = net_dev->base_addr;
2289	int i = 0;
2290	u32 status = TxRCMP | RxRCMP;
2291
2292	outl(0, ioaddr + ier);
2293	outl(0, ioaddr + imr);
2294	outl(0, ioaddr + rfcr);
2295
2296	outl(RxRESET | TxRESET | RESET | inl(ioaddr + cr), ioaddr + cr);
2297
2298	/* Check that the chip has finished the reset. */
2299	while (status && (i++ < 1000)) {
2300		status ^= (inl(isr + ioaddr) & status);
2301	}
2302
2303	if( (sis_priv->chipset_rev >= SIS635A_900_REV) ||
2304			(sis_priv->chipset_rev == SIS900B_900_REV) )
2305		outl(PESEL | RND_CNT, ioaddr + cfg);
2306	else
2307		outl(PESEL, ioaddr + cfg);
2308}
2309
2310/**
2311 *	sis900_remove - Remove sis900 device
2312 *	@pci_dev: the pci device to be removed
2313 *
2314 *	remove and release SiS900 net device
2315 */
2316
2317static void __devexit sis900_remove(struct pci_dev *pci_dev)
2318{
2319	struct net_device *net_dev = pci_get_drvdata(pci_dev);
2320	struct sis900_private * sis_priv = net_dev->priv;
2321	struct mii_phy *phy = NULL;
2322
2323	while (sis_priv->first_mii) {
2324		phy = sis_priv->first_mii;
2325		sis_priv->first_mii = phy->next;
2326		kfree(phy);
2327	}
2328
2329	pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring,
2330		sis_priv->rx_ring_dma);
2331	pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring,
2332		sis_priv->tx_ring_dma);
2333	unregister_netdev(net_dev);
2334	free_netdev(net_dev);
2335	pci_release_regions(pci_dev);
2336	pci_set_drvdata(pci_dev, NULL);
2337}
2338
2339#ifdef CONFIG_PM
2340
2341static int sis900_suspend(struct pci_dev *pci_dev, pm_message_t state)
2342{
2343	struct net_device *net_dev = pci_get_drvdata(pci_dev);
2344	long ioaddr = net_dev->base_addr;
2345
2346	if(!netif_running(net_dev))
2347		return 0;
2348
2349	netif_stop_queue(net_dev);
2350	netif_device_detach(net_dev);
2351
2352	/* Stop the chip's Tx and Rx Status Machine */
2353	outl(RxDIS | TxDIS | inl(ioaddr + cr), ioaddr + cr);
2354
2355	pci_set_power_state(pci_dev, PCI_D3hot);
2356	pci_save_state(pci_dev);
2357
2358	return 0;
2359}
2360
2361static int sis900_resume(struct pci_dev *pci_dev)
2362{
2363	struct net_device *net_dev = pci_get_drvdata(pci_dev);
2364	struct sis900_private *sis_priv = net_dev->priv;
2365	long ioaddr = net_dev->base_addr;
2366
2367	if(!netif_running(net_dev))
2368		return 0;
2369	pci_restore_state(pci_dev);
2370	pci_set_power_state(pci_dev, PCI_D0);
2371
2372	sis900_init_rxfilter(net_dev);
2373
2374	sis900_init_tx_ring(net_dev);
2375	sis900_init_rx_ring(net_dev);
2376
2377	set_rx_mode(net_dev);
2378
2379	netif_device_attach(net_dev);
2380	netif_start_queue(net_dev);
2381
2382	sis900_set_mode(ioaddr, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED);
2383
2384	/* Enable all known interrupts by setting the interrupt mask. */
2385	outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);
2386	outl(RxENA | inl(ioaddr + cr), ioaddr + cr);
2387	outl(IE, ioaddr + ier);
2388
2389	sis900_check_mode(net_dev, sis_priv->mii);
2390
2391	return 0;
2392}
2393#endif /* CONFIG_PM */
2394
2395static struct pci_driver sis900_pci_driver = {
2396	.name		= SIS900_MODULE_NAME,
2397	.id_table	= sis900_pci_tbl,
2398	.probe		= sis900_probe,
2399	.remove		= __devexit_p(sis900_remove),
2400#ifdef CONFIG_PM
2401	.suspend	= sis900_suspend,
2402	.resume		= sis900_resume,
2403#endif /* CONFIG_PM */
2404};
2405
2406static int __init sis900_init_module(void)
2407{
2408/* when a module, this is printed whether or not devices are found in probe */
2409#ifdef MODULE
2410	printk(version);
2411#endif
2412
2413	return pci_register_driver(&sis900_pci_driver);
2414}
2415
2416static void __exit sis900_cleanup_module(void)
2417{
2418	pci_unregister_driver(&sis900_pci_driver);
2419}
2420
2421module_init(sis900_init_module);
2422module_exit(sis900_cleanup_module);
2423