1/* hamachi.c: A Packet Engines GNIC-II Gigabit Ethernet driver for Linux. */ 2/* 3 Written 1998-2000 by Donald Becker. 4 Updates 2000 by Keith Underwood. 5 6 This software may be used and distributed according to the terms of 7 the GNU General Public License (GPL), incorporated herein by reference. 8 Drivers based on or derived from this code fall under the GPL and must 9 retain the authorship, copyright and license notice. This file is not 10 a complete program and may only be used when the entire operating 11 system is licensed under the GPL. 12 13 The author may be reached as becker@scyld.com, or C/O 14 Scyld Computing Corporation 15 410 Severn Ave., Suite 210 16 Annapolis MD 21403 17 18 This driver is for the Packet Engines GNIC-II PCI Gigabit Ethernet 19 adapter. 20 21 Support and updates available at 22 http://www.scyld.com/network/hamachi.html 23 [link no longer provides useful info -jgarzik] 24 or 25 http://www.parl.clemson.edu/~keithu/hamachi.html 26 27*/ 28 29#define DRV_NAME "hamachi" 30#define DRV_VERSION "2.1" 31#define DRV_RELDATE "Sept 11, 2006" 32 33 34/* A few user-configurable values. */ 35 36static int debug = 1; /* 1 normal messages, 0 quiet .. 7 verbose. */ 37#define final_version 38#define hamachi_debug debug 39/* Maximum events (Rx packets, etc.) to handle at each interrupt. */ 40static int max_interrupt_work = 40; 41static int mtu; 42/* Default values selected by testing on a dual processor PIII-450 */ 43/* These six interrupt control parameters may be set directly when loading the 44 * module, or through the rx_params and tx_params variables 45 */ 46static int max_rx_latency = 0x11; 47static int max_rx_gap = 0x05; 48static int min_rx_pkt = 0x18; 49static int max_tx_latency = 0x00; 50static int max_tx_gap = 0x00; 51static int min_tx_pkt = 0x30; 52 53/* Set the copy breakpoint for the copy-only-tiny-frames scheme. 54 -Setting to > 1518 causes all frames to be copied 55 -Setting to 0 disables copies 56*/ 57static int rx_copybreak; 58 59/* An override for the hardware detection of bus width. 60 Set to 1 to force 32 bit PCI bus detection. Set to 4 to force 64 bit. 61 Add 2 to disable parity detection. 62*/ 63static int force32; 64 65 66/* Used to pass the media type, etc. 67 These exist for driver interoperability. 68 No media types are currently defined. 69 - The lower 4 bits are reserved for the media type. 70 - The next three bits may be set to one of the following: 71 0x00000000 : Autodetect PCI bus 72 0x00000010 : Force 32 bit PCI bus 73 0x00000020 : Disable parity detection 74 0x00000040 : Force 64 bit PCI bus 75 Default is autodetect 76 - The next bit can be used to force half-duplex. This is a bad 77 idea since no known implementations implement half-duplex, and, 78 in general, half-duplex for gigabit ethernet is a bad idea. 79 0x00000080 : Force half-duplex 80 Default is full-duplex. 81 - In the original driver, the ninth bit could be used to force 82 full-duplex. Maintain that for compatibility 83 0x00000200 : Force full-duplex 84*/ 85#define MAX_UNITS 8 /* More are supported, limit only on options */ 86static int options[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1}; 87static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1}; 88/* The Hamachi chipset supports 3 parameters each for Rx and Tx 89 * interruput management. Parameters will be loaded as specified into 90 * the TxIntControl and RxIntControl registers. 91 * 92 * The registers are arranged as follows: 93 * 23 - 16 15 - 8 7 - 0 94 * _________________________________ 95 * | min_pkt | max_gap | max_latency | 96 * --------------------------------- 97 * min_pkt : The minimum number of packets processed between 98 * interrupts. 99 * max_gap : The maximum inter-packet gap in units of 8.192 us 100 * max_latency : The absolute time between interrupts in units of 8.192 us 101 * 102 */ 103static int rx_params[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1}; 104static int tx_params[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1}; 105 106/* Operational parameters that are set at compile time. */ 107 108/* Keep the ring sizes a power of two for compile efficiency. 109 The compiler will convert <unsigned>'%'<2^N> into a bit mask. 110 Making the Tx ring too large decreases the effectiveness of channel 111 bonding and packet priority. 112 There are no ill effects from too-large receive rings, except for 113 excessive memory usage */ 114/* Empirically it appears that the Tx ring needs to be a little bigger 115 for these Gbit adapters or you get into an overrun condition really 116 easily. Also, things appear to work a bit better in back-to-back 117 configurations if the Rx ring is 8 times the size of the Tx ring 118*/ 119#define TX_RING_SIZE 64 120#define RX_RING_SIZE 512 121#define TX_TOTAL_SIZE TX_RING_SIZE*sizeof(struct hamachi_desc) 122#define RX_TOTAL_SIZE RX_RING_SIZE*sizeof(struct hamachi_desc) 123 124/* 125 * Enable netdev_ioctl. Added interrupt coalescing parameter adjustment. 126 * 2/19/99 Pete Wyckoff <wyckoff@ca.sandia.gov> 127 */ 128 129/* play with 64-bit addrlen; seems to be a teensy bit slower --pw */ 130/* #define ADDRLEN 64 */ 131 132/* 133 * RX_CHECKSUM turns on card-generated receive checksum generation for 134 * TCP and UDP packets. Otherwise the upper layers do the calculation. 135 * TX_CHECKSUM won't do anything too useful, even if it works. There's no 136 * easy mechanism by which to tell the TCP/UDP stack that it need not 137 * generate checksums for this device. But if somebody can find a way 138 * to get that to work, most of the card work is in here already. 139 * 3/10/1999 Pete Wyckoff <wyckoff@ca.sandia.gov> 140 */ 141#undef TX_CHECKSUM 142#define RX_CHECKSUM 143 144/* Operational parameters that usually are not changed. */ 145/* Time in jiffies before concluding the transmitter is hung. */ 146#define TX_TIMEOUT (5*HZ) 147 148#include <linux/module.h> 149#include <linux/kernel.h> 150#include <linux/string.h> 151#include <linux/timer.h> 152#include <linux/time.h> 153#include <linux/errno.h> 154#include <linux/ioport.h> 155#include <linux/slab.h> 156#include <linux/interrupt.h> 157#include <linux/pci.h> 158#include <linux/init.h> 159#include <linux/ethtool.h> 160#include <linux/mii.h> 161#include <linux/netdevice.h> 162#include <linux/etherdevice.h> 163#include <linux/skbuff.h> 164#include <linux/ip.h> 165#include <linux/delay.h> 166#include <linux/bitops.h> 167 168#include <asm/uaccess.h> 169#include <asm/processor.h> /* Processor type for cache alignment. */ 170#include <asm/io.h> 171#include <asm/unaligned.h> 172#include <asm/cache.h> 173 174static char version[] __devinitdata = 175KERN_INFO DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " Written by Donald Becker\n" 176KERN_INFO " Some modifications by Eric kasten <kasten@nscl.msu.edu>\n" 177KERN_INFO " Further modifications by Keith Underwood <keithu@parl.clemson.edu>\n"; 178 179 180/* IP_MF appears to be only defined in <netinet/ip.h>, however, 181 we need it for hardware checksumming support. FYI... some of 182 the definitions in <netinet/ip.h> conflict/duplicate those in 183 other linux headers causing many compiler warnings. 184*/ 185#ifndef IP_MF 186 #define IP_MF 0x2000 /* IP more frags from <netinet/ip.h> */ 187#endif 188 189/* Define IP_OFFSET to be IPOPT_OFFSET */ 190#ifndef IP_OFFSET 191 #ifdef IPOPT_OFFSET 192 #define IP_OFFSET IPOPT_OFFSET 193 #else 194 #define IP_OFFSET 2 195 #endif 196#endif 197 198#define RUN_AT(x) (jiffies + (x)) 199 200#ifndef ADDRLEN 201#define ADDRLEN 32 202#endif 203 204/* Condensed bus+endian portability operations. */ 205#if ADDRLEN == 64 206#define cpu_to_leXX(addr) cpu_to_le64(addr) 207#else 208#define cpu_to_leXX(addr) cpu_to_le32(addr) 209#endif 210 211 212/* 213 Theory of Operation 214 215I. Board Compatibility 216 217This device driver is designed for the Packet Engines "Hamachi" 218Gigabit Ethernet chip. The only PCA currently supported is the GNIC-II 64-bit 21966Mhz PCI card. 220 221II. Board-specific settings 222 223No jumpers exist on the board. The chip supports software correction of 224various motherboard wiring errors, however this driver does not support 225that feature. 226 227III. Driver operation 228 229IIIa. Ring buffers 230 231The Hamachi uses a typical descriptor based bus-master architecture. 232The descriptor list is similar to that used by the Digital Tulip. 233This driver uses two statically allocated fixed-size descriptor lists 234formed into rings by a branch from the final descriptor to the beginning of 235the list. The ring sizes are set at compile time by RX/TX_RING_SIZE. 236 237This driver uses a zero-copy receive and transmit scheme similar my other 238network drivers. 239The driver allocates full frame size skbuffs for the Rx ring buffers at 240open() time and passes the skb->data field to the Hamachi as receive data 241buffers. When an incoming frame is less than RX_COPYBREAK bytes long, 242a fresh skbuff is allocated and the frame is copied to the new skbuff. 243When the incoming frame is larger, the skbuff is passed directly up the 244protocol stack and replaced by a newly allocated skbuff. 245 246The RX_COPYBREAK value is chosen to trade-off the memory wasted by 247using a full-sized skbuff for small frames vs. the copying costs of larger 248frames. Gigabit cards are typically used on generously configured machines 249and the underfilled buffers have negligible impact compared to the benefit of 250a single allocation size, so the default value of zero results in never 251copying packets. 252 253IIIb/c. Transmit/Receive Structure 254 255The Rx and Tx descriptor structure are straight-forward, with no historical 256baggage that must be explained. Unlike the awkward DBDMA structure, there 257are no unused fields or option bits that had only one allowable setting. 258 259Two details should be noted about the descriptors: The chip supports both 32 260bit and 64 bit address structures, and the length field is overwritten on 261the receive descriptors. The descriptor length is set in the control word 262for each channel. The development driver uses 32 bit addresses only, however 26364 bit addresses may be enabled for 64 bit architectures e.g. the Alpha. 264 265IIId. Synchronization 266 267This driver is very similar to my other network drivers. 268The driver runs as two independent, single-threaded flows of control. One 269is the send-packet routine, which enforces single-threaded use by the 270dev->tbusy flag. The other thread is the interrupt handler, which is single 271threaded by the hardware and other software. 272 273The send packet thread has partial control over the Tx ring and 'dev->tbusy' 274flag. It sets the tbusy flag whenever it's queuing a Tx packet. If the next 275queue slot is empty, it clears the tbusy flag when finished otherwise it sets 276the 'hmp->tx_full' flag. 277 278The interrupt handler has exclusive control over the Rx ring and records stats 279from the Tx ring. After reaping the stats, it marks the Tx queue entry as 280empty by incrementing the dirty_tx mark. Iff the 'hmp->tx_full' flag is set, it 281clears both the tx_full and tbusy flags. 282 283IV. Notes 284 285Thanks to Kim Stearns of Packet Engines for providing a pair of GNIC-II boards. 286 287IVb. References 288 289Hamachi Engineering Design Specification, 5/15/97 290(Note: This version was marked "Confidential".) 291 292IVc. Errata 293 294None noted. 295 296V. Recent Changes 297 29801/15/1999 EPK Enlargement of the TX and RX ring sizes. This appears 299 to help avoid some stall conditions -- this needs further research. 300 30101/15/1999 EPK Creation of the hamachi_tx function. This function cleans 302 the Tx ring and is called from hamachi_start_xmit (this used to be 303 called from hamachi_interrupt but it tends to delay execution of the 304 interrupt handler and thus reduce bandwidth by reducing the latency 305 between hamachi_rx()'s). Notably, some modification has been made so 306 that the cleaning loop checks only to make sure that the DescOwn bit 307 isn't set in the status flag since the card is not required 308 to set the entire flag to zero after processing. 309 31001/15/1999 EPK In the hamachi_start_tx function, the Tx ring full flag is 311 checked before attempting to add a buffer to the ring. If the ring is full 312 an attempt is made to free any dirty buffers and thus find space for 313 the new buffer or the function returns non-zero which should case the 314 scheduler to reschedule the buffer later. 315 31601/15/1999 EPK Some adjustments were made to the chip initialization. 317 End-to-end flow control should now be fully active and the interrupt 318 algorithm vars have been changed. These could probably use further tuning. 319 32001/15/1999 EPK Added the max_{rx,tx}_latency options. These are used to 321 set the rx and tx latencies for the Hamachi interrupts. If you're having 322 problems with network stalls, try setting these to higher values. 323 Valid values are 0x00 through 0xff. 324 32501/15/1999 EPK In general, the overall bandwidth has increased and 326 latencies are better (sometimes by a factor of 2). Stalls are rare at 327 this point, however there still appears to be a bug somewhere between the 328 hardware and driver. TCP checksum errors under load also appear to be 329 eliminated at this point. 330 33101/18/1999 EPK Ensured that the DescEndRing bit was being set on both the 332 Rx and Tx rings. This appears to have been affecting whether a particular 333 peer-to-peer connection would hang under high load. I believe the Rx 334 rings was typically getting set correctly, but the Tx ring wasn't getting 335 the DescEndRing bit set during initialization. ??? Does this mean the 336 hamachi card is using the DescEndRing in processing even if a particular 337 slot isn't in use -- hypothetically, the card might be searching the 338 entire Tx ring for slots with the DescOwn bit set and then processing 339 them. If the DescEndRing bit isn't set, then it might just wander off 340 through memory until it hits a chunk of data with that bit set 341 and then looping back. 342 34302/09/1999 EPK Added Michel Mueller's TxDMA Interrupt and Tx-timeout 344 problem (TxCmd and RxCmd need only to be set when idle or stopped. 345 34602/09/1999 EPK Added code to check/reset dev->tbusy in hamachi_interrupt. 347 (Michel Mueller pointed out the ``permanently busy'' potential 348 problem here). 349 35002/22/1999 EPK Added Pete Wyckoff's ioctl to control the Tx/Rx latencies. 351 35202/23/1999 EPK Verified that the interrupt status field bits for Tx were 353 incorrectly defined and corrected (as per Michel Mueller). 354 35502/23/1999 EPK Corrected the Tx full check to check that at least 4 slots 356 were available before reseting the tbusy and tx_full flags 357 (as per Michel Mueller). 358 35903/11/1999 EPK Added Pete Wyckoff's hardware checksumming support. 360 36112/31/1999 KDU Cleaned up assorted things and added Don's code to force 36232 bit. 363 36402/20/2000 KDU Some of the control was just plain odd. Cleaned up the 365hamachi_start_xmit() and hamachi_interrupt() code. There is still some 366re-structuring I would like to do. 367 36803/01/2000 KDU Experimenting with a WIDE range of interrupt mitigation 369parameters on a dual P3-450 setup yielded the new default interrupt 370mitigation parameters. Tx should interrupt VERY infrequently due to 371Eric's scheme. Rx should be more often... 372 37303/13/2000 KDU Added a patch to make the Rx Checksum code interact 374nicely with non-linux machines. 375 37603/13/2000 KDU Experimented with some of the configuration values: 377 378 -It seems that enabling PCI performance commands for descriptors 379 (changing RxDMACtrl and TxDMACtrl lower nibble from 5 to D) has minimal 380 performance impact for any of my tests. (ttcp, netpipe, netperf) I will 381 leave them that way until I hear further feedback. 382 383 -Increasing the PCI_LATENCY_TIMER to 130 384 (2 + (burst size of 128 * (0 wait states + 1))) seems to slightly 385 degrade performance. Leaving default at 64 pending further information. 386 38703/14/2000 KDU Further tuning: 388 389 -adjusted boguscnt in hamachi_rx() to depend on interrupt 390 mitigation parameters chosen. 391 392 -Selected a set of interrupt parameters based on some extensive testing. 393 These may change with more testing. 394 395TO DO: 396 397-Consider borrowing from the acenic driver code to check PCI_COMMAND for 398PCI_COMMAND_INVALIDATE. Set maximum burst size to cache line size in 399that case. 400 401-fix the reset procedure. It doesn't quite work. 402*/ 403 404/* A few values that may be tweaked. */ 405/* Size of each temporary Rx buffer, calculated as: 406 * 1518 bytes (ethernet packet) + 2 bytes (to get 8 byte alignment for 407 * the card) + 8 bytes of status info + 8 bytes for the Rx Checksum + 408 * 2 more because we use skb_reserve. 409 */ 410#define PKT_BUF_SZ 1538 411 412/* For now, this is going to be set to the maximum size of an ethernet 413 * packet. Eventually, we may want to make it a variable that is 414 * related to the MTU 415 */ 416#define MAX_FRAME_SIZE 1518 417 418/* The rest of these values should never change. */ 419 420static void hamachi_timer(unsigned long data); 421 422enum capability_flags {CanHaveMII=1, }; 423static const struct chip_info { 424 u16 vendor_id, device_id, device_id_mask, pad; 425 const char *name; 426 void (*media_timer)(unsigned long data); 427 int flags; 428} chip_tbl[] = { 429 {0x1318, 0x0911, 0xffff, 0, "Hamachi GNIC-II", hamachi_timer, 0}, 430 {0,}, 431}; 432 433/* Offsets to the Hamachi registers. Various sizes. */ 434enum hamachi_offsets { 435 TxDMACtrl=0x00, TxCmd=0x04, TxStatus=0x06, TxPtr=0x08, TxCurPtr=0x10, 436 RxDMACtrl=0x20, RxCmd=0x24, RxStatus=0x26, RxPtr=0x28, RxCurPtr=0x30, 437 PCIClkMeas=0x060, MiscStatus=0x066, ChipRev=0x68, ChipReset=0x06B, 438 LEDCtrl=0x06C, VirtualJumpers=0x06D, GPIO=0x6E, 439 TxChecksum=0x074, RxChecksum=0x076, 440 TxIntrCtrl=0x078, RxIntrCtrl=0x07C, 441 InterruptEnable=0x080, InterruptClear=0x084, IntrStatus=0x088, 442 EventStatus=0x08C, 443 MACCnfg=0x0A0, FrameGap0=0x0A2, FrameGap1=0x0A4, 444 /* See enum MII_offsets below. */ 445 MACCnfg2=0x0B0, RxDepth=0x0B8, FlowCtrl=0x0BC, MaxFrameSize=0x0CE, 446 AddrMode=0x0D0, StationAddr=0x0D2, 447 /* Gigabit AutoNegotiation. */ 448 ANCtrl=0x0E0, ANStatus=0x0E2, ANXchngCtrl=0x0E4, ANAdvertise=0x0E8, 449 ANLinkPartnerAbility=0x0EA, 450 EECmdStatus=0x0F0, EEData=0x0F1, EEAddr=0x0F2, 451 FIFOcfg=0x0F8, 452}; 453 454/* Offsets to the MII-mode registers. */ 455enum MII_offsets { 456 MII_Cmd=0xA6, MII_Addr=0xA8, MII_Wr_Data=0xAA, MII_Rd_Data=0xAC, 457 MII_Status=0xAE, 458}; 459 460/* Bits in the interrupt status/mask registers. */ 461enum intr_status_bits { 462 IntrRxDone=0x01, IntrRxPCIFault=0x02, IntrRxPCIErr=0x04, 463 IntrTxDone=0x100, IntrTxPCIFault=0x200, IntrTxPCIErr=0x400, 464 LinkChange=0x10000, NegotiationChange=0x20000, StatsMax=0x40000, }; 465 466/* The Hamachi Rx and Tx buffer descriptors. */ 467struct hamachi_desc { 468 u32 status_n_length; 469#if ADDRLEN == 64 470 u32 pad; 471 u64 addr; 472#else 473 u32 addr; 474#endif 475}; 476 477/* Bits in hamachi_desc.status_n_length */ 478enum desc_status_bits { 479 DescOwn=0x80000000, DescEndPacket=0x40000000, DescEndRing=0x20000000, 480 DescIntr=0x10000000, 481}; 482 483#define PRIV_ALIGN 15 /* Required alignment mask */ 484#define MII_CNT 4 485struct hamachi_private { 486 /* Descriptor rings first for alignment. Tx requires a second descriptor 487 for status. */ 488 struct hamachi_desc *rx_ring; 489 struct hamachi_desc *tx_ring; 490 struct sk_buff* rx_skbuff[RX_RING_SIZE]; 491 struct sk_buff* tx_skbuff[TX_RING_SIZE]; 492 dma_addr_t tx_ring_dma; 493 dma_addr_t rx_ring_dma; 494 struct net_device_stats stats; 495 struct timer_list timer; /* Media selection timer. */ 496 /* Frequently used and paired value: keep adjacent for cache effect. */ 497 spinlock_t lock; 498 int chip_id; 499 unsigned int cur_rx, dirty_rx; /* Producer/consumer ring indices */ 500 unsigned int cur_tx, dirty_tx; 501 unsigned int rx_buf_sz; /* Based on MTU+slack. */ 502 unsigned int tx_full:1; /* The Tx queue is full. */ 503 unsigned int duplex_lock:1; 504 unsigned int default_port:4; /* Last dev->if_port value. */ 505 /* MII transceiver section. */ 506 int mii_cnt; /* MII device addresses. */ 507 struct mii_if_info mii_if; /* MII lib hooks/info */ 508 unsigned char phys[MII_CNT]; /* MII device addresses, only first one used. */ 509 u32 rx_int_var, tx_int_var; /* interrupt control variables */ 510 u32 option; /* Hold on to a copy of the options */ 511 struct pci_dev *pci_dev; 512 void __iomem *base; 513}; 514 515MODULE_AUTHOR("Donald Becker <becker@scyld.com>, Eric Kasten <kasten@nscl.msu.edu>, Keith Underwood <keithu@parl.clemson.edu>"); 516MODULE_DESCRIPTION("Packet Engines 'Hamachi' GNIC-II Gigabit Ethernet driver"); 517MODULE_LICENSE("GPL"); 518 519module_param(max_interrupt_work, int, 0); 520module_param(mtu, int, 0); 521module_param(debug, int, 0); 522module_param(min_rx_pkt, int, 0); 523module_param(max_rx_gap, int, 0); 524module_param(max_rx_latency, int, 0); 525module_param(min_tx_pkt, int, 0); 526module_param(max_tx_gap, int, 0); 527module_param(max_tx_latency, int, 0); 528module_param(rx_copybreak, int, 0); 529module_param_array(rx_params, int, NULL, 0); 530module_param_array(tx_params, int, NULL, 0); 531module_param_array(options, int, NULL, 0); 532module_param_array(full_duplex, int, NULL, 0); 533module_param(force32, int, 0); 534MODULE_PARM_DESC(max_interrupt_work, "GNIC-II maximum events handled per interrupt"); 535MODULE_PARM_DESC(mtu, "GNIC-II MTU (all boards)"); 536MODULE_PARM_DESC(debug, "GNIC-II debug level (0-7)"); 537MODULE_PARM_DESC(min_rx_pkt, "GNIC-II minimum Rx packets processed between interrupts"); 538MODULE_PARM_DESC(max_rx_gap, "GNIC-II maximum Rx inter-packet gap in 8.192 microsecond units"); 539MODULE_PARM_DESC(max_rx_latency, "GNIC-II time between Rx interrupts in 8.192 microsecond units"); 540MODULE_PARM_DESC(min_tx_pkt, "GNIC-II minimum Tx packets processed between interrupts"); 541MODULE_PARM_DESC(max_tx_gap, "GNIC-II maximum Tx inter-packet gap in 8.192 microsecond units"); 542MODULE_PARM_DESC(max_tx_latency, "GNIC-II time between Tx interrupts in 8.192 microsecond units"); 543MODULE_PARM_DESC(rx_copybreak, "GNIC-II copy breakpoint for copy-only-tiny-frames"); 544MODULE_PARM_DESC(rx_params, "GNIC-II min_rx_pkt+max_rx_gap+max_rx_latency"); 545MODULE_PARM_DESC(tx_params, "GNIC-II min_tx_pkt+max_tx_gap+max_tx_latency"); 546MODULE_PARM_DESC(options, "GNIC-II Bits 0-3: media type, bits 4-6: as force32, bit 7: half duplex, bit 9 full duplex"); 547MODULE_PARM_DESC(full_duplex, "GNIC-II full duplex setting(s) (1)"); 548MODULE_PARM_DESC(force32, "GNIC-II: Bit 0: 32 bit PCI, bit 1: disable parity, bit 2: 64 bit PCI (all boards)"); 549 550static int read_eeprom(void __iomem *ioaddr, int location); 551static int mdio_read(struct net_device *dev, int phy_id, int location); 552static void mdio_write(struct net_device *dev, int phy_id, int location, int value); 553static int hamachi_open(struct net_device *dev); 554static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd); 555static void hamachi_timer(unsigned long data); 556static void hamachi_tx_timeout(struct net_device *dev); 557static void hamachi_init_ring(struct net_device *dev); 558static int hamachi_start_xmit(struct sk_buff *skb, struct net_device *dev); 559static irqreturn_t hamachi_interrupt(int irq, void *dev_instance); 560static int hamachi_rx(struct net_device *dev); 561static inline int hamachi_tx(struct net_device *dev); 562static void hamachi_error(struct net_device *dev, int intr_status); 563static int hamachi_close(struct net_device *dev); 564static struct net_device_stats *hamachi_get_stats(struct net_device *dev); 565static void set_rx_mode(struct net_device *dev); 566static const struct ethtool_ops ethtool_ops; 567static const struct ethtool_ops ethtool_ops_no_mii; 568 569static int __devinit hamachi_init_one (struct pci_dev *pdev, 570 const struct pci_device_id *ent) 571{ 572 struct hamachi_private *hmp; 573 int option, i, rx_int_var, tx_int_var, boguscnt; 574 int chip_id = ent->driver_data; 575 int irq; 576 void __iomem *ioaddr; 577 unsigned long base; 578 static int card_idx; 579 struct net_device *dev; 580 void *ring_space; 581 dma_addr_t ring_dma; 582 int ret = -ENOMEM; 583 584/* when built into the kernel, we only print version if device is found */ 585#ifndef MODULE 586 static int printed_version; 587 if (!printed_version++) 588 printk(version); 589#endif 590 591 if (pci_enable_device(pdev)) { 592 ret = -EIO; 593 goto err_out; 594 } 595 596 base = pci_resource_start(pdev, 0); 597#ifdef __alpha__ /* Really "64 bit addrs" */ 598 base |= (pci_resource_start(pdev, 1) << 32); 599#endif 600 601 pci_set_master(pdev); 602 603 i = pci_request_regions(pdev, DRV_NAME); 604 if (i) 605 return i; 606 607 irq = pdev->irq; 608 ioaddr = ioremap(base, 0x400); 609 if (!ioaddr) 610 goto err_out_release; 611 612 dev = alloc_etherdev(sizeof(struct hamachi_private)); 613 if (!dev) 614 goto err_out_iounmap; 615 616 SET_MODULE_OWNER(dev); 617 SET_NETDEV_DEV(dev, &pdev->dev); 618 619#ifdef TX_CHECKSUM 620 printk("check that skbcopy in ip_queue_xmit isn't happening\n"); 621 dev->hard_header_len += 8; /* for cksum tag */ 622#endif 623 624 for (i = 0; i < 6; i++) 625 dev->dev_addr[i] = 1 ? read_eeprom(ioaddr, 4 + i) 626 : readb(ioaddr + StationAddr + i); 627 628#if !defined(final_version) 629 if (hamachi_debug > 4) 630 for (i = 0; i < 0x10; i++) 631 printk("%2.2x%s", 632 read_eeprom(ioaddr, i), i % 16 != 15 ? " " : "\n"); 633#endif 634 635 hmp = netdev_priv(dev); 636 spin_lock_init(&hmp->lock); 637 638 hmp->mii_if.dev = dev; 639 hmp->mii_if.mdio_read = mdio_read; 640 hmp->mii_if.mdio_write = mdio_write; 641 hmp->mii_if.phy_id_mask = 0x1f; 642 hmp->mii_if.reg_num_mask = 0x1f; 643 644 ring_space = pci_alloc_consistent(pdev, TX_TOTAL_SIZE, &ring_dma); 645 if (!ring_space) 646 goto err_out_cleardev; 647 hmp->tx_ring = (struct hamachi_desc *)ring_space; 648 hmp->tx_ring_dma = ring_dma; 649 650 ring_space = pci_alloc_consistent(pdev, RX_TOTAL_SIZE, &ring_dma); 651 if (!ring_space) 652 goto err_out_unmap_tx; 653 hmp->rx_ring = (struct hamachi_desc *)ring_space; 654 hmp->rx_ring_dma = ring_dma; 655 656 /* Check for options being passed in */ 657 option = card_idx < MAX_UNITS ? options[card_idx] : 0; 658 if (dev->mem_start) 659 option = dev->mem_start; 660 661 /* If the bus size is misidentified, do the following. */ 662 force32 = force32 ? force32 : 663 ((option >= 0) ? ((option & 0x00000070) >> 4) : 0 ); 664 if (force32) 665 writeb(force32, ioaddr + VirtualJumpers); 666 667 /* Hmmm, do we really need to reset the chip???. */ 668 writeb(0x01, ioaddr + ChipReset); 669 670 /* After a reset, the clock speed measurement of the PCI bus will not 671 * be valid for a moment. Wait for a little while until it is. If 672 * it takes more than 10ms, forget it. 673 */ 674 udelay(10); 675 i = readb(ioaddr + PCIClkMeas); 676 for (boguscnt = 0; (!(i & 0x080)) && boguscnt < 1000; boguscnt++){ 677 udelay(10); 678 i = readb(ioaddr + PCIClkMeas); 679 } 680 681 hmp->base = ioaddr; 682 dev->base_addr = (unsigned long)ioaddr; 683 dev->irq = irq; 684 pci_set_drvdata(pdev, dev); 685 686 hmp->chip_id = chip_id; 687 hmp->pci_dev = pdev; 688 689 /* The lower four bits are the media type. */ 690 if (option > 0) { 691 hmp->option = option; 692 if (option & 0x200) 693 hmp->mii_if.full_duplex = 1; 694 else if (option & 0x080) 695 hmp->mii_if.full_duplex = 0; 696 hmp->default_port = option & 15; 697 if (hmp->default_port) 698 hmp->mii_if.force_media = 1; 699 } 700 if (card_idx < MAX_UNITS && full_duplex[card_idx] > 0) 701 hmp->mii_if.full_duplex = 1; 702 703 /* lock the duplex mode if someone specified a value */ 704 if (hmp->mii_if.full_duplex || (option & 0x080)) 705 hmp->duplex_lock = 1; 706 707 /* Set interrupt tuning parameters */ 708 max_rx_latency = max_rx_latency & 0x00ff; 709 max_rx_gap = max_rx_gap & 0x00ff; 710 min_rx_pkt = min_rx_pkt & 0x00ff; 711 max_tx_latency = max_tx_latency & 0x00ff; 712 max_tx_gap = max_tx_gap & 0x00ff; 713 min_tx_pkt = min_tx_pkt & 0x00ff; 714 715 rx_int_var = card_idx < MAX_UNITS ? rx_params[card_idx] : -1; 716 tx_int_var = card_idx < MAX_UNITS ? tx_params[card_idx] : -1; 717 hmp->rx_int_var = rx_int_var >= 0 ? rx_int_var : 718 (min_rx_pkt << 16 | max_rx_gap << 8 | max_rx_latency); 719 hmp->tx_int_var = tx_int_var >= 0 ? tx_int_var : 720 (min_tx_pkt << 16 | max_tx_gap << 8 | max_tx_latency); 721 722 723 /* The Hamachi-specific entries in the device structure. */ 724 dev->open = &hamachi_open; 725 dev->hard_start_xmit = &hamachi_start_xmit; 726 dev->stop = &hamachi_close; 727 dev->get_stats = &hamachi_get_stats; 728 dev->set_multicast_list = &set_rx_mode; 729 dev->do_ioctl = &netdev_ioctl; 730 if (chip_tbl[hmp->chip_id].flags & CanHaveMII) 731 SET_ETHTOOL_OPS(dev, ðtool_ops); 732 else 733 SET_ETHTOOL_OPS(dev, ðtool_ops_no_mii); 734 dev->tx_timeout = &hamachi_tx_timeout; 735 dev->watchdog_timeo = TX_TIMEOUT; 736 if (mtu) 737 dev->mtu = mtu; 738 739 i = register_netdev(dev); 740 if (i) { 741 ret = i; 742 goto err_out_unmap_rx; 743 } 744 745 printk(KERN_INFO "%s: %s type %x at %p, ", 746 dev->name, chip_tbl[chip_id].name, readl(ioaddr + ChipRev), 747 ioaddr); 748 for (i = 0; i < 5; i++) 749 printk("%2.2x:", dev->dev_addr[i]); 750 printk("%2.2x, IRQ %d.\n", dev->dev_addr[i], irq); 751 i = readb(ioaddr + PCIClkMeas); 752 printk(KERN_INFO "%s: %d-bit %d Mhz PCI bus (%d), Virtual Jumpers " 753 "%2.2x, LPA %4.4x.\n", 754 dev->name, readw(ioaddr + MiscStatus) & 1 ? 64 : 32, 755 i ? 2000/(i&0x7f) : 0, i&0x7f, (int)readb(ioaddr + VirtualJumpers), 756 readw(ioaddr + ANLinkPartnerAbility)); 757 758 if (chip_tbl[hmp->chip_id].flags & CanHaveMII) { 759 int phy, phy_idx = 0; 760 for (phy = 0; phy < 32 && phy_idx < MII_CNT; phy++) { 761 int mii_status = mdio_read(dev, phy, MII_BMSR); 762 if (mii_status != 0xffff && 763 mii_status != 0x0000) { 764 hmp->phys[phy_idx++] = phy; 765 hmp->mii_if.advertising = mdio_read(dev, phy, MII_ADVERTISE); 766 printk(KERN_INFO "%s: MII PHY found at address %d, status " 767 "0x%4.4x advertising %4.4x.\n", 768 dev->name, phy, mii_status, hmp->mii_if.advertising); 769 } 770 } 771 hmp->mii_cnt = phy_idx; 772 if (hmp->mii_cnt > 0) 773 hmp->mii_if.phy_id = hmp->phys[0]; 774 else 775 memset(&hmp->mii_if, 0, sizeof(hmp->mii_if)); 776 } 777 /* Configure gigabit autonegotiation. */ 778 writew(0x0400, ioaddr + ANXchngCtrl); /* Enable legacy links. */ 779 writew(0x08e0, ioaddr + ANAdvertise); /* Set our advertise word. */ 780 writew(0x1000, ioaddr + ANCtrl); /* Enable negotiation */ 781 782 card_idx++; 783 return 0; 784 785err_out_unmap_rx: 786 pci_free_consistent(pdev, RX_TOTAL_SIZE, hmp->rx_ring, 787 hmp->rx_ring_dma); 788err_out_unmap_tx: 789 pci_free_consistent(pdev, TX_TOTAL_SIZE, hmp->tx_ring, 790 hmp->tx_ring_dma); 791err_out_cleardev: 792 free_netdev (dev); 793err_out_iounmap: 794 iounmap(ioaddr); 795err_out_release: 796 pci_release_regions(pdev); 797err_out: 798 return ret; 799} 800 801static int __devinit read_eeprom(void __iomem *ioaddr, int location) 802{ 803 int bogus_cnt = 1000; 804 805 /* We should check busy first - per docs -KDU */ 806 while ((readb(ioaddr + EECmdStatus) & 0x40) && --bogus_cnt > 0); 807 writew(location, ioaddr + EEAddr); 808 writeb(0x02, ioaddr + EECmdStatus); 809 bogus_cnt = 1000; 810 while ((readb(ioaddr + EECmdStatus) & 0x40) && --bogus_cnt > 0); 811 if (hamachi_debug > 5) 812 printk(" EEPROM status is %2.2x after %d ticks.\n", 813 (int)readb(ioaddr + EECmdStatus), 1000- bogus_cnt); 814 return readb(ioaddr + EEData); 815} 816 817/* MII Managemen Data I/O accesses. 818 These routines assume the MDIO controller is idle, and do not exit until 819 the command is finished. */ 820 821static int mdio_read(struct net_device *dev, int phy_id, int location) 822{ 823 struct hamachi_private *hmp = netdev_priv(dev); 824 void __iomem *ioaddr = hmp->base; 825 int i; 826 827 /* We should check busy first - per docs -KDU */ 828 for (i = 10000; i >= 0; i--) 829 if ((readw(ioaddr + MII_Status) & 1) == 0) 830 break; 831 writew((phy_id<<8) + location, ioaddr + MII_Addr); 832 writew(0x0001, ioaddr + MII_Cmd); 833 for (i = 10000; i >= 0; i--) 834 if ((readw(ioaddr + MII_Status) & 1) == 0) 835 break; 836 return readw(ioaddr + MII_Rd_Data); 837} 838 839static void mdio_write(struct net_device *dev, int phy_id, int location, int value) 840{ 841 struct hamachi_private *hmp = netdev_priv(dev); 842 void __iomem *ioaddr = hmp->base; 843 int i; 844 845 /* We should check busy first - per docs -KDU */ 846 for (i = 10000; i >= 0; i--) 847 if ((readw(ioaddr + MII_Status) & 1) == 0) 848 break; 849 writew((phy_id<<8) + location, ioaddr + MII_Addr); 850 writew(value, ioaddr + MII_Wr_Data); 851 852 /* Wait for the command to finish. */ 853 for (i = 10000; i >= 0; i--) 854 if ((readw(ioaddr + MII_Status) & 1) == 0) 855 break; 856 return; 857} 858 859 860static int hamachi_open(struct net_device *dev) 861{ 862 struct hamachi_private *hmp = netdev_priv(dev); 863 void __iomem *ioaddr = hmp->base; 864 int i; 865 u32 rx_int_var, tx_int_var; 866 u16 fifo_info; 867 868 i = request_irq(dev->irq, &hamachi_interrupt, IRQF_SHARED, dev->name, dev); 869 if (i) 870 return i; 871 872 if (hamachi_debug > 1) 873 printk(KERN_DEBUG "%s: hamachi_open() irq %d.\n", 874 dev->name, dev->irq); 875 876 hamachi_init_ring(dev); 877 878#if ADDRLEN == 64 879 /* writellll anyone ? */ 880 writel(cpu_to_le64(hmp->rx_ring_dma), ioaddr + RxPtr); 881 writel(cpu_to_le64(hmp->rx_ring_dma) >> 32, ioaddr + RxPtr + 4); 882 writel(cpu_to_le64(hmp->tx_ring_dma), ioaddr + TxPtr); 883 writel(cpu_to_le64(hmp->tx_ring_dma) >> 32, ioaddr + TxPtr + 4); 884#else 885 writel(cpu_to_le32(hmp->rx_ring_dma), ioaddr + RxPtr); 886 writel(cpu_to_le32(hmp->tx_ring_dma), ioaddr + TxPtr); 887#endif 888 889 /* TODO: It would make sense to organize this as words since the card 890 * documentation does. -KDU 891 */ 892 for (i = 0; i < 6; i++) 893 writeb(dev->dev_addr[i], ioaddr + StationAddr + i); 894 895 /* Initialize other registers: with so many this eventually this will 896 converted to an offset/value list. */ 897 898 /* Configure the FIFO */ 899 fifo_info = (readw(ioaddr + GPIO) & 0x00C0) >> 6; 900 switch (fifo_info){ 901 case 0 : 902 /* No FIFO */ 903 writew(0x0000, ioaddr + FIFOcfg); 904 break; 905 case 1 : 906 /* Configure the FIFO for 512K external, 16K used for Tx. */ 907 writew(0x0028, ioaddr + FIFOcfg); 908 break; 909 case 2 : 910 /* Configure the FIFO for 1024 external, 32K used for Tx. */ 911 writew(0x004C, ioaddr + FIFOcfg); 912 break; 913 case 3 : 914 /* Configure the FIFO for 2048 external, 32K used for Tx. */ 915 writew(0x006C, ioaddr + FIFOcfg); 916 break; 917 default : 918 printk(KERN_WARNING "%s: Unsupported external memory config!\n", 919 dev->name); 920 /* Default to no FIFO */ 921 writew(0x0000, ioaddr + FIFOcfg); 922 break; 923 } 924 925 if (dev->if_port == 0) 926 dev->if_port = hmp->default_port; 927 928 929 /* Setting the Rx mode will start the Rx process. */ 930 /* If someone didn't choose a duplex, default to full-duplex */ 931 if (hmp->duplex_lock != 1) 932 hmp->mii_if.full_duplex = 1; 933 934 /* always 1, takes no more time to do it */ 935 writew(0x0001, ioaddr + RxChecksum); 936#ifdef TX_CHECKSUM 937 writew(0x0001, ioaddr + TxChecksum); 938#else 939 writew(0x0000, ioaddr + TxChecksum); 940#endif 941 writew(0x8000, ioaddr + MACCnfg); /* Soft reset the MAC */ 942 writew(0x215F, ioaddr + MACCnfg); 943 writew(0x000C, ioaddr + FrameGap0); 944 /* WHAT?!?!? Why isn't this documented somewhere? -KDU */ 945 writew(0x1018, ioaddr + FrameGap1); 946 /* Why do we enable receives/transmits here? -KDU */ 947 writew(0x0780, ioaddr + MACCnfg2); /* Upper 16 bits control LEDs. */ 948 /* Enable automatic generation of flow control frames, period 0xffff. */ 949 writel(0x0030FFFF, ioaddr + FlowCtrl); 950 writew(MAX_FRAME_SIZE, ioaddr + MaxFrameSize); /* dev->mtu+14 ??? */ 951 952 /* Enable legacy links. */ 953 writew(0x0400, ioaddr + ANXchngCtrl); /* Enable legacy links. */ 954 /* Initial Link LED to blinking red. */ 955 writeb(0x03, ioaddr + LEDCtrl); 956 957 /* Configure interrupt mitigation. This has a great effect on 958 performance, so systems tuning should start here!. */ 959 960 rx_int_var = hmp->rx_int_var; 961 tx_int_var = hmp->tx_int_var; 962 963 if (hamachi_debug > 1) { 964 printk("max_tx_latency: %d, max_tx_gap: %d, min_tx_pkt: %d\n", 965 tx_int_var & 0x00ff, (tx_int_var & 0x00ff00) >> 8, 966 (tx_int_var & 0x00ff0000) >> 16); 967 printk("max_rx_latency: %d, max_rx_gap: %d, min_rx_pkt: %d\n", 968 rx_int_var & 0x00ff, (rx_int_var & 0x00ff00) >> 8, 969 (rx_int_var & 0x00ff0000) >> 16); 970 printk("rx_int_var: %x, tx_int_var: %x\n", rx_int_var, tx_int_var); 971 } 972 973 writel(tx_int_var, ioaddr + TxIntrCtrl); 974 writel(rx_int_var, ioaddr + RxIntrCtrl); 975 976 set_rx_mode(dev); 977 978 netif_start_queue(dev); 979 980 /* Enable interrupts by setting the interrupt mask. */ 981 writel(0x80878787, ioaddr + InterruptEnable); 982 writew(0x0000, ioaddr + EventStatus); /* Clear non-interrupting events */ 983 984 /* Configure and start the DMA channels. */ 985 /* Burst sizes are in the low three bits: size = 4<<(val&7) */ 986#if ADDRLEN == 64 987 writew(0x005D, ioaddr + RxDMACtrl); /* 128 dword bursts */ 988 writew(0x005D, ioaddr + TxDMACtrl); 989#else 990 writew(0x001D, ioaddr + RxDMACtrl); 991 writew(0x001D, ioaddr + TxDMACtrl); 992#endif 993 writew(0x0001, ioaddr + RxCmd); 994 995 if (hamachi_debug > 2) { 996 printk(KERN_DEBUG "%s: Done hamachi_open(), status: Rx %x Tx %x.\n", 997 dev->name, readw(ioaddr + RxStatus), readw(ioaddr + TxStatus)); 998 } 999 /* Set the timer to check for link beat. */ 1000 init_timer(&hmp->timer); 1001 hmp->timer.expires = RUN_AT((24*HZ)/10); /* 2.4 sec. */ 1002 hmp->timer.data = (unsigned long)dev; 1003 hmp->timer.function = &hamachi_timer; /* timer handler */ 1004 add_timer(&hmp->timer); 1005 1006 return 0; 1007} 1008 1009static inline int hamachi_tx(struct net_device *dev) 1010{ 1011 struct hamachi_private *hmp = netdev_priv(dev); 1012 1013 /* Update the dirty pointer until we find an entry that is 1014 still owned by the card */ 1015 for (; hmp->cur_tx - hmp->dirty_tx > 0; hmp->dirty_tx++) { 1016 int entry = hmp->dirty_tx % TX_RING_SIZE; 1017 struct sk_buff *skb; 1018 1019 if (hmp->tx_ring[entry].status_n_length & cpu_to_le32(DescOwn)) 1020 break; 1021 /* Free the original skb. */ 1022 skb = hmp->tx_skbuff[entry]; 1023 if (skb != 0) { 1024 pci_unmap_single(hmp->pci_dev, 1025 hmp->tx_ring[entry].addr, skb->len, 1026 PCI_DMA_TODEVICE); 1027 dev_kfree_skb(skb); 1028 hmp->tx_skbuff[entry] = NULL; 1029 } 1030 hmp->tx_ring[entry].status_n_length = 0; 1031 if (entry >= TX_RING_SIZE-1) 1032 hmp->tx_ring[TX_RING_SIZE-1].status_n_length |= 1033 cpu_to_le32(DescEndRing); 1034 hmp->stats.tx_packets++; 1035 } 1036 1037 return 0; 1038} 1039 1040static void hamachi_timer(unsigned long data) 1041{ 1042 struct net_device *dev = (struct net_device *)data; 1043 struct hamachi_private *hmp = netdev_priv(dev); 1044 void __iomem *ioaddr = hmp->base; 1045 int next_tick = 10*HZ; 1046 1047 if (hamachi_debug > 2) { 1048 printk(KERN_INFO "%s: Hamachi Autonegotiation status %4.4x, LPA " 1049 "%4.4x.\n", dev->name, readw(ioaddr + ANStatus), 1050 readw(ioaddr + ANLinkPartnerAbility)); 1051 printk(KERN_INFO "%s: Autonegotiation regs %4.4x %4.4x %4.4x " 1052 "%4.4x %4.4x %4.4x.\n", dev->name, 1053 readw(ioaddr + 0x0e0), 1054 readw(ioaddr + 0x0e2), 1055 readw(ioaddr + 0x0e4), 1056 readw(ioaddr + 0x0e6), 1057 readw(ioaddr + 0x0e8), 1058 readw(ioaddr + 0x0eA)); 1059 } 1060 /* We could do something here... nah. */ 1061 hmp->timer.expires = RUN_AT(next_tick); 1062 add_timer(&hmp->timer); 1063} 1064 1065static void hamachi_tx_timeout(struct net_device *dev) 1066{ 1067 int i; 1068 struct hamachi_private *hmp = netdev_priv(dev); 1069 void __iomem *ioaddr = hmp->base; 1070 1071 printk(KERN_WARNING "%s: Hamachi transmit timed out, status %8.8x," 1072 " resetting...\n", dev->name, (int)readw(ioaddr + TxStatus)); 1073 1074 { 1075 int i; 1076 printk(KERN_DEBUG " Rx ring %p: ", hmp->rx_ring); 1077 for (i = 0; i < RX_RING_SIZE; i++) 1078 printk(" %8.8x", (unsigned int)hmp->rx_ring[i].status_n_length); 1079 printk("\n"KERN_DEBUG" Tx ring %p: ", hmp->tx_ring); 1080 for (i = 0; i < TX_RING_SIZE; i++) 1081 printk(" %4.4x", hmp->tx_ring[i].status_n_length); 1082 printk("\n"); 1083 } 1084 1085 /* Reinit the hardware and make sure the Rx and Tx processes 1086 are up and running. 1087 */ 1088 dev->if_port = 0; 1089 /* The right way to do Reset. -KDU 1090 * -Clear OWN bit in all Rx/Tx descriptors 1091 * -Wait 50 uS for channels to go idle 1092 * -Turn off MAC receiver 1093 * -Issue Reset 1094 */ 1095 1096 for (i = 0; i < RX_RING_SIZE; i++) 1097 hmp->rx_ring[i].status_n_length &= cpu_to_le32(~DescOwn); 1098 1099 /* Presume that all packets in the Tx queue are gone if we have to 1100 * re-init the hardware. 1101 */ 1102 for (i = 0; i < TX_RING_SIZE; i++){ 1103 struct sk_buff *skb; 1104 1105 if (i >= TX_RING_SIZE - 1) 1106 hmp->tx_ring[i].status_n_length = cpu_to_le32( 1107 DescEndRing | 1108 (hmp->tx_ring[i].status_n_length & 0x0000FFFF)); 1109 else 1110 hmp->tx_ring[i].status_n_length &= 0x0000ffff; 1111 skb = hmp->tx_skbuff[i]; 1112 if (skb){ 1113 pci_unmap_single(hmp->pci_dev, hmp->tx_ring[i].addr, 1114 skb->len, PCI_DMA_TODEVICE); 1115 dev_kfree_skb(skb); 1116 hmp->tx_skbuff[i] = NULL; 1117 } 1118 } 1119 1120 udelay(60); /* Sleep 60 us just for safety sake */ 1121 writew(0x0002, ioaddr + RxCmd); /* STOP Rx */ 1122 1123 writeb(0x01, ioaddr + ChipReset); /* Reinit the hardware */ 1124 1125 hmp->tx_full = 0; 1126 hmp->cur_rx = hmp->cur_tx = 0; 1127 hmp->dirty_rx = hmp->dirty_tx = 0; 1128 /* Rx packets are also presumed lost; however, we need to make sure a 1129 * ring of buffers is in tact. -KDU 1130 */ 1131 for (i = 0; i < RX_RING_SIZE; i++){ 1132 struct sk_buff *skb = hmp->rx_skbuff[i]; 1133 1134 if (skb){ 1135 pci_unmap_single(hmp->pci_dev, hmp->rx_ring[i].addr, 1136 hmp->rx_buf_sz, PCI_DMA_FROMDEVICE); 1137 dev_kfree_skb(skb); 1138 hmp->rx_skbuff[i] = NULL; 1139 } 1140 } 1141 /* Fill in the Rx buffers. Handle allocation failure gracefully. */ 1142 for (i = 0; i < RX_RING_SIZE; i++) { 1143 struct sk_buff *skb = dev_alloc_skb(hmp->rx_buf_sz); 1144 hmp->rx_skbuff[i] = skb; 1145 if (skb == NULL) 1146 break; 1147 skb->dev = dev; /* Mark as being used by this device. */ 1148 skb_reserve(skb, 2); /* 16 byte align the IP header. */ 1149 hmp->rx_ring[i].addr = cpu_to_leXX(pci_map_single(hmp->pci_dev, 1150 skb->data, hmp->rx_buf_sz, PCI_DMA_FROMDEVICE)); 1151 hmp->rx_ring[i].status_n_length = cpu_to_le32(DescOwn | 1152 DescEndPacket | DescIntr | (hmp->rx_buf_sz - 2)); 1153 } 1154 hmp->dirty_rx = (unsigned int)(i - RX_RING_SIZE); 1155 /* Mark the last entry as wrapping the ring. */ 1156 hmp->rx_ring[RX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing); 1157 1158 /* Trigger an immediate transmit demand. */ 1159 dev->trans_start = jiffies; 1160 hmp->stats.tx_errors++; 1161 1162 /* Restart the chip's Tx/Rx processes . */ 1163 writew(0x0002, ioaddr + TxCmd); /* STOP Tx */ 1164 writew(0x0001, ioaddr + TxCmd); /* START Tx */ 1165 writew(0x0001, ioaddr + RxCmd); /* START Rx */ 1166 1167 netif_wake_queue(dev); 1168} 1169 1170 1171/* Initialize the Rx and Tx rings, along with various 'dev' bits. */ 1172static void hamachi_init_ring(struct net_device *dev) 1173{ 1174 struct hamachi_private *hmp = netdev_priv(dev); 1175 int i; 1176 1177 hmp->tx_full = 0; 1178 hmp->cur_rx = hmp->cur_tx = 0; 1179 hmp->dirty_rx = hmp->dirty_tx = 0; 1180 1181 /* My attempt at a reasonable correction */ 1182 /* +26 gets the maximum ethernet encapsulation, +7 & ~7 because the 1183 * card needs room to do 8 byte alignment, +2 so we can reserve 1184 * the first 2 bytes, and +16 gets room for the status word from the 1185 * card. -KDU 1186 */ 1187 hmp->rx_buf_sz = (dev->mtu <= 1492 ? PKT_BUF_SZ : 1188 (((dev->mtu+26+7) & ~7) + 2 + 16)); 1189 1190 /* Initialize all Rx descriptors. */ 1191 for (i = 0; i < RX_RING_SIZE; i++) { 1192 hmp->rx_ring[i].status_n_length = 0; 1193 hmp->rx_skbuff[i] = NULL; 1194 } 1195 /* Fill in the Rx buffers. Handle allocation failure gracefully. */ 1196 for (i = 0; i < RX_RING_SIZE; i++) { 1197 struct sk_buff *skb = dev_alloc_skb(hmp->rx_buf_sz); 1198 hmp->rx_skbuff[i] = skb; 1199 if (skb == NULL) 1200 break; 1201 skb->dev = dev; /* Mark as being used by this device. */ 1202 skb_reserve(skb, 2); /* 16 byte align the IP header. */ 1203 hmp->rx_ring[i].addr = cpu_to_leXX(pci_map_single(hmp->pci_dev, 1204 skb->data, hmp->rx_buf_sz, PCI_DMA_FROMDEVICE)); 1205 /* -2 because it doesn't REALLY have that first 2 bytes -KDU */ 1206 hmp->rx_ring[i].status_n_length = cpu_to_le32(DescOwn | 1207 DescEndPacket | DescIntr | (hmp->rx_buf_sz -2)); 1208 } 1209 hmp->dirty_rx = (unsigned int)(i - RX_RING_SIZE); 1210 hmp->rx_ring[RX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing); 1211 1212 for (i = 0; i < TX_RING_SIZE; i++) { 1213 hmp->tx_skbuff[i] = NULL; 1214 hmp->tx_ring[i].status_n_length = 0; 1215 } 1216 /* Mark the last entry of the ring */ 1217 hmp->tx_ring[TX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing); 1218 1219 return; 1220} 1221 1222 1223#ifdef TX_CHECKSUM 1224#define csum_add(it, val) \ 1225do { \ 1226 it += (u16) (val); \ 1227 if (it & 0xffff0000) { \ 1228 it &= 0xffff; \ 1229 ++it; \ 1230 } \ 1231} while (0) 1232 /* printk("add %04x --> %04x\n", val, it); \ */ 1233 1234/* uh->len already network format, do not swap */ 1235#define pseudo_csum_udp(sum,ih,uh) do { \ 1236 sum = 0; \ 1237 csum_add(sum, (ih)->saddr >> 16); \ 1238 csum_add(sum, (ih)->saddr & 0xffff); \ 1239 csum_add(sum, (ih)->daddr >> 16); \ 1240 csum_add(sum, (ih)->daddr & 0xffff); \ 1241 csum_add(sum, __constant_htons(IPPROTO_UDP)); \ 1242 csum_add(sum, (uh)->len); \ 1243} while (0) 1244 1245/* swap len */ 1246#define pseudo_csum_tcp(sum,ih,len) do { \ 1247 sum = 0; \ 1248 csum_add(sum, (ih)->saddr >> 16); \ 1249 csum_add(sum, (ih)->saddr & 0xffff); \ 1250 csum_add(sum, (ih)->daddr >> 16); \ 1251 csum_add(sum, (ih)->daddr & 0xffff); \ 1252 csum_add(sum, __constant_htons(IPPROTO_TCP)); \ 1253 csum_add(sum, htons(len)); \ 1254} while (0) 1255#endif 1256 1257static int hamachi_start_xmit(struct sk_buff *skb, struct net_device *dev) 1258{ 1259 struct hamachi_private *hmp = netdev_priv(dev); 1260 unsigned entry; 1261 u16 status; 1262 1263 /* Ok, now make sure that the queue has space before trying to 1264 add another skbuff. if we return non-zero the scheduler 1265 should interpret this as a queue full and requeue the buffer 1266 for later. 1267 */ 1268 if (hmp->tx_full) { 1269 /* We should NEVER reach this point -KDU */ 1270 printk(KERN_WARNING "%s: Hamachi transmit queue full at slot %d.\n",dev->name, hmp->cur_tx); 1271 1272 /* Wake the potentially-idle transmit channel. */ 1273 /* If we don't need to read status, DON'T -KDU */ 1274 status=readw(hmp->base + TxStatus); 1275 if( !(status & 0x0001) || (status & 0x0002)) 1276 writew(0x0001, hmp->base + TxCmd); 1277 return 1; 1278 } 1279 1280 /* Caution: the write order is important here, set the field 1281 with the "ownership" bits last. */ 1282 1283 /* Calculate the next Tx descriptor entry. */ 1284 entry = hmp->cur_tx % TX_RING_SIZE; 1285 1286 hmp->tx_skbuff[entry] = skb; 1287 1288#ifdef TX_CHECKSUM 1289 { 1290 /* tack on checksum tag */ 1291 u32 tagval = 0; 1292 struct ethhdr *eh = (struct ethhdr *)skb->data; 1293 if (eh->h_proto == __constant_htons(ETH_P_IP)) { 1294 struct iphdr *ih = (struct iphdr *)((char *)eh + ETH_HLEN); 1295 if (ih->protocol == IPPROTO_UDP) { 1296 struct udphdr *uh 1297 = (struct udphdr *)((char *)ih + ih->ihl*4); 1298 u32 offset = ((unsigned char *)uh + 6) - skb->data; 1299 u32 pseudo; 1300 pseudo_csum_udp(pseudo, ih, uh); 1301 pseudo = htons(pseudo); 1302 printk("udp cksum was %04x, sending pseudo %04x\n", 1303 uh->check, pseudo); 1304 uh->check = 0; /* zero out uh->check before card calc */ 1305 /* 1306 * start at 14 (skip ethhdr), store at offset (uh->check), 1307 * use pseudo value given. 1308 */ 1309 tagval = (14 << 24) | (offset << 16) | pseudo; 1310 } else if (ih->protocol == IPPROTO_TCP) { 1311 printk("tcp, no auto cksum\n"); 1312 } 1313 } 1314 *(u32 *)skb_push(skb, 8) = tagval; 1315 } 1316#endif 1317 1318 hmp->tx_ring[entry].addr = cpu_to_leXX(pci_map_single(hmp->pci_dev, 1319 skb->data, skb->len, PCI_DMA_TODEVICE)); 1320 1321 /* Hmmmm, could probably put a DescIntr on these, but the way 1322 the driver is currently coded makes Tx interrupts unnecessary 1323 since the clearing of the Tx ring is handled by the start_xmit 1324 routine. This organization helps mitigate the interrupts a 1325 bit and probably renders the max_tx_latency param useless. 1326 1327 Update: Putting a DescIntr bit on all of the descriptors and 1328 mitigating interrupt frequency with the tx_min_pkt parameter. -KDU 1329 */ 1330 if (entry >= TX_RING_SIZE-1) /* Wrap ring */ 1331 hmp->tx_ring[entry].status_n_length = cpu_to_le32(DescOwn | 1332 DescEndPacket | DescEndRing | DescIntr | skb->len); 1333 else 1334 hmp->tx_ring[entry].status_n_length = cpu_to_le32(DescOwn | 1335 DescEndPacket | DescIntr | skb->len); 1336 hmp->cur_tx++; 1337 1338 /* Non-x86 Todo: explicitly flush cache lines here. */ 1339 1340 /* Wake the potentially-idle transmit channel. */ 1341 /* If we don't need to read status, DON'T -KDU */ 1342 status=readw(hmp->base + TxStatus); 1343 if( !(status & 0x0001) || (status & 0x0002)) 1344 writew(0x0001, hmp->base + TxCmd); 1345 1346 /* Immediately before returning, let's clear as many entries as we can. */ 1347 hamachi_tx(dev); 1348 1349 /* We should kick the bottom half here, since we are not accepting 1350 * interrupts with every packet. i.e. realize that Gigabit ethernet 1351 * can transmit faster than ordinary machines can load packets; 1352 * hence, any packet that got put off because we were in the transmit 1353 * routine should IMMEDIATELY get a chance to be re-queued. -KDU 1354 */ 1355 if ((hmp->cur_tx - hmp->dirty_tx) < (TX_RING_SIZE - 4)) 1356 netif_wake_queue(dev); /* Typical path */ 1357 else { 1358 hmp->tx_full = 1; 1359 netif_stop_queue(dev); 1360 } 1361 dev->trans_start = jiffies; 1362 1363 if (hamachi_debug > 4) { 1364 printk(KERN_DEBUG "%s: Hamachi transmit frame #%d queued in slot %d.\n", 1365 dev->name, hmp->cur_tx, entry); 1366 } 1367 return 0; 1368} 1369 1370/* The interrupt handler does all of the Rx thread work and cleans up 1371 after the Tx thread. */ 1372static irqreturn_t hamachi_interrupt(int irq, void *dev_instance) 1373{ 1374 struct net_device *dev = dev_instance; 1375 struct hamachi_private *hmp = netdev_priv(dev); 1376 void __iomem *ioaddr = hmp->base; 1377 long boguscnt = max_interrupt_work; 1378 int handled = 0; 1379 1380#ifndef final_version /* Can never occur. */ 1381 if (dev == NULL) { 1382 printk (KERN_ERR "hamachi_interrupt(): irq %d for unknown device.\n", irq); 1383 return IRQ_NONE; 1384 } 1385#endif 1386 1387 spin_lock(&hmp->lock); 1388 1389 do { 1390 u32 intr_status = readl(ioaddr + InterruptClear); 1391 1392 if (hamachi_debug > 4) 1393 printk(KERN_DEBUG "%s: Hamachi interrupt, status %4.4x.\n", 1394 dev->name, intr_status); 1395 1396 if (intr_status == 0) 1397 break; 1398 1399 handled = 1; 1400 1401 if (intr_status & IntrRxDone) 1402 hamachi_rx(dev); 1403 1404 if (intr_status & IntrTxDone){ 1405 /* This code should RARELY need to execute. After all, this is 1406 * a gigabit link, it should consume packets as fast as we put 1407 * them in AND we clear the Tx ring in hamachi_start_xmit(). 1408 */ 1409 if (hmp->tx_full){ 1410 for (; hmp->cur_tx - hmp->dirty_tx > 0; hmp->dirty_tx++){ 1411 int entry = hmp->dirty_tx % TX_RING_SIZE; 1412 struct sk_buff *skb; 1413 1414 if (hmp->tx_ring[entry].status_n_length & cpu_to_le32(DescOwn)) 1415 break; 1416 skb = hmp->tx_skbuff[entry]; 1417 /* Free the original skb. */ 1418 if (skb){ 1419 pci_unmap_single(hmp->pci_dev, 1420 hmp->tx_ring[entry].addr, 1421 skb->len, 1422 PCI_DMA_TODEVICE); 1423 dev_kfree_skb_irq(skb); 1424 hmp->tx_skbuff[entry] = NULL; 1425 } 1426 hmp->tx_ring[entry].status_n_length = 0; 1427 if (entry >= TX_RING_SIZE-1) 1428 hmp->tx_ring[TX_RING_SIZE-1].status_n_length |= 1429 cpu_to_le32(DescEndRing); 1430 hmp->stats.tx_packets++; 1431 } 1432 if (hmp->cur_tx - hmp->dirty_tx < TX_RING_SIZE - 4){ 1433 /* The ring is no longer full */ 1434 hmp->tx_full = 0; 1435 netif_wake_queue(dev); 1436 } 1437 } else { 1438 netif_wake_queue(dev); 1439 } 1440 } 1441 1442 1443 /* Abnormal error summary/uncommon events handlers. */ 1444 if (intr_status & 1445 (IntrTxPCIFault | IntrTxPCIErr | IntrRxPCIFault | IntrRxPCIErr | 1446 LinkChange | NegotiationChange | StatsMax)) 1447 hamachi_error(dev, intr_status); 1448 1449 if (--boguscnt < 0) { 1450 printk(KERN_WARNING "%s: Too much work at interrupt, status=0x%4.4x.\n", 1451 dev->name, intr_status); 1452 break; 1453 } 1454 } while (1); 1455 1456 if (hamachi_debug > 3) 1457 printk(KERN_DEBUG "%s: exiting interrupt, status=%#4.4x.\n", 1458 dev->name, readl(ioaddr + IntrStatus)); 1459 1460#ifndef final_version 1461 /* Code that should never be run! Perhaps remove after testing.. */ 1462 { 1463 static int stopit = 10; 1464 if (dev->start == 0 && --stopit < 0) { 1465 printk(KERN_ERR "%s: Emergency stop, looping startup interrupt.\n", 1466 dev->name); 1467 free_irq(irq, dev); 1468 } 1469 } 1470#endif 1471 1472 spin_unlock(&hmp->lock); 1473 return IRQ_RETVAL(handled); 1474} 1475 1476/* This routine is logically part of the interrupt handler, but separated 1477 for clarity and better register allocation. */ 1478static int hamachi_rx(struct net_device *dev) 1479{ 1480 struct hamachi_private *hmp = netdev_priv(dev); 1481 int entry = hmp->cur_rx % RX_RING_SIZE; 1482 int boguscnt = (hmp->dirty_rx + RX_RING_SIZE) - hmp->cur_rx; 1483 1484 if (hamachi_debug > 4) { 1485 printk(KERN_DEBUG " In hamachi_rx(), entry %d status %4.4x.\n", 1486 entry, hmp->rx_ring[entry].status_n_length); 1487 } 1488 1489 /* If EOP is set on the next entry, it's a new packet. Send it up. */ 1490 while (1) { 1491 struct hamachi_desc *desc = &(hmp->rx_ring[entry]); 1492 u32 desc_status = le32_to_cpu(desc->status_n_length); 1493 u16 data_size = desc_status; /* Implicit truncate */ 1494 u8 *buf_addr; 1495 s32 frame_status; 1496 1497 if (desc_status & DescOwn) 1498 break; 1499 pci_dma_sync_single_for_cpu(hmp->pci_dev, 1500 desc->addr, 1501 hmp->rx_buf_sz, 1502 PCI_DMA_FROMDEVICE); 1503 buf_addr = (u8 *) hmp->rx_skbuff[entry]->data; 1504 frame_status = le32_to_cpu(get_unaligned((s32*)&(buf_addr[data_size - 12]))); 1505 if (hamachi_debug > 4) 1506 printk(KERN_DEBUG " hamachi_rx() status was %8.8x.\n", 1507 frame_status); 1508 if (--boguscnt < 0) 1509 break; 1510 if ( ! (desc_status & DescEndPacket)) { 1511 printk(KERN_WARNING "%s: Oversized Ethernet frame spanned " 1512 "multiple buffers, entry %#x length %d status %4.4x!\n", 1513 dev->name, hmp->cur_rx, data_size, desc_status); 1514 printk(KERN_WARNING "%s: Oversized Ethernet frame %p vs %p.\n", 1515 dev->name, desc, &hmp->rx_ring[hmp->cur_rx % RX_RING_SIZE]); 1516 printk(KERN_WARNING "%s: Oversized Ethernet frame -- next status %x/%x last status %x.\n", 1517 dev->name, 1518 hmp->rx_ring[(hmp->cur_rx+1) % RX_RING_SIZE].status_n_length & 0xffff0000, 1519 hmp->rx_ring[(hmp->cur_rx+1) % RX_RING_SIZE].status_n_length & 0x0000ffff, 1520 hmp->rx_ring[(hmp->cur_rx-1) % RX_RING_SIZE].status_n_length); 1521 hmp->stats.rx_length_errors++; 1522 } /* else Omit for prototype errata??? */ 1523 if (frame_status & 0x00380000) { 1524 /* There was an error. */ 1525 if (hamachi_debug > 2) 1526 printk(KERN_DEBUG " hamachi_rx() Rx error was %8.8x.\n", 1527 frame_status); 1528 hmp->stats.rx_errors++; 1529 if (frame_status & 0x00600000) hmp->stats.rx_length_errors++; 1530 if (frame_status & 0x00080000) hmp->stats.rx_frame_errors++; 1531 if (frame_status & 0x00100000) hmp->stats.rx_crc_errors++; 1532 if (frame_status < 0) hmp->stats.rx_dropped++; 1533 } else { 1534 struct sk_buff *skb; 1535 /* Omit CRC */ 1536 u16 pkt_len = (frame_status & 0x07ff) - 4; 1537#ifdef RX_CHECKSUM 1538 u32 pfck = *(u32 *) &buf_addr[data_size - 8]; 1539#endif 1540 1541 1542#ifndef final_version 1543 if (hamachi_debug > 4) 1544 printk(KERN_DEBUG " hamachi_rx() normal Rx pkt length %d" 1545 " of %d, bogus_cnt %d.\n", 1546 pkt_len, data_size, boguscnt); 1547 if (hamachi_debug > 5) 1548 printk(KERN_DEBUG"%s: rx status %8.8x %8.8x %8.8x %8.8x %8.8x.\n", 1549 dev->name, 1550 *(s32*)&(buf_addr[data_size - 20]), 1551 *(s32*)&(buf_addr[data_size - 16]), 1552 *(s32*)&(buf_addr[data_size - 12]), 1553 *(s32*)&(buf_addr[data_size - 8]), 1554 *(s32*)&(buf_addr[data_size - 4])); 1555#endif 1556 /* Check if the packet is long enough to accept without copying 1557 to a minimally-sized skbuff. */ 1558 if (pkt_len < rx_copybreak 1559 && (skb = dev_alloc_skb(pkt_len + 2)) != NULL) { 1560#ifdef RX_CHECKSUM 1561 printk(KERN_ERR "%s: rx_copybreak non-zero " 1562 "not good with RX_CHECKSUM\n", dev->name); 1563#endif 1564 skb_reserve(skb, 2); /* 16 byte align the IP header */ 1565 pci_dma_sync_single_for_cpu(hmp->pci_dev, 1566 hmp->rx_ring[entry].addr, 1567 hmp->rx_buf_sz, 1568 PCI_DMA_FROMDEVICE); 1569 /* Call copy + cksum if available. */ 1570 eth_copy_and_sum(skb, 1571 hmp->rx_skbuff[entry]->data, pkt_len, 0); 1572 skb_put(skb, pkt_len); 1573 pci_dma_sync_single_for_device(hmp->pci_dev, 1574 hmp->rx_ring[entry].addr, 1575 hmp->rx_buf_sz, 1576 PCI_DMA_FROMDEVICE); 1577 } else { 1578 pci_unmap_single(hmp->pci_dev, 1579 hmp->rx_ring[entry].addr, 1580 hmp->rx_buf_sz, PCI_DMA_FROMDEVICE); 1581 skb_put(skb = hmp->rx_skbuff[entry], pkt_len); 1582 hmp->rx_skbuff[entry] = NULL; 1583 } 1584 skb->protocol = eth_type_trans(skb, dev); 1585 1586 1587#ifdef RX_CHECKSUM 1588 /* TCP or UDP on ipv4, DIX encoding */ 1589 if (pfck>>24 == 0x91 || pfck>>24 == 0x51) { 1590 struct iphdr *ih = (struct iphdr *) skb->data; 1591 /* Check that IP packet is at least 46 bytes, otherwise, 1592 * there may be pad bytes included in the hardware checksum. 1593 * This wouldn't happen if everyone padded with 0. 1594 */ 1595 if (ntohs(ih->tot_len) >= 46){ 1596 /* don't worry about frags */ 1597 if (!(ih->frag_off & __constant_htons(IP_MF|IP_OFFSET))) { 1598 u32 inv = *(u32 *) &buf_addr[data_size - 16]; 1599 u32 *p = (u32 *) &buf_addr[data_size - 20]; 1600 register u32 crc, p_r, p_r1; 1601 1602 if (inv & 4) { 1603 inv &= ~4; 1604 --p; 1605 } 1606 p_r = *p; 1607 p_r1 = *(p-1); 1608 switch (inv) { 1609 case 0: 1610 crc = (p_r & 0xffff) + (p_r >> 16); 1611 break; 1612 case 1: 1613 crc = (p_r >> 16) + (p_r & 0xffff) 1614 + (p_r1 >> 16 & 0xff00); 1615 break; 1616 case 2: 1617 crc = p_r + (p_r1 >> 16); 1618 break; 1619 case 3: 1620 crc = p_r + (p_r1 & 0xff00) + (p_r1 >> 16); 1621 break; 1622 default: /*NOTREACHED*/ crc = 0; 1623 } 1624 if (crc & 0xffff0000) { 1625 crc &= 0xffff; 1626 ++crc; 1627 } 1628 /* tcp/udp will add in pseudo */ 1629 skb->csum = ntohs(pfck & 0xffff); 1630 if (skb->csum > crc) 1631 skb->csum -= crc; 1632 else 1633 skb->csum += (~crc & 0xffff); 1634 /* 1635 * could do the pseudo myself and return 1636 * CHECKSUM_UNNECESSARY 1637 */ 1638 skb->ip_summed = CHECKSUM_COMPLETE; 1639 } 1640 } 1641 } 1642#endif /* RX_CHECKSUM */ 1643 1644 netif_rx(skb); 1645 dev->last_rx = jiffies; 1646 hmp->stats.rx_packets++; 1647 } 1648 entry = (++hmp->cur_rx) % RX_RING_SIZE; 1649 } 1650 1651 /* Refill the Rx ring buffers. */ 1652 for (; hmp->cur_rx - hmp->dirty_rx > 0; hmp->dirty_rx++) { 1653 struct hamachi_desc *desc; 1654 1655 entry = hmp->dirty_rx % RX_RING_SIZE; 1656 desc = &(hmp->rx_ring[entry]); 1657 if (hmp->rx_skbuff[entry] == NULL) { 1658 struct sk_buff *skb = dev_alloc_skb(hmp->rx_buf_sz); 1659 1660 hmp->rx_skbuff[entry] = skb; 1661 if (skb == NULL) 1662 break; /* Better luck next round. */ 1663 skb->dev = dev; /* Mark as being used by this device. */ 1664 skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */ 1665 desc->addr = cpu_to_leXX(pci_map_single(hmp->pci_dev, 1666 skb->data, hmp->rx_buf_sz, PCI_DMA_FROMDEVICE)); 1667 } 1668 desc->status_n_length = cpu_to_le32(hmp->rx_buf_sz); 1669 if (entry >= RX_RING_SIZE-1) 1670 desc->status_n_length |= cpu_to_le32(DescOwn | 1671 DescEndPacket | DescEndRing | DescIntr); 1672 else 1673 desc->status_n_length |= cpu_to_le32(DescOwn | 1674 DescEndPacket | DescIntr); 1675 } 1676 1677 /* Restart Rx engine if stopped. */ 1678 /* If we don't need to check status, don't. -KDU */ 1679 if (readw(hmp->base + RxStatus) & 0x0002) 1680 writew(0x0001, hmp->base + RxCmd); 1681 1682 return 0; 1683} 1684 1685/* This is more properly named "uncommon interrupt events", as it covers more 1686 than just errors. */ 1687static void hamachi_error(struct net_device *dev, int intr_status) 1688{ 1689 struct hamachi_private *hmp = netdev_priv(dev); 1690 void __iomem *ioaddr = hmp->base; 1691 1692 if (intr_status & (LinkChange|NegotiationChange)) { 1693 if (hamachi_debug > 1) 1694 printk(KERN_INFO "%s: Link changed: AutoNegotiation Ctrl" 1695 " %4.4x, Status %4.4x %4.4x Intr status %4.4x.\n", 1696 dev->name, readw(ioaddr + 0x0E0), readw(ioaddr + 0x0E2), 1697 readw(ioaddr + ANLinkPartnerAbility), 1698 readl(ioaddr + IntrStatus)); 1699 if (readw(ioaddr + ANStatus) & 0x20) 1700 writeb(0x01, ioaddr + LEDCtrl); 1701 else 1702 writeb(0x03, ioaddr + LEDCtrl); 1703 } 1704 if (intr_status & StatsMax) { 1705 hamachi_get_stats(dev); 1706 /* Read the overflow bits to clear. */ 1707 readl(ioaddr + 0x370); 1708 readl(ioaddr + 0x3F0); 1709 } 1710 if ((intr_status & ~(LinkChange|StatsMax|NegotiationChange|IntrRxDone|IntrTxDone)) 1711 && hamachi_debug) 1712 printk(KERN_ERR "%s: Something Wicked happened! %4.4x.\n", 1713 dev->name, intr_status); 1714 /* Hmmmmm, it's not clear how to recover from PCI faults. */ 1715 if (intr_status & (IntrTxPCIErr | IntrTxPCIFault)) 1716 hmp->stats.tx_fifo_errors++; 1717 if (intr_status & (IntrRxPCIErr | IntrRxPCIFault)) 1718 hmp->stats.rx_fifo_errors++; 1719} 1720 1721static int hamachi_close(struct net_device *dev) 1722{ 1723 struct hamachi_private *hmp = netdev_priv(dev); 1724 void __iomem *ioaddr = hmp->base; 1725 struct sk_buff *skb; 1726 int i; 1727 1728 netif_stop_queue(dev); 1729 1730 if (hamachi_debug > 1) { 1731 printk(KERN_DEBUG "%s: Shutting down ethercard, status was Tx %4.4x Rx %4.4x Int %2.2x.\n", 1732 dev->name, readw(ioaddr + TxStatus), 1733 readw(ioaddr + RxStatus), readl(ioaddr + IntrStatus)); 1734 printk(KERN_DEBUG "%s: Queue pointers were Tx %d / %d, Rx %d / %d.\n", 1735 dev->name, hmp->cur_tx, hmp->dirty_tx, hmp->cur_rx, hmp->dirty_rx); 1736 } 1737 1738 /* Disable interrupts by clearing the interrupt mask. */ 1739 writel(0x0000, ioaddr + InterruptEnable); 1740 1741 /* Stop the chip's Tx and Rx processes. */ 1742 writel(2, ioaddr + RxCmd); 1743 writew(2, ioaddr + TxCmd); 1744 1745#ifdef __i386__ 1746 if (hamachi_debug > 2) { 1747 printk("\n"KERN_DEBUG" Tx ring at %8.8x:\n", 1748 (int)hmp->tx_ring_dma); 1749 for (i = 0; i < TX_RING_SIZE; i++) 1750 printk(" %c #%d desc. %8.8x %8.8x.\n", 1751 readl(ioaddr + TxCurPtr) == (long)&hmp->tx_ring[i] ? '>' : ' ', 1752 i, hmp->tx_ring[i].status_n_length, hmp->tx_ring[i].addr); 1753 printk("\n"KERN_DEBUG " Rx ring %8.8x:\n", 1754 (int)hmp->rx_ring_dma); 1755 for (i = 0; i < RX_RING_SIZE; i++) { 1756 printk(KERN_DEBUG " %c #%d desc. %4.4x %8.8x\n", 1757 readl(ioaddr + RxCurPtr) == (long)&hmp->rx_ring[i] ? '>' : ' ', 1758 i, hmp->rx_ring[i].status_n_length, hmp->rx_ring[i].addr); 1759 if (hamachi_debug > 6) { 1760 if (*(u8*)hmp->rx_skbuff[i]->data != 0x69) { 1761 u16 *addr = (u16 *) 1762 hmp->rx_skbuff[i]->data; 1763 int j; 1764 1765 for (j = 0; j < 0x50; j++) 1766 printk(" %4.4x", addr[j]); 1767 printk("\n"); 1768 } 1769 } 1770 } 1771 } 1772#endif /* __i386__ debugging only */ 1773 1774 free_irq(dev->irq, dev); 1775 1776 del_timer_sync(&hmp->timer); 1777 1778 /* Free all the skbuffs in the Rx queue. */ 1779 for (i = 0; i < RX_RING_SIZE; i++) { 1780 skb = hmp->rx_skbuff[i]; 1781 hmp->rx_ring[i].status_n_length = 0; 1782 hmp->rx_ring[i].addr = 0xBADF00D0; /* An invalid address. */ 1783 if (skb) { 1784 pci_unmap_single(hmp->pci_dev, 1785 hmp->rx_ring[i].addr, hmp->rx_buf_sz, 1786 PCI_DMA_FROMDEVICE); 1787 dev_kfree_skb(skb); 1788 hmp->rx_skbuff[i] = NULL; 1789 } 1790 } 1791 for (i = 0; i < TX_RING_SIZE; i++) { 1792 skb = hmp->tx_skbuff[i]; 1793 if (skb) { 1794 pci_unmap_single(hmp->pci_dev, 1795 hmp->tx_ring[i].addr, skb->len, 1796 PCI_DMA_TODEVICE); 1797 dev_kfree_skb(skb); 1798 hmp->tx_skbuff[i] = NULL; 1799 } 1800 } 1801 1802 writeb(0x00, ioaddr + LEDCtrl); 1803 1804 return 0; 1805} 1806 1807static struct net_device_stats *hamachi_get_stats(struct net_device *dev) 1808{ 1809 struct hamachi_private *hmp = netdev_priv(dev); 1810 void __iomem *ioaddr = hmp->base; 1811 1812 /* We should lock this segment of code for SMP eventually, although 1813 the vulnerability window is very small and statistics are 1814 non-critical. */ 1815 /* Ok, what goes here? This appears to be stuck at 21 packets 1816 according to ifconfig. It does get incremented in hamachi_tx(), 1817 so I think I'll comment it out here and see if better things 1818 happen. 1819 */ 1820 /* hmp->stats.tx_packets = readl(ioaddr + 0x000); */ 1821 1822 hmp->stats.rx_bytes = readl(ioaddr + 0x330); /* Total Uni+Brd+Multi */ 1823 hmp->stats.tx_bytes = readl(ioaddr + 0x3B0); /* Total Uni+Brd+Multi */ 1824 hmp->stats.multicast = readl(ioaddr + 0x320); /* Multicast Rx */ 1825 1826 hmp->stats.rx_length_errors = readl(ioaddr + 0x368); /* Over+Undersized */ 1827 hmp->stats.rx_over_errors = readl(ioaddr + 0x35C); /* Jabber */ 1828 hmp->stats.rx_crc_errors = readl(ioaddr + 0x360); /* Jabber */ 1829 hmp->stats.rx_frame_errors = readl(ioaddr + 0x364); /* Symbol Errs */ 1830 hmp->stats.rx_missed_errors = readl(ioaddr + 0x36C); /* Dropped */ 1831 1832 return &hmp->stats; 1833} 1834 1835static void set_rx_mode(struct net_device *dev) 1836{ 1837 struct hamachi_private *hmp = netdev_priv(dev); 1838 void __iomem *ioaddr = hmp->base; 1839 1840 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */ 1841 writew(0x000F, ioaddr + AddrMode); 1842 } else if ((dev->mc_count > 63) || (dev->flags & IFF_ALLMULTI)) { 1843 /* Too many to match, or accept all multicasts. */ 1844 writew(0x000B, ioaddr + AddrMode); 1845 } else if (dev->mc_count > 0) { /* Must use the CAM filter. */ 1846 struct dev_mc_list *mclist; 1847 int i; 1848 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count; 1849 i++, mclist = mclist->next) { 1850 writel(*(u32*)(mclist->dmi_addr), ioaddr + 0x100 + i*8); 1851 writel(0x20000 | (*(u16*)&mclist->dmi_addr[4]), 1852 ioaddr + 0x104 + i*8); 1853 } 1854 /* Clear remaining entries. */ 1855 for (; i < 64; i++) 1856 writel(0, ioaddr + 0x104 + i*8); 1857 writew(0x0003, ioaddr + AddrMode); 1858 } else { /* Normal, unicast/broadcast-only mode. */ 1859 writew(0x0001, ioaddr + AddrMode); 1860 } 1861} 1862 1863static int check_if_running(struct net_device *dev) 1864{ 1865 if (!netif_running(dev)) 1866 return -EINVAL; 1867 return 0; 1868} 1869 1870static void hamachi_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) 1871{ 1872 struct hamachi_private *np = netdev_priv(dev); 1873 strcpy(info->driver, DRV_NAME); 1874 strcpy(info->version, DRV_VERSION); 1875 strcpy(info->bus_info, pci_name(np->pci_dev)); 1876} 1877 1878static int hamachi_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd) 1879{ 1880 struct hamachi_private *np = netdev_priv(dev); 1881 spin_lock_irq(&np->lock); 1882 mii_ethtool_gset(&np->mii_if, ecmd); 1883 spin_unlock_irq(&np->lock); 1884 return 0; 1885} 1886 1887static int hamachi_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd) 1888{ 1889 struct hamachi_private *np = netdev_priv(dev); 1890 int res; 1891 spin_lock_irq(&np->lock); 1892 res = mii_ethtool_sset(&np->mii_if, ecmd); 1893 spin_unlock_irq(&np->lock); 1894 return res; 1895} 1896 1897static int hamachi_nway_reset(struct net_device *dev) 1898{ 1899 struct hamachi_private *np = netdev_priv(dev); 1900 return mii_nway_restart(&np->mii_if); 1901} 1902 1903static u32 hamachi_get_link(struct net_device *dev) 1904{ 1905 struct hamachi_private *np = netdev_priv(dev); 1906 return mii_link_ok(&np->mii_if); 1907} 1908 1909static const struct ethtool_ops ethtool_ops = { 1910 .begin = check_if_running, 1911 .get_drvinfo = hamachi_get_drvinfo, 1912 .get_settings = hamachi_get_settings, 1913 .set_settings = hamachi_set_settings, 1914 .nway_reset = hamachi_nway_reset, 1915 .get_link = hamachi_get_link, 1916}; 1917 1918static const struct ethtool_ops ethtool_ops_no_mii = { 1919 .begin = check_if_running, 1920 .get_drvinfo = hamachi_get_drvinfo, 1921}; 1922 1923static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) 1924{ 1925 struct hamachi_private *np = netdev_priv(dev); 1926 struct mii_ioctl_data *data = if_mii(rq); 1927 int rc; 1928 1929 if (!netif_running(dev)) 1930 return -EINVAL; 1931 1932 if (cmd == (SIOCDEVPRIVATE+3)) { /* set rx,tx intr params */ 1933 u32 *d = (u32 *)&rq->ifr_ifru; 1934 /* Should add this check here or an ordinary user can do nasty 1935 * things. -KDU 1936 * 1937 * TODO: Shut down the Rx and Tx engines while doing this. 1938 */ 1939 if (!capable(CAP_NET_ADMIN)) 1940 return -EPERM; 1941 writel(d[0], np->base + TxIntrCtrl); 1942 writel(d[1], np->base + RxIntrCtrl); 1943 printk(KERN_NOTICE "%s: tx %08x, rx %08x intr\n", dev->name, 1944 (u32) readl(np->base + TxIntrCtrl), 1945 (u32) readl(np->base + RxIntrCtrl)); 1946 rc = 0; 1947 } 1948 1949 else { 1950 spin_lock_irq(&np->lock); 1951 rc = generic_mii_ioctl(&np->mii_if, data, cmd, NULL); 1952 spin_unlock_irq(&np->lock); 1953 } 1954 1955 return rc; 1956} 1957 1958 1959static void __devexit hamachi_remove_one (struct pci_dev *pdev) 1960{ 1961 struct net_device *dev = pci_get_drvdata(pdev); 1962 1963 if (dev) { 1964 struct hamachi_private *hmp = netdev_priv(dev); 1965 1966 pci_free_consistent(pdev, RX_TOTAL_SIZE, hmp->rx_ring, 1967 hmp->rx_ring_dma); 1968 pci_free_consistent(pdev, TX_TOTAL_SIZE, hmp->tx_ring, 1969 hmp->tx_ring_dma); 1970 unregister_netdev(dev); 1971 iounmap(hmp->base); 1972 free_netdev(dev); 1973 pci_release_regions(pdev); 1974 pci_set_drvdata(pdev, NULL); 1975 } 1976} 1977 1978static struct pci_device_id hamachi_pci_tbl[] = { 1979 { 0x1318, 0x0911, PCI_ANY_ID, PCI_ANY_ID, }, 1980 { 0, } 1981}; 1982MODULE_DEVICE_TABLE(pci, hamachi_pci_tbl); 1983 1984static struct pci_driver hamachi_driver = { 1985 .name = DRV_NAME, 1986 .id_table = hamachi_pci_tbl, 1987 .probe = hamachi_init_one, 1988 .remove = __devexit_p(hamachi_remove_one), 1989}; 1990 1991static int __init hamachi_init (void) 1992{ 1993/* when a module, this is printed whether or not devices are found in probe */ 1994#ifdef MODULE 1995 printk(version); 1996#endif 1997 return pci_register_driver(&hamachi_driver); 1998} 1999 2000static void __exit hamachi_exit (void) 2001{ 2002 pci_unregister_driver(&hamachi_driver); 2003} 2004 2005 2006module_init(hamachi_init); 2007module_exit(hamachi_exit); 2008