1/* 2 * stradis.c - stradis 4:2:2 mpeg decoder driver 3 * 4 * Stradis 4:2:2 MPEG-2 Decoder Driver 5 * Copyright (C) 1999 Nathan Laredo <laredo@gnu.org> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 20 */ 21 22#include <linux/module.h> 23#include <linux/delay.h> 24#include <linux/errno.h> 25#include <linux/fs.h> 26#include <linux/kernel.h> 27#include <linux/major.h> 28#include <linux/slab.h> 29#include <linux/mm.h> 30#include <linux/init.h> 31#include <linux/poll.h> 32#include <linux/pci.h> 33#include <linux/signal.h> 34#include <asm/io.h> 35#include <linux/ioport.h> 36#include <asm/pgtable.h> 37#include <asm/page.h> 38#include <linux/sched.h> 39#include <asm/types.h> 40#include <linux/types.h> 41#include <linux/interrupt.h> 42#include <asm/uaccess.h> 43#include <linux/vmalloc.h> 44#include <linux/videodev.h> 45#include <media/v4l2-common.h> 46 47#include "saa7146.h" 48#include "saa7146reg.h" 49#include "ibmmpeg2.h" 50#include "saa7121.h" 51#include "cs8420.h" 52 53#define DEBUG(x) /* debug driver */ 54#undef IDEBUG /* debug irq handler */ 55#undef MDEBUG /* debug memory management */ 56 57#define SAA7146_MAX 6 58 59static struct saa7146 saa7146s[SAA7146_MAX]; 60 61static int saa_num = 0; /* number of SAA7146s in use */ 62 63static int video_nr = -1; 64module_param(video_nr, int, 0); 65MODULE_LICENSE("GPL"); 66 67#define nDebNormal 0x00480000 68#define nDebNoInc 0x00480000 69#define nDebVideo 0xd0480000 70#define nDebAudio 0xd0400000 71#define nDebDMA 0x02c80000 72 73#define oDebNormal 0x13c80000 74#define oDebNoInc 0x13c80000 75#define oDebVideo 0xd1080000 76#define oDebAudio 0xd1080000 77#define oDebDMA 0x03080000 78 79#define NewCard (saa->boardcfg[3]) 80#define ChipControl (saa->boardcfg[1]) 81#define NTSCFirstActive (saa->boardcfg[4]) 82#define PALFirstActive (saa->boardcfg[5]) 83#define NTSCLastActive (saa->boardcfg[54]) 84#define PALLastActive (saa->boardcfg[55]) 85#define Have2MB (saa->boardcfg[18] & 0x40) 86#define HaveCS8420 (saa->boardcfg[18] & 0x04) 87#define IBMMPEGCD20 (saa->boardcfg[18] & 0x20) 88#define HaveCS3310 (saa->boardcfg[18] & 0x01) 89#define CS3310MaxLvl ((saa->boardcfg[30] << 8) | saa->boardcfg[31]) 90#define HaveCS4341 (saa->boardcfg[40] == 2) 91#define SDIType (saa->boardcfg[27]) 92#define CurrentMode (saa->boardcfg[2]) 93 94#define debNormal (NewCard ? nDebNormal : oDebNormal) 95#define debNoInc (NewCard ? nDebNoInc : oDebNoInc) 96#define debVideo (NewCard ? nDebVideo : oDebVideo) 97#define debAudio (NewCard ? nDebAudio : oDebAudio) 98#define debDMA (NewCard ? nDebDMA : oDebDMA) 99 100#ifdef USE_RESCUE_EEPROM_SDM275 101static unsigned char rescue_eeprom[64] = { 102 0x00, 0x01, 0x04, 0x13, 0x26, 0x0f, 0x10, 0x00, 0x00, 0x00, 0x43, 0x63, 103 0x22, 0x01, 0x29, 0x15, 0x73, 0x00, 0x1f, 'd', 'e', 'c', 'x', 'l', 104 'd', 'v', 'a', 0x02, 0x00, 0x01, 0x00, 0xcc, 0xa4, 0x63, 0x09, 0xe2, 105 0x10, 0x00, 0x0a, 0x00, 0x02, 0x02, 'd', 'e', 'c', 'x', 'l', 'a', 106 0x00, 0x00, 0x42, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 107 0x00, 0x00, 0x00, 0x00, 108}; 109#endif 110 111/* ----------------------------------------------------------------------- */ 112/* Hardware I2C functions */ 113static void I2CWipe(struct saa7146 *saa) 114{ 115 int i; 116 /* set i2c to ~=100kHz, abort transfer, clear busy */ 117 saawrite(0x600 | SAA7146_I2C_ABORT, SAA7146_I2C_STATUS); 118 saawrite((SAA7146_MC2_UPLD_I2C << 16) | 119 SAA7146_MC2_UPLD_I2C, SAA7146_MC2); 120 /* wait for i2c registers to be programmed */ 121 for (i = 0; i < 1000 && 122 !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++) 123 schedule(); 124 saawrite(0x600, SAA7146_I2C_STATUS); 125 saawrite((SAA7146_MC2_UPLD_I2C << 16) | 126 SAA7146_MC2_UPLD_I2C, SAA7146_MC2); 127 /* wait for i2c registers to be programmed */ 128 for (i = 0; i < 1000 && 129 !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++) 130 schedule(); 131 saawrite(0x600, SAA7146_I2C_STATUS); 132 saawrite((SAA7146_MC2_UPLD_I2C << 16) | 133 SAA7146_MC2_UPLD_I2C, SAA7146_MC2); 134 /* wait for i2c registers to be programmed */ 135 for (i = 0; i < 1000 && 136 !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++) 137 schedule(); 138} 139 140/* read I2C */ 141static int I2CRead(struct saa7146 *saa, unsigned char addr, 142 unsigned char subaddr, int dosub) 143{ 144 int i; 145 146 if (saaread(SAA7146_I2C_STATUS) & 0x3c) 147 I2CWipe(saa); 148 for (i = 0; 149 i < 1000 && (saaread(SAA7146_I2C_STATUS) & SAA7146_I2C_BUSY); 150 i++) 151 schedule(); 152 if (i == 1000) 153 I2CWipe(saa); 154 if (dosub) 155 saawrite(((addr & 0xfe) << 24) | (((addr | 1) & 0xff) << 8) | 156 ((subaddr & 0xff) << 16) | 0xed, SAA7146_I2C_TRANSFER); 157 else 158 saawrite(((addr & 0xfe) << 24) | (((addr | 1) & 0xff) << 16) | 159 0xf1, SAA7146_I2C_TRANSFER); 160 saawrite((SAA7146_MC2_UPLD_I2C << 16) | 161 SAA7146_MC2_UPLD_I2C, SAA7146_MC2); 162 /* wait for i2c registers to be programmed */ 163 for (i = 0; i < 1000 && 164 !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++) 165 schedule(); 166 /* wait for valid data */ 167 for (i = 0; i < 1000 && 168 (saaread(SAA7146_I2C_STATUS) & SAA7146_I2C_BUSY); i++) 169 schedule(); 170 if (saaread(SAA7146_I2C_STATUS) & SAA7146_I2C_ERR) 171 return -1; 172 if (i == 1000) 173 printk("i2c setup read timeout\n"); 174 saawrite(0x41, SAA7146_I2C_TRANSFER); 175 saawrite((SAA7146_MC2_UPLD_I2C << 16) | 176 SAA7146_MC2_UPLD_I2C, SAA7146_MC2); 177 /* wait for i2c registers to be programmed */ 178 for (i = 0; i < 1000 && 179 !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++) 180 schedule(); 181 /* wait for valid data */ 182 for (i = 0; i < 1000 && 183 (saaread(SAA7146_I2C_TRANSFER) & SAA7146_I2C_BUSY); i++) 184 schedule(); 185 if (saaread(SAA7146_I2C_TRANSFER) & SAA7146_I2C_ERR) 186 return -1; 187 if (i == 1000) 188 printk("i2c read timeout\n"); 189 return ((saaread(SAA7146_I2C_TRANSFER) >> 24) & 0xff); 190} 191 192/* set both to write both bytes, reset it to write only b1 */ 193 194static int I2CWrite(struct saa7146 *saa, unsigned char addr, unsigned char b1, 195 unsigned char b2, int both) 196{ 197 int i; 198 u32 data; 199 200 if (saaread(SAA7146_I2C_STATUS) & 0x3c) 201 I2CWipe(saa); 202 for (i = 0; i < 1000 && 203 (saaread(SAA7146_I2C_STATUS) & SAA7146_I2C_BUSY); i++) 204 schedule(); 205 if (i == 1000) 206 I2CWipe(saa); 207 data = ((addr & 0xfe) << 24) | ((b1 & 0xff) << 16); 208 if (both) 209 data |= ((b2 & 0xff) << 8) | 0xe5; 210 else 211 data |= 0xd1; 212 saawrite(data, SAA7146_I2C_TRANSFER); 213 saawrite((SAA7146_MC2_UPLD_I2C << 16) | SAA7146_MC2_UPLD_I2C, 214 SAA7146_MC2); 215 return 0; 216} 217 218static void attach_inform(struct saa7146 *saa, int id) 219{ 220 int i; 221 222 DEBUG(printk(KERN_DEBUG "stradis%d: i2c: device found=%02x\n", saa->nr, 223 id)); 224 if (id == 0xa0) { /* we have rev2 or later board, fill in info */ 225 for (i = 0; i < 64; i++) 226 saa->boardcfg[i] = I2CRead(saa, 0xa0, i, 1); 227#ifdef USE_RESCUE_EEPROM_SDM275 228 if (saa->boardcfg[0] != 0) { 229 printk("stradis%d: WARNING: EEPROM STORED VALUES HAVE " 230 "BEEN IGNORED\n", saa->nr); 231 for (i = 0; i < 64; i++) 232 saa->boardcfg[i] = rescue_eeprom[i]; 233 } 234#endif 235 printk("stradis%d: config =", saa->nr); 236 for (i = 0; i < 51; i++) { 237 printk(" %02x", saa->boardcfg[i]); 238 } 239 printk("\n"); 240 } 241} 242 243static void I2CBusScan(struct saa7146 *saa) 244{ 245 int i; 246 for (i = 0; i < 0xff; i += 2) 247 if ((I2CRead(saa, i, 0, 0)) >= 0) 248 attach_inform(saa, i); 249} 250 251static int debiwait_maxwait = 0; 252 253static int wait_for_debi_done(struct saa7146 *saa) 254{ 255 int i; 256 257 /* wait for registers to be programmed */ 258 for (i = 0; i < 100000 && 259 !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_DEBI); i++) 260 saaread(SAA7146_MC2); 261 /* wait for transfer to complete */ 262 for (i = 0; i < 500000 && 263 (saaread(SAA7146_PSR) & SAA7146_PSR_DEBI_S); i++) 264 saaread(SAA7146_MC2); 265 266 if (i > debiwait_maxwait) 267 printk("wait-for-debi-done maxwait: %d\n", 268 debiwait_maxwait = i); 269 270 if (i == 500000) 271 return -1; 272 273 return 0; 274} 275 276static int debiwrite(struct saa7146 *saa, u32 config, int addr, 277 u32 val, int count) 278{ 279 u32 cmd; 280 if (count <= 0 || count > 32764) 281 return -1; 282 if (wait_for_debi_done(saa) < 0) 283 return -1; 284 saawrite(config, SAA7146_DEBI_CONFIG); 285 if (count <= 4) /* immediate transfer */ 286 saawrite(val, SAA7146_DEBI_AD); 287 else /* block transfer */ 288 saawrite(virt_to_bus(saa->dmadebi), SAA7146_DEBI_AD); 289 saawrite((cmd = (count << 17) | (addr & 0xffff)), SAA7146_DEBI_COMMAND); 290 saawrite((SAA7146_MC2_UPLD_DEBI << 16) | SAA7146_MC2_UPLD_DEBI, 291 SAA7146_MC2); 292 return 0; 293} 294 295static u32 debiread(struct saa7146 *saa, u32 config, int addr, int count) 296{ 297 u32 result = 0; 298 299 if (count > 32764 || count <= 0) 300 return 0; 301 if (wait_for_debi_done(saa) < 0) 302 return 0; 303 saawrite(virt_to_bus(saa->dmadebi), SAA7146_DEBI_AD); 304 saawrite((count << 17) | 0x10000 | (addr & 0xffff), 305 SAA7146_DEBI_COMMAND); 306 saawrite(config, SAA7146_DEBI_CONFIG); 307 saawrite((SAA7146_MC2_UPLD_DEBI << 16) | SAA7146_MC2_UPLD_DEBI, 308 SAA7146_MC2); 309 if (count > 4) /* not an immediate transfer */ 310 return count; 311 wait_for_debi_done(saa); 312 result = saaread(SAA7146_DEBI_AD); 313 if (count == 1) 314 result &= 0xff; 315 if (count == 2) 316 result &= 0xffff; 317 if (count == 3) 318 result &= 0xffffff; 319 return result; 320} 321 322static void do_irq_send_data(struct saa7146 *saa) 323{ 324 int split, audbytes, vidbytes; 325 326 saawrite(SAA7146_PSR_PIN1, SAA7146_IER); 327 /* if special feature mode in effect, disable audio sending */ 328 if (saa->playmode != VID_PLAY_NORMAL) 329 saa->audtail = saa->audhead = 0; 330 if (saa->audhead <= saa->audtail) 331 audbytes = saa->audtail - saa->audhead; 332 else 333 audbytes = 65536 - (saa->audhead - saa->audtail); 334 if (saa->vidhead <= saa->vidtail) 335 vidbytes = saa->vidtail - saa->vidhead; 336 else 337 vidbytes = 524288 - (saa->vidhead - saa->vidtail); 338 if (audbytes == 0 && vidbytes == 0 && saa->osdtail == saa->osdhead) { 339 saawrite(0, SAA7146_IER); 340 return; 341 } 342 /* if at least 1 block audio waiting and audio fifo isn't full */ 343 if (audbytes >= 2048 && (debiread(saa, debNormal, IBM_MP2_AUD_FIFO, 2) 344 & 0xff) < 60) { 345 if (saa->audhead > saa->audtail) 346 split = 65536 - saa->audhead; 347 else 348 split = 0; 349 audbytes = 2048; 350 if (split > 0 && split < 2048) { 351 memcpy(saa->dmadebi, saa->audbuf + saa->audhead, split); 352 saa->audhead = 0; 353 audbytes -= split; 354 } else 355 split = 0; 356 memcpy(saa->dmadebi + split, saa->audbuf + saa->audhead, 357 audbytes); 358 saa->audhead += audbytes; 359 saa->audhead &= 0xffff; 360 debiwrite(saa, debAudio, (NewCard ? IBM_MP2_AUD_FIFO : 361 IBM_MP2_AUD_FIFOW), 0, 2048); 362 wake_up_interruptible(&saa->audq); 363 /* if at least 1 block video waiting and video fifo isn't full */ 364 } else if (vidbytes >= 30720 && (debiread(saa, debNormal, 365 IBM_MP2_FIFO, 2)) < 16384) { 366 if (saa->vidhead > saa->vidtail) 367 split = 524288 - saa->vidhead; 368 else 369 split = 0; 370 vidbytes = 30720; 371 if (split > 0 && split < 30720) { 372 memcpy(saa->dmadebi, saa->vidbuf + saa->vidhead, split); 373 saa->vidhead = 0; 374 vidbytes -= split; 375 } else 376 split = 0; 377 memcpy(saa->dmadebi + split, saa->vidbuf + saa->vidhead, 378 vidbytes); 379 saa->vidhead += vidbytes; 380 saa->vidhead &= 0x7ffff; 381 debiwrite(saa, debVideo, (NewCard ? IBM_MP2_FIFO : 382 IBM_MP2_FIFOW), 0, 30720); 383 wake_up_interruptible(&saa->vidq); 384 } 385 saawrite(SAA7146_PSR_DEBI_S | SAA7146_PSR_PIN1, SAA7146_IER); 386} 387 388static void send_osd_data(struct saa7146 *saa) 389{ 390 int size = saa->osdtail - saa->osdhead; 391 if (size > 30720) 392 size = 30720; 393 /* ensure some multiple of 8 bytes is transferred */ 394 size = 8 * ((size + 8) >> 3); 395 if (size) { 396 debiwrite(saa, debNormal, IBM_MP2_OSD_ADDR, 397 (saa->osdhead >> 3), 2); 398 memcpy(saa->dmadebi, &saa->osdbuf[saa->osdhead], size); 399 saa->osdhead += size; 400 /* block transfer of next 8 bytes to ~32k bytes */ 401 debiwrite(saa, debNormal, IBM_MP2_OSD_DATA, 0, size); 402 } 403 if (saa->osdhead >= saa->osdtail) { 404 saa->osdhead = saa->osdtail = 0; 405 debiwrite(saa, debNormal, IBM_MP2_MASK0, 0xc00c, 2); 406 } 407} 408 409static irqreturn_t saa7146_irq(int irq, void *dev_id) 410{ 411 struct saa7146 *saa = dev_id; 412 u32 stat, astat; 413 int count; 414 int handled = 0; 415 416 count = 0; 417 while (1) { 418 /* get/clear interrupt status bits */ 419 stat = saaread(SAA7146_ISR); 420 astat = stat & saaread(SAA7146_IER); 421 if (!astat) 422 break; 423 handled = 1; 424 saawrite(astat, SAA7146_ISR); 425 if (astat & SAA7146_PSR_DEBI_S) { 426 do_irq_send_data(saa); 427 } 428 if (astat & SAA7146_PSR_PIN1) { 429 int istat; 430 /* the following read will trigger DEBI_S */ 431 istat = debiread(saa, debNormal, IBM_MP2_HOST_INT, 2); 432 if (istat & 1) { 433 saawrite(0, SAA7146_IER); 434 send_osd_data(saa); 435 saawrite(SAA7146_PSR_DEBI_S | 436 SAA7146_PSR_PIN1, SAA7146_IER); 437 } 438 if (istat & 0x20) { /* Video Start */ 439 saa->vidinfo.frame_count++; 440 } 441 if (istat & 0x400) { /* Picture Start */ 442 /* update temporal reference */ 443 } 444 if (istat & 0x200) { /* Picture Resolution Change */ 445 /* read new resolution */ 446 } 447 if (istat & 0x100) { /* New User Data found */ 448 /* read new user data */ 449 } 450 if (istat & 0x1000) { /* new GOP/SMPTE */ 451 /* read new SMPTE */ 452 } 453 if (istat & 0x8000) { /* Sequence Start Code */ 454 /* reset frame counter, load sizes */ 455 saa->vidinfo.frame_count = 0; 456 saa->vidinfo.h_size = 704; 457 saa->vidinfo.v_size = 480; 458 } 459 if (istat & 0x4000) { /* Sequence Error Code */ 460 if (saa->endmarkhead != saa->endmarktail) { 461 saa->audhead = 462 saa->endmark[saa->endmarkhead]; 463 saa->endmarkhead++; 464 if (saa->endmarkhead >= MAX_MARKS) 465 saa->endmarkhead = 0; 466 } 467 } 468 } 469#ifdef IDEBUG 470 if (astat & SAA7146_PSR_PPEF) { 471 IDEBUG(printk("stradis%d irq: PPEF\n", saa->nr)); 472 } 473 if (astat & SAA7146_PSR_PABO) { 474 IDEBUG(printk("stradis%d irq: PABO\n", saa->nr)); 475 } 476 if (astat & SAA7146_PSR_PPED) { 477 IDEBUG(printk("stradis%d irq: PPED\n", saa->nr)); 478 } 479 if (astat & SAA7146_PSR_RPS_I1) { 480 IDEBUG(printk("stradis%d irq: RPS_I1\n", saa->nr)); 481 } 482 if (astat & SAA7146_PSR_RPS_I0) { 483 IDEBUG(printk("stradis%d irq: RPS_I0\n", saa->nr)); 484 } 485 if (astat & SAA7146_PSR_RPS_LATE1) { 486 IDEBUG(printk("stradis%d irq: RPS_LATE1\n", saa->nr)); 487 } 488 if (astat & SAA7146_PSR_RPS_LATE0) { 489 IDEBUG(printk("stradis%d irq: RPS_LATE0\n", saa->nr)); 490 } 491 if (astat & SAA7146_PSR_RPS_E1) { 492 IDEBUG(printk("stradis%d irq: RPS_E1\n", saa->nr)); 493 } 494 if (astat & SAA7146_PSR_RPS_E0) { 495 IDEBUG(printk("stradis%d irq: RPS_E0\n", saa->nr)); 496 } 497 if (astat & SAA7146_PSR_RPS_TO1) { 498 IDEBUG(printk("stradis%d irq: RPS_TO1\n", saa->nr)); 499 } 500 if (astat & SAA7146_PSR_RPS_TO0) { 501 IDEBUG(printk("stradis%d irq: RPS_TO0\n", saa->nr)); 502 } 503 if (astat & SAA7146_PSR_UPLD) { 504 IDEBUG(printk("stradis%d irq: UPLD\n", saa->nr)); 505 } 506 if (astat & SAA7146_PSR_DEBI_E) { 507 IDEBUG(printk("stradis%d irq: DEBI_E\n", saa->nr)); 508 } 509 if (astat & SAA7146_PSR_I2C_S) { 510 IDEBUG(printk("stradis%d irq: I2C_S\n", saa->nr)); 511 } 512 if (astat & SAA7146_PSR_I2C_E) { 513 IDEBUG(printk("stradis%d irq: I2C_E\n", saa->nr)); 514 } 515 if (astat & SAA7146_PSR_A2_IN) { 516 IDEBUG(printk("stradis%d irq: A2_IN\n", saa->nr)); 517 } 518 if (astat & SAA7146_PSR_A2_OUT) { 519 IDEBUG(printk("stradis%d irq: A2_OUT\n", saa->nr)); 520 } 521 if (astat & SAA7146_PSR_A1_IN) { 522 IDEBUG(printk("stradis%d irq: A1_IN\n", saa->nr)); 523 } 524 if (astat & SAA7146_PSR_A1_OUT) { 525 IDEBUG(printk("stradis%d irq: A1_OUT\n", saa->nr)); 526 } 527 if (astat & SAA7146_PSR_AFOU) { 528 IDEBUG(printk("stradis%d irq: AFOU\n", saa->nr)); 529 } 530 if (astat & SAA7146_PSR_V_PE) { 531 IDEBUG(printk("stradis%d irq: V_PE\n", saa->nr)); 532 } 533 if (astat & SAA7146_PSR_VFOU) { 534 IDEBUG(printk("stradis%d irq: VFOU\n", saa->nr)); 535 } 536 if (astat & SAA7146_PSR_FIDA) { 537 IDEBUG(printk("stradis%d irq: FIDA\n", saa->nr)); 538 } 539 if (astat & SAA7146_PSR_FIDB) { 540 IDEBUG(printk("stradis%d irq: FIDB\n", saa->nr)); 541 } 542 if (astat & SAA7146_PSR_PIN3) { 543 IDEBUG(printk("stradis%d irq: PIN3\n", saa->nr)); 544 } 545 if (astat & SAA7146_PSR_PIN2) { 546 IDEBUG(printk("stradis%d irq: PIN2\n", saa->nr)); 547 } 548 if (astat & SAA7146_PSR_PIN0) { 549 IDEBUG(printk("stradis%d irq: PIN0\n", saa->nr)); 550 } 551 if (astat & SAA7146_PSR_ECS) { 552 IDEBUG(printk("stradis%d irq: ECS\n", saa->nr)); 553 } 554 if (astat & SAA7146_PSR_EC3S) { 555 IDEBUG(printk("stradis%d irq: EC3S\n", saa->nr)); 556 } 557 if (astat & SAA7146_PSR_EC0S) { 558 IDEBUG(printk("stradis%d irq: EC0S\n", saa->nr)); 559 } 560#endif 561 count++; 562 if (count > 15) 563 printk(KERN_WARNING "stradis%d: irq loop %d\n", 564 saa->nr, count); 565 if (count > 20) { 566 saawrite(0, SAA7146_IER); 567 printk(KERN_ERR 568 "stradis%d: IRQ loop cleared\n", saa->nr); 569 } 570 } 571 return IRQ_RETVAL(handled); 572} 573 574static int ibm_send_command(struct saa7146 *saa, 575 int command, int data, int chain) 576{ 577 int i; 578 579 if (chain) 580 debiwrite(saa, debNormal, IBM_MP2_COMMAND, (command << 1)| 1,2); 581 else 582 debiwrite(saa, debNormal, IBM_MP2_COMMAND, command << 1, 2); 583 debiwrite(saa, debNormal, IBM_MP2_CMD_DATA, data, 2); 584 debiwrite(saa, debNormal, IBM_MP2_CMD_STAT, 1, 2); 585 for (i = 0; i < 100 && 586 (debiread(saa, debNormal, IBM_MP2_CMD_STAT, 2) & 1); i++) 587 schedule(); 588 if (i == 100) 589 return -1; 590 return 0; 591} 592 593static void cs4341_setlevel(struct saa7146 *saa, int left, int right) 594{ 595 I2CWrite(saa, 0x22, 0x03, left > 94 ? 94 : left, 2); 596 I2CWrite(saa, 0x22, 0x04, right > 94 ? 94 : right, 2); 597} 598 599static void initialize_cs4341(struct saa7146 *saa) 600{ 601 int i; 602 for (i = 0; i < 200; i++) { 603 /* auto mute off, power on, no de-emphasis */ 604 /* I2S data up to 24-bit 64xFs internal SCLK */ 605 I2CWrite(saa, 0x22, 0x01, 0x11, 2); 606 /* ATAPI mixer settings */ 607 I2CWrite(saa, 0x22, 0x02, 0x49, 2); 608 /* attenuation left 3db */ 609 I2CWrite(saa, 0x22, 0x03, 0x00, 2); 610 /* attenuation right 3db */ 611 I2CWrite(saa, 0x22, 0x04, 0x00, 2); 612 I2CWrite(saa, 0x22, 0x01, 0x10, 2); 613 if (I2CRead(saa, 0x22, 0x02, 1) == 0x49) 614 break; 615 schedule(); 616 } 617 printk("stradis%d: CS4341 initialized (%d)\n", saa->nr, i); 618 return; 619} 620 621static void initialize_cs8420(struct saa7146 *saa, int pro) 622{ 623 int i; 624 u8 *sequence; 625 if (pro) 626 sequence = mode8420pro; 627 else 628 sequence = mode8420con; 629 for (i = 0; i < INIT8420LEN; i++) 630 I2CWrite(saa, 0x20, init8420[i * 2], init8420[i * 2 + 1], 2); 631 for (i = 0; i < MODE8420LEN; i++) 632 I2CWrite(saa, 0x20, sequence[i * 2], sequence[i * 2 + 1], 2); 633 printk("stradis%d: CS8420 initialized\n", saa->nr); 634} 635 636static void initialize_saa7121(struct saa7146 *saa, int dopal) 637{ 638 int i, mod; 639 u8 *sequence; 640 if (dopal) 641 sequence = init7121pal; 642 else 643 sequence = init7121ntsc; 644 mod = saaread(SAA7146_PSR) & 0x08; 645 /* initialize PAL/NTSC video encoder */ 646 for (i = 0; i < INIT7121LEN; i++) { 647 if (NewCard) { /* handle new card encoder differences */ 648 if (sequence[i * 2] == 0x3a) 649 I2CWrite(saa, 0x88, 0x3a, 0x13, 2); 650 else if (sequence[i * 2] == 0x6b) 651 I2CWrite(saa, 0x88, 0x6b, 0x20, 2); 652 else if (sequence[i * 2] == 0x6c) 653 I2CWrite(saa, 0x88, 0x6c, 654 dopal ? 0x09 : 0xf5, 2); 655 else if (sequence[i * 2] == 0x6d) 656 I2CWrite(saa, 0x88, 0x6d, 657 dopal ? 0x20 : 0x00, 2); 658 else if (sequence[i * 2] == 0x7a) 659 I2CWrite(saa, 0x88, 0x7a, 660 dopal ? (PALFirstActive - 1) : 661 (NTSCFirstActive - 4), 2); 662 else if (sequence[i * 2] == 0x7b) 663 I2CWrite(saa, 0x88, 0x7b, 664 dopal ? PALLastActive : 665 NTSCLastActive, 2); 666 else 667 I2CWrite(saa, 0x88, sequence[i * 2], 668 sequence[i * 2 + 1], 2); 669 } else { 670 if (sequence[i * 2] == 0x6b && mod) 671 I2CWrite(saa, 0x88, 0x6b, 672 (sequence[i * 2 + 1] ^ 0x09), 2); 673 else if (sequence[i * 2] == 0x7a) 674 I2CWrite(saa, 0x88, 0x7a, 675 dopal ? (PALFirstActive - 1) : 676 (NTSCFirstActive - 4), 2); 677 else if (sequence[i * 2] == 0x7b) 678 I2CWrite(saa, 0x88, 0x7b, 679 dopal ? PALLastActive : 680 NTSCLastActive, 2); 681 else 682 I2CWrite(saa, 0x88, sequence[i * 2], 683 sequence[i * 2 + 1], 2); 684 } 685 } 686} 687 688static void set_genlock_offset(struct saa7146 *saa, int noffset) 689{ 690 int nCode; 691 int PixelsPerLine = 858; 692 if (CurrentMode == VIDEO_MODE_PAL) 693 PixelsPerLine = 864; 694 if (noffset > 500) 695 noffset = 500; 696 else if (noffset < -500) 697 noffset = -500; 698 nCode = noffset + 0x100; 699 if (nCode == 1) 700 nCode = 0x401; 701 else if (nCode < 1) 702 nCode = 0x400 + PixelsPerLine + nCode; 703 debiwrite(saa, debNormal, XILINX_GLDELAY, nCode, 2); 704} 705 706static void set_out_format(struct saa7146 *saa, int mode) 707{ 708 initialize_saa7121(saa, (mode == VIDEO_MODE_NTSC ? 0 : 1)); 709 saa->boardcfg[2] = mode; 710 /* do not adjust analog video parameters here, use saa7121 init */ 711 /* you will affect the SDI output on the new card */ 712 if (mode == VIDEO_MODE_PAL) { /* PAL */ 713 debiwrite(saa, debNormal, XILINX_CTL0, 0x0808, 2); 714 mdelay(50); 715 saawrite(0x012002c0, SAA7146_NUM_LINE_BYTE1); 716 if (NewCard) { 717 debiwrite(saa, debNormal, IBM_MP2_DISP_MODE, 0xe100, 2); 718 mdelay(50); 719 } 720 debiwrite(saa, debNormal, IBM_MP2_DISP_MODE, 721 NewCard ? 0xe500 : 0x6500, 2); 722 debiwrite(saa, debNormal, IBM_MP2_DISP_DLY, 723 (1 << 8) | 724 (NewCard ? PALFirstActive : PALFirstActive - 6), 2); 725 } else { /* NTSC */ 726 debiwrite(saa, debNormal, XILINX_CTL0, 0x0800, 2); 727 mdelay(50); 728 saawrite(0x00f002c0, SAA7146_NUM_LINE_BYTE1); 729 debiwrite(saa, debNormal, IBM_MP2_DISP_MODE, 730 NewCard ? 0xe100 : 0x6100, 2); 731 debiwrite(saa, debNormal, IBM_MP2_DISP_DLY, 732 (1 << 8) | 733 (NewCard ? NTSCFirstActive : NTSCFirstActive - 6), 2); 734 } 735} 736 737/* Intialize bitmangler to map from a byte value to the mangled word that 738 * must be output to program the Xilinx part through the DEBI port. 739 * Xilinx Data Bit->DEBI Bit: 0->15 1->7 2->6 3->12 4->11 5->2 6->1 7->0 740 * transfer FPGA code, init IBM chip, transfer IBM microcode 741 * rev2 card mangles: 0->7 1->6 2->5 3->4 4->3 5->2 6->1 7->0 742 */ 743static u16 bitmangler[256]; 744 745static int initialize_fpga(struct video_code *bitdata) 746{ 747 int i, num, startindex, failure = 0, loadtwo, loadfile = 0; 748 u16 *dmabuf; 749 u8 *newdma; 750 struct saa7146 *saa; 751 752 /* verify fpga code */ 753 for (startindex = 0; startindex < bitdata->datasize; startindex++) 754 if (bitdata->data[startindex] == 255) 755 break; 756 if (startindex == bitdata->datasize) { 757 printk(KERN_INFO "stradis: bad fpga code\n"); 758 return -1; 759 } 760 /* initialize all detected cards */ 761 for (num = 0; num < saa_num; num++) { 762 saa = &saa7146s[num]; 763 if (saa->boardcfg[0] > 20) 764 continue; /* card was programmed */ 765 loadtwo = (saa->boardcfg[18] & 0x10); 766 if (!NewCard) /* we have an old board */ 767 for (i = 0; i < 256; i++) 768 bitmangler[i] = ((i & 0x01) << 15) | 769 ((i & 0x02) << 6) | ((i & 0x04) << 4) | 770 ((i & 0x08) << 9) | ((i & 0x10) << 7) | 771 ((i & 0x20) >> 3) | ((i & 0x40) >> 5) | 772 ((i & 0x80) >> 7); 773 else /* else we have a new board */ 774 for (i = 0; i < 256; i++) 775 bitmangler[i] = ((i & 0x01) << 7) | 776 ((i & 0x02) << 5) | ((i & 0x04) << 3) | 777 ((i & 0x08) << 1) | ((i & 0x10) >> 1) | 778 ((i & 0x20) >> 3) | ((i & 0x40) >> 5) | 779 ((i & 0x80) >> 7); 780 781 dmabuf = (u16 *) saa->dmadebi; 782 newdma = (u8 *) saa->dmadebi; 783 if (NewCard) { /* SDM2xxx */ 784 if (!strncmp(bitdata->loadwhat, "decoder2", 8)) 785 continue; /* fpga not for this card */ 786 if (!strncmp(&saa->boardcfg[42], bitdata->loadwhat, 8)) 787 loadfile = 1; 788 else if (loadtwo && !strncmp(&saa->boardcfg[19], 789 bitdata->loadwhat, 8)) 790 loadfile = 2; 791 else if (!saa->boardcfg[42] && !strncmp("decxl", 792 bitdata->loadwhat, 8)) 793 loadfile = 1; /* special */ 794 else 795 continue; /* fpga not for this card */ 796 if (loadfile != 1 && loadfile != 2) 797 continue; /* skip to next card */ 798 if (saa->boardcfg[0] && loadfile == 1) 799 continue; /* skip to next card */ 800 if (saa->boardcfg[0] != 1 && loadfile == 2) 801 continue; /* skip to next card */ 802 saa->boardcfg[0]++; /* mark fpga handled */ 803 printk("stradis%d: loading %s\n", saa->nr, 804 bitdata->loadwhat); 805 if (loadtwo && loadfile == 2) 806 goto send_fpga_stuff; 807 /* turn on the Audio interface to set PROG low */ 808 saawrite(0x00400040, SAA7146_GPIO_CTRL); 809 saaread(SAA7146_PSR); /* ensure posted write */ 810 /* wait for everyone to reset */ 811 mdelay(10); 812 saawrite(0x00400000, SAA7146_GPIO_CTRL); 813 } else { /* original card */ 814 if (strncmp(bitdata->loadwhat, "decoder2", 8)) 815 continue; /* fpga not for this card */ 816 /* Pull the Xilinx PROG signal WS3 low */ 817 saawrite(0x02000200, SAA7146_MC1); 818 /* Turn on the Audio interface so can set PROG low */ 819 saawrite(0x000000c0, SAA7146_ACON1); 820 /* Pull the Xilinx INIT signal (GPIO2) low */ 821 saawrite(0x00400000, SAA7146_GPIO_CTRL); 822 /* Make sure everybody resets */ 823 saaread(SAA7146_PSR); /* ensure posted write */ 824 mdelay(10); 825 /* Release the Xilinx PROG signal */ 826 saawrite(0x00000000, SAA7146_ACON1); 827 /* Turn off the Audio interface */ 828 saawrite(0x02000000, SAA7146_MC1); 829 } 830 /* Release Xilinx INIT signal (WS2) */ 831 saawrite(0x00000000, SAA7146_GPIO_CTRL); 832 /* Wait for the INIT to go High */ 833 for (i = 0; 834 i < 10000 && !(saaread(SAA7146_PSR) & SAA7146_PSR_PIN2); 835 i++) 836 schedule(); 837 if (i == 1000) { 838 printk(KERN_INFO "stradis%d: no fpga INIT\n", saa->nr); 839 return -1; 840 } 841send_fpga_stuff: 842 if (NewCard) { 843 for (i = startindex; i < bitdata->datasize; i++) 844 newdma[i - startindex] = 845 bitmangler[bitdata->data[i]]; 846 debiwrite(saa, 0x01420000, 0, 0, 847 ((bitdata->datasize - startindex) + 5)); 848 if (loadtwo && loadfile == 1) { 849 printk("stradis%d: awaiting 2nd FPGA bitfile\n", 850 saa->nr); 851 continue; /* skip to next card */ 852 } 853 } else { 854 for (i = startindex; i < bitdata->datasize; i++) 855 dmabuf[i - startindex] = 856 bitmangler[bitdata->data[i]]; 857 debiwrite(saa, 0x014a0000, 0, 0, 858 ((bitdata->datasize - startindex) + 5) * 2); 859 } 860 for (i = 0; 861 i < 1000 && !(saaread(SAA7146_PSR) & SAA7146_PSR_PIN2); 862 i++) 863 schedule(); 864 if (i == 1000) { 865 printk(KERN_INFO "stradis%d: FPGA load failed\n", 866 saa->nr); 867 failure++; 868 continue; 869 } 870 if (!NewCard) { 871 /* Pull the Xilinx INIT signal (GPIO2) low */ 872 saawrite(0x00400000, SAA7146_GPIO_CTRL); 873 saaread(SAA7146_PSR); /* ensure posted write */ 874 mdelay(2); 875 saawrite(0x00000000, SAA7146_GPIO_CTRL); 876 mdelay(2); 877 } 878 printk(KERN_INFO "stradis%d: FPGA Loaded\n", saa->nr); 879 saa->boardcfg[0] = 26; /* mark fpga programmed */ 880 /* set VXCO to its lowest frequency */ 881 debiwrite(saa, debNormal, XILINX_PWM, 0, 2); 882 if (NewCard) { 883 /* mute CS3310 */ 884 if (HaveCS3310) 885 debiwrite(saa, debNormal, XILINX_CS3310_CMPLT, 886 0, 2); 887 /* set VXCO to PWM mode, release reset, blank on */ 888 debiwrite(saa, debNormal, XILINX_CTL0, 0xffc4, 2); 889 mdelay(10); 890 /* unmute CS3310 */ 891 if (HaveCS3310) 892 debiwrite(saa, debNormal, XILINX_CTL0, 893 0x2020, 2); 894 } 895 /* set source Black */ 896 debiwrite(saa, debNormal, XILINX_CTL0, 0x1707, 2); 897 saa->boardcfg[4] = 22; /* set NTSC First Active Line */ 898 saa->boardcfg[5] = 23; /* set PAL First Active Line */ 899 saa->boardcfg[54] = 2; /* set NTSC Last Active Line - 256 */ 900 saa->boardcfg[55] = 54; /* set PAL Last Active Line - 256 */ 901 set_out_format(saa, VIDEO_MODE_NTSC); 902 mdelay(50); 903 /* begin IBM chip init */ 904 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 4, 2); 905 saaread(SAA7146_PSR); /* wait for reset */ 906 mdelay(5); 907 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 0, 2); 908 debiread(saa, debNormal, IBM_MP2_CHIP_CONTROL, 2); 909 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 0x10, 2); 910 debiwrite(saa, debNormal, IBM_MP2_CMD_ADDR, 0, 2); 911 debiwrite(saa, debNormal, IBM_MP2_CHIP_MODE, 0x2e, 2); 912 if (NewCard) { 913 mdelay(5); 914 /* set i2s rate converter to 48KHz */ 915 debiwrite(saa, debNormal, 0x80c0, 6, 2); 916 /* we must init CS8420 first since rev b pulls i2s */ 917 /* master clock low and CS4341 needs i2s master to */ 918 /* run the i2c port. */ 919 if (HaveCS8420) 920 /* 0=consumer, 1=pro */ 921 initialize_cs8420(saa, 0); 922 923 mdelay(5); 924 if (HaveCS4341) 925 initialize_cs4341(saa); 926 } 927 debiwrite(saa, debNormal, IBM_MP2_INFC_CTL, 0x48, 2); 928 debiwrite(saa, debNormal, IBM_MP2_BEEP_CTL, 0xa000, 2); 929 debiwrite(saa, debNormal, IBM_MP2_DISP_LBOR, 0, 2); 930 debiwrite(saa, debNormal, IBM_MP2_DISP_TBOR, 0, 2); 931 if (NewCard) 932 set_genlock_offset(saa, 0); 933 debiwrite(saa, debNormal, IBM_MP2_FRNT_ATTEN, 0, 2); 934 /* disable genlock */ 935 debiwrite(saa, debNormal, XILINX_CTL0, 0x8080, 2); 936 } 937 938 return failure; 939} 940 941static int do_ibm_reset(struct saa7146 *saa) 942{ 943 /* failure if decoder not previously programmed */ 944 if (saa->boardcfg[0] < 37) 945 return -EIO; 946 /* mute CS3310 */ 947 if (HaveCS3310) 948 debiwrite(saa, debNormal, XILINX_CS3310_CMPLT, 0, 2); 949 /* disable interrupts */ 950 saawrite(0, SAA7146_IER); 951 saa->audhead = saa->audtail = 0; 952 saa->vidhead = saa->vidtail = 0; 953 /* tristate debi bus, disable debi transfers */ 954 saawrite(0x00880000, SAA7146_MC1); 955 /* ensure posted write */ 956 saaread(SAA7146_MC1); 957 mdelay(50); 958 /* re-enable debi transfers */ 959 saawrite(0x00880088, SAA7146_MC1); 960 /* set source Black */ 961 debiwrite(saa, debNormal, XILINX_CTL0, 0x1707, 2); 962 /* begin IBM chip init */ 963 set_out_format(saa, CurrentMode); 964 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 4, 2); 965 saaread(SAA7146_PSR); /* wait for reset */ 966 mdelay(5); 967 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 0, 2); 968 debiread(saa, debNormal, IBM_MP2_CHIP_CONTROL, 2); 969 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, ChipControl, 2); 970 debiwrite(saa, debNormal, IBM_MP2_CHIP_MODE, 0x2e, 2); 971 if (NewCard) { 972 mdelay(5); 973 /* set i2s rate converter to 48KHz */ 974 debiwrite(saa, debNormal, 0x80c0, 6, 2); 975 /* we must init CS8420 first since rev b pulls i2s */ 976 /* master clock low and CS4341 needs i2s master to */ 977 /* run the i2c port. */ 978 if (HaveCS8420) 979 /* 0=consumer, 1=pro */ 980 initialize_cs8420(saa, 1); 981 982 mdelay(5); 983 if (HaveCS4341) 984 initialize_cs4341(saa); 985 } 986 debiwrite(saa, debNormal, IBM_MP2_INFC_CTL, 0x48, 2); 987 debiwrite(saa, debNormal, IBM_MP2_BEEP_CTL, 0xa000, 2); 988 debiwrite(saa, debNormal, IBM_MP2_DISP_LBOR, 0, 2); 989 debiwrite(saa, debNormal, IBM_MP2_DISP_TBOR, 0, 2); 990 if (NewCard) 991 set_genlock_offset(saa, 0); 992 debiwrite(saa, debNormal, IBM_MP2_FRNT_ATTEN, 0, 2); 993 debiwrite(saa, debNormal, IBM_MP2_OSD_SIZE, 0x2000, 2); 994 debiwrite(saa, debNormal, IBM_MP2_AUD_CTL, 0x4552, 2); 995 if (ibm_send_command(saa, IBM_MP2_CONFIG_DECODER, 996 (ChipControl == 0x43 ? 0xe800 : 0xe000), 1)) { 997 printk(KERN_ERR "stradis%d: IBM config failed\n", saa->nr); 998 } 999 if (HaveCS3310) { 1000 int i = CS3310MaxLvl; 1001 debiwrite(saa, debNormal, XILINX_CS3310_CMPLT, ((i << 8)| i),2); 1002 } 1003 /* start video decoder */ 1004 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, ChipControl, 2); 1005 /* 256k vid, 3520 bytes aud */ 1006 debiwrite(saa, debNormal, IBM_MP2_RB_THRESHOLD, 0x4037, 2); 1007 debiwrite(saa, debNormal, IBM_MP2_AUD_CTL, 0x4573, 2); 1008 ibm_send_command(saa, IBM_MP2_PLAY, 0, 0); 1009 /* enable buffer threshold irq */ 1010 debiwrite(saa, debNormal, IBM_MP2_MASK0, 0xc00c, 2); 1011 /* clear pending interrupts */ 1012 debiread(saa, debNormal, IBM_MP2_HOST_INT, 2); 1013 debiwrite(saa, debNormal, XILINX_CTL0, 0x1711, 2); 1014 1015 return 0; 1016} 1017 1018/* load the decoder microcode */ 1019static int initialize_ibmmpeg2(struct video_code *microcode) 1020{ 1021 int i, num; 1022 struct saa7146 *saa; 1023 1024 for (num = 0; num < saa_num; num++) { 1025 saa = &saa7146s[num]; 1026 /* check that FPGA is loaded */ 1027 debiwrite(saa, debNormal, IBM_MP2_OSD_SIZE, 0xa55a, 2); 1028 i = debiread(saa, debNormal, IBM_MP2_OSD_SIZE, 2); 1029 if (i != 0xa55a) { 1030 printk(KERN_INFO "stradis%d: %04x != 0xa55a\n", 1031 saa->nr, i); 1032 } 1033 if (!strncmp(microcode->loadwhat, "decoder.vid", 11)) { 1034 if (saa->boardcfg[0] > 27) 1035 continue; /* skip to next card */ 1036 /* load video control store */ 1037 saa->boardcfg[1] = 0x13; /* no-sync default */ 1038 debiwrite(saa, debNormal, IBM_MP2_WR_PROT, 1, 2); 1039 debiwrite(saa, debNormal, IBM_MP2_PROC_IADDR, 0, 2); 1040 for (i = 0; i < microcode->datasize / 2; i++) 1041 debiwrite(saa, debNormal, IBM_MP2_PROC_IDATA, 1042 (microcode->data[i * 2] << 8) | 1043 microcode->data[i * 2 + 1], 2); 1044 debiwrite(saa, debNormal, IBM_MP2_PROC_IADDR, 0, 2); 1045 debiwrite(saa, debNormal, IBM_MP2_WR_PROT, 0, 2); 1046 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 1047 ChipControl, 2); 1048 saa->boardcfg[0] = 28; 1049 } 1050 if (!strncmp(microcode->loadwhat, "decoder.aud", 11)) { 1051 if (saa->boardcfg[0] > 35) 1052 continue; /* skip to next card */ 1053 /* load audio control store */ 1054 debiwrite(saa, debNormal, IBM_MP2_WR_PROT, 1, 2); 1055 debiwrite(saa, debNormal, IBM_MP2_AUD_IADDR, 0, 2); 1056 for (i = 0; i < microcode->datasize; i++) 1057 debiwrite(saa, debNormal, IBM_MP2_AUD_IDATA, 1058 microcode->data[i], 1); 1059 debiwrite(saa, debNormal, IBM_MP2_AUD_IADDR, 0, 2); 1060 debiwrite(saa, debNormal, IBM_MP2_WR_PROT, 0, 2); 1061 debiwrite(saa, debNormal, IBM_MP2_OSD_SIZE, 0x2000, 2); 1062 debiwrite(saa, debNormal, IBM_MP2_AUD_CTL, 0x4552, 2); 1063 if (ibm_send_command(saa, IBM_MP2_CONFIG_DECODER, 1064 0xe000, 1)) { 1065 printk(KERN_ERR "stradis%d: IBM config " 1066 "failed\n", saa->nr); 1067 return -1; 1068 } 1069 /* set PWM to center value */ 1070 if (NewCard) { 1071 debiwrite(saa, debNormal, XILINX_PWM, 1072 saa->boardcfg[14] + 1073 (saa->boardcfg[13] << 8), 2); 1074 } else 1075 debiwrite(saa, debNormal, XILINX_PWM, 0x46, 2); 1076 1077 if (HaveCS3310) { 1078 i = CS3310MaxLvl; 1079 debiwrite(saa, debNormal, XILINX_CS3310_CMPLT, 1080 (i << 8) | i, 2); 1081 } 1082 printk(KERN_INFO "stradis%d: IBM MPEGCD%d Inited\n", 1083 saa->nr, 18 + (debiread(saa, debNormal, 1084 IBM_MP2_CHIP_CONTROL, 2) >> 12)); 1085 /* start video decoder */ 1086 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 1087 ChipControl, 2); 1088 debiwrite(saa, debNormal, IBM_MP2_RB_THRESHOLD, 0x4037, 1089 2); /* 256k vid, 3520 bytes aud */ 1090 debiwrite(saa, debNormal, IBM_MP2_AUD_CTL, 0x4573, 2); 1091 ibm_send_command(saa, IBM_MP2_PLAY, 0, 0); 1092 /* enable buffer threshold irq */ 1093 debiwrite(saa, debNormal, IBM_MP2_MASK0, 0xc00c, 2); 1094 debiread(saa, debNormal, IBM_MP2_HOST_INT, 2); 1095 /* enable gpio irq */ 1096 saawrite(0x00002000, SAA7146_GPIO_CTRL); 1097 /* enable decoder output to HPS */ 1098 debiwrite(saa, debNormal, XILINX_CTL0, 0x1711, 2); 1099 saa->boardcfg[0] = 37; 1100 } 1101 } 1102 1103 return 0; 1104} 1105 1106static u32 palette2fmt[] = { /* some of these YUV translations are wrong */ 1107 0xffffffff, 0x86000000, 0x87000000, 0x80000000, 0x8100000, 0x82000000, 1108 0x83000000, 0x00000000, 0x03000000, 0x03000000, 0x0a00000, 0x03000000, 1109 0x06000000, 0x00000000, 0x03000000, 0x0a000000, 0x0300000 1110}; 1111static int bpp2fmt[4] = { 1112 VIDEO_PALETTE_HI240, VIDEO_PALETTE_RGB565, VIDEO_PALETTE_RGB24, 1113 VIDEO_PALETTE_RGB32 1114}; 1115 1116/* I wish I could find a formula to calculate these... */ 1117static u32 h_prescale[64] = { 1118 0x10000000, 0x18040202, 0x18080000, 0x380c0606, 0x38100204, 0x38140808, 1119 0x38180000, 0x381c0000, 0x3820161c, 0x38242a3b, 0x38281230, 0x382c4460, 1120 0x38301040, 0x38340080, 0x38380000, 0x383c0000, 0x3840fefe, 0x3844ee9f, 1121 0x3848ee9f, 0x384cee9f, 0x3850ee9f, 0x38542a3b, 0x38581230, 0x385c0000, 1122 0x38600000, 0x38640000, 0x38680000, 0x386c0000, 0x38700000, 0x38740000, 1123 0x38780000, 0x387c0000, 0x30800000, 0x38840000, 0x38880000, 0x388c0000, 1124 0x38900000, 0x38940000, 0x38980000, 0x389c0000, 0x38a00000, 0x38a40000, 1125 0x38a80000, 0x38ac0000, 0x38b00000, 0x38b40000, 0x38b80000, 0x38bc0000, 1126 0x38c00000, 0x38c40000, 0x38c80000, 0x38cc0000, 0x38d00000, 0x38d40000, 1127 0x38d80000, 0x38dc0000, 0x38e00000, 0x38e40000, 0x38e80000, 0x38ec0000, 1128 0x38f00000, 0x38f40000, 0x38f80000, 0x38fc0000, 1129}; 1130static u32 v_gain[64] = { 1131 0x016000ff, 0x016100ff, 0x016100ff, 0x016200ff, 0x016200ff, 0x016200ff, 1132 0x016200ff, 0x016300ff, 0x016300ff, 0x016300ff, 0x016300ff, 0x016300ff, 1133 0x016300ff, 0x016300ff, 0x016300ff, 0x016400ff, 0x016400ff, 0x016400ff, 1134 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 1135 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 1136 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 1137 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 1138 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 1139 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 1140 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 1141 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 1142}; 1143 1144static void saa7146_set_winsize(struct saa7146 *saa) 1145{ 1146 u32 format; 1147 int offset, yacl, ysci; 1148 saa->win.color_fmt = format = 1149 (saa->win.depth == 15) ? palette2fmt[VIDEO_PALETTE_RGB555] : 1150 palette2fmt[bpp2fmt[(saa->win.bpp - 1) & 3]]; 1151 offset = saa->win.x * saa->win.bpp + saa->win.y * saa->win.bpl; 1152 saawrite(saa->win.vidadr + offset, SAA7146_BASE_EVEN1); 1153 saawrite(saa->win.vidadr + offset + saa->win.bpl, SAA7146_BASE_ODD1); 1154 saawrite(saa->win.bpl * 2, SAA7146_PITCH1); 1155 saawrite(saa->win.vidadr + saa->win.bpl * saa->win.sheight, 1156 SAA7146_PROT_ADDR1); 1157 saawrite(0, SAA7146_PAGE1); 1158 saawrite(format | 0x60, SAA7146_CLIP_FORMAT_CTRL); 1159 offset = (704 / (saa->win.width - 1)) & 0x3f; 1160 saawrite(h_prescale[offset], SAA7146_HPS_H_PRESCALE); 1161 offset = (720896 / saa->win.width) / (offset + 1); 1162 saawrite((offset << 12) | 0x0c, SAA7146_HPS_H_SCALE); 1163 if (CurrentMode == VIDEO_MODE_NTSC) { 1164 yacl = /*(480 / saa->win.height - 1) & 0x3f */ 0; 1165 ysci = 1024 - (saa->win.height * 1024 / 480); 1166 } else { 1167 yacl = /*(576 / saa->win.height - 1) & 0x3f */ 0; 1168 ysci = 1024 - (saa->win.height * 1024 / 576); 1169 } 1170 saawrite((1 << 31) | (ysci << 21) | (yacl << 15), SAA7146_HPS_V_SCALE); 1171 saawrite(v_gain[yacl], SAA7146_HPS_V_GAIN); 1172 saawrite(((SAA7146_MC2_UPLD_DMA1 | SAA7146_MC2_UPLD_HPS_V | 1173 SAA7146_MC2_UPLD_HPS_H) << 16) | (SAA7146_MC2_UPLD_DMA1 | 1174 SAA7146_MC2_UPLD_HPS_V | SAA7146_MC2_UPLD_HPS_H), SAA7146_MC2); 1175} 1176 1177/* clip_draw_rectangle(cm,x,y,w,h) -- handle clipping an area 1178 * bitmap is fixed width, 128 bytes (1024 pixels represented) 1179 * arranged most-sigificant-bit-left in 32-bit words 1180 * based on saa7146 clipping hardware, it swaps bytes if LE 1181 * much of this makes up for egcs brain damage -- so if you 1182 * are wondering "why did he do this?" it is because the C 1183 * was adjusted to generate the optimal asm output without 1184 * writing non-portable __asm__ directives. 1185 */ 1186 1187static void clip_draw_rectangle(u32 *clipmap, int x, int y, int w, int h) 1188{ 1189 register int startword, endword; 1190 register u32 bitsleft, bitsright; 1191 u32 *temp; 1192 if (x < 0) { 1193 w += x; 1194 x = 0; 1195 } 1196 if (y < 0) { 1197 h += y; 1198 y = 0; 1199 } 1200 if (w <= 0 || h <= 0 || x > 1023 || y > 639) 1201 return; /* throw away bad clips */ 1202 if (x + w > 1024) 1203 w = 1024 - x; 1204 if (y + h > 640) 1205 h = 640 - y; 1206 startword = (x >> 5); 1207 endword = ((x + w) >> 5); 1208 bitsleft = (0xffffffff >> (x & 31)); 1209 bitsright = (0xffffffff << (~((x + w) - (endword << 5)))); 1210 temp = &clipmap[(y << 5) + startword]; 1211 w = endword - startword; 1212 if (!w) { 1213 bitsleft |= bitsright; 1214 for (y = 0; y < h; y++) { 1215 *temp |= bitsleft; 1216 temp += 32; 1217 } 1218 } else { 1219 for (y = 0; y < h; y++) { 1220 *temp++ |= bitsleft; 1221 for (x = 1; x < w; x++) 1222 *temp++ = 0xffffffff; 1223 *temp |= bitsright; 1224 temp += (32 - w); 1225 } 1226 } 1227} 1228 1229static void make_clip_tab(struct saa7146 *saa, struct video_clip *cr, int ncr) 1230{ 1231 int i, width, height; 1232 u32 *clipmap; 1233 1234 clipmap = saa->dmavid2; 1235 if ((width = saa->win.width) > 1023) 1236 width = 1023; /* sanity check */ 1237 if ((height = saa->win.height) > 640) 1238 height = 639; /* sanity check */ 1239 if (ncr > 0) { /* rectangles pased */ 1240 /* convert rectangular clips to a bitmap */ 1241 memset(clipmap, 0, VIDEO_CLIPMAP_SIZE); /* clear map */ 1242 for (i = 0; i < ncr; i++) 1243 clip_draw_rectangle(clipmap, cr[i].x, cr[i].y, 1244 cr[i].width, cr[i].height); 1245 } 1246 /* clip against viewing window AND screen 1247 so we do not have to rely on the user program 1248 */ 1249 clip_draw_rectangle(clipmap, (saa->win.x + width > saa->win.swidth) ? 1250 (saa->win.swidth - saa->win.x) : width, 0, 1024, 768); 1251 clip_draw_rectangle(clipmap, 0, 1252 (saa->win.y + height > saa->win.sheight) ? 1253 (saa->win.sheight - saa->win.y) : height, 1024, 768); 1254 if (saa->win.x < 0) 1255 clip_draw_rectangle(clipmap, 0, 0, -saa->win.x, 768); 1256 if (saa->win.y < 0) 1257 clip_draw_rectangle(clipmap, 0, 0, 1024, -saa->win.y); 1258} 1259 1260static int saa_ioctl(struct inode *inode, struct file *file, 1261 unsigned int cmd, unsigned long argl) 1262{ 1263 struct saa7146 *saa = file->private_data; 1264 void __user *arg = (void __user *)argl; 1265 1266 switch (cmd) { 1267 case VIDIOCGCAP: 1268 { 1269 struct video_capability b; 1270 strcpy(b.name, saa->video_dev.name); 1271 b.type = VID_TYPE_CAPTURE | VID_TYPE_OVERLAY | 1272 VID_TYPE_CLIPPING | VID_TYPE_FRAMERAM | 1273 VID_TYPE_SCALES; 1274 b.channels = 1; 1275 b.audios = 1; 1276 b.maxwidth = 768; 1277 b.maxheight = 576; 1278 b.minwidth = 32; 1279 b.minheight = 32; 1280 if (copy_to_user(arg, &b, sizeof(b))) 1281 return -EFAULT; 1282 return 0; 1283 } 1284 case VIDIOCGPICT: 1285 { 1286 struct video_picture p = saa->picture; 1287 if (saa->win.depth == 8) 1288 p.palette = VIDEO_PALETTE_HI240; 1289 if (saa->win.depth == 15) 1290 p.palette = VIDEO_PALETTE_RGB555; 1291 if (saa->win.depth == 16) 1292 p.palette = VIDEO_PALETTE_RGB565; 1293 if (saa->win.depth == 24) 1294 p.palette = VIDEO_PALETTE_RGB24; 1295 if (saa->win.depth == 32) 1296 p.palette = VIDEO_PALETTE_RGB32; 1297 if (copy_to_user(arg, &p, sizeof(p))) 1298 return -EFAULT; 1299 return 0; 1300 } 1301 case VIDIOCSPICT: 1302 { 1303 struct video_picture p; 1304 u32 format; 1305 if (copy_from_user(&p, arg, sizeof(p))) 1306 return -EFAULT; 1307 if (p.palette < sizeof(palette2fmt) / sizeof(u32)) { 1308 format = palette2fmt[p.palette]; 1309 saa->win.color_fmt = format; 1310 saawrite(format | 0x60, 1311 SAA7146_CLIP_FORMAT_CTRL); 1312 } 1313 saawrite(((p.brightness & 0xff00) << 16) | 1314 ((p.contrast & 0xfe00) << 7) | 1315 ((p.colour & 0xfe00) >> 9), SAA7146_BCS_CTRL); 1316 saa->picture = p; 1317 /* upload changed registers */ 1318 saawrite(((SAA7146_MC2_UPLD_HPS_H | 1319 SAA7146_MC2_UPLD_HPS_V) << 16) | 1320 SAA7146_MC2_UPLD_HPS_H | 1321 SAA7146_MC2_UPLD_HPS_V, SAA7146_MC2); 1322 return 0; 1323 } 1324 case VIDIOCSWIN: 1325 { 1326 struct video_window vw; 1327 struct video_clip *vcp = NULL; 1328 1329 if (copy_from_user(&vw, arg, sizeof(vw))) 1330 return -EFAULT; 1331 1332 /* stop capture */ 1333 if (vw.flags || vw.width < 16 || vw.height < 16) { 1334 saawrite((SAA7146_MC1_TR_E_1 << 16), 1335 SAA7146_MC1); 1336 return -EINVAL; 1337 } 1338 /* 32-bit align start and adjust width */ 1339 if (saa->win.bpp < 4) { 1340 int i = vw.x; 1341 vw.x = (vw.x + 3) & ~3; 1342 i = vw.x - i; 1343 vw.width -= i; 1344 } 1345 saa->win.x = vw.x; 1346 saa->win.y = vw.y; 1347 saa->win.width = vw.width; 1348 if (saa->win.width > 768) 1349 saa->win.width = 768; 1350 saa->win.height = vw.height; 1351 if (CurrentMode == VIDEO_MODE_NTSC) { 1352 if (saa->win.height > 480) 1353 saa->win.height = 480; 1354 } else { 1355 if (saa->win.height > 576) 1356 saa->win.height = 576; 1357 } 1358 1359 /* stop capture */ 1360 saawrite((SAA7146_MC1_TR_E_1 << 16), SAA7146_MC1); 1361 saa7146_set_winsize(saa); 1362 1363 /* 1364 * Do any clips. 1365 */ 1366 if (vw.clipcount < 0) { 1367 if (copy_from_user(saa->dmavid2, vw.clips, 1368 VIDEO_CLIPMAP_SIZE)) 1369 return -EFAULT; 1370 } else if (vw.clipcount > 16384) { 1371 return -EINVAL; 1372 } else if (vw.clipcount > 0) { 1373 vcp = vmalloc(sizeof(struct video_clip) * 1374 vw.clipcount); 1375 if (vcp == NULL) 1376 return -ENOMEM; 1377 if (copy_from_user(vcp, vw.clips, 1378 sizeof(struct video_clip) * 1379 vw.clipcount)) { 1380 vfree(vcp); 1381 return -EFAULT; 1382 } 1383 } else /* nothing clipped */ 1384 memset(saa->dmavid2, 0, VIDEO_CLIPMAP_SIZE); 1385 1386 make_clip_tab(saa, vcp, vw.clipcount); 1387 if (vw.clipcount > 0) 1388 vfree(vcp); 1389 1390 /* start capture & clip dma if we have an address */ 1391 if ((saa->cap & 3) && saa->win.vidadr != 0) 1392 saawrite(((SAA7146_MC1_TR_E_1 | 1393 SAA7146_MC1_TR_E_2) << 16) | 0xffff, 1394 SAA7146_MC1); 1395 return 0; 1396 } 1397 case VIDIOCGWIN: 1398 { 1399 struct video_window vw; 1400 vw.x = saa->win.x; 1401 vw.y = saa->win.y; 1402 vw.width = saa->win.width; 1403 vw.height = saa->win.height; 1404 vw.chromakey = 0; 1405 vw.flags = 0; 1406 if (copy_to_user(arg, &vw, sizeof(vw))) 1407 return -EFAULT; 1408 return 0; 1409 } 1410 case VIDIOCCAPTURE: 1411 { 1412 int v; 1413 if (copy_from_user(&v, arg, sizeof(v))) 1414 return -EFAULT; 1415 if (v == 0) { 1416 saa->cap &= ~1; 1417 saawrite((SAA7146_MC1_TR_E_1 << 16), 1418 SAA7146_MC1); 1419 } else { 1420 if (saa->win.vidadr == 0 || saa->win.width == 0 1421 || saa->win.height == 0) 1422 return -EINVAL; 1423 saa->cap |= 1; 1424 saawrite((SAA7146_MC1_TR_E_1 << 16) | 0xffff, 1425 SAA7146_MC1); 1426 } 1427 return 0; 1428 } 1429 case VIDIOCGFBUF: 1430 { 1431 struct video_buffer v; 1432 v.base = (void *)saa->win.vidadr; 1433 v.height = saa->win.sheight; 1434 v.width = saa->win.swidth; 1435 v.depth = saa->win.depth; 1436 v.bytesperline = saa->win.bpl; 1437 if (copy_to_user(arg, &v, sizeof(v))) 1438 return -EFAULT; 1439 return 0; 1440 1441 } 1442 case VIDIOCSFBUF: 1443 { 1444 struct video_buffer v; 1445 if (!capable(CAP_SYS_ADMIN)) 1446 return -EPERM; 1447 if (copy_from_user(&v, arg, sizeof(v))) 1448 return -EFAULT; 1449 if (v.depth != 8 && v.depth != 15 && v.depth != 16 && 1450 v.depth != 24 && v.depth != 32 && v.width > 16 && 1451 v.height > 16 && v.bytesperline > 16) 1452 return -EINVAL; 1453 if (v.base) 1454 saa->win.vidadr = (unsigned long)v.base; 1455 saa->win.sheight = v.height; 1456 saa->win.swidth = v.width; 1457 saa->win.bpp = ((v.depth + 7) & 0x38) / 8; 1458 saa->win.depth = v.depth; 1459 saa->win.bpl = v.bytesperline; 1460 1461 DEBUG(printk("Display at %p is %d by %d, bytedepth %d, " 1462 "bpl %d\n", v.base, v.width, v.height, 1463 saa->win.bpp, saa->win.bpl)); 1464 saa7146_set_winsize(saa); 1465 return 0; 1466 } 1467 case VIDIOCKEY: 1468 { 1469 /* Will be handled higher up .. */ 1470 return 0; 1471 } 1472 1473 case VIDIOCGAUDIO: 1474 { 1475 struct video_audio v; 1476 v = saa->audio_dev; 1477 v.flags &= ~(VIDEO_AUDIO_MUTE | VIDEO_AUDIO_MUTABLE); 1478 v.flags |= VIDEO_AUDIO_MUTABLE | VIDEO_AUDIO_VOLUME; 1479 strcpy(v.name, "MPEG"); 1480 v.mode = VIDEO_SOUND_STEREO; 1481 if (copy_to_user(arg, &v, sizeof(v))) 1482 return -EFAULT; 1483 return 0; 1484 } 1485 case VIDIOCSAUDIO: 1486 { 1487 struct video_audio v; 1488 int i; 1489 if (copy_from_user(&v, arg, sizeof(v))) 1490 return -EFAULT; 1491 i = (~(v.volume >> 8)) & 0xff; 1492 if (!HaveCS4341) { 1493 if (v.flags & VIDEO_AUDIO_MUTE) 1494 debiwrite(saa, debNormal, 1495 IBM_MP2_FRNT_ATTEN, 0xffff, 2); 1496 if (!(v.flags & VIDEO_AUDIO_MUTE)) 1497 debiwrite(saa, debNormal, 1498 IBM_MP2_FRNT_ATTEN, 0x0000, 2); 1499 if (v.flags & VIDEO_AUDIO_VOLUME) 1500 debiwrite(saa, debNormal, 1501 IBM_MP2_FRNT_ATTEN, 1502 (i << 8) | i, 2); 1503 } else { 1504 if (v.flags & VIDEO_AUDIO_MUTE) 1505 cs4341_setlevel(saa, 0xff, 0xff); 1506 if (!(v.flags & VIDEO_AUDIO_MUTE)) 1507 cs4341_setlevel(saa, 0, 0); 1508 if (v.flags & VIDEO_AUDIO_VOLUME) 1509 cs4341_setlevel(saa, i, i); 1510 } 1511 saa->audio_dev = v; 1512 return 0; 1513 } 1514 1515 case VIDIOCGUNIT: 1516 { 1517 struct video_unit vu; 1518 vu.video = saa->video_dev.minor; 1519 vu.vbi = VIDEO_NO_UNIT; 1520 vu.radio = VIDEO_NO_UNIT; 1521 vu.audio = VIDEO_NO_UNIT; 1522 vu.teletext = VIDEO_NO_UNIT; 1523 if (copy_to_user(arg, &vu, sizeof(vu))) 1524 return -EFAULT; 1525 return 0; 1526 } 1527 case VIDIOCSPLAYMODE: 1528 { 1529 struct video_play_mode pmode; 1530 if (copy_from_user((void *)&pmode, arg, 1531 sizeof(struct video_play_mode))) 1532 return -EFAULT; 1533 switch (pmode.mode) { 1534 case VID_PLAY_VID_OUT_MODE: 1535 if (pmode.p1 != VIDEO_MODE_NTSC && 1536 pmode.p1 != VIDEO_MODE_PAL) 1537 return -EINVAL; 1538 set_out_format(saa, pmode.p1); 1539 return 0; 1540 case VID_PLAY_GENLOCK: 1541 debiwrite(saa, debNormal, XILINX_CTL0, 1542 pmode.p1 ? 0x8000 : 0x8080, 2); 1543 if (NewCard) 1544 set_genlock_offset(saa, pmode.p2); 1545 return 0; 1546 case VID_PLAY_NORMAL: 1547 debiwrite(saa, debNormal, 1548 IBM_MP2_CHIP_CONTROL, ChipControl, 2); 1549 ibm_send_command(saa, IBM_MP2_PLAY, 0, 0); 1550 saa->playmode = pmode.mode; 1551 return 0; 1552 case VID_PLAY_PAUSE: 1553 /* IBM removed the PAUSE command */ 1554 /* they say use SINGLE_FRAME now */ 1555 case VID_PLAY_SINGLE_FRAME: 1556 ibm_send_command(saa, IBM_MP2_SINGLE_FRAME,0,0); 1557 if (saa->playmode == pmode.mode) { 1558 debiwrite(saa, debNormal, 1559 IBM_MP2_CHIP_CONTROL, 1560 ChipControl, 2); 1561 } 1562 saa->playmode = pmode.mode; 1563 return 0; 1564 case VID_PLAY_FAST_FORWARD: 1565 ibm_send_command(saa, IBM_MP2_FAST_FORWARD,0,0); 1566 saa->playmode = pmode.mode; 1567 return 0; 1568 case VID_PLAY_SLOW_MOTION: 1569 ibm_send_command(saa, IBM_MP2_SLOW_MOTION, 1570 pmode.p1, 0); 1571 saa->playmode = pmode.mode; 1572 return 0; 1573 case VID_PLAY_IMMEDIATE_NORMAL: 1574 /* ensure transfers resume */ 1575 debiwrite(saa, debNormal, 1576 IBM_MP2_CHIP_CONTROL, ChipControl, 2); 1577 ibm_send_command(saa, IBM_MP2_IMED_NORM_PLAY, 1578 0, 0); 1579 saa->playmode = VID_PLAY_NORMAL; 1580 return 0; 1581 case VID_PLAY_SWITCH_CHANNELS: 1582 saa->audhead = saa->audtail = 0; 1583 saa->vidhead = saa->vidtail = 0; 1584 ibm_send_command(saa, IBM_MP2_FREEZE_FRAME,0,1); 1585 ibm_send_command(saa, IBM_MP2_RESET_AUD_RATE, 1586 0, 1); 1587 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 1588 0, 2); 1589 ibm_send_command(saa, IBM_MP2_CHANNEL_SWITCH, 1590 0, 1); 1591 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 1592 ChipControl, 2); 1593 ibm_send_command(saa, IBM_MP2_PLAY, 0, 0); 1594 saa->playmode = VID_PLAY_NORMAL; 1595 return 0; 1596 case VID_PLAY_FREEZE_FRAME: 1597 ibm_send_command(saa, IBM_MP2_FREEZE_FRAME,0,0); 1598 saa->playmode = pmode.mode; 1599 return 0; 1600 case VID_PLAY_STILL_MODE: 1601 ibm_send_command(saa, IBM_MP2_SET_STILL_MODE, 1602 0, 0); 1603 saa->playmode = pmode.mode; 1604 return 0; 1605 case VID_PLAY_MASTER_MODE: 1606 if (pmode.p1 == VID_PLAY_MASTER_NONE) 1607 saa->boardcfg[1] = 0x13; 1608 else if (pmode.p1 == VID_PLAY_MASTER_VIDEO) 1609 saa->boardcfg[1] = 0x23; 1610 else if (pmode.p1 == VID_PLAY_MASTER_AUDIO) 1611 saa->boardcfg[1] = 0x43; 1612 else 1613 return -EINVAL; 1614 debiwrite(saa, debNormal, 1615 IBM_MP2_CHIP_CONTROL, ChipControl, 2); 1616 return 0; 1617 case VID_PLAY_ACTIVE_SCANLINES: 1618 if (CurrentMode == VIDEO_MODE_PAL) { 1619 if (pmode.p1 < 1 || pmode.p2 > 625) 1620 return -EINVAL; 1621 saa->boardcfg[5] = pmode.p1; 1622 saa->boardcfg[55] = (pmode.p1 + 1623 (pmode.p2 / 2) - 1) & 0xff; 1624 } else { 1625 if (pmode.p1 < 4 || pmode.p2 > 525) 1626 return -EINVAL; 1627 saa->boardcfg[4] = pmode.p1; 1628 saa->boardcfg[54] = (pmode.p1 + 1629 (pmode.p2 / 2) - 4) & 0xff; 1630 } 1631 set_out_format(saa, CurrentMode); 1632 case VID_PLAY_RESET: 1633 return do_ibm_reset(saa); 1634 case VID_PLAY_END_MARK: 1635 if (saa->endmarktail < saa->endmarkhead) { 1636 if (saa->endmarkhead - 1637 saa->endmarktail < 2) 1638 return -ENOSPC; 1639 } else if (saa->endmarkhead <=saa->endmarktail){ 1640 if (saa->endmarktail - saa->endmarkhead 1641 > (MAX_MARKS - 2)) 1642 return -ENOSPC; 1643 } else 1644 return -ENOSPC; 1645 saa->endmark[saa->endmarktail] = saa->audtail; 1646 saa->endmarktail++; 1647 if (saa->endmarktail >= MAX_MARKS) 1648 saa->endmarktail = 0; 1649 } 1650 return -EINVAL; 1651 } 1652 case VIDIOCSWRITEMODE: 1653 { 1654 int mode; 1655 if (copy_from_user((void *)&mode, arg, sizeof(int))) 1656 return -EFAULT; 1657 if (mode == VID_WRITE_MPEG_AUD || 1658 mode == VID_WRITE_MPEG_VID || 1659 mode == VID_WRITE_CC || 1660 mode == VID_WRITE_TTX || 1661 mode == VID_WRITE_OSD) { 1662 saa->writemode = mode; 1663 return 0; 1664 } 1665 return -EINVAL; 1666 } 1667 case VIDIOCSMICROCODE: 1668 { 1669 struct video_code ucode; 1670 __u8 *udata; 1671 int i; 1672 if (copy_from_user(&ucode, arg, sizeof(ucode))) 1673 return -EFAULT; 1674 if (ucode.datasize > 65536 || ucode.datasize < 1024 || 1675 strncmp(ucode.loadwhat, "dec", 3)) 1676 return -EINVAL; 1677 if ((udata = vmalloc(ucode.datasize)) == NULL) 1678 return -ENOMEM; 1679 if (copy_from_user(udata, ucode.data, ucode.datasize)) { 1680 vfree(udata); 1681 return -EFAULT; 1682 } 1683 ucode.data = udata; 1684 if (!strncmp(ucode.loadwhat, "decoder.aud", 11) || 1685 !strncmp(ucode.loadwhat, "decoder.vid", 11)) 1686 i = initialize_ibmmpeg2(&ucode); 1687 else 1688 i = initialize_fpga(&ucode); 1689 vfree(udata); 1690 if (i) 1691 return -EINVAL; 1692 return 0; 1693 1694 } 1695 case VIDIOCGCHAN: /* this makes xawtv happy */ 1696 { 1697 struct video_channel v; 1698 if (copy_from_user(&v, arg, sizeof(v))) 1699 return -EFAULT; 1700 v.flags = VIDEO_VC_AUDIO; 1701 v.tuners = 0; 1702 v.type = VID_TYPE_MPEG_DECODER; 1703 v.norm = CurrentMode; 1704 strcpy(v.name, "MPEG2"); 1705 if (copy_to_user(arg, &v, sizeof(v))) 1706 return -EFAULT; 1707 return 0; 1708 } 1709 case VIDIOCSCHAN: /* this makes xawtv happy */ 1710 { 1711 struct video_channel v; 1712 if (copy_from_user(&v, arg, sizeof(v))) 1713 return -EFAULT; 1714 /* do nothing */ 1715 return 0; 1716 } 1717 default: 1718 return -ENOIOCTLCMD; 1719 } 1720 return 0; 1721} 1722 1723static int saa_mmap(struct file *file, struct vm_area_struct *vma) 1724{ 1725 struct saa7146 *saa = file->private_data; 1726 printk(KERN_DEBUG "stradis%d: saa_mmap called\n", saa->nr); 1727 return -EINVAL; 1728} 1729 1730static ssize_t saa_read(struct file *file, char __user * buf, 1731 size_t count, loff_t * ppos) 1732{ 1733 return -EINVAL; 1734} 1735 1736static ssize_t saa_write(struct file *file, const char __user * buf, 1737 size_t count, loff_t * ppos) 1738{ 1739 struct saa7146 *saa = file->private_data; 1740 unsigned long todo = count; 1741 int blocksize, split; 1742 unsigned long flags; 1743 1744 while (todo > 0) { 1745 if (saa->writemode == VID_WRITE_MPEG_AUD) { 1746 spin_lock_irqsave(&saa->lock, flags); 1747 if (saa->audhead <= saa->audtail) 1748 blocksize = 65536 - 1749 (saa->audtail - saa->audhead); 1750 else 1751 blocksize = saa->audhead - saa->audtail; 1752 spin_unlock_irqrestore(&saa->lock, flags); 1753 if (blocksize < 16384) { 1754 saawrite(SAA7146_PSR_DEBI_S | 1755 SAA7146_PSR_PIN1, SAA7146_IER); 1756 saawrite(SAA7146_PSR_PIN1, SAA7146_PSR); 1757 /* wait for buffer space to open */ 1758 interruptible_sleep_on(&saa->audq); 1759 } 1760 spin_lock_irqsave(&saa->lock, flags); 1761 if (saa->audhead <= saa->audtail) { 1762 blocksize = 65536 - 1763 (saa->audtail - saa->audhead); 1764 split = 65536 - saa->audtail; 1765 } else { 1766 blocksize = saa->audhead - saa->audtail; 1767 split = 65536; 1768 } 1769 spin_unlock_irqrestore(&saa->lock, flags); 1770 blocksize--; 1771 if (blocksize > todo) 1772 blocksize = todo; 1773 /* double check that we really have space */ 1774 if (!blocksize) 1775 return -ENOSPC; 1776 if (split < blocksize) { 1777 if (copy_from_user(saa->audbuf + 1778 saa->audtail, buf, split)) 1779 return -EFAULT; 1780 buf += split; 1781 todo -= split; 1782 blocksize -= split; 1783 saa->audtail = 0; 1784 } 1785 if (copy_from_user(saa->audbuf + saa->audtail, buf, 1786 blocksize)) 1787 return -EFAULT; 1788 saa->audtail += blocksize; 1789 todo -= blocksize; 1790 buf += blocksize; 1791 saa->audtail &= 0xffff; 1792 } else if (saa->writemode == VID_WRITE_MPEG_VID) { 1793 spin_lock_irqsave(&saa->lock, flags); 1794 if (saa->vidhead <= saa->vidtail) 1795 blocksize = 524288 - 1796 (saa->vidtail - saa->vidhead); 1797 else 1798 blocksize = saa->vidhead - saa->vidtail; 1799 spin_unlock_irqrestore(&saa->lock, flags); 1800 if (blocksize < 65536) { 1801 saawrite(SAA7146_PSR_DEBI_S | 1802 SAA7146_PSR_PIN1, SAA7146_IER); 1803 saawrite(SAA7146_PSR_PIN1, SAA7146_PSR); 1804 /* wait for buffer space to open */ 1805 interruptible_sleep_on(&saa->vidq); 1806 } 1807 spin_lock_irqsave(&saa->lock, flags); 1808 if (saa->vidhead <= saa->vidtail) { 1809 blocksize = 524288 - 1810 (saa->vidtail - saa->vidhead); 1811 split = 524288 - saa->vidtail; 1812 } else { 1813 blocksize = saa->vidhead - saa->vidtail; 1814 split = 524288; 1815 } 1816 spin_unlock_irqrestore(&saa->lock, flags); 1817 blocksize--; 1818 if (blocksize > todo) 1819 blocksize = todo; 1820 /* double check that we really have space */ 1821 if (!blocksize) 1822 return -ENOSPC; 1823 if (split < blocksize) { 1824 if (copy_from_user(saa->vidbuf + 1825 saa->vidtail, buf, split)) 1826 return -EFAULT; 1827 buf += split; 1828 todo -= split; 1829 blocksize -= split; 1830 saa->vidtail = 0; 1831 } 1832 if (copy_from_user(saa->vidbuf + saa->vidtail, buf, 1833 blocksize)) 1834 return -EFAULT; 1835 saa->vidtail += blocksize; 1836 todo -= blocksize; 1837 buf += blocksize; 1838 saa->vidtail &= 0x7ffff; 1839 } else if (saa->writemode == VID_WRITE_OSD) { 1840 if (count > 131072) 1841 return -ENOSPC; 1842 if (copy_from_user(saa->osdbuf, buf, count)) 1843 return -EFAULT; 1844 buf += count; 1845 saa->osdhead = 0; 1846 saa->osdtail = count; 1847 debiwrite(saa, debNormal, IBM_MP2_OSD_ADDR, 0, 2); 1848 debiwrite(saa, debNormal, IBM_MP2_OSD_LINK_ADDR, 0, 2); 1849 debiwrite(saa, debNormal, IBM_MP2_MASK0, 0xc00d, 2); 1850 debiwrite(saa, debNormal, IBM_MP2_DISP_MODE, 1851 debiread(saa, debNormal, 1852 IBM_MP2_DISP_MODE, 2) | 1, 2); 1853 /* trigger osd data transfer */ 1854 saawrite(SAA7146_PSR_DEBI_S | 1855 SAA7146_PSR_PIN1, SAA7146_IER); 1856 saawrite(SAA7146_PSR_PIN1, SAA7146_PSR); 1857 } 1858 } 1859 return count; 1860} 1861 1862static int saa_open(struct inode *inode, struct file *file) 1863{ 1864 struct video_device *vdev = video_devdata(file); 1865 struct saa7146 *saa = container_of(vdev, struct saa7146, video_dev); 1866 1867 file->private_data = saa; 1868 1869 saa->user++; 1870 if (saa->user > 1) 1871 return 0; /* device open already, don't reset */ 1872 saa->writemode = VID_WRITE_MPEG_VID; /* default to video */ 1873 return 0; 1874} 1875 1876static int saa_release(struct inode *inode, struct file *file) 1877{ 1878 struct saa7146 *saa = file->private_data; 1879 saa->user--; 1880 1881 if (saa->user > 0) /* still someone using device */ 1882 return 0; 1883 saawrite(0x007f0000, SAA7146_MC1); /* stop all overlay dma */ 1884 return 0; 1885} 1886 1887static const struct file_operations saa_fops = { 1888 .owner = THIS_MODULE, 1889 .open = saa_open, 1890 .release = saa_release, 1891 .ioctl = saa_ioctl, 1892 .compat_ioctl = v4l_compat_ioctl32, 1893 .read = saa_read, 1894 .llseek = no_llseek, 1895 .write = saa_write, 1896 .mmap = saa_mmap, 1897}; 1898 1899/* template for video_device-structure */ 1900static struct video_device saa_template = { 1901 .name = "SAA7146A", 1902 .type = VID_TYPE_CAPTURE | VID_TYPE_OVERLAY, 1903 .hardware = VID_HARDWARE_SAA7146, 1904 .fops = &saa_fops, 1905 .minor = -1, 1906}; 1907 1908static int __devinit configure_saa7146(struct pci_dev *pdev, int num) 1909{ 1910 int retval; 1911 struct saa7146 *saa = pci_get_drvdata(pdev); 1912 1913 saa->endmarkhead = saa->endmarktail = 0; 1914 saa->win.x = saa->win.y = 0; 1915 saa->win.width = saa->win.cropwidth = 720; 1916 saa->win.height = saa->win.cropheight = 480; 1917 saa->win.cropx = saa->win.cropy = 0; 1918 saa->win.bpp = 2; 1919 saa->win.depth = 16; 1920 saa->win.color_fmt = palette2fmt[VIDEO_PALETTE_RGB565]; 1921 saa->win.bpl = 1024 * saa->win.bpp; 1922 saa->win.swidth = 1024; 1923 saa->win.sheight = 768; 1924 saa->picture.brightness = 32768; 1925 saa->picture.contrast = 38768; 1926 saa->picture.colour = 32768; 1927 saa->cap = 0; 1928 saa->nr = num; 1929 saa->playmode = VID_PLAY_NORMAL; 1930 memset(saa->boardcfg, 0, 64); /* clear board config area */ 1931 saa->saa7146_mem = NULL; 1932 saa->dmavid1 = saa->dmavid2 = saa->dmavid3 = saa->dmaa1in = 1933 saa->dmaa1out = saa->dmaa2in = saa->dmaa2out = 1934 saa->pagevid1 = saa->pagevid2 = saa->pagevid3 = saa->pagea1in = 1935 saa->pagea1out = saa->pagea2in = saa->pagea2out = 1936 saa->pagedebi = saa->dmaRPS1 = saa->dmaRPS2 = saa->pageRPS1 = 1937 saa->pageRPS2 = NULL; 1938 saa->audbuf = saa->vidbuf = saa->osdbuf = saa->dmadebi = NULL; 1939 saa->audhead = saa->vidtail = 0; 1940 1941 init_waitqueue_head(&saa->i2cq); 1942 init_waitqueue_head(&saa->audq); 1943 init_waitqueue_head(&saa->debiq); 1944 init_waitqueue_head(&saa->vidq); 1945 spin_lock_init(&saa->lock); 1946 1947 retval = pci_enable_device(pdev); 1948 if (retval) { 1949 dev_err(&pdev->dev, "%d: pci_enable_device failed!\n", num); 1950 goto err; 1951 } 1952 1953 saa->id = pdev->device; 1954 saa->irq = pdev->irq; 1955 saa->video_dev.minor = -1; 1956 saa->saa7146_adr = pci_resource_start(pdev, 0); 1957 pci_read_config_byte(pdev, PCI_CLASS_REVISION, &saa->revision); 1958 1959 saa->saa7146_mem = ioremap(saa->saa7146_adr, 0x200); 1960 if (saa->saa7146_mem == NULL) { 1961 dev_err(&pdev->dev, "%d: ioremap failed!\n", num); 1962 retval = -EIO; 1963 goto err; 1964 } 1965 1966 memcpy(&saa->video_dev, &saa_template, sizeof(saa_template)); 1967 saawrite(0, SAA7146_IER); /* turn off all interrupts */ 1968 1969 retval = request_irq(saa->irq, saa7146_irq, IRQF_SHARED | IRQF_DISABLED, 1970 "stradis", saa); 1971 if (retval == -EINVAL) 1972 dev_err(&pdev->dev, "%d: Bad irq number or handler\n", num); 1973 else if (retval == -EBUSY) 1974 dev_err(&pdev->dev, "%d: IRQ %ld busy, change your PnP config " 1975 "in BIOS\n", num, saa->irq); 1976 if (retval < 0) 1977 goto errio; 1978 1979 pci_set_master(pdev); 1980 retval = video_register_device(&saa->video_dev, VFL_TYPE_GRABBER, 1981 video_nr); 1982 if (retval < 0) { 1983 dev_err(&pdev->dev, "%d: error in registering video device!\n", 1984 num); 1985 goto errio; 1986 } 1987 1988 return 0; 1989errio: 1990 iounmap(saa->saa7146_mem); 1991err: 1992 return retval; 1993} 1994 1995static int __devinit init_saa7146(struct pci_dev *pdev) 1996{ 1997 struct saa7146 *saa = pci_get_drvdata(pdev); 1998 1999 saa->user = 0; 2000 /* reset the saa7146 */ 2001 saawrite(0xffff0000, SAA7146_MC1); 2002 mdelay(5); 2003 /* enable debi and i2c transfers and pins */ 2004 saawrite(((SAA7146_MC1_EDP | SAA7146_MC1_EI2C | 2005 SAA7146_MC1_TR_E_DEBI) << 16) | 0xffff, SAA7146_MC1); 2006 /* ensure proper state of chip */ 2007 saawrite(0x00000000, SAA7146_PAGE1); 2008 saawrite(0x00f302c0, SAA7146_NUM_LINE_BYTE1); 2009 saawrite(0x00000000, SAA7146_PAGE2); 2010 saawrite(0x01400080, SAA7146_NUM_LINE_BYTE2); 2011 saawrite(0x00000000, SAA7146_DD1_INIT); 2012 saawrite(0x00000000, SAA7146_DD1_STREAM_B); 2013 saawrite(0x00000000, SAA7146_DD1_STREAM_A); 2014 saawrite(0x00000000, SAA7146_BRS_CTRL); 2015 saawrite(0x80400040, SAA7146_BCS_CTRL); 2016 saawrite(0x0000e000 /*| (1<<29) */ , SAA7146_HPS_CTRL); 2017 saawrite(0x00000060, SAA7146_CLIP_FORMAT_CTRL); 2018 saawrite(0x00000000, SAA7146_ACON1); 2019 saawrite(0x00000000, SAA7146_ACON2); 2020 saawrite(0x00000600, SAA7146_I2C_STATUS); 2021 saawrite(((SAA7146_MC2_UPLD_D1_B | SAA7146_MC2_UPLD_D1_A | 2022 SAA7146_MC2_UPLD_BRS | SAA7146_MC2_UPLD_HPS_H | 2023 SAA7146_MC2_UPLD_HPS_V | SAA7146_MC2_UPLD_DMA2 | 2024 SAA7146_MC2_UPLD_DMA1 | SAA7146_MC2_UPLD_I2C) << 16) | 0xffff, 2025 SAA7146_MC2); 2026 /* setup arbitration control registers */ 2027 saawrite(0x1412121a, SAA7146_PCI_BT_V1); 2028 2029 /* allocate 32k dma buffer + 4k for page table */ 2030 if ((saa->dmadebi = kmalloc(32768 + 4096, GFP_KERNEL)) == NULL) { 2031 dev_err(&pdev->dev, "%d: debi kmalloc failed\n", saa->nr); 2032 goto err; 2033 } 2034 saa->audhead = saa->vidhead = saa->osdhead = 0; 2035 saa->audtail = saa->vidtail = saa->osdtail = 0; 2036 if (saa->vidbuf == NULL && (saa->vidbuf = vmalloc(524288)) == NULL) { 2037 dev_err(&pdev->dev, "%d: malloc failed\n", saa->nr); 2038 goto err; 2039 } 2040 if (saa->audbuf == NULL && (saa->audbuf = vmalloc(65536)) == NULL) { 2041 dev_err(&pdev->dev, "%d: malloc failed\n", saa->nr); 2042 goto errfree; 2043 } 2044 if (saa->osdbuf == NULL && (saa->osdbuf = vmalloc(131072)) == NULL) { 2045 dev_err(&pdev->dev, "%d: malloc failed\n", saa->nr); 2046 goto errfree; 2047 } 2048 /* allocate 81920 byte buffer for clipping */ 2049 if ((saa->dmavid2 = kzalloc(VIDEO_CLIPMAP_SIZE, GFP_KERNEL)) == NULL) { 2050 dev_err(&pdev->dev, "%d: clip kmalloc failed\n", saa->nr); 2051 goto errfree; 2052 } 2053 /* setup clipping registers */ 2054 saawrite(virt_to_bus(saa->dmavid2), SAA7146_BASE_EVEN2); 2055 saawrite(virt_to_bus(saa->dmavid2) + 128, SAA7146_BASE_ODD2); 2056 saawrite(virt_to_bus(saa->dmavid2) + VIDEO_CLIPMAP_SIZE, 2057 SAA7146_PROT_ADDR2); 2058 saawrite(256, SAA7146_PITCH2); 2059 saawrite(4, SAA7146_PAGE2); /* dma direction: read, no byteswap */ 2060 saawrite(((SAA7146_MC2_UPLD_DMA2) << 16) | SAA7146_MC2_UPLD_DMA2, 2061 SAA7146_MC2); 2062 I2CBusScan(saa); 2063 2064 return 0; 2065errfree: 2066 vfree(saa->osdbuf); 2067 vfree(saa->audbuf); 2068 vfree(saa->vidbuf); 2069 saa->audbuf = saa->osdbuf = saa->vidbuf = NULL; 2070err: 2071 return -ENOMEM; 2072} 2073 2074static void stradis_release_saa(struct pci_dev *pdev) 2075{ 2076 u8 command; 2077 struct saa7146 *saa = pci_get_drvdata(pdev); 2078 2079 /* turn off all capturing, DMA and IRQs */ 2080 saawrite(0xffff0000, SAA7146_MC1); /* reset chip */ 2081 saawrite(0, SAA7146_MC2); 2082 saawrite(0, SAA7146_IER); 2083 saawrite(0xffffffffUL, SAA7146_ISR); 2084 2085 /* disable PCI bus-mastering */ 2086 pci_read_config_byte(pdev, PCI_COMMAND, &command); 2087 command &= ~PCI_COMMAND_MASTER; 2088 pci_write_config_byte(pdev, PCI_COMMAND, command); 2089 2090 /* unmap and free memory */ 2091 saa->audhead = saa->audtail = saa->osdhead = 0; 2092 saa->vidhead = saa->vidtail = saa->osdtail = 0; 2093 vfree(saa->vidbuf); 2094 vfree(saa->audbuf); 2095 vfree(saa->osdbuf); 2096 kfree(saa->dmavid2); 2097 saa->audbuf = saa->vidbuf = saa->osdbuf = NULL; 2098 saa->dmavid2 = NULL; 2099 kfree(saa->dmadebi); 2100 kfree(saa->dmavid1); 2101 kfree(saa->dmavid3); 2102 kfree(saa->dmaa1in); 2103 kfree(saa->dmaa1out); 2104 kfree(saa->dmaa2in); 2105 kfree(saa->dmaa2out); 2106 kfree(saa->dmaRPS1); 2107 kfree(saa->dmaRPS2); 2108 free_irq(saa->irq, saa); 2109 if (saa->saa7146_mem) 2110 iounmap(saa->saa7146_mem); 2111 if (saa->video_dev.minor != -1) 2112 video_unregister_device(&saa->video_dev); 2113} 2114 2115static int __devinit stradis_probe(struct pci_dev *pdev, 2116 const struct pci_device_id *ent) 2117{ 2118 int retval = -EINVAL; 2119 2120 if (saa_num >= SAA7146_MAX) 2121 goto err; 2122 2123 if (!pdev->subsystem_vendor) 2124 dev_info(&pdev->dev, "%d: rev1 decoder\n", saa_num); 2125 else 2126 dev_info(&pdev->dev, "%d: SDM2xx found\n", saa_num); 2127 2128 pci_set_drvdata(pdev, &saa7146s[saa_num]); 2129 2130 retval = configure_saa7146(pdev, saa_num); 2131 if (retval) { 2132 dev_err(&pdev->dev, "%d: error in configuring\n", saa_num); 2133 goto err; 2134 } 2135 2136 if (init_saa7146(pdev) < 0) { 2137 dev_err(&pdev->dev, "%d: error in initialization\n", saa_num); 2138 retval = -EIO; 2139 goto errrel; 2140 } 2141 2142 saa_num++; 2143 2144 return 0; 2145errrel: 2146 stradis_release_saa(pdev); 2147err: 2148 return retval; 2149} 2150 2151static void __devexit stradis_remove(struct pci_dev *pdev) 2152{ 2153 stradis_release_saa(pdev); 2154} 2155 2156static struct pci_device_id stradis_pci_tbl[] = { 2157 { PCI_DEVICE(PCI_VENDOR_ID_PHILIPS, PCI_DEVICE_ID_PHILIPS_SAA7146) }, 2158 { 0 } 2159}; 2160 2161 2162static struct pci_driver stradis_driver = { 2163 .name = "stradis", 2164 .id_table = stradis_pci_tbl, 2165 .probe = stradis_probe, 2166 .remove = __devexit_p(stradis_remove) 2167}; 2168 2169static int __init stradis_init(void) 2170{ 2171 int retval; 2172 2173 saa_num = 0; 2174 2175 retval = pci_register_driver(&stradis_driver); 2176 if (retval) 2177 printk(KERN_ERR "stradis: Unable to register pci driver.\n"); 2178 2179 return retval; 2180} 2181 2182static void __exit stradis_exit(void) 2183{ 2184 pci_unregister_driver(&stradis_driver); 2185 printk(KERN_INFO "stradis: module cleanup complete\n"); 2186} 2187 2188module_init(stradis_init); 2189module_exit(stradis_exit); 2190