1/* 2 * HIL MLC state machine and serio interface driver 3 * 4 * Copyright (c) 2001 Brian S. Julin 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions, and the following disclaimer, 12 * without modification. 13 * 2. The name of the author may not be used to endorse or promote products 14 * derived from this software without specific prior written permission. 15 * 16 * Alternatively, this software may be distributed under the terms of the 17 * GNU General Public License ("GPL"). 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * 29 * References: 30 * HP-HIL Technical Reference Manual. Hewlett Packard Product No. 45918A 31 * 32 * 33 * Driver theory of operation: 34 * 35 * Some access methods and an ISR is defined by the sub-driver 36 * (e.g. hp_sdc_mlc.c). These methods are expected to provide a 37 * few bits of logic in addition to raw access to the HIL MLC, 38 * specifically, the ISR, which is entirely registered by the 39 * sub-driver and invoked directly, must check for record 40 * termination or packet match, at which point a semaphore must 41 * be cleared and then the hil_mlcs_tasklet must be scheduled. 42 * 43 * The hil_mlcs_tasklet processes the state machine for all MLCs 44 * each time it runs, checking each MLC's progress at the current 45 * node in the state machine, and moving the MLC to subsequent nodes 46 * in the state machine when appropriate. It will reschedule 47 * itself if output is pending. (This rescheduling should be replaced 48 * at some point with a sub-driver-specific mechanism.) 49 * 50 * A timer task prods the tasklet once per second to prevent 51 * hangups when attached devices do not return expected data 52 * and to initiate probes of the loop for new devices. 53 */ 54 55#include <linux/hil_mlc.h> 56#include <linux/errno.h> 57#include <linux/kernel.h> 58#include <linux/module.h> 59#include <linux/init.h> 60#include <linux/interrupt.h> 61#include <linux/timer.h> 62#include <linux/list.h> 63 64MODULE_AUTHOR("Brian S. Julin <bri@calyx.com>"); 65MODULE_DESCRIPTION("HIL MLC serio"); 66MODULE_LICENSE("Dual BSD/GPL"); 67 68EXPORT_SYMBOL(hil_mlc_register); 69EXPORT_SYMBOL(hil_mlc_unregister); 70 71#define PREFIX "HIL MLC: " 72 73static LIST_HEAD(hil_mlcs); 74static DEFINE_RWLOCK(hil_mlcs_lock); 75static struct timer_list hil_mlcs_kicker; 76static int hil_mlcs_probe; 77 78static void hil_mlcs_process(unsigned long unused); 79DECLARE_TASKLET_DISABLED(hil_mlcs_tasklet, hil_mlcs_process, 0); 80 81 82/* #define HIL_MLC_DEBUG */ 83 84/********************** Device info/instance management **********************/ 85 86static void hil_mlc_clear_di_map(hil_mlc *mlc, int val) 87{ 88 int j; 89 90 for (j = val; j < 7 ; j++) 91 mlc->di_map[j] = -1; 92} 93 94static void hil_mlc_clear_di_scratch(hil_mlc *mlc) 95{ 96 memset(&mlc->di_scratch, 0, sizeof(mlc->di_scratch)); 97} 98 99static void hil_mlc_copy_di_scratch(hil_mlc *mlc, int idx) 100{ 101 memcpy(&mlc->di[idx], &mlc->di_scratch, sizeof(mlc->di_scratch)); 102} 103 104static int hil_mlc_match_di_scratch(hil_mlc *mlc) 105{ 106 int idx; 107 108 for (idx = 0; idx < HIL_MLC_DEVMEM; idx++) { 109 int j, found = 0; 110 111 /* In-use slots are not eligible. */ 112 for (j = 0; j < 7 ; j++) 113 if (mlc->di_map[j] == idx) 114 found++; 115 116 if (found) 117 continue; 118 119 if (!memcmp(mlc->di + idx, &mlc->di_scratch, 120 sizeof(mlc->di_scratch))) 121 break; 122 } 123 return idx >= HIL_MLC_DEVMEM ? -1 : idx; 124} 125 126static int hil_mlc_find_free_di(hil_mlc *mlc) 127{ 128 int idx; 129 130 /* TODO: Pick all-zero slots first, failing that, 131 * randomize the slot picked among those eligible. 132 */ 133 for (idx = 0; idx < HIL_MLC_DEVMEM; idx++) { 134 int j, found = 0; 135 136 for (j = 0; j < 7 ; j++) 137 if (mlc->di_map[j] == idx) 138 found++; 139 140 if (!found) 141 break; 142 } 143 144 return idx; /* Note: It is guaranteed at least one above will match */ 145} 146 147static inline void hil_mlc_clean_serio_map(hil_mlc *mlc) 148{ 149 int idx; 150 151 for (idx = 0; idx < HIL_MLC_DEVMEM; idx++) { 152 int j, found = 0; 153 154 for (j = 0; j < 7 ; j++) 155 if (mlc->di_map[j] == idx) 156 found++; 157 158 if (!found) 159 mlc->serio_map[idx].di_revmap = -1; 160 } 161} 162 163static void hil_mlc_send_polls(hil_mlc *mlc) 164{ 165 int did, i, cnt; 166 struct serio *serio; 167 struct serio_driver *drv; 168 169 i = cnt = 0; 170 did = (mlc->ipacket[0] & HIL_PKT_ADDR_MASK) >> 8; 171 serio = did ? mlc->serio[mlc->di_map[did - 1]] : NULL; 172 drv = (serio != NULL) ? serio->drv : NULL; 173 174 while (mlc->icount < 15 - i) { 175 hil_packet p; 176 177 p = mlc->ipacket[i]; 178 if (did != (p & HIL_PKT_ADDR_MASK) >> 8) { 179 if (drv && drv->interrupt) { 180 drv->interrupt(serio, 0, 0); 181 drv->interrupt(serio, HIL_ERR_INT >> 16, 0); 182 drv->interrupt(serio, HIL_PKT_CMD >> 8, 0); 183 drv->interrupt(serio, HIL_CMD_POL + cnt, 0); 184 } 185 186 did = (p & HIL_PKT_ADDR_MASK) >> 8; 187 serio = did ? mlc->serio[mlc->di_map[did-1]] : NULL; 188 drv = (serio != NULL) ? serio->drv : NULL; 189 cnt = 0; 190 } 191 192 cnt++; 193 i++; 194 195 if (drv && drv->interrupt) { 196 drv->interrupt(serio, (p >> 24), 0); 197 drv->interrupt(serio, (p >> 16) & 0xff, 0); 198 drv->interrupt(serio, (p >> 8) & ~HIL_PKT_ADDR_MASK, 0); 199 drv->interrupt(serio, p & 0xff, 0); 200 } 201 } 202} 203 204/*************************** State engine *********************************/ 205 206#define HILSEN_SCHED 0x000100 /* Schedule the tasklet */ 207#define HILSEN_BREAK 0x000200 /* Wait until next pass */ 208#define HILSEN_UP 0x000400 /* relative node#, decrement */ 209#define HILSEN_DOWN 0x000800 /* relative node#, increment */ 210#define HILSEN_FOLLOW 0x001000 /* use retval as next node# */ 211 212#define HILSEN_MASK 0x0000ff 213#define HILSEN_START 0 214#define HILSEN_RESTART 1 215#define HILSEN_DHR 9 216#define HILSEN_DHR2 10 217#define HILSEN_IFC 14 218#define HILSEN_HEAL0 16 219#define HILSEN_HEAL 18 220#define HILSEN_ACF 21 221#define HILSEN_ACF2 22 222#define HILSEN_DISC0 25 223#define HILSEN_DISC 27 224#define HILSEN_MATCH 40 225#define HILSEN_OPERATE 41 226#define HILSEN_PROBE 44 227#define HILSEN_DSR 52 228#define HILSEN_REPOLL 55 229#define HILSEN_IFCACF 58 230#define HILSEN_END 60 231 232#define HILSEN_NEXT (HILSEN_DOWN | 1) 233#define HILSEN_SAME (HILSEN_DOWN | 0) 234#define HILSEN_LAST (HILSEN_UP | 1) 235 236#define HILSEN_DOZE (HILSEN_SAME | HILSEN_SCHED | HILSEN_BREAK) 237#define HILSEN_SLEEP (HILSEN_SAME | HILSEN_BREAK) 238 239static int hilse_match(hil_mlc *mlc, int unused) 240{ 241 int rc; 242 243 rc = hil_mlc_match_di_scratch(mlc); 244 if (rc == -1) { 245 rc = hil_mlc_find_free_di(mlc); 246 if (rc == -1) 247 goto err; 248 249#ifdef HIL_MLC_DEBUG 250 printk(KERN_DEBUG PREFIX "new in slot %i\n", rc); 251#endif 252 hil_mlc_copy_di_scratch(mlc, rc); 253 mlc->di_map[mlc->ddi] = rc; 254 mlc->serio_map[rc].di_revmap = mlc->ddi; 255 hil_mlc_clean_serio_map(mlc); 256 serio_rescan(mlc->serio[rc]); 257 return -1; 258 } 259 260 mlc->di_map[mlc->ddi] = rc; 261#ifdef HIL_MLC_DEBUG 262 printk(KERN_DEBUG PREFIX "same in slot %i\n", rc); 263#endif 264 mlc->serio_map[rc].di_revmap = mlc->ddi; 265 hil_mlc_clean_serio_map(mlc); 266 return 0; 267 268 err: 269 printk(KERN_ERR PREFIX "Residual device slots exhausted, close some serios!\n"); 270 return 1; 271} 272 273/* An LCV used to prevent runaway loops, forces 5 second sleep when reset. */ 274static int hilse_init_lcv(hil_mlc *mlc, int unused) 275{ 276 struct timeval tv; 277 278 do_gettimeofday(&tv); 279 280 if (mlc->lcv && (tv.tv_sec - mlc->lcv_tv.tv_sec) < 5) 281 return -1; 282 283 mlc->lcv_tv = tv; 284 mlc->lcv = 0; 285 286 return 0; 287} 288 289static int hilse_inc_lcv(hil_mlc *mlc, int lim) 290{ 291 return mlc->lcv++ >= lim ? -1 : 0; 292} 293 294 295/* Management of the discovered device index (zero based, -1 means no devs) */ 296static int hilse_set_ddi(hil_mlc *mlc, int val) 297{ 298 mlc->ddi = val; 299 hil_mlc_clear_di_map(mlc, val + 1); 300 301 return 0; 302} 303 304static int hilse_dec_ddi(hil_mlc *mlc, int unused) 305{ 306 mlc->ddi--; 307 if (mlc->ddi <= -1) { 308 mlc->ddi = -1; 309 hil_mlc_clear_di_map(mlc, 0); 310 return -1; 311 } 312 hil_mlc_clear_di_map(mlc, mlc->ddi + 1); 313 314 return 0; 315} 316 317static int hilse_inc_ddi(hil_mlc *mlc, int unused) 318{ 319 BUG_ON(mlc->ddi >= 6); 320 mlc->ddi++; 321 322 return 0; 323} 324 325static int hilse_take_idd(hil_mlc *mlc, int unused) 326{ 327 int i; 328 329 /* Help the state engine: 330 * Is this a real IDD response or just an echo? 331 * 332 * Real IDD response does not start with a command. 333 */ 334 if (mlc->ipacket[0] & HIL_PKT_CMD) 335 goto bail; 336 337 /* Should have the command echoed further down. */ 338 for (i = 1; i < 16; i++) { 339 if (((mlc->ipacket[i] & HIL_PKT_ADDR_MASK) == 340 (mlc->ipacket[0] & HIL_PKT_ADDR_MASK)) && 341 (mlc->ipacket[i] & HIL_PKT_CMD) && 342 ((mlc->ipacket[i] & HIL_PKT_DATA_MASK) == HIL_CMD_IDD)) 343 break; 344 } 345 if (i > 15) 346 goto bail; 347 348 /* And the rest of the packets should still be clear. */ 349 while (++i < 16) 350 if (mlc->ipacket[i]) 351 break; 352 353 if (i < 16) 354 goto bail; 355 356 for (i = 0; i < 16; i++) 357 mlc->di_scratch.idd[i] = 358 mlc->ipacket[i] & HIL_PKT_DATA_MASK; 359 360 /* Next step is to see if RSC supported */ 361 if (mlc->di_scratch.idd[1] & HIL_IDD_HEADER_RSC) 362 return HILSEN_NEXT; 363 364 if (mlc->di_scratch.idd[1] & HIL_IDD_HEADER_EXD) 365 return HILSEN_DOWN | 4; 366 367 return 0; 368 369 bail: 370 mlc->ddi--; 371 372 return -1; /* This should send us off to ACF */ 373} 374 375static int hilse_take_rsc(hil_mlc *mlc, int unused) 376{ 377 int i; 378 379 for (i = 0; i < 16; i++) 380 mlc->di_scratch.rsc[i] = 381 mlc->ipacket[i] & HIL_PKT_DATA_MASK; 382 383 /* Next step is to see if EXD supported (IDD has already been read) */ 384 if (mlc->di_scratch.idd[1] & HIL_IDD_HEADER_EXD) 385 return HILSEN_NEXT; 386 387 return 0; 388} 389 390static int hilse_take_exd(hil_mlc *mlc, int unused) 391{ 392 int i; 393 394 for (i = 0; i < 16; i++) 395 mlc->di_scratch.exd[i] = 396 mlc->ipacket[i] & HIL_PKT_DATA_MASK; 397 398 /* Next step is to see if RNM supported. */ 399 if (mlc->di_scratch.exd[0] & HIL_EXD_HEADER_RNM) 400 return HILSEN_NEXT; 401 402 return 0; 403} 404 405static int hilse_take_rnm(hil_mlc *mlc, int unused) 406{ 407 int i; 408 409 for (i = 0; i < 16; i++) 410 mlc->di_scratch.rnm[i] = 411 mlc->ipacket[i] & HIL_PKT_DATA_MASK; 412 413 printk(KERN_INFO PREFIX "Device name gotten: %16s\n", 414 mlc->di_scratch.rnm); 415 416 return 0; 417} 418 419static int hilse_operate(hil_mlc *mlc, int repoll) 420{ 421 422 if (mlc->opercnt == 0) 423 hil_mlcs_probe = 0; 424 mlc->opercnt = 1; 425 426 hil_mlc_send_polls(mlc); 427 428 if (!hil_mlcs_probe) 429 return 0; 430 hil_mlcs_probe = 0; 431 mlc->opercnt = 0; 432 return 1; 433} 434 435#define FUNC(funct, funct_arg, zero_rc, neg_rc, pos_rc) \ 436{ HILSE_FUNC, { .func = funct }, funct_arg, zero_rc, neg_rc, pos_rc }, 437#define OUT(pack) \ 438{ HILSE_OUT, { .packet = pack }, 0, HILSEN_NEXT, HILSEN_DOZE, 0 }, 439#define CTS \ 440{ HILSE_CTS, { .packet = 0 }, 0, HILSEN_NEXT | HILSEN_SCHED | HILSEN_BREAK, HILSEN_DOZE, 0 }, 441#define EXPECT(comp, to, got, got_wrong, timed_out) \ 442{ HILSE_EXPECT, { .packet = comp }, to, got, got_wrong, timed_out }, 443#define EXPECT_LAST(comp, to, got, got_wrong, timed_out) \ 444{ HILSE_EXPECT_LAST, { .packet = comp }, to, got, got_wrong, timed_out }, 445#define EXPECT_DISC(comp, to, got, got_wrong, timed_out) \ 446{ HILSE_EXPECT_DISC, { .packet = comp }, to, got, got_wrong, timed_out }, 447#define IN(to, got, got_error, timed_out) \ 448{ HILSE_IN, { .packet = 0 }, to, got, got_error, timed_out }, 449#define OUT_DISC(pack) \ 450{ HILSE_OUT_DISC, { .packet = pack }, 0, 0, 0, 0 }, 451#define OUT_LAST(pack) \ 452{ HILSE_OUT_LAST, { .packet = pack }, 0, 0, 0, 0 }, 453 454const struct hilse_node hil_mlc_se[HILSEN_END] = { 455 456 /* 0 HILSEN_START */ 457 FUNC(hilse_init_lcv, 0, HILSEN_NEXT, HILSEN_SLEEP, 0) 458 459 /* 1 HILSEN_RESTART */ 460 FUNC(hilse_inc_lcv, 10, HILSEN_NEXT, HILSEN_START, 0) 461 OUT(HIL_CTRL_ONLY) /* Disable APE */ 462 CTS 463 464#define TEST_PACKET(x) \ 465(HIL_PKT_CMD | (x << HIL_PKT_ADDR_SHIFT) | x << 4 | x) 466 467 OUT(HIL_DO_ALTER_CTRL | HIL_CTRL_TEST | TEST_PACKET(0x5)) 468 EXPECT(HIL_ERR_INT | TEST_PACKET(0x5), 469 2000, HILSEN_NEXT, HILSEN_RESTART, HILSEN_RESTART) 470 OUT(HIL_DO_ALTER_CTRL | HIL_CTRL_TEST | TEST_PACKET(0xa)) 471 EXPECT(HIL_ERR_INT | TEST_PACKET(0xa), 472 2000, HILSEN_NEXT, HILSEN_RESTART, HILSEN_RESTART) 473 OUT(HIL_CTRL_ONLY | 0) /* Disable test mode */ 474 475 /* 9 HILSEN_DHR */ 476 FUNC(hilse_init_lcv, 0, HILSEN_NEXT, HILSEN_SLEEP, 0) 477 478 /* 10 HILSEN_DHR2 */ 479 FUNC(hilse_inc_lcv, 10, HILSEN_NEXT, HILSEN_START, 0) 480 FUNC(hilse_set_ddi, -1, HILSEN_NEXT, 0, 0) 481 OUT(HIL_PKT_CMD | HIL_CMD_DHR) 482 IN(300000, HILSEN_DHR2, HILSEN_DHR2, HILSEN_NEXT) 483 484 /* 14 HILSEN_IFC */ 485 OUT(HIL_PKT_CMD | HIL_CMD_IFC) 486 EXPECT(HIL_PKT_CMD | HIL_CMD_IFC | HIL_ERR_INT, 487 20000, HILSEN_DISC, HILSEN_DHR2, HILSEN_NEXT ) 488 489 /* If devices are there, they weren't in PUP or other loopback mode. 490 * We're more concerned at this point with restoring operation 491 * to devices than discovering new ones, so we try to salvage 492 * the loop configuration by closing off the loop. 493 */ 494 495 /* 16 HILSEN_HEAL0 */ 496 FUNC(hilse_dec_ddi, 0, HILSEN_NEXT, HILSEN_ACF, 0) 497 FUNC(hilse_inc_ddi, 0, HILSEN_NEXT, 0, 0) 498 499 /* 18 HILSEN_HEAL */ 500 OUT_LAST(HIL_CMD_ELB) 501 EXPECT_LAST(HIL_CMD_ELB | HIL_ERR_INT, 502 20000, HILSEN_REPOLL, HILSEN_DSR, HILSEN_NEXT) 503 FUNC(hilse_dec_ddi, 0, HILSEN_HEAL, HILSEN_NEXT, 0) 504 505 /* 21 HILSEN_ACF */ 506 FUNC(hilse_init_lcv, 0, HILSEN_NEXT, HILSEN_DOZE, 0) 507 508 /* 22 HILSEN_ACF2 */ 509 FUNC(hilse_inc_lcv, 10, HILSEN_NEXT, HILSEN_START, 0) 510 OUT(HIL_PKT_CMD | HIL_CMD_ACF | 1) 511 IN(20000, HILSEN_NEXT, HILSEN_DSR, HILSEN_NEXT) 512 513 /* 25 HILSEN_DISC0 */ 514 OUT_DISC(HIL_PKT_CMD | HIL_CMD_ELB) 515 EXPECT_DISC(HIL_PKT_CMD | HIL_CMD_ELB | HIL_ERR_INT, 516 20000, HILSEN_NEXT, HILSEN_DSR, HILSEN_DSR) 517 518 /* Only enter here if response just received */ 519 /* 27 HILSEN_DISC */ 520 OUT_DISC(HIL_PKT_CMD | HIL_CMD_IDD) 521 EXPECT_DISC(HIL_PKT_CMD | HIL_CMD_IDD | HIL_ERR_INT, 522 20000, HILSEN_NEXT, HILSEN_DSR, HILSEN_START) 523 FUNC(hilse_inc_ddi, 0, HILSEN_NEXT, HILSEN_START, 0) 524 FUNC(hilse_take_idd, 0, HILSEN_MATCH, HILSEN_IFCACF, HILSEN_FOLLOW) 525 OUT_LAST(HIL_PKT_CMD | HIL_CMD_RSC) 526 EXPECT_LAST(HIL_PKT_CMD | HIL_CMD_RSC | HIL_ERR_INT, 527 30000, HILSEN_NEXT, HILSEN_DSR, HILSEN_DSR) 528 FUNC(hilse_take_rsc, 0, HILSEN_MATCH, 0, HILSEN_FOLLOW) 529 OUT_LAST(HIL_PKT_CMD | HIL_CMD_EXD) 530 EXPECT_LAST(HIL_PKT_CMD | HIL_CMD_EXD | HIL_ERR_INT, 531 30000, HILSEN_NEXT, HILSEN_DSR, HILSEN_DSR) 532 FUNC(hilse_take_exd, 0, HILSEN_MATCH, 0, HILSEN_FOLLOW) 533 OUT_LAST(HIL_PKT_CMD | HIL_CMD_RNM) 534 EXPECT_LAST(HIL_PKT_CMD | HIL_CMD_RNM | HIL_ERR_INT, 535 30000, HILSEN_NEXT, HILSEN_DSR, HILSEN_DSR) 536 FUNC(hilse_take_rnm, 0, HILSEN_MATCH, 0, 0) 537 538 /* 40 HILSEN_MATCH */ 539 FUNC(hilse_match, 0, HILSEN_NEXT, HILSEN_NEXT, /* TODO */ 0) 540 541 /* 41 HILSEN_OPERATE */ 542 OUT(HIL_PKT_CMD | HIL_CMD_POL) 543 EXPECT(HIL_PKT_CMD | HIL_CMD_POL | HIL_ERR_INT, 544 20000, HILSEN_NEXT, HILSEN_DSR, HILSEN_NEXT) 545 FUNC(hilse_operate, 0, HILSEN_OPERATE, HILSEN_IFC, HILSEN_NEXT) 546 547 /* 44 HILSEN_PROBE */ 548 OUT_LAST(HIL_PKT_CMD | HIL_CMD_EPT) 549 IN(10000, HILSEN_DISC, HILSEN_DSR, HILSEN_NEXT) 550 OUT_DISC(HIL_PKT_CMD | HIL_CMD_ELB) 551 IN(10000, HILSEN_DISC, HILSEN_DSR, HILSEN_NEXT) 552 OUT(HIL_PKT_CMD | HIL_CMD_ACF | 1) 553 IN(10000, HILSEN_DISC0, HILSEN_DSR, HILSEN_NEXT) 554 OUT_LAST(HIL_PKT_CMD | HIL_CMD_ELB) 555 IN(10000, HILSEN_OPERATE, HILSEN_DSR, HILSEN_DSR) 556 557 /* 52 HILSEN_DSR */ 558 FUNC(hilse_set_ddi, -1, HILSEN_NEXT, 0, 0) 559 OUT(HIL_PKT_CMD | HIL_CMD_DSR) 560 IN(20000, HILSEN_DHR, HILSEN_DHR, HILSEN_IFC) 561 562 /* 55 HILSEN_REPOLL */ 563 OUT(HIL_PKT_CMD | HIL_CMD_RPL) 564 EXPECT(HIL_PKT_CMD | HIL_CMD_RPL | HIL_ERR_INT, 565 20000, HILSEN_NEXT, HILSEN_DSR, HILSEN_NEXT) 566 FUNC(hilse_operate, 1, HILSEN_OPERATE, HILSEN_IFC, HILSEN_PROBE) 567 568 /* 58 HILSEN_IFCACF */ 569 OUT(HIL_PKT_CMD | HIL_CMD_IFC) 570 EXPECT(HIL_PKT_CMD | HIL_CMD_IFC | HIL_ERR_INT, 571 20000, HILSEN_ACF2, HILSEN_DHR2, HILSEN_HEAL) 572 573 /* 60 HILSEN_END */ 574}; 575 576static inline void hilse_setup_input(hil_mlc *mlc, const struct hilse_node *node) 577{ 578 579 switch (node->act) { 580 case HILSE_EXPECT_DISC: 581 mlc->imatch = node->object.packet; 582 mlc->imatch |= ((mlc->ddi + 2) << HIL_PKT_ADDR_SHIFT); 583 break; 584 case HILSE_EXPECT_LAST: 585 mlc->imatch = node->object.packet; 586 mlc->imatch |= ((mlc->ddi + 1) << HIL_PKT_ADDR_SHIFT); 587 break; 588 case HILSE_EXPECT: 589 mlc->imatch = node->object.packet; 590 break; 591 case HILSE_IN: 592 mlc->imatch = 0; 593 break; 594 default: 595 BUG(); 596 } 597 mlc->istarted = 1; 598 mlc->intimeout = node->arg; 599 do_gettimeofday(&(mlc->instart)); 600 mlc->icount = 15; 601 memset(mlc->ipacket, 0, 16 * sizeof(hil_packet)); 602 BUG_ON(down_trylock(&mlc->isem)); 603} 604 605#ifdef HIL_MLC_DEBUG 606static int doze; 607static int seidx; /* For debug */ 608#endif 609 610static int hilse_donode(hil_mlc *mlc) 611{ 612 const struct hilse_node *node; 613 int nextidx = 0; 614 int sched_long = 0; 615 unsigned long flags; 616 617#ifdef HIL_MLC_DEBUG 618 if (mlc->seidx && mlc->seidx != seidx && 619 mlc->seidx != 41 && mlc->seidx != 42 && mlc->seidx != 43) { 620 printk(KERN_DEBUG PREFIX "z%i \n {%i}", doze, mlc->seidx); 621 doze = 0; 622 } 623 624 seidx = mlc->seidx; 625#endif 626 node = hil_mlc_se + mlc->seidx; 627 628 switch (node->act) { 629 int rc; 630 hil_packet pack; 631 632 case HILSE_FUNC: 633 BUG_ON(node->object.func == NULL); 634 rc = node->object.func(mlc, node->arg); 635 nextidx = (rc > 0) ? node->ugly : 636 ((rc < 0) ? node->bad : node->good); 637 if (nextidx == HILSEN_FOLLOW) 638 nextidx = rc; 639 break; 640 641 case HILSE_EXPECT_LAST: 642 case HILSE_EXPECT_DISC: 643 case HILSE_EXPECT: 644 case HILSE_IN: 645 /* Already set up from previous HILSE_OUT_* */ 646 write_lock_irqsave(&mlc->lock, flags); 647 rc = mlc->in(mlc, node->arg); 648 if (rc == 2) { 649 nextidx = HILSEN_DOZE; 650 sched_long = 1; 651 write_unlock_irqrestore(&mlc->lock, flags); 652 break; 653 } 654 if (rc == 1) 655 nextidx = node->ugly; 656 else if (rc == 0) 657 nextidx = node->good; 658 else 659 nextidx = node->bad; 660 mlc->istarted = 0; 661 write_unlock_irqrestore(&mlc->lock, flags); 662 break; 663 664 case HILSE_OUT_LAST: 665 write_lock_irqsave(&mlc->lock, flags); 666 pack = node->object.packet; 667 pack |= ((mlc->ddi + 1) << HIL_PKT_ADDR_SHIFT); 668 goto out; 669 670 case HILSE_OUT_DISC: 671 write_lock_irqsave(&mlc->lock, flags); 672 pack = node->object.packet; 673 pack |= ((mlc->ddi + 2) << HIL_PKT_ADDR_SHIFT); 674 goto out; 675 676 case HILSE_OUT: 677 write_lock_irqsave(&mlc->lock, flags); 678 pack = node->object.packet; 679 out: 680 if (mlc->istarted) 681 goto out2; 682 /* Prepare to receive input */ 683 if ((node + 1)->act & HILSE_IN) 684 hilse_setup_input(mlc, node + 1); 685 686 out2: 687 write_unlock_irqrestore(&mlc->lock, flags); 688 689 if (down_trylock(&mlc->osem)) { 690 nextidx = HILSEN_DOZE; 691 break; 692 } 693 up(&mlc->osem); 694 695 write_lock_irqsave(&mlc->lock, flags); 696 if (!mlc->ostarted) { 697 mlc->ostarted = 1; 698 mlc->opacket = pack; 699 mlc->out(mlc); 700 nextidx = HILSEN_DOZE; 701 write_unlock_irqrestore(&mlc->lock, flags); 702 break; 703 } 704 mlc->ostarted = 0; 705 do_gettimeofday(&(mlc->instart)); 706 write_unlock_irqrestore(&mlc->lock, flags); 707 nextidx = HILSEN_NEXT; 708 break; 709 710 case HILSE_CTS: 711 write_lock_irqsave(&mlc->lock, flags); 712 nextidx = mlc->cts(mlc) ? node->bad : node->good; 713 write_unlock_irqrestore(&mlc->lock, flags); 714 break; 715 716 default: 717 BUG(); 718 } 719 720#ifdef HIL_MLC_DEBUG 721 if (nextidx == HILSEN_DOZE) 722 doze++; 723#endif 724 725 while (nextidx & HILSEN_SCHED) { 726 struct timeval tv; 727 728 if (!sched_long) 729 goto sched; 730 731 do_gettimeofday(&tv); 732 tv.tv_usec += USEC_PER_SEC * (tv.tv_sec - mlc->instart.tv_sec); 733 tv.tv_usec -= mlc->instart.tv_usec; 734 if (tv.tv_usec >= mlc->intimeout) goto sched; 735 tv.tv_usec = (mlc->intimeout - tv.tv_usec) * HZ / USEC_PER_SEC; 736 if (!tv.tv_usec) goto sched; 737 mod_timer(&hil_mlcs_kicker, jiffies + tv.tv_usec); 738 break; 739 sched: 740 tasklet_schedule(&hil_mlcs_tasklet); 741 break; 742 } 743 744 if (nextidx & HILSEN_DOWN) 745 mlc->seidx += nextidx & HILSEN_MASK; 746 else if (nextidx & HILSEN_UP) 747 mlc->seidx -= nextidx & HILSEN_MASK; 748 else 749 mlc->seidx = nextidx & HILSEN_MASK; 750 751 if (nextidx & HILSEN_BREAK) 752 return 1; 753 754 return 0; 755} 756 757/******************** tasklet context functions **************************/ 758static void hil_mlcs_process(unsigned long unused) 759{ 760 struct list_head *tmp; 761 762 read_lock(&hil_mlcs_lock); 763 list_for_each(tmp, &hil_mlcs) { 764 struct hil_mlc *mlc = list_entry(tmp, hil_mlc, list); 765 while (hilse_donode(mlc) == 0) { 766#ifdef HIL_MLC_DEBUG 767 if (mlc->seidx != 41 && 768 mlc->seidx != 42 && 769 mlc->seidx != 43) 770 printk(KERN_DEBUG PREFIX " + "); 771#endif 772 } 773 } 774 read_unlock(&hil_mlcs_lock); 775} 776 777/************************* Keepalive timer task *********************/ 778 779void hil_mlcs_timer(unsigned long data) 780{ 781 hil_mlcs_probe = 1; 782 tasklet_schedule(&hil_mlcs_tasklet); 783 /* Re-insert the periodic task. */ 784 if (!timer_pending(&hil_mlcs_kicker)) 785 mod_timer(&hil_mlcs_kicker, jiffies + HZ); 786} 787 788/******************** user/kernel context functions **********************/ 789 790static int hil_mlc_serio_write(struct serio *serio, unsigned char c) 791{ 792 struct hil_mlc_serio_map *map; 793 struct hil_mlc *mlc; 794 struct serio_driver *drv; 795 uint8_t *idx, *last; 796 797 map = serio->port_data; 798 BUG_ON(map == NULL); 799 800 mlc = map->mlc; 801 BUG_ON(mlc == NULL); 802 803 mlc->serio_opacket[map->didx] |= 804 ((hil_packet)c) << (8 * (3 - mlc->serio_oidx[map->didx])); 805 806 if (mlc->serio_oidx[map->didx] >= 3) { 807 /* for now only commands */ 808 if (!(mlc->serio_opacket[map->didx] & HIL_PKT_CMD)) 809 return -EIO; 810 switch (mlc->serio_opacket[map->didx] & HIL_PKT_DATA_MASK) { 811 case HIL_CMD_IDD: 812 idx = mlc->di[map->didx].idd; 813 goto emu; 814 case HIL_CMD_RSC: 815 idx = mlc->di[map->didx].rsc; 816 goto emu; 817 case HIL_CMD_EXD: 818 idx = mlc->di[map->didx].exd; 819 goto emu; 820 case HIL_CMD_RNM: 821 idx = mlc->di[map->didx].rnm; 822 goto emu; 823 default: 824 break; 825 } 826 mlc->serio_oidx[map->didx] = 0; 827 mlc->serio_opacket[map->didx] = 0; 828 } 829 830 mlc->serio_oidx[map->didx]++; 831 return -EIO; 832 emu: 833 drv = serio->drv; 834 BUG_ON(drv == NULL); 835 836 last = idx + 15; 837 while ((last != idx) && (*last == 0)) 838 last--; 839 840 while (idx != last) { 841 drv->interrupt(serio, 0, 0); 842 drv->interrupt(serio, HIL_ERR_INT >> 16, 0); 843 drv->interrupt(serio, 0, 0); 844 drv->interrupt(serio, *idx, 0); 845 idx++; 846 } 847 drv->interrupt(serio, 0, 0); 848 drv->interrupt(serio, HIL_ERR_INT >> 16, 0); 849 drv->interrupt(serio, HIL_PKT_CMD >> 8, 0); 850 drv->interrupt(serio, *idx, 0); 851 852 mlc->serio_oidx[map->didx] = 0; 853 mlc->serio_opacket[map->didx] = 0; 854 855 return 0; 856} 857 858static int hil_mlc_serio_open(struct serio *serio) 859{ 860 struct hil_mlc_serio_map *map; 861 struct hil_mlc *mlc; 862 863 if (serio_get_drvdata(serio) != NULL) 864 return -EBUSY; 865 866 map = serio->port_data; 867 BUG_ON(map == NULL); 868 869 mlc = map->mlc; 870 BUG_ON(mlc == NULL); 871 872 return 0; 873} 874 875static void hil_mlc_serio_close(struct serio *serio) 876{ 877 struct hil_mlc_serio_map *map; 878 struct hil_mlc *mlc; 879 880 map = serio->port_data; 881 BUG_ON(map == NULL); 882 883 mlc = map->mlc; 884 BUG_ON(mlc == NULL); 885 886 serio_set_drvdata(serio, NULL); 887 serio->drv = NULL; 888 /* TODO wake up interruptable */ 889} 890 891static const struct serio_device_id hil_mlc_serio_id = { 892 .type = SERIO_HIL_MLC, 893 .proto = SERIO_HIL, 894 .extra = SERIO_ANY, 895 .id = SERIO_ANY, 896}; 897 898int hil_mlc_register(hil_mlc *mlc) 899{ 900 int i; 901 unsigned long flags; 902 903 BUG_ON(mlc == NULL); 904 905 mlc->istarted = 0; 906 mlc->ostarted = 0; 907 908 rwlock_init(&mlc->lock); 909 init_MUTEX(&mlc->osem); 910 911 init_MUTEX(&mlc->isem); 912 mlc->icount = -1; 913 mlc->imatch = 0; 914 915 mlc->opercnt = 0; 916 917 init_MUTEX_LOCKED(&(mlc->csem)); 918 919 hil_mlc_clear_di_scratch(mlc); 920 hil_mlc_clear_di_map(mlc, 0); 921 for (i = 0; i < HIL_MLC_DEVMEM; i++) { 922 struct serio *mlc_serio; 923 hil_mlc_copy_di_scratch(mlc, i); 924 mlc_serio = kzalloc(sizeof(*mlc_serio), GFP_KERNEL); 925 mlc->serio[i] = mlc_serio; 926 snprintf(mlc_serio->name, sizeof(mlc_serio->name)-1, "HIL_SERIO%d", i); 927 snprintf(mlc_serio->phys, sizeof(mlc_serio->phys)-1, "HIL%d", i); 928 mlc_serio->id = hil_mlc_serio_id; 929 mlc_serio->write = hil_mlc_serio_write; 930 mlc_serio->open = hil_mlc_serio_open; 931 mlc_serio->close = hil_mlc_serio_close; 932 mlc_serio->port_data = &(mlc->serio_map[i]); 933 mlc->serio_map[i].mlc = mlc; 934 mlc->serio_map[i].didx = i; 935 mlc->serio_map[i].di_revmap = -1; 936 mlc->serio_opacket[i] = 0; 937 mlc->serio_oidx[i] = 0; 938 serio_register_port(mlc_serio); 939 } 940 941 mlc->tasklet = &hil_mlcs_tasklet; 942 943 write_lock_irqsave(&hil_mlcs_lock, flags); 944 list_add_tail(&mlc->list, &hil_mlcs); 945 mlc->seidx = HILSEN_START; 946 write_unlock_irqrestore(&hil_mlcs_lock, flags); 947 948 tasklet_schedule(&hil_mlcs_tasklet); 949 return 0; 950} 951 952int hil_mlc_unregister(hil_mlc *mlc) 953{ 954 struct list_head *tmp; 955 unsigned long flags; 956 int i; 957 958 BUG_ON(mlc == NULL); 959 960 write_lock_irqsave(&hil_mlcs_lock, flags); 961 list_for_each(tmp, &hil_mlcs) 962 if (list_entry(tmp, hil_mlc, list) == mlc) 963 goto found; 964 965 /* not found in list */ 966 write_unlock_irqrestore(&hil_mlcs_lock, flags); 967 tasklet_schedule(&hil_mlcs_tasklet); 968 return -ENODEV; 969 970 found: 971 list_del(tmp); 972 write_unlock_irqrestore(&hil_mlcs_lock, flags); 973 974 for (i = 0; i < HIL_MLC_DEVMEM; i++) { 975 serio_unregister_port(mlc->serio[i]); 976 mlc->serio[i] = NULL; 977 } 978 979 tasklet_schedule(&hil_mlcs_tasklet); 980 return 0; 981} 982 983/**************************** Module interface *************************/ 984 985static int __init hil_mlc_init(void) 986{ 987 init_timer(&hil_mlcs_kicker); 988 hil_mlcs_kicker.expires = jiffies + HZ; 989 hil_mlcs_kicker.function = &hil_mlcs_timer; 990 add_timer(&hil_mlcs_kicker); 991 992 tasklet_enable(&hil_mlcs_tasklet); 993 994 return 0; 995} 996 997static void __exit hil_mlc_exit(void) 998{ 999 del_timer(&hil_mlcs_kicker); 1000 1001 tasklet_disable(&hil_mlcs_tasklet); 1002 tasklet_kill(&hil_mlcs_tasklet); 1003} 1004 1005module_init(hil_mlc_init); 1006module_exit(hil_mlc_exit); 1007