1/* linux/drivers/char/pc8736x_gpio.c
2
3   National Semiconductor PC8736x GPIO driver.  Allows a user space
4   process to play with the GPIO pins.
5
6   Copyright (c) 2005,2006 Jim Cromie <jim.cromie@gmail.com>
7
8   adapted from linux/drivers/char/scx200_gpio.c
9   Copyright (c) 2001,2002 Christer Weinigel <wingel@nano-system.com>,
10*/
11
12#include <linux/fs.h>
13#include <linux/module.h>
14#include <linux/errno.h>
15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/cdev.h>
18#include <linux/io.h>
19#include <linux/ioport.h>
20#include <linux/mutex.h>
21#include <linux/nsc_gpio.h>
22#include <linux/platform_device.h>
23#include <asm/uaccess.h>
24
25#define DEVNAME "pc8736x_gpio"
26
27MODULE_AUTHOR("Jim Cromie <jim.cromie@gmail.com>");
28MODULE_DESCRIPTION("NatSemi/Winbond PC-8736x GPIO Pin Driver");
29MODULE_LICENSE("GPL");
30
31static int major;		/* default to dynamic major */
32module_param(major, int, 0);
33MODULE_PARM_DESC(major, "Major device number");
34
35static DEFINE_MUTEX(pc8736x_gpio_config_lock);
36static unsigned pc8736x_gpio_base;
37static u8 pc8736x_gpio_shadow[4];
38
39#define SIO_BASE1       0x2E	/* 1st command-reg to check */
40#define SIO_BASE2       0x4E	/* alt command-reg to check */
41
42#define SIO_SID		0x20	/* SuperI/O ID Register */
43#define SIO_SID_VALUE	0xe9	/* Expected value in SuperI/O ID Register */
44
45#define SIO_CF1		0x21	/* chip config, bit0 is chip enable */
46
47#define PC8736X_GPIO_RANGE	16 /* ioaddr range */
48#define PC8736X_GPIO_CT		32 /* minors matching 4 8 bit ports */
49
50#define SIO_UNIT_SEL	0x7	/* unit select reg */
51#define SIO_UNIT_ACT	0x30	/* unit enable */
52#define SIO_GPIO_UNIT	0x7	/* unit number of GPIO */
53#define SIO_VLM_UNIT	0x0D
54#define SIO_TMS_UNIT	0x0E
55
56/* config-space addrs to read/write each unit's runtime addr */
57#define SIO_BASE_HADDR		0x60
58#define SIO_BASE_LADDR		0x61
59
60/* GPIO config-space pin-control addresses */
61#define SIO_GPIO_PIN_SELECT	0xF0
62#define SIO_GPIO_PIN_CONFIG     0xF1
63#define SIO_GPIO_PIN_EVENT      0xF2
64
65static unsigned char superio_cmd = 0;
66static unsigned char selected_device = 0xFF;	/* bogus start val */
67
68/* GPIO port runtime access, functionality */
69static int port_offset[] = { 0, 4, 8, 10 };	/* non-uniform offsets ! */
70/* static int event_capable[] = { 1, 1, 0, 0 };   ports 2,3 are hobbled */
71
72#define PORT_OUT	0
73#define PORT_IN		1
74#define PORT_EVT_EN	2
75#define PORT_EVT_STST	3
76
77static struct platform_device *pdev;  /* use in dev_*() */
78
79static inline void superio_outb(int addr, int val)
80{
81	outb_p(addr, superio_cmd);
82	outb_p(val, superio_cmd + 1);
83}
84
85static inline int superio_inb(int addr)
86{
87	outb_p(addr, superio_cmd);
88	return inb_p(superio_cmd + 1);
89}
90
91static int pc8736x_superio_present(void)
92{
93	/* try the 2 possible values, read a hardware reg to verify */
94	superio_cmd = SIO_BASE1;
95	if (superio_inb(SIO_SID) == SIO_SID_VALUE)
96		return superio_cmd;
97
98	superio_cmd = SIO_BASE2;
99	if (superio_inb(SIO_SID) == SIO_SID_VALUE)
100		return superio_cmd;
101
102	return 0;
103}
104
105static void device_select(unsigned devldn)
106{
107	superio_outb(SIO_UNIT_SEL, devldn);
108	selected_device = devldn;
109}
110
111static void select_pin(unsigned iminor)
112{
113	/* select GPIO port/pin from device minor number */
114	device_select(SIO_GPIO_UNIT);
115	superio_outb(SIO_GPIO_PIN_SELECT,
116		     ((iminor << 1) & 0xF0) | (iminor & 0x7));
117}
118
119static inline u32 pc8736x_gpio_configure_fn(unsigned index, u32 mask, u32 bits,
120					    u32 func_slct)
121{
122	u32 config, new_config;
123
124	mutex_lock(&pc8736x_gpio_config_lock);
125
126	device_select(SIO_GPIO_UNIT);
127	select_pin(index);
128
129	/* read current config value */
130	config = superio_inb(func_slct);
131
132	/* set new config */
133	new_config = (config & mask) | bits;
134	superio_outb(func_slct, new_config);
135
136	mutex_unlock(&pc8736x_gpio_config_lock);
137
138	return config;
139}
140
141static u32 pc8736x_gpio_configure(unsigned index, u32 mask, u32 bits)
142{
143	return pc8736x_gpio_configure_fn(index, mask, bits,
144					 SIO_GPIO_PIN_CONFIG);
145}
146
147static int pc8736x_gpio_get(unsigned minor)
148{
149	int port, bit, val;
150
151	port = minor >> 3;
152	bit = minor & 7;
153	val = inb_p(pc8736x_gpio_base + port_offset[port] + PORT_IN);
154	val >>= bit;
155	val &= 1;
156
157	dev_dbg(&pdev->dev, "_gpio_get(%d from %x bit %d) == val %d\n",
158		minor, pc8736x_gpio_base + port_offset[port] + PORT_IN, bit,
159		val);
160
161	return val;
162}
163
164static void pc8736x_gpio_set(unsigned minor, int val)
165{
166	int port, bit, curval;
167
168	minor &= 0x1f;
169	port = minor >> 3;
170	bit = minor & 7;
171	curval = inb_p(pc8736x_gpio_base + port_offset[port] + PORT_OUT);
172
173	dev_dbg(&pdev->dev, "addr:%x cur:%x bit-pos:%d cur-bit:%x + new:%d -> bit-new:%d\n",
174		pc8736x_gpio_base + port_offset[port] + PORT_OUT,
175		curval, bit, (curval & ~(1 << bit)), val, (val << bit));
176
177	val = (curval & ~(1 << bit)) | (val << bit);
178
179	dev_dbg(&pdev->dev, "gpio_set(minor:%d port:%d bit:%d)"
180		" %2x -> %2x\n", minor, port, bit, curval, val);
181
182	outb_p(val, pc8736x_gpio_base + port_offset[port] + PORT_OUT);
183
184	curval = inb_p(pc8736x_gpio_base + port_offset[port] + PORT_OUT);
185	val = inb_p(pc8736x_gpio_base + port_offset[port] + PORT_IN);
186
187	dev_dbg(&pdev->dev, "wrote %x, read: %x\n", curval, val);
188	pc8736x_gpio_shadow[port] = val;
189}
190
191static int pc8736x_gpio_current(unsigned minor)
192{
193	int port, bit;
194	minor &= 0x1f;
195	port = minor >> 3;
196	bit = minor & 7;
197	return ((pc8736x_gpio_shadow[port] >> bit) & 0x01);
198}
199
200static void pc8736x_gpio_change(unsigned index)
201{
202	pc8736x_gpio_set(index, !pc8736x_gpio_current(index));
203}
204
205static struct nsc_gpio_ops pc8736x_gpio_ops = {
206	.owner		= THIS_MODULE,
207	.gpio_config	= pc8736x_gpio_configure,
208	.gpio_dump	= nsc_gpio_dump,
209	.gpio_get	= pc8736x_gpio_get,
210	.gpio_set	= pc8736x_gpio_set,
211	.gpio_change	= pc8736x_gpio_change,
212	.gpio_current	= pc8736x_gpio_current
213};
214
215static int pc8736x_gpio_open(struct inode *inode, struct file *file)
216{
217	unsigned m = iminor(inode);
218	file->private_data = &pc8736x_gpio_ops;
219
220	dev_dbg(&pdev->dev, "open %d\n", m);
221
222	if (m >= PC8736X_GPIO_CT)
223		return -EINVAL;
224	return nonseekable_open(inode, file);
225}
226
227static const struct file_operations pc8736x_gpio_fileops = {
228	.owner	= THIS_MODULE,
229	.open	= pc8736x_gpio_open,
230	.write	= nsc_gpio_write,
231	.read	= nsc_gpio_read,
232};
233
234static void __init pc8736x_init_shadow(void)
235{
236	int port;
237
238	/* read the current values driven on the GPIO signals */
239	for (port = 0; port < 4; ++port)
240		pc8736x_gpio_shadow[port]
241		    = inb_p(pc8736x_gpio_base + port_offset[port]
242			    + PORT_OUT);
243
244}
245
246static struct cdev pc8736x_gpio_cdev;
247
248static int __init pc8736x_gpio_init(void)
249{
250	int rc;
251	dev_t devid;
252
253	pdev = platform_device_alloc(DEVNAME, 0);
254	if (!pdev)
255		return -ENOMEM;
256
257	rc = platform_device_add(pdev);
258	if (rc) {
259		rc = -ENODEV;
260		goto undo_platform_dev_alloc;
261	}
262	dev_info(&pdev->dev, "NatSemi pc8736x GPIO Driver Initializing\n");
263
264	if (!pc8736x_superio_present()) {
265		rc = -ENODEV;
266		dev_err(&pdev->dev, "no device found\n");
267		goto undo_platform_dev_add;
268	}
269	pc8736x_gpio_ops.dev = &pdev->dev;
270
271	/* Verify that chip and it's GPIO unit are both enabled.
272	   My BIOS does this, so I take minimum action here
273	 */
274	rc = superio_inb(SIO_CF1);
275	if (!(rc & 0x01)) {
276		rc = -ENODEV;
277		dev_err(&pdev->dev, "device not enabled\n");
278		goto undo_platform_dev_add;
279	}
280	device_select(SIO_GPIO_UNIT);
281	if (!superio_inb(SIO_UNIT_ACT)) {
282		rc = -ENODEV;
283		dev_err(&pdev->dev, "GPIO unit not enabled\n");
284		goto undo_platform_dev_add;
285	}
286
287	/* read the GPIO unit base addr that chip responds to */
288	pc8736x_gpio_base = (superio_inb(SIO_BASE_HADDR) << 8
289			     | superio_inb(SIO_BASE_LADDR));
290
291	if (!request_region(pc8736x_gpio_base, PC8736X_GPIO_RANGE, DEVNAME)) {
292		rc = -ENODEV;
293		dev_err(&pdev->dev, "GPIO ioport %x busy\n",
294			pc8736x_gpio_base);
295		goto undo_platform_dev_add;
296	}
297	dev_info(&pdev->dev, "GPIO ioport %x reserved\n", pc8736x_gpio_base);
298
299	if (major) {
300		devid = MKDEV(major, 0);
301		rc = register_chrdev_region(devid, PC8736X_GPIO_CT, DEVNAME);
302	} else {
303		rc = alloc_chrdev_region(&devid, 0, PC8736X_GPIO_CT, DEVNAME);
304		major = MAJOR(devid);
305	}
306
307	if (rc < 0) {
308		dev_err(&pdev->dev, "register-chrdev failed: %d\n", rc);
309		goto undo_request_region;
310	}
311	if (!major) {
312		major = rc;
313		dev_dbg(&pdev->dev, "got dynamic major %d\n", major);
314	}
315
316	pc8736x_init_shadow();
317
318	/* ignore minor errs, and succeed */
319	cdev_init(&pc8736x_gpio_cdev, &pc8736x_gpio_fileops);
320	cdev_add(&pc8736x_gpio_cdev, devid, PC8736X_GPIO_CT);
321
322	return 0;
323
324undo_request_region:
325	release_region(pc8736x_gpio_base, PC8736X_GPIO_RANGE);
326undo_platform_dev_add:
327	platform_device_del(pdev);
328undo_platform_dev_alloc:
329	platform_device_put(pdev);
330
331	return rc;
332}
333
334static void __exit pc8736x_gpio_cleanup(void)
335{
336	dev_dbg(&pdev->dev, "cleanup\n");
337
338	cdev_del(&pc8736x_gpio_cdev);
339	unregister_chrdev_region(MKDEV(major,0), PC8736X_GPIO_CT);
340	release_region(pc8736x_gpio_base, PC8736X_GPIO_RANGE);
341
342	platform_device_del(pdev);
343	platform_device_put(pdev);
344}
345
346module_init(pc8736x_gpio_init);
347module_exit(pc8736x_gpio_cleanup);
348