1/* 2 * arch/xtensa/kernel/pci.c 3 * 4 * PCI bios-type initialisation for PCI machines 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License as published by the 8 * Free Software Foundation; either version 2 of the License, or (at your 9 * option) any later version. 10 * 11 * Copyright (C) 2001-2005 Tensilica Inc. 12 * 13 * Based largely on work from Cort (ppc/kernel/pci.c) 14 * IO functions copied from sparc. 15 * 16 * Chris Zankel <chris@zankel.net> 17 * 18 */ 19 20#include <linux/kernel.h> 21#include <linux/pci.h> 22#include <linux/delay.h> 23#include <linux/string.h> 24#include <linux/init.h> 25#include <linux/sched.h> 26#include <linux/errno.h> 27#include <linux/bootmem.h> 28 29#include <asm/pci-bridge.h> 30#include <asm/platform.h> 31 32#undef DEBUG 33 34#ifdef DEBUG 35#define DBG(x...) printk(x) 36#else 37#define DBG(x...) 38#endif 39 40/* PCI Controller */ 41 42 43/* 44 * pcibios_alloc_controller 45 * pcibios_enable_device 46 * pcibios_fixups 47 * pcibios_align_resource 48 * pcibios_fixup_bus 49 * pcibios_setup 50 * pci_bus_add_device 51 * pci_mmap_page_range 52 */ 53 54struct pci_controller* pci_ctrl_head; 55struct pci_controller** pci_ctrl_tail = &pci_ctrl_head; 56 57static int pci_bus_count; 58 59/* 60 * We need to avoid collisions with `mirrored' VGA ports 61 * and other strange ISA hardware, so we always want the 62 * addresses to be allocated in the 0x000-0x0ff region 63 * modulo 0x400. 64 * 65 * Why? Because some silly external IO cards only decode 66 * the low 10 bits of the IO address. The 0x00-0xff region 67 * is reserved for motherboard devices that decode all 16 68 * bits, so it's ok to allocate at, say, 0x2800-0x28ff, 69 * but we want to try to avoid allocating at 0x2900-0x2bff 70 * which might have be mirrored at 0x0100-0x03ff.. 71 */ 72void 73pcibios_align_resource(void *data, struct resource *res, resource_size_t size, 74 resource_size_t align) 75{ 76 struct pci_dev *dev = data; 77 78 if (res->flags & IORESOURCE_IO) { 79 resource_size_t start = res->start; 80 81 if (size > 0x100) { 82 printk(KERN_ERR "PCI: I/O Region %s/%d too large" 83 " (%ld bytes)\n", pci_name(dev), 84 dev->resource - res, size); 85 } 86 87 if (start & 0x300) { 88 start = (start + 0x3ff) & ~0x3ff; 89 res->start = start; 90 } 91 } 92} 93 94int 95pcibios_enable_resources(struct pci_dev *dev, int mask) 96{ 97 u16 cmd, old_cmd; 98 int idx; 99 struct resource *r; 100 101 pci_read_config_word(dev, PCI_COMMAND, &cmd); 102 old_cmd = cmd; 103 for(idx=0; idx<6; idx++) { 104 r = &dev->resource[idx]; 105 if (!r->start && r->end) { 106 printk (KERN_ERR "PCI: Device %s not available because " 107 "of resource collisions\n", pci_name(dev)); 108 return -EINVAL; 109 } 110 if (r->flags & IORESOURCE_IO) 111 cmd |= PCI_COMMAND_IO; 112 if (r->flags & IORESOURCE_MEM) 113 cmd |= PCI_COMMAND_MEMORY; 114 } 115 if (dev->resource[PCI_ROM_RESOURCE].start) 116 cmd |= PCI_COMMAND_MEMORY; 117 if (cmd != old_cmd) { 118 printk("PCI: Enabling device %s (%04x -> %04x)\n", 119 pci_name(dev), old_cmd, cmd); 120 pci_write_config_word(dev, PCI_COMMAND, cmd); 121 } 122 return 0; 123} 124 125struct pci_controller * __init pcibios_alloc_controller(void) 126{ 127 struct pci_controller *pci_ctrl; 128 129 pci_ctrl = (struct pci_controller *)alloc_bootmem(sizeof(*pci_ctrl)); 130 memset(pci_ctrl, 0, sizeof(struct pci_controller)); 131 132 *pci_ctrl_tail = pci_ctrl; 133 pci_ctrl_tail = &pci_ctrl->next; 134 135 return pci_ctrl; 136} 137 138static int __init pcibios_init(void) 139{ 140 struct pci_controller *pci_ctrl; 141 struct pci_bus *bus; 142 int next_busno = 0, i; 143 144 printk("PCI: Probing PCI hardware\n"); 145 146 /* Scan all of the recorded PCI controllers. */ 147 for (pci_ctrl = pci_ctrl_head; pci_ctrl; pci_ctrl = pci_ctrl->next) { 148 pci_ctrl->last_busno = 0xff; 149 bus = pci_scan_bus(pci_ctrl->first_busno, pci_ctrl->ops, 150 pci_ctrl); 151 if (pci_ctrl->io_resource.flags) { 152 unsigned long offs; 153 154 offs = (unsigned long)pci_ctrl->io_space.base; 155 pci_ctrl->io_resource.start += offs; 156 pci_ctrl->io_resource.end += offs; 157 bus->resource[0] = &pci_ctrl->io_resource; 158 } 159 for (i = 0; i < 3; ++i) 160 if (pci_ctrl->mem_resources[i].flags) 161 bus->resource[i+1] =&pci_ctrl->mem_resources[i]; 162 pci_ctrl->bus = bus; 163 pci_ctrl->last_busno = bus->subordinate; 164 if (next_busno <= pci_ctrl->last_busno) 165 next_busno = pci_ctrl->last_busno+1; 166 } 167 pci_bus_count = next_busno; 168 169 return platform_pcibios_fixup(); 170} 171 172subsys_initcall(pcibios_init); 173 174void __init pcibios_fixup_bus(struct pci_bus *bus) 175{ 176 struct pci_controller *pci_ctrl = bus->sysdata; 177 struct resource *res; 178 unsigned long io_offset; 179 int i; 180 181 io_offset = (unsigned long)pci_ctrl->io_space.base; 182 if (bus->parent == NULL) { 183 /* this is a host bridge - fill in its resources */ 184 pci_ctrl->bus = bus; 185 186 bus->resource[0] = res = &pci_ctrl->io_resource; 187 if (!res->flags) { 188 if (io_offset) 189 printk (KERN_ERR "I/O resource not set for host" 190 " bridge %d\n", pci_ctrl->index); 191 res->start = 0; 192 res->end = IO_SPACE_LIMIT; 193 res->flags = IORESOURCE_IO; 194 } 195 res->start += io_offset; 196 res->end += io_offset; 197 198 for (i = 0; i < 3; i++) { 199 res = &pci_ctrl->mem_resources[i]; 200 if (!res->flags) { 201 if (i > 0) 202 continue; 203 printk(KERN_ERR "Memory resource not set for " 204 "host bridge %d\n", pci_ctrl->index); 205 res->start = 0; 206 res->end = ~0U; 207 res->flags = IORESOURCE_MEM; 208 } 209 bus->resource[i+1] = res; 210 } 211 } else { 212 /* This is a subordinate bridge */ 213 pci_read_bridge_bases(bus); 214 215 for (i = 0; i < 4; i++) { 216 if ((res = bus->resource[i]) == NULL || !res->flags) 217 continue; 218 if (io_offset && (res->flags & IORESOURCE_IO)) { 219 res->start += io_offset; 220 res->end += io_offset; 221 } 222 } 223 } 224} 225 226char __init *pcibios_setup(char *str) 227{ 228 return str; 229} 230 231/* the next one is stolen from the alpha port... */ 232 233void __init 234pcibios_update_irq(struct pci_dev *dev, int irq) 235{ 236 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq); 237} 238 239int pcibios_enable_device(struct pci_dev *dev, int mask) 240{ 241 u16 cmd, old_cmd; 242 int idx; 243 struct resource *r; 244 245 pci_read_config_word(dev, PCI_COMMAND, &cmd); 246 old_cmd = cmd; 247 for (idx=0; idx<6; idx++) { 248 r = &dev->resource[idx]; 249 if (!r->start && r->end) { 250 printk(KERN_ERR "PCI: Device %s not available because " 251 "of resource collisions\n", pci_name(dev)); 252 return -EINVAL; 253 } 254 if (r->flags & IORESOURCE_IO) 255 cmd |= PCI_COMMAND_IO; 256 if (r->flags & IORESOURCE_MEM) 257 cmd |= PCI_COMMAND_MEMORY; 258 } 259 if (cmd != old_cmd) { 260 printk("PCI: Enabling device %s (%04x -> %04x)\n", 261 pci_name(dev), old_cmd, cmd); 262 pci_write_config_word(dev, PCI_COMMAND, cmd); 263 } 264 265 return 0; 266} 267 268#ifdef CONFIG_PROC_FS 269 270/* 271 * Return the index of the PCI controller for device pdev. 272 */ 273 274int 275pci_controller_num(struct pci_dev *dev) 276{ 277 struct pci_controller *pci_ctrl = (struct pci_controller*) dev->sysdata; 278 return pci_ctrl->index; 279} 280 281#endif /* CONFIG_PROC_FS */ 282 283/* 284 * Platform support for /proc/bus/pci/X/Y mmap()s, 285 * modelled on the sparc64 implementation by Dave Miller. 286 * -- paulus. 287 */ 288 289static __inline__ int 290__pci_mmap_make_offset(struct pci_dev *dev, struct vm_area_struct *vma, 291 enum pci_mmap_state mmap_state) 292{ 293 struct pci_controller *pci_ctrl = (struct pci_controller*) dev->sysdata; 294 unsigned long offset = vma->vm_pgoff << PAGE_SHIFT; 295 unsigned long io_offset = 0; 296 int i, res_bit; 297 298 if (pci_ctrl == 0) 299 return -EINVAL; /* should never happen */ 300 301 /* If memory, add on the PCI bridge address offset */ 302 if (mmap_state == pci_mmap_mem) { 303 res_bit = IORESOURCE_MEM; 304 } else { 305 io_offset = (unsigned long)pci_ctrl->io_space.base; 306 offset += io_offset; 307 res_bit = IORESOURCE_IO; 308 } 309 310 /* 311 * Check that the offset requested corresponds to one of the 312 * resources of the device. 313 */ 314 for (i = 0; i <= PCI_ROM_RESOURCE; i++) { 315 struct resource *rp = &dev->resource[i]; 316 int flags = rp->flags; 317 318 /* treat ROM as memory (should be already) */ 319 if (i == PCI_ROM_RESOURCE) 320 flags |= IORESOURCE_MEM; 321 322 /* Active and same type? */ 323 if ((flags & res_bit) == 0) 324 continue; 325 326 /* In the range of this resource? */ 327 if (offset < (rp->start & PAGE_MASK) || offset > rp->end) 328 continue; 329 330 /* found it! construct the final physical address */ 331 if (mmap_state == pci_mmap_io) 332 offset += pci_ctrl->io_space.start - io_offset; 333 vma->vm_pgoff = offset >> PAGE_SHIFT; 334 return 0; 335 } 336 337 return -EINVAL; 338} 339 340/* 341 * Set vm_page_prot of VMA, as appropriate for this architecture, for a pci 342 * device mapping. 343 */ 344static __inline__ void 345__pci_mmap_set_pgprot(struct pci_dev *dev, struct vm_area_struct *vma, 346 enum pci_mmap_state mmap_state, int write_combine) 347{ 348 int prot = pgprot_val(vma->vm_page_prot); 349 350 /* Set to write-through */ 351 prot &= ~_PAGE_NO_CACHE; 352 vma->vm_page_prot = __pgprot(prot); 353} 354 355/* 356 * Perform the actual remap of the pages for a PCI device mapping, as 357 * appropriate for this architecture. The region in the process to map 358 * is described by vm_start and vm_end members of VMA, the base physical 359 * address is found in vm_pgoff. 360 * The pci device structure is provided so that architectures may make mapping 361 * decisions on a per-device or per-bus basis. 362 * 363 * Returns a negative error code on failure, zero on success. 364 */ 365int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, 366 enum pci_mmap_state mmap_state, 367 int write_combine) 368{ 369 int ret; 370 371 ret = __pci_mmap_make_offset(dev, vma, mmap_state); 372 if (ret < 0) 373 return ret; 374 375 __pci_mmap_set_pgprot(dev, vma, mmap_state, write_combine); 376 377 ret = io_remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff, 378 vma->vm_end - vma->vm_start,vma->vm_page_prot); 379 380 return ret; 381} 382 383/* 384 * This probably belongs here rather than ioport.c because 385 * we do not want this crud linked into SBus kernels. 386 * Also, think for a moment about likes of floppy.c that 387 * include architecture specific parts. They may want to redefine ins/outs. 388 * 389 * We do not use horrible macros here because we want to 390 * advance pointer by sizeof(size). 391 */ 392void outsb(unsigned long addr, const void *src, unsigned long count) { 393 while (count) { 394 count -= 1; 395 writeb(*(const char *)src, addr); 396 src += 1; 397 addr += 1; 398 } 399} 400 401void outsw(unsigned long addr, const void *src, unsigned long count) { 402 while (count) { 403 count -= 2; 404 writew(*(const short *)src, addr); 405 src += 2; 406 addr += 2; 407 } 408} 409 410void outsl(unsigned long addr, const void *src, unsigned long count) { 411 while (count) { 412 count -= 4; 413 writel(*(const long *)src, addr); 414 src += 4; 415 addr += 4; 416 } 417} 418 419void insb(unsigned long addr, void *dst, unsigned long count) { 420 while (count) { 421 count -= 1; 422 *(unsigned char *)dst = readb(addr); 423 dst += 1; 424 addr += 1; 425 } 426} 427 428void insw(unsigned long addr, void *dst, unsigned long count) { 429 while (count) { 430 count -= 2; 431 *(unsigned short *)dst = readw(addr); 432 dst += 2; 433 addr += 2; 434 } 435} 436 437void insl(unsigned long addr, void *dst, unsigned long count) { 438 while (count) { 439 count -= 4; 440 *(unsigned long *)dst = readl(addr); 441 dst += 4; 442 addr += 4; 443 } 444} 445