1/* sun4d_smp.c: Sparc SS1000/SC2000 SMP support.
2 *
3 * Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
4 *
5 * Based on sun4m's smp.c, which is:
6 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
7 */
8
9#include <asm/head.h>
10
11#include <linux/kernel.h>
12#include <linux/sched.h>
13#include <linux/threads.h>
14#include <linux/smp.h>
15#include <linux/interrupt.h>
16#include <linux/kernel_stat.h>
17#include <linux/init.h>
18#include <linux/spinlock.h>
19#include <linux/mm.h>
20#include <linux/swap.h>
21#include <linux/profile.h>
22
23#include <asm/ptrace.h>
24#include <asm/atomic.h>
25#include <asm/irq_regs.h>
26
27#include <asm/delay.h>
28#include <asm/irq.h>
29#include <asm/page.h>
30#include <asm/pgalloc.h>
31#include <asm/pgtable.h>
32#include <asm/oplib.h>
33#include <asm/sbus.h>
34#include <asm/sbi.h>
35#include <asm/tlbflush.h>
36#include <asm/cacheflush.h>
37#include <asm/cpudata.h>
38
39#define IRQ_CROSS_CALL		15
40
41extern ctxd_t *srmmu_ctx_table_phys;
42
43extern void calibrate_delay(void);
44
45static volatile int smp_processors_ready = 0;
46static int smp_highest_cpu;
47extern volatile unsigned long cpu_callin_map[NR_CPUS];
48extern cpuinfo_sparc cpu_data[NR_CPUS];
49extern unsigned char boot_cpu_id;
50extern volatile int smp_process_available;
51
52extern cpumask_t smp_commenced_mask;
53
54extern int __smp4d_processor_id(void);
55
56/* #define SMP_DEBUG */
57
58#ifdef SMP_DEBUG
59#define SMP_PRINTK(x)	printk x
60#else
61#define SMP_PRINTK(x)
62#endif
63
64static inline unsigned long swap(volatile unsigned long *ptr, unsigned long val)
65{
66	__asm__ __volatile__("swap [%1], %0\n\t" :
67			     "=&r" (val), "=&r" (ptr) :
68			     "0" (val), "1" (ptr));
69	return val;
70}
71
72static void smp_setup_percpu_timer(void);
73extern void cpu_probe(void);
74extern void sun4d_distribute_irqs(void);
75
76void __init smp4d_callin(void)
77{
78	int cpuid = hard_smp4d_processor_id();
79	extern spinlock_t sun4d_imsk_lock;
80	unsigned long flags;
81
82	/* Show we are alive */
83	cpu_leds[cpuid] = 0x6;
84	show_leds(cpuid);
85
86	/* Enable level15 interrupt, disable level14 interrupt for now */
87	cc_set_imsk((cc_get_imsk() & ~0x8000) | 0x4000);
88
89	local_flush_cache_all();
90	local_flush_tlb_all();
91
92	/*
93	 * Unblock the master CPU _only_ when the scheduler state
94	 * of all secondary CPUs will be up-to-date, so after
95	 * the SMP initialization the master will be just allowed
96	 * to call the scheduler code.
97	 */
98	/* Get our local ticker going. */
99	smp_setup_percpu_timer();
100
101	calibrate_delay();
102	smp_store_cpu_info(cpuid);
103	local_flush_cache_all();
104	local_flush_tlb_all();
105
106	/* Allow master to continue. */
107	swap((unsigned long *)&cpu_callin_map[cpuid], 1);
108	local_flush_cache_all();
109	local_flush_tlb_all();
110
111	cpu_probe();
112
113	while((unsigned long)current_set[cpuid] < PAGE_OFFSET)
114		barrier();
115
116	while(current_set[cpuid]->cpu != cpuid)
117		barrier();
118
119	/* Fix idle thread fields. */
120	__asm__ __volatile__("ld [%0], %%g6\n\t"
121			     : : "r" (&current_set[cpuid])
122			     : "memory" /* paranoid */);
123
124	cpu_leds[cpuid] = 0x9;
125	show_leds(cpuid);
126
127	/* Attach to the address space of init_task. */
128	atomic_inc(&init_mm.mm_count);
129	current->active_mm = &init_mm;
130
131	local_flush_cache_all();
132	local_flush_tlb_all();
133
134	local_irq_enable();	/* We don't allow PIL 14 yet */
135
136	while (!cpu_isset(cpuid, smp_commenced_mask))
137		barrier();
138
139	spin_lock_irqsave(&sun4d_imsk_lock, flags);
140	cc_set_imsk(cc_get_imsk() & ~0x4000); /* Allow PIL 14 as well */
141	spin_unlock_irqrestore(&sun4d_imsk_lock, flags);
142	cpu_set(cpuid, cpu_online_map);
143
144}
145
146extern void init_IRQ(void);
147extern void cpu_panic(void);
148
149/*
150 *	Cycle through the processors asking the PROM to start each one.
151 */
152
153extern struct linux_prom_registers smp_penguin_ctable;
154extern unsigned long trapbase_cpu1[];
155extern unsigned long trapbase_cpu2[];
156extern unsigned long trapbase_cpu3[];
157
158void __init smp4d_boot_cpus(void)
159{
160	if (boot_cpu_id)
161		current_set[0] = NULL;
162	smp_setup_percpu_timer();
163	local_flush_cache_all();
164}
165
166int __cpuinit smp4d_boot_one_cpu(int i)
167{
168			extern unsigned long sun4d_cpu_startup;
169			unsigned long *entry = &sun4d_cpu_startup;
170			struct task_struct *p;
171			int timeout;
172			int cpu_node;
173
174			cpu_find_by_instance(i, &cpu_node,NULL);
175			/* Cook up an idler for this guy. */
176			p = fork_idle(i);
177			current_set[i] = task_thread_info(p);
178
179			/*
180			 * Initialize the contexts table
181			 * Since the call to prom_startcpu() trashes the structure,
182			 * we need to re-initialize it for each cpu
183			 */
184			smp_penguin_ctable.which_io = 0;
185			smp_penguin_ctable.phys_addr = (unsigned int) srmmu_ctx_table_phys;
186			smp_penguin_ctable.reg_size = 0;
187
188			/* whirrr, whirrr, whirrrrrrrrr... */
189			SMP_PRINTK(("Starting CPU %d at %p \n", i, entry));
190			local_flush_cache_all();
191			prom_startcpu(cpu_node,
192				      &smp_penguin_ctable, 0, (char *)entry);
193
194			SMP_PRINTK(("prom_startcpu returned :)\n"));
195
196			/* wheee... it's going... */
197			for(timeout = 0; timeout < 10000; timeout++) {
198				if(cpu_callin_map[i])
199					break;
200				udelay(200);
201			}
202
203	if (!(cpu_callin_map[i])) {
204		printk("Processor %d is stuck.\n", i);
205		return -ENODEV;
206
207	}
208	local_flush_cache_all();
209	return 0;
210}
211
212void __init smp4d_smp_done(void)
213{
214	int i, first;
215	int *prev;
216
217	/* setup cpu list for irq rotation */
218	first = 0;
219	prev = &first;
220	for (i = 0; i < NR_CPUS; i++)
221		if (cpu_online(i)) {
222			*prev = i;
223			prev = &cpu_data(i).next;
224		}
225	*prev = first;
226	local_flush_cache_all();
227
228	/* Free unneeded trap tables */
229	ClearPageReserved(virt_to_page(trapbase_cpu1));
230	init_page_count(virt_to_page(trapbase_cpu1));
231	free_page((unsigned long)trapbase_cpu1);
232	totalram_pages++;
233	num_physpages++;
234
235	ClearPageReserved(virt_to_page(trapbase_cpu2));
236	init_page_count(virt_to_page(trapbase_cpu2));
237	free_page((unsigned long)trapbase_cpu2);
238	totalram_pages++;
239	num_physpages++;
240
241	ClearPageReserved(virt_to_page(trapbase_cpu3));
242	init_page_count(virt_to_page(trapbase_cpu3));
243	free_page((unsigned long)trapbase_cpu3);
244	totalram_pages++;
245	num_physpages++;
246
247	/* Ok, they are spinning and ready to go. */
248	smp_processors_ready = 1;
249	sun4d_distribute_irqs();
250}
251
252static struct smp_funcall {
253	smpfunc_t func;
254	unsigned long arg1;
255	unsigned long arg2;
256	unsigned long arg3;
257	unsigned long arg4;
258	unsigned long arg5;
259	unsigned char processors_in[NR_CPUS];  /* Set when ipi entered. */
260	unsigned char processors_out[NR_CPUS]; /* Set when ipi exited. */
261} ccall_info __attribute__((aligned(8)));
262
263static DEFINE_SPINLOCK(cross_call_lock);
264
265/* Cross calls must be serialized, at least currently. */
266void smp4d_cross_call(smpfunc_t func, unsigned long arg1, unsigned long arg2,
267		    unsigned long arg3, unsigned long arg4, unsigned long arg5)
268{
269	if(smp_processors_ready) {
270		register int high = smp_highest_cpu;
271		unsigned long flags;
272
273		spin_lock_irqsave(&cross_call_lock, flags);
274
275		{
276			/* If you make changes here, make sure gcc generates proper code... */
277			register smpfunc_t f asm("i0") = func;
278			register unsigned long a1 asm("i1") = arg1;
279			register unsigned long a2 asm("i2") = arg2;
280			register unsigned long a3 asm("i3") = arg3;
281			register unsigned long a4 asm("i4") = arg4;
282			register unsigned long a5 asm("i5") = arg5;
283
284			__asm__ __volatile__(
285				"std %0, [%6]\n\t"
286				"std %2, [%6 + 8]\n\t"
287				"std %4, [%6 + 16]\n\t" : :
288				"r"(f), "r"(a1), "r"(a2), "r"(a3), "r"(a4), "r"(a5),
289				"r" (&ccall_info.func));
290		}
291
292		/* Init receive/complete mapping, plus fire the IPI's off. */
293		{
294			cpumask_t mask;
295			register int i;
296
297			mask = cpumask_of_cpu(hard_smp4d_processor_id());
298			cpus_andnot(mask, cpu_online_map, mask);
299			for(i = 0; i <= high; i++) {
300				if (cpu_isset(i, mask)) {
301					ccall_info.processors_in[i] = 0;
302					ccall_info.processors_out[i] = 0;
303					sun4d_send_ipi(i, IRQ_CROSS_CALL);
304				}
305			}
306		}
307
308		{
309			register int i;
310
311			i = 0;
312			do {
313				while(!ccall_info.processors_in[i])
314					barrier();
315			} while(++i <= high);
316
317			i = 0;
318			do {
319				while(!ccall_info.processors_out[i])
320					barrier();
321			} while(++i <= high);
322		}
323
324		spin_unlock_irqrestore(&cross_call_lock, flags);
325	}
326}
327
328/* Running cross calls. */
329void smp4d_cross_call_irq(void)
330{
331	int i = hard_smp4d_processor_id();
332
333	ccall_info.processors_in[i] = 1;
334	ccall_info.func(ccall_info.arg1, ccall_info.arg2, ccall_info.arg3,
335			ccall_info.arg4, ccall_info.arg5);
336	ccall_info.processors_out[i] = 1;
337}
338
339static int smp4d_stop_cpu_sender;
340
341static void smp4d_stop_cpu(void)
342{
343	int me = hard_smp4d_processor_id();
344
345	if (me != smp4d_stop_cpu_sender)
346		while(1) barrier();
347}
348
349/* Cross calls, in order to work efficiently and atomically do all
350 * the message passing work themselves, only stopcpu and reschedule
351 * messages come through here.
352 */
353void smp4d_message_pass(int target, int msg, unsigned long data, int wait)
354{
355	int me = hard_smp4d_processor_id();
356
357	SMP_PRINTK(("smp4d_message_pass %d %d %08lx %d\n", target, msg, data, wait));
358	if (msg == MSG_STOP_CPU && target == MSG_ALL_BUT_SELF) {
359		unsigned long flags;
360		static DEFINE_SPINLOCK(stop_cpu_lock);
361		spin_lock_irqsave(&stop_cpu_lock, flags);
362		smp4d_stop_cpu_sender = me;
363		smp4d_cross_call((smpfunc_t)smp4d_stop_cpu, 0, 0, 0, 0, 0);
364		spin_unlock_irqrestore(&stop_cpu_lock, flags);
365	}
366	printk("Yeeee, trying to send SMP msg(%d) to %d on cpu %d\n", msg, target, me);
367	panic("Bogon SMP message pass.");
368}
369
370void smp4d_percpu_timer_interrupt(struct pt_regs *regs)
371{
372	struct pt_regs *old_regs;
373	int cpu = hard_smp4d_processor_id();
374	static int cpu_tick[NR_CPUS];
375	static char led_mask[] = { 0xe, 0xd, 0xb, 0x7, 0xb, 0xd };
376
377	old_regs = set_irq_regs(regs);
378	bw_get_prof_limit(cpu);
379	bw_clear_intr_mask(0, 1);	/* INTR_TABLE[0] & 1 is Profile IRQ */
380
381	cpu_tick[cpu]++;
382	if (!(cpu_tick[cpu] & 15)) {
383		if (cpu_tick[cpu] == 0x60)
384			cpu_tick[cpu] = 0;
385		cpu_leds[cpu] = led_mask[cpu_tick[cpu] >> 4];
386		show_leds(cpu);
387	}
388
389	profile_tick(CPU_PROFILING);
390
391	if(!--prof_counter(cpu)) {
392		int user = user_mode(regs);
393
394		irq_enter();
395		update_process_times(user);
396		irq_exit();
397
398		prof_counter(cpu) = prof_multiplier(cpu);
399	}
400	set_irq_regs(old_regs);
401}
402
403extern unsigned int lvl14_resolution;
404
405static void __init smp_setup_percpu_timer(void)
406{
407	int cpu = hard_smp4d_processor_id();
408
409	prof_counter(cpu) = prof_multiplier(cpu) = 1;
410	load_profile_irq(cpu, lvl14_resolution);
411}
412
413void __init smp4d_blackbox_id(unsigned *addr)
414{
415	int rd = *addr & 0x3e000000;
416
417	addr[0] = 0xc0800800 | rd;		/* lda [%g0] ASI_M_VIKING_TMP1, reg */
418	addr[1] = 0x01000000;    		/* nop */
419	addr[2] = 0x01000000;    		/* nop */
420}
421
422void __init smp4d_blackbox_current(unsigned *addr)
423{
424	int rd = *addr & 0x3e000000;
425
426	addr[0] = 0xc0800800 | rd;		/* lda [%g0] ASI_M_VIKING_TMP1, reg */
427	addr[2] = 0x81282002 | rd | (rd >> 11);	/* sll reg, 2, reg */
428	addr[4] = 0x01000000;			/* nop */
429}
430
431void __init sun4d_init_smp(void)
432{
433	int i;
434	extern unsigned int t_nmi[], linux_trap_ipi15_sun4d[], linux_trap_ipi15_sun4m[];
435
436	/* Patch ipi15 trap table */
437	t_nmi[1] = t_nmi[1] + (linux_trap_ipi15_sun4d - linux_trap_ipi15_sun4m);
438
439	/* And set btfixup... */
440	BTFIXUPSET_BLACKBOX(hard_smp_processor_id, smp4d_blackbox_id);
441	BTFIXUPSET_BLACKBOX(load_current, smp4d_blackbox_current);
442	BTFIXUPSET_CALL(smp_cross_call, smp4d_cross_call, BTFIXUPCALL_NORM);
443	BTFIXUPSET_CALL(smp_message_pass, smp4d_message_pass, BTFIXUPCALL_NORM);
444	BTFIXUPSET_CALL(__hard_smp_processor_id, __smp4d_processor_id, BTFIXUPCALL_NORM);
445
446	for (i = 0; i < NR_CPUS; i++) {
447		ccall_info.processors_in[i] = 1;
448		ccall_info.processors_out[i] = 1;
449	}
450}
451