1/* 2 * arch/s390/kernel/entry64.S 3 * S390 low-level entry points. 4 * 5 * Copyright (C) IBM Corp. 1999,2006 6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com), 7 * Hartmut Penner (hp@de.ibm.com), 8 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com), 9 * Heiko Carstens <heiko.carstens@de.ibm.com> 10 */ 11 12#include <linux/sys.h> 13#include <linux/linkage.h> 14#include <asm/cache.h> 15#include <asm/lowcore.h> 16#include <asm/errno.h> 17#include <asm/ptrace.h> 18#include <asm/thread_info.h> 19#include <asm/asm-offsets.h> 20#include <asm/unistd.h> 21#include <asm/page.h> 22 23/* 24 * Stack layout for the system_call stack entry. 25 * The first few entries are identical to the user_regs_struct. 26 */ 27SP_PTREGS = STACK_FRAME_OVERHEAD 28SP_ARGS = STACK_FRAME_OVERHEAD + __PT_ARGS 29SP_PSW = STACK_FRAME_OVERHEAD + __PT_PSW 30SP_R0 = STACK_FRAME_OVERHEAD + __PT_GPRS 31SP_R1 = STACK_FRAME_OVERHEAD + __PT_GPRS + 8 32SP_R2 = STACK_FRAME_OVERHEAD + __PT_GPRS + 16 33SP_R3 = STACK_FRAME_OVERHEAD + __PT_GPRS + 24 34SP_R4 = STACK_FRAME_OVERHEAD + __PT_GPRS + 32 35SP_R5 = STACK_FRAME_OVERHEAD + __PT_GPRS + 40 36SP_R6 = STACK_FRAME_OVERHEAD + __PT_GPRS + 48 37SP_R7 = STACK_FRAME_OVERHEAD + __PT_GPRS + 56 38SP_R8 = STACK_FRAME_OVERHEAD + __PT_GPRS + 64 39SP_R9 = STACK_FRAME_OVERHEAD + __PT_GPRS + 72 40SP_R10 = STACK_FRAME_OVERHEAD + __PT_GPRS + 80 41SP_R11 = STACK_FRAME_OVERHEAD + __PT_GPRS + 88 42SP_R12 = STACK_FRAME_OVERHEAD + __PT_GPRS + 96 43SP_R13 = STACK_FRAME_OVERHEAD + __PT_GPRS + 104 44SP_R14 = STACK_FRAME_OVERHEAD + __PT_GPRS + 112 45SP_R15 = STACK_FRAME_OVERHEAD + __PT_GPRS + 120 46SP_ORIG_R2 = STACK_FRAME_OVERHEAD + __PT_ORIG_GPR2 47SP_ILC = STACK_FRAME_OVERHEAD + __PT_ILC 48SP_TRAP = STACK_FRAME_OVERHEAD + __PT_TRAP 49SP_SIZE = STACK_FRAME_OVERHEAD + __PT_SIZE 50 51STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER 52STACK_SIZE = 1 << STACK_SHIFT 53 54_TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK | _TIF_NEED_RESCHED | \ 55 _TIF_MCCK_PENDING | _TIF_RESTART_SVC | _TIF_SINGLE_STEP ) 56_TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK | _TIF_NEED_RESCHED | \ 57 _TIF_MCCK_PENDING) 58 59#define BASED(name) name-system_call(%r13) 60 61#ifdef CONFIG_TRACE_IRQFLAGS 62 .macro TRACE_IRQS_ON 63 brasl %r14,trace_hardirqs_on 64 .endm 65 66 .macro TRACE_IRQS_OFF 67 brasl %r14,trace_hardirqs_off 68 .endm 69#else 70#define TRACE_IRQS_ON 71#define TRACE_IRQS_OFF 72#endif 73 74 .macro STORE_TIMER lc_offset 75#ifdef CONFIG_VIRT_CPU_ACCOUNTING 76 stpt \lc_offset 77#endif 78 .endm 79 80#ifdef CONFIG_VIRT_CPU_ACCOUNTING 81 .macro UPDATE_VTIME lc_from,lc_to,lc_sum 82 lg %r10,\lc_from 83 slg %r10,\lc_to 84 alg %r10,\lc_sum 85 stg %r10,\lc_sum 86 .endm 87#endif 88 89/* 90 * Register usage in interrupt handlers: 91 * R9 - pointer to current task structure 92 * R13 - pointer to literal pool 93 * R14 - return register for function calls 94 * R15 - kernel stack pointer 95 */ 96 97 .macro SAVE_ALL_BASE savearea 98 stmg %r12,%r15,\savearea 99 larl %r13,system_call 100 .endm 101 102 .macro SAVE_ALL_SYNC psworg,savearea 103 la %r12,\psworg 104 tm \psworg+1,0x01 # test problem state bit 105 jz 2f # skip stack setup save 106 lg %r15,__LC_KERNEL_STACK # problem state -> load ksp 107#ifdef CONFIG_CHECK_STACK 108 j 3f 1092: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD 110 jz stack_overflow 1113: 112#endif 1132: 114 .endm 115 116 .macro SAVE_ALL_ASYNC psworg,savearea 117 la %r12,\psworg 118 tm \psworg+1,0x01 # test problem state bit 119 jnz 1f # from user -> load kernel stack 120 clc \psworg+8(8),BASED(.Lcritical_end) 121 jhe 0f 122 clc \psworg+8(8),BASED(.Lcritical_start) 123 jl 0f 124 brasl %r14,cleanup_critical 125 tm 1(%r12),0x01 # retest problem state after cleanup 126 jnz 1f 1270: lg %r14,__LC_ASYNC_STACK # are we already on the async. stack ? 128 slgr %r14,%r15 129 srag %r14,%r14,STACK_SHIFT 130 jz 2f 1311: lg %r15,__LC_ASYNC_STACK # load async stack 132#ifdef CONFIG_CHECK_STACK 133 j 3f 1342: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD 135 jz stack_overflow 1363: 137#endif 1382: 139 .endm 140 141 .macro CREATE_STACK_FRAME psworg,savearea 142 aghi %r15,-SP_SIZE # make room for registers & psw 143 mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack 144 la %r12,\psworg 145 stg %r2,SP_ORIG_R2(%r15) # store original content of gpr 2 146 icm %r12,12,__LC_SVC_ILC 147 stmg %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack 148 st %r12,SP_ILC(%r15) 149 mvc SP_R12(32,%r15),\savearea # move %r12-%r15 to stack 150 la %r12,0 151 stg %r12,__SF_BACKCHAIN(%r15) 152 .endm 153 154 .macro RESTORE_ALL psworg,sync 155 mvc \psworg(16),SP_PSW(%r15) # move user PSW to lowcore 156 .if !\sync 157 ni \psworg+1,0xfd # clear wait state bit 158 .endif 159 lmg %r0,%r15,SP_R0(%r15) # load gprs 0-15 of user 160 STORE_TIMER __LC_EXIT_TIMER 161 lpswe \psworg # back to caller 162 .endm 163 164/* 165 * Scheduler resume function, called by switch_to 166 * gpr2 = (task_struct *) prev 167 * gpr3 = (task_struct *) next 168 * Returns: 169 * gpr2 = prev 170 */ 171 .globl __switch_to 172__switch_to: 173 tm __THREAD_per+4(%r3),0xe8 # is the new process using per ? 174 jz __switch_to_noper # if not we're fine 175 stctg %c9,%c11,__SF_EMPTY(%r15)# We are using per stuff 176 clc __THREAD_per(24,%r3),__SF_EMPTY(%r15) 177 je __switch_to_noper # we got away without bashing TLB's 178 lctlg %c9,%c11,__THREAD_per(%r3) # Nope we didn't 179__switch_to_noper: 180 lg %r4,__THREAD_info(%r2) # get thread_info of prev 181 tm __TI_flags+7(%r4),_TIF_MCCK_PENDING # machine check pending? 182 jz __switch_to_no_mcck 183 ni __TI_flags+7(%r4),255-_TIF_MCCK_PENDING # clear flag in prev 184 lg %r4,__THREAD_info(%r3) # get thread_info of next 185 oi __TI_flags+7(%r4),_TIF_MCCK_PENDING # set it in next 186__switch_to_no_mcck: 187 stmg %r6,%r15,__SF_GPRS(%r15)# store __switch_to registers of prev task 188 stg %r15,__THREAD_ksp(%r2) # store kernel stack to prev->tss.ksp 189 lg %r15,__THREAD_ksp(%r3) # load kernel stack from next->tss.ksp 190 lmg %r6,%r15,__SF_GPRS(%r15)# load __switch_to registers of next task 191 stg %r3,__LC_CURRENT # __LC_CURRENT = current task struct 192 lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4 193 lg %r3,__THREAD_info(%r3) # load thread_info from task struct 194 stg %r3,__LC_THREAD_INFO 195 aghi %r3,STACK_SIZE 196 stg %r3,__LC_KERNEL_STACK # __LC_KERNEL_STACK = new kernel stack 197 br %r14 198 199__critical_start: 200/* 201 * SVC interrupt handler routine. System calls are synchronous events and 202 * are executed with interrupts enabled. 203 */ 204 205 .globl system_call 206system_call: 207 STORE_TIMER __LC_SYNC_ENTER_TIMER 208sysc_saveall: 209 SAVE_ALL_BASE __LC_SAVE_AREA 210 SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA 211 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA 212 llgh %r7,__LC_SVC_INT_CODE # get svc number from lowcore 213#ifdef CONFIG_VIRT_CPU_ACCOUNTING 214sysc_vtime: 215 tm SP_PSW+1(%r15),0x01 # interrupting from user ? 216 jz sysc_do_svc 217 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER 218sysc_stime: 219 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 220sysc_update: 221 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER 222#endif 223sysc_do_svc: 224 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct 225 slag %r7,%r7,2 # *4 and test for svc 0 226 jnz sysc_nr_ok 227 # svc 0: system call number in %r1 228 cl %r1,BASED(.Lnr_syscalls) 229 jnl sysc_nr_ok 230 lgfr %r7,%r1 # clear high word in r1 231 slag %r7,%r7,2 # svc 0: system call number in %r1 232sysc_nr_ok: 233 mvc SP_ARGS(8,%r15),SP_R7(%r15) 234sysc_do_restart: 235 larl %r10,sys_call_table 236#ifdef CONFIG_COMPAT 237 tm __TI_flags+5(%r9),(_TIF_31BIT>>16) # running in 31 bit mode ? 238 jno sysc_noemu 239 larl %r10,sys_call_table_emu # use 31 bit emulation system calls 240sysc_noemu: 241#endif 242 tm __TI_flags+7(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT) 243 lgf %r8,0(%r7,%r10) # load address of system call routine 244 jnz sysc_tracesys 245 basr %r14,%r8 # call sys_xxxx 246 stg %r2,SP_R2(%r15) # store return value (change R2 on stack) 247 248sysc_return: 249 tm SP_PSW+1(%r15),0x01 # returning to user ? 250 jno sysc_leave 251 tm __TI_flags+7(%r9),_TIF_WORK_SVC 252 jnz sysc_work # there is work to do (signals etc.) 253sysc_leave: 254 RESTORE_ALL __LC_RETURN_PSW,1 255 256# 257# recheck if there is more work to do 258# 259sysc_work_loop: 260 tm __TI_flags+7(%r9),_TIF_WORK_SVC 261 jz sysc_leave # there is no work to do 262# 263# One of the work bits is on. Find out which one. 264# 265sysc_work: 266 tm __TI_flags+7(%r9),_TIF_MCCK_PENDING 267 jo sysc_mcck_pending 268 tm __TI_flags+7(%r9),_TIF_NEED_RESCHED 269 jo sysc_reschedule 270 tm __TI_flags+7(%r9),(_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK) 271 jnz sysc_sigpending 272 tm __TI_flags+7(%r9),_TIF_RESTART_SVC 273 jo sysc_restart 274 tm __TI_flags+7(%r9),_TIF_SINGLE_STEP 275 jo sysc_singlestep 276 j sysc_leave 277 278# 279# _TIF_NEED_RESCHED is set, call schedule 280# 281sysc_reschedule: 282 larl %r14,sysc_work_loop 283 jg schedule # return point is sysc_return 284 285# 286# _TIF_MCCK_PENDING is set, call handler 287# 288sysc_mcck_pending: 289 larl %r14,sysc_work_loop 290 jg s390_handle_mcck # TIF bit will be cleared by handler 291 292# 293# _TIF_SIGPENDING or _TIF_RESTORE_SIGMASK is set, call do_signal 294# 295sysc_sigpending: 296 ni __TI_flags+7(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP 297 la %r2,SP_PTREGS(%r15) # load pt_regs 298 brasl %r14,do_signal # call do_signal 299 tm __TI_flags+7(%r9),_TIF_RESTART_SVC 300 jo sysc_restart 301 tm __TI_flags+7(%r9),_TIF_SINGLE_STEP 302 jo sysc_singlestep 303 j sysc_work_loop 304 305# 306# _TIF_RESTART_SVC is set, set up registers and restart svc 307# 308sysc_restart: 309 ni __TI_flags+7(%r9),255-_TIF_RESTART_SVC # clear TIF_RESTART_SVC 310 lg %r7,SP_R2(%r15) # load new svc number 311 slag %r7,%r7,2 # *4 312 mvc SP_R2(8,%r15),SP_ORIG_R2(%r15) # restore first argument 313 lmg %r2,%r6,SP_R2(%r15) # load svc arguments 314 j sysc_do_restart # restart svc 315 316# 317# _TIF_SINGLE_STEP is set, call do_single_step 318# 319sysc_singlestep: 320 ni __TI_flags+7(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP 321 lhi %r0,__LC_PGM_OLD_PSW 322 sth %r0,SP_TRAP(%r15) # set trap indication to pgm check 323 la %r2,SP_PTREGS(%r15) # address of register-save area 324 larl %r14,sysc_return # load adr. of system return 325 jg do_single_step # branch to do_sigtrap 326 327# 328# call syscall_trace before and after system call 329# special linkage: %r12 contains the return address for trace_svc 330# 331sysc_tracesys: 332 la %r2,SP_PTREGS(%r15) # load pt_regs 333 la %r3,0 334 srl %r7,2 335 stg %r7,SP_R2(%r15) 336 brasl %r14,syscall_trace 337 lghi %r0,NR_syscalls 338 clg %r0,SP_R2(%r15) 339 jnh sysc_tracenogo 340 lg %r7,SP_R2(%r15) # strace might have changed the 341 sll %r7,2 # system call 342 lgf %r8,0(%r7,%r10) 343sysc_tracego: 344 lmg %r3,%r6,SP_R3(%r15) 345 lg %r2,SP_ORIG_R2(%r15) 346 basr %r14,%r8 # call sys_xxx 347 stg %r2,SP_R2(%r15) # store return value 348sysc_tracenogo: 349 tm __TI_flags+7(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT) 350 jz sysc_return 351 la %r2,SP_PTREGS(%r15) # load pt_regs 352 la %r3,1 353 larl %r14,sysc_return # return point is sysc_return 354 jg syscall_trace 355 356# 357# a new process exits the kernel with ret_from_fork 358# 359 .globl ret_from_fork 360ret_from_fork: 361 lg %r13,__LC_SVC_NEW_PSW+8 362 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct 363 tm SP_PSW+1(%r15),0x01 # forking a kernel thread ? 364 jo 0f 365 stg %r15,SP_R15(%r15) # store stack pointer for new kthread 3660: brasl %r14,schedule_tail 367 TRACE_IRQS_ON 368 stosm 24(%r15),0x03 # reenable interrupts 369 j sysc_return 370 371# 372# kernel_execve function needs to deal with pt_regs that is not 373# at the usual place 374# 375 .globl kernel_execve 376kernel_execve: 377 stmg %r12,%r15,96(%r15) 378 lgr %r14,%r15 379 aghi %r15,-SP_SIZE 380 stg %r14,__SF_BACKCHAIN(%r15) 381 la %r12,SP_PTREGS(%r15) 382 xc 0(__PT_SIZE,%r12),0(%r12) 383 lgr %r5,%r12 384 brasl %r14,do_execve 385 ltgfr %r2,%r2 386 je 0f 387 aghi %r15,SP_SIZE 388 lmg %r12,%r15,96(%r15) 389 br %r14 390 # execve succeeded. 3910: stnsm __SF_EMPTY(%r15),0xfc # disable interrupts 392 lg %r15,__LC_KERNEL_STACK # load ksp 393 aghi %r15,-SP_SIZE # make room for registers & psw 394 lg %r13,__LC_SVC_NEW_PSW+8 395 lg %r9,__LC_THREAD_INFO 396 mvc SP_PTREGS(__PT_SIZE,%r15),0(%r12) # copy pt_regs 397 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) 398 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts 399 brasl %r14,execve_tail 400 j sysc_return 401 402/* 403 * Program check handler routine 404 */ 405 406 .globl pgm_check_handler 407pgm_check_handler: 408 STORE_TIMER __LC_SYNC_ENTER_TIMER 409 SAVE_ALL_BASE __LC_SAVE_AREA 410 tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception 411 jnz pgm_per # got per exception -> special case 412 SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA 413 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA 414#ifdef CONFIG_VIRT_CPU_ACCOUNTING 415 tm SP_PSW+1(%r15),0x01 # interrupting from user ? 416 jz pgm_no_vtime 417 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER 418 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 419 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER 420pgm_no_vtime: 421#endif 422 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct 423 lgf %r3,__LC_PGM_ILC # load program interruption code 424 lghi %r8,0x7f 425 ngr %r8,%r3 426pgm_do_call: 427 sll %r8,3 428 larl %r1,pgm_check_table 429 lg %r1,0(%r8,%r1) # load address of handler routine 430 la %r2,SP_PTREGS(%r15) # address of register-save area 431 larl %r14,sysc_return 432 br %r1 # branch to interrupt-handler 433 434# 435# handle per exception 436# 437pgm_per: 438 tm __LC_PGM_OLD_PSW,0x40 # test if per event recording is on 439 jnz pgm_per_std # ok, normal per event from user space 440# ok its one of the special cases, now we need to find out which one 441 clc __LC_PGM_OLD_PSW(16),__LC_SVC_NEW_PSW 442 je pgm_svcper 443# no interesting special case, ignore PER event 444 lmg %r12,%r15,__LC_SAVE_AREA 445 lpswe __LC_PGM_OLD_PSW 446 447# 448# Normal per exception 449# 450pgm_per_std: 451 SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA 452 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA 453#ifdef CONFIG_VIRT_CPU_ACCOUNTING 454 tm SP_PSW+1(%r15),0x01 # interrupting from user ? 455 jz pgm_no_vtime2 456 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER 457 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 458 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER 459pgm_no_vtime2: 460#endif 461 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct 462 lg %r1,__TI_task(%r9) 463 tm SP_PSW+1(%r15),0x01 # kernel per event ? 464 jz kernel_per 465 mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID 466 mvc __THREAD_per+__PER_address(8,%r1),__LC_PER_ADDRESS 467 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID 468 oi __TI_flags+7(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP 469 lgf %r3,__LC_PGM_ILC # load program interruption code 470 lghi %r8,0x7f 471 ngr %r8,%r3 # clear per-event-bit and ilc 472 je sysc_return 473 j pgm_do_call 474 475# 476# it was a single stepped SVC that is causing all the trouble 477# 478pgm_svcper: 479 SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA 480 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA 481#ifdef CONFIG_VIRT_CPU_ACCOUNTING 482 tm SP_PSW+1(%r15),0x01 # interrupting from user ? 483 jz pgm_no_vtime3 484 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER 485 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 486 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER 487pgm_no_vtime3: 488#endif 489 llgh %r7,__LC_SVC_INT_CODE # get svc number from lowcore 490 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct 491 lg %r1,__TI_task(%r9) 492 mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID 493 mvc __THREAD_per+__PER_address(8,%r1),__LC_PER_ADDRESS 494 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID 495 oi __TI_flags+7(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP 496 TRACE_IRQS_ON 497 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts 498 j sysc_do_svc 499 500# 501# per was called from kernel, must be kprobes 502# 503kernel_per: 504 lhi %r0,__LC_PGM_OLD_PSW 505 sth %r0,SP_TRAP(%r15) # set trap indication to pgm check 506 la %r2,SP_PTREGS(%r15) # address of register-save area 507 larl %r14,sysc_leave # load adr. of system ret, no work 508 jg do_single_step # branch to do_single_step 509 510/* 511 * IO interrupt handler routine 512 */ 513 .globl io_int_handler 514io_int_handler: 515 STORE_TIMER __LC_ASYNC_ENTER_TIMER 516 stck __LC_INT_CLOCK 517 SAVE_ALL_BASE __LC_SAVE_AREA+32 518 SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+32 519 CREATE_STACK_FRAME __LC_IO_OLD_PSW,__LC_SAVE_AREA+32 520#ifdef CONFIG_VIRT_CPU_ACCOUNTING 521 tm SP_PSW+1(%r15),0x01 # interrupting from user ? 522 jz io_no_vtime 523 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER 524 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 525 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER 526io_no_vtime: 527#endif 528 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct 529 TRACE_IRQS_OFF 530 la %r2,SP_PTREGS(%r15) # address of register-save area 531 brasl %r14,do_IRQ # call standard irq handler 532 TRACE_IRQS_ON 533 534io_return: 535 tm SP_PSW+1(%r15),0x01 # returning to user ? 536#ifdef CONFIG_PREEMPT 537 jno io_preempt # no -> check for preemptive scheduling 538#else 539 jno io_leave # no-> skip resched & signal 540#endif 541 tm __TI_flags+7(%r9),_TIF_WORK_INT 542 jnz io_work # there is work to do (signals etc.) 543io_leave: 544 RESTORE_ALL __LC_RETURN_PSW,0 545io_done: 546 547#ifdef CONFIG_PREEMPT 548io_preempt: 549 icm %r0,15,__TI_precount(%r9) 550 jnz io_leave 551 # switch to kernel stack 552 lg %r1,SP_R15(%r15) 553 aghi %r1,-SP_SIZE 554 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15) 555 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain 556 lgr %r15,%r1 557io_resume_loop: 558 tm __TI_flags+7(%r9),_TIF_NEED_RESCHED 559 jno io_leave 560 larl %r1,.Lc_pactive 561 mvc __TI_precount(4,%r9),0(%r1) 562 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts 563 brasl %r14,schedule # call schedule 564 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts 565 xc __TI_precount(4,%r9),__TI_precount(%r9) 566 j io_resume_loop 567#endif 568 569# 570# switch to kernel stack, then check TIF bits 571# 572io_work: 573 lg %r1,__LC_KERNEL_STACK 574 aghi %r1,-SP_SIZE 575 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15) 576 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain 577 lgr %r15,%r1 578# 579# One of the work bits is on. Find out which one. 580# Checked are: _TIF_SIGPENDING, _TIF_RESTORE_SIGPENDING, _TIF_NEED_RESCHED 581# and _TIF_MCCK_PENDING 582# 583io_work_loop: 584 tm __TI_flags+7(%r9),_TIF_MCCK_PENDING 585 jo io_mcck_pending 586 tm __TI_flags+7(%r9),_TIF_NEED_RESCHED 587 jo io_reschedule 588 tm __TI_flags+7(%r9),(_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK) 589 jnz io_sigpending 590 j io_leave 591 592# 593# _TIF_MCCK_PENDING is set, call handler 594# 595io_mcck_pending: 596 larl %r14,io_work_loop 597 jg s390_handle_mcck # TIF bit will be cleared by handler 598 599# 600# _TIF_NEED_RESCHED is set, call schedule 601# 602io_reschedule: 603 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts 604 brasl %r14,schedule # call scheduler 605 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts 606 tm __TI_flags+7(%r9),_TIF_WORK_INT 607 jz io_leave # there is no work to do 608 j io_work_loop 609 610# 611# _TIF_SIGPENDING or _TIF_RESTORE_SIGMASK is set, call do_signal 612# 613io_sigpending: 614 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts 615 la %r2,SP_PTREGS(%r15) # load pt_regs 616 brasl %r14,do_signal # call do_signal 617 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts 618 j io_work_loop 619 620/* 621 * External interrupt handler routine 622 */ 623 .globl ext_int_handler 624ext_int_handler: 625 STORE_TIMER __LC_ASYNC_ENTER_TIMER 626 stck __LC_INT_CLOCK 627 SAVE_ALL_BASE __LC_SAVE_AREA+32 628 SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+32 629 CREATE_STACK_FRAME __LC_EXT_OLD_PSW,__LC_SAVE_AREA+32 630#ifdef CONFIG_VIRT_CPU_ACCOUNTING 631 tm SP_PSW+1(%r15),0x01 # interrupting from user ? 632 jz ext_no_vtime 633 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER 634 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 635 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER 636ext_no_vtime: 637#endif 638 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct 639 TRACE_IRQS_OFF 640 la %r2,SP_PTREGS(%r15) # address of register-save area 641 llgh %r3,__LC_EXT_INT_CODE # get interruption code 642 brasl %r14,do_extint 643 TRACE_IRQS_ON 644 j io_return 645 646__critical_end: 647 648/* 649 * Machine check handler routines 650 */ 651 .globl mcck_int_handler 652mcck_int_handler: 653 la %r1,4095 # revalidate r1 654 spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # revalidate cpu timer 655 lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# revalidate gprs 656 SAVE_ALL_BASE __LC_SAVE_AREA+64 657 la %r12,__LC_MCK_OLD_PSW 658 tm __LC_MCCK_CODE,0x80 # system damage? 659 jo mcck_int_main # yes -> rest of mcck code invalid 660#ifdef CONFIG_VIRT_CPU_ACCOUNTING 661 la %r14,4095 662 mvc __LC_SAVE_AREA+104(8),__LC_ASYNC_ENTER_TIMER 663 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA-4095(%r14) 664 tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid? 665 jo 1f 666 la %r14,__LC_SYNC_ENTER_TIMER 667 clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER 668 jl 0f 669 la %r14,__LC_ASYNC_ENTER_TIMER 6700: clc 0(8,%r14),__LC_EXIT_TIMER 671 jl 0f 672 la %r14,__LC_EXIT_TIMER 6730: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER 674 jl 0f 675 la %r14,__LC_LAST_UPDATE_TIMER 6760: spt 0(%r14) 677 mvc __LC_ASYNC_ENTER_TIMER(8),0(%r14) 6781: 679#endif 680 tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid? 681 jno mcck_int_main # no -> skip cleanup critical 682 tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit 683 jnz mcck_int_main # from user -> load kernel stack 684 clc __LC_MCK_OLD_PSW+8(8),BASED(.Lcritical_end) 685 jhe mcck_int_main 686 clc __LC_MCK_OLD_PSW+8(8),BASED(.Lcritical_start) 687 jl mcck_int_main 688 brasl %r14,cleanup_critical 689mcck_int_main: 690 lg %r14,__LC_PANIC_STACK # are we already on the panic stack? 691 slgr %r14,%r15 692 srag %r14,%r14,PAGE_SHIFT 693 jz 0f 694 lg %r15,__LC_PANIC_STACK # load panic stack 6950: CREATE_STACK_FRAME __LC_MCK_OLD_PSW,__LC_SAVE_AREA+64 696#ifdef CONFIG_VIRT_CPU_ACCOUNTING 697 tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid? 698 jno mcck_no_vtime # no -> no timer update 699 tm SP_PSW+1(%r15),0x01 # interrupting from user ? 700 jz mcck_no_vtime 701 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER 702 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 703 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER 704mcck_no_vtime: 705#endif 706 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct 707 la %r2,SP_PTREGS(%r15) # load pt_regs 708 brasl %r14,s390_do_machine_check 709 tm SP_PSW+1(%r15),0x01 # returning to user ? 710 jno mcck_return 711 lg %r1,__LC_KERNEL_STACK # switch to kernel stack 712 aghi %r1,-SP_SIZE 713 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15) 714 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain 715 lgr %r15,%r1 716 stosm __SF_EMPTY(%r15),0x04 # turn dat on 717 tm __TI_flags+7(%r9),_TIF_MCCK_PENDING 718 jno mcck_return 719 TRACE_IRQS_OFF 720 brasl %r14,s390_handle_mcck 721 TRACE_IRQS_ON 722mcck_return: 723 mvc __LC_RETURN_MCCK_PSW(16),SP_PSW(%r15) # move return PSW 724 ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit 725 lmg %r0,%r15,SP_R0(%r15) # load gprs 0-15 726#ifdef CONFIG_VIRT_CPU_ACCOUNTING 727 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_SAVE_AREA+104 728 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ? 729 jno 0f 730 stpt __LC_EXIT_TIMER 7310: 732#endif 733 lpswe __LC_RETURN_MCCK_PSW # back to caller 734 735/* 736 * Restart interruption handler, kick starter for additional CPUs 737 */ 738#ifdef CONFIG_SMP 739#ifndef CONFIG_HOTPLUG_CPU 740 .section .init.text,"ax" 741#endif 742 .globl restart_int_handler 743restart_int_handler: 744 lg %r15,__LC_SAVE_AREA+120 # load ksp 745 lghi %r10,__LC_CREGS_SAVE_AREA 746 lctlg %c0,%c15,0(%r10) # get new ctl regs 747 lghi %r10,__LC_AREGS_SAVE_AREA 748 lam %a0,%a15,0(%r10) 749 lmg %r6,%r15,__SF_GPRS(%r15) # load registers from clone 750 stosm __SF_EMPTY(%r15),0x04 # now we can turn dat on 751 jg start_secondary 752#ifndef CONFIG_HOTPLUG_CPU 753 .previous 754#endif 755#else 756/* 757 * If we do not run with SMP enabled, let the new CPU crash ... 758 */ 759 .globl restart_int_handler 760restart_int_handler: 761 basr %r1,0 762restart_base: 763 lpswe restart_crash-restart_base(%r1) 764 .align 8 765restart_crash: 766 .long 0x000a0000,0x00000000,0x00000000,0x00000000 767restart_go: 768#endif 769 770#ifdef CONFIG_CHECK_STACK 771/* 772 * The synchronous or the asynchronous stack overflowed. We are dead. 773 * No need to properly save the registers, we are going to panic anyway. 774 * Setup a pt_regs so that show_trace can provide a good call trace. 775 */ 776stack_overflow: 777 lg %r15,__LC_PANIC_STACK # change to panic stack 778 aghi %r15,-SP_SIZE 779 mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack 780 stmg %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack 781 la %r1,__LC_SAVE_AREA 782 chi %r12,__LC_SVC_OLD_PSW 783 je 0f 784 chi %r12,__LC_PGM_OLD_PSW 785 je 0f 786 la %r1,__LC_SAVE_AREA+32 7870: mvc SP_R12(32,%r15),0(%r1) # move %r12-%r15 to stack 788 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) # clear back chain 789 la %r2,SP_PTREGS(%r15) # load pt_regs 790 jg kernel_stack_overflow 791#endif 792 793cleanup_table_system_call: 794 .quad system_call, sysc_do_svc 795cleanup_table_sysc_return: 796 .quad sysc_return, sysc_leave 797cleanup_table_sysc_leave: 798 .quad sysc_leave, sysc_work_loop 799cleanup_table_sysc_work_loop: 800 .quad sysc_work_loop, sysc_reschedule 801cleanup_table_io_return: 802 .quad io_return, io_leave 803cleanup_table_io_leave: 804 .quad io_leave, io_done 805cleanup_table_io_work_loop: 806 .quad io_work_loop, io_mcck_pending 807 808cleanup_critical: 809 clc 8(8,%r12),BASED(cleanup_table_system_call) 810 jl 0f 811 clc 8(8,%r12),BASED(cleanup_table_system_call+8) 812 jl cleanup_system_call 8130: 814 clc 8(8,%r12),BASED(cleanup_table_sysc_return) 815 jl 0f 816 clc 8(8,%r12),BASED(cleanup_table_sysc_return+8) 817 jl cleanup_sysc_return 8180: 819 clc 8(8,%r12),BASED(cleanup_table_sysc_leave) 820 jl 0f 821 clc 8(8,%r12),BASED(cleanup_table_sysc_leave+8) 822 jl cleanup_sysc_leave 8230: 824 clc 8(8,%r12),BASED(cleanup_table_sysc_work_loop) 825 jl 0f 826 clc 8(8,%r12),BASED(cleanup_table_sysc_work_loop+8) 827 jl cleanup_sysc_return 8280: 829 clc 8(8,%r12),BASED(cleanup_table_io_return) 830 jl 0f 831 clc 8(8,%r12),BASED(cleanup_table_io_return+8) 832 jl cleanup_io_return 8330: 834 clc 8(8,%r12),BASED(cleanup_table_io_leave) 835 jl 0f 836 clc 8(8,%r12),BASED(cleanup_table_io_leave+8) 837 jl cleanup_io_leave 8380: 839 clc 8(8,%r12),BASED(cleanup_table_io_work_loop) 840 jl 0f 841 clc 8(8,%r12),BASED(cleanup_table_io_work_loop+8) 842 jl cleanup_io_return 8430: 844 br %r14 845 846cleanup_system_call: 847 mvc __LC_RETURN_PSW(16),0(%r12) 848 cghi %r12,__LC_MCK_OLD_PSW 849 je 0f 850 la %r12,__LC_SAVE_AREA+32 851 j 1f 8520: la %r12,__LC_SAVE_AREA+64 8531: 854#ifdef CONFIG_VIRT_CPU_ACCOUNTING 855 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+8) 856 jh 0f 857 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER 8580: clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+16) 859 jhe cleanup_vtime 860#endif 861 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn) 862 jh 0f 863 mvc __LC_SAVE_AREA(32),0(%r12) 8640: stg %r13,8(%r12) 865 stg %r12,__LC_SAVE_AREA+96 # argh 866 SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA 867 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA 868 lg %r12,__LC_SAVE_AREA+96 # argh 869 stg %r15,24(%r12) 870 llgh %r7,__LC_SVC_INT_CODE 871#ifdef CONFIG_VIRT_CPU_ACCOUNTING 872cleanup_vtime: 873 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+24) 874 jhe cleanup_stime 875 tm SP_PSW+1(%r15),0x01 # interrupting from user ? 876 jz cleanup_novtime 877 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER 878cleanup_stime: 879 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+32) 880 jh cleanup_update 881 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 882cleanup_update: 883 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER 884cleanup_novtime: 885#endif 886 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_system_call+8) 887 la %r12,__LC_RETURN_PSW 888 br %r14 889cleanup_system_call_insn: 890 .quad sysc_saveall 891#ifdef CONFIG_VIRT_CPU_ACCOUNTING 892 .quad system_call 893 .quad sysc_vtime 894 .quad sysc_stime 895 .quad sysc_update 896#endif 897 898cleanup_sysc_return: 899 mvc __LC_RETURN_PSW(8),0(%r12) 900 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_sysc_return) 901 la %r12,__LC_RETURN_PSW 902 br %r14 903 904cleanup_sysc_leave: 905 clc 8(8,%r12),BASED(cleanup_sysc_leave_insn) 906 je 2f 907#ifdef CONFIG_VIRT_CPU_ACCOUNTING 908 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER 909 clc 8(8,%r12),BASED(cleanup_sysc_leave_insn+8) 910 je 2f 911#endif 912 mvc __LC_RETURN_PSW(16),SP_PSW(%r15) 913 cghi %r12,__LC_MCK_OLD_PSW 914 jne 0f 915 mvc __LC_SAVE_AREA+64(32),SP_R12(%r15) 916 j 1f 9170: mvc __LC_SAVE_AREA+32(32),SP_R12(%r15) 9181: lmg %r0,%r11,SP_R0(%r15) 919 lg %r15,SP_R15(%r15) 9202: la %r12,__LC_RETURN_PSW 921 br %r14 922cleanup_sysc_leave_insn: 923#ifdef CONFIG_VIRT_CPU_ACCOUNTING 924 .quad sysc_leave + 16 925#endif 926 .quad sysc_leave + 12 927 928cleanup_io_return: 929 mvc __LC_RETURN_PSW(8),0(%r12) 930 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_io_work_loop) 931 la %r12,__LC_RETURN_PSW 932 br %r14 933 934cleanup_io_leave: 935 clc 8(8,%r12),BASED(cleanup_io_leave_insn) 936 je 2f 937#ifdef CONFIG_VIRT_CPU_ACCOUNTING 938 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER 939 clc 8(8,%r12),BASED(cleanup_io_leave_insn+8) 940 je 2f 941#endif 942 mvc __LC_RETURN_PSW(16),SP_PSW(%r15) 943 cghi %r12,__LC_MCK_OLD_PSW 944 jne 0f 945 mvc __LC_SAVE_AREA+64(32),SP_R12(%r15) 946 j 1f 9470: mvc __LC_SAVE_AREA+32(32),SP_R12(%r15) 9481: lmg %r0,%r11,SP_R0(%r15) 949 lg %r15,SP_R15(%r15) 9502: la %r12,__LC_RETURN_PSW 951 br %r14 952cleanup_io_leave_insn: 953#ifdef CONFIG_VIRT_CPU_ACCOUNTING 954 .quad io_leave + 20 955#endif 956 .quad io_leave + 16 957 958/* 959 * Integer constants 960 */ 961 .align 4 962.Lconst: 963.Lc_pactive: .long PREEMPT_ACTIVE 964.Lnr_syscalls: .long NR_syscalls 965.L0x0130: .short 0x130 966.L0x0140: .short 0x140 967.L0x0150: .short 0x150 968.L0x0160: .short 0x160 969.L0x0170: .short 0x170 970.Lcritical_start: 971 .quad __critical_start 972.Lcritical_end: 973 .quad __critical_end 974 975 .section .rodata, "a" 976#define SYSCALL(esa,esame,emu) .long esame 977sys_call_table: 978#include "syscalls.S" 979#undef SYSCALL 980 981#ifdef CONFIG_COMPAT 982 983#define SYSCALL(esa,esame,emu) .long emu 984sys_call_table_emu: 985#include "syscalls.S" 986#undef SYSCALL 987#endif 988