1/*
2 *  arch/s390/kernel/entry.S
3 *    S390 low-level entry points.
4 *
5 *    Copyright (C) IBM Corp. 1999,2006
6 *    Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
7 *		 Hartmut Penner (hp@de.ibm.com),
8 *		 Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
9 *		 Heiko Carstens <heiko.carstens@de.ibm.com>
10 */
11
12#include <linux/sys.h>
13#include <linux/linkage.h>
14#include <asm/cache.h>
15#include <asm/lowcore.h>
16#include <asm/errno.h>
17#include <asm/ptrace.h>
18#include <asm/thread_info.h>
19#include <asm/asm-offsets.h>
20#include <asm/unistd.h>
21#include <asm/page.h>
22
23/*
24 * Stack layout for the system_call stack entry.
25 * The first few entries are identical to the user_regs_struct.
26 */
27SP_PTREGS    =	STACK_FRAME_OVERHEAD
28SP_ARGS      =	STACK_FRAME_OVERHEAD + __PT_ARGS
29SP_PSW	     =	STACK_FRAME_OVERHEAD + __PT_PSW
30SP_R0	     =	STACK_FRAME_OVERHEAD + __PT_GPRS
31SP_R1	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 4
32SP_R2	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 8
33SP_R3	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 12
34SP_R4	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 16
35SP_R5	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 20
36SP_R6	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 24
37SP_R7	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 28
38SP_R8	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 32
39SP_R9	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 36
40SP_R10	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 40
41SP_R11	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 44
42SP_R12	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 48
43SP_R13	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 52
44SP_R14	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 56
45SP_R15	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 60
46SP_ORIG_R2   =	STACK_FRAME_OVERHEAD + __PT_ORIG_GPR2
47SP_ILC	     =	STACK_FRAME_OVERHEAD + __PT_ILC
48SP_TRAP      =	STACK_FRAME_OVERHEAD + __PT_TRAP
49SP_SIZE      =	STACK_FRAME_OVERHEAD + __PT_SIZE
50
51_TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK | _TIF_NEED_RESCHED | \
52		 _TIF_MCCK_PENDING | _TIF_RESTART_SVC | _TIF_SINGLE_STEP )
53_TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK | _TIF_NEED_RESCHED | \
54		 _TIF_MCCK_PENDING)
55
56STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER
57STACK_SIZE  = 1 << STACK_SHIFT
58
59#define BASED(name) name-system_call(%r13)
60
61#ifdef CONFIG_TRACE_IRQFLAGS
62	.macro	TRACE_IRQS_ON
63	l	%r1,BASED(.Ltrace_irq_on)
64	basr	%r14,%r1
65	.endm
66
67	.macro	TRACE_IRQS_OFF
68	l	%r1,BASED(.Ltrace_irq_off)
69	basr	%r14,%r1
70	.endm
71#else
72#define TRACE_IRQS_ON
73#define TRACE_IRQS_OFF
74#endif
75
76/*
77 * Register usage in interrupt handlers:
78 *    R9  - pointer to current task structure
79 *    R13 - pointer to literal pool
80 *    R14 - return register for function calls
81 *    R15 - kernel stack pointer
82 */
83
84	.macro	STORE_TIMER lc_offset
85#ifdef CONFIG_VIRT_CPU_ACCOUNTING
86	stpt	\lc_offset
87#endif
88	.endm
89
90#ifdef CONFIG_VIRT_CPU_ACCOUNTING
91	.macro	UPDATE_VTIME lc_from,lc_to,lc_sum
92	lm	%r10,%r11,\lc_from
93	sl	%r10,\lc_to
94	sl	%r11,\lc_to+4
95	bc	3,BASED(0f)
96	sl	%r10,BASED(.Lc_1)
970:	al	%r10,\lc_sum
98	al	%r11,\lc_sum+4
99	bc	12,BASED(1f)
100	al	%r10,BASED(.Lc_1)
1011:	stm	%r10,%r11,\lc_sum
102	.endm
103#endif
104
105	.macro	SAVE_ALL_BASE savearea
106	stm	%r12,%r15,\savearea
107	l	%r13,__LC_SVC_NEW_PSW+4	# load &system_call to %r13
108	.endm
109
110	.macro	SAVE_ALL_SYNC psworg,savearea
111	la	%r12,\psworg
112	tm	\psworg+1,0x01		# test problem state bit
113	bz	BASED(2f)		# skip stack setup save
114	l	%r15,__LC_KERNEL_STACK	# problem state -> load ksp
115#ifdef CONFIG_CHECK_STACK
116	b	BASED(3f)
1172:	tml	%r15,STACK_SIZE - CONFIG_STACK_GUARD
118	bz	BASED(stack_overflow)
1193:
120#endif
1212:
122	.endm
123
124	.macro	SAVE_ALL_ASYNC psworg,savearea
125	la	%r12,\psworg
126	tm	\psworg+1,0x01		# test problem state bit
127	bnz	BASED(1f)		# from user -> load async stack
128	clc	\psworg+4(4),BASED(.Lcritical_end)
129	bhe	BASED(0f)
130	clc	\psworg+4(4),BASED(.Lcritical_start)
131	bl	BASED(0f)
132	l	%r14,BASED(.Lcleanup_critical)
133	basr	%r14,%r14
134	tm	1(%r12),0x01		# retest problem state after cleanup
135	bnz	BASED(1f)
1360:	l	%r14,__LC_ASYNC_STACK	# are we already on the async stack ?
137	slr	%r14,%r15
138	sra	%r14,STACK_SHIFT
139	be	BASED(2f)
1401:	l	%r15,__LC_ASYNC_STACK
141#ifdef CONFIG_CHECK_STACK
142	b	BASED(3f)
1432:	tml	%r15,STACK_SIZE - CONFIG_STACK_GUARD
144	bz	BASED(stack_overflow)
1453:
146#endif
1472:
148	.endm
149
150	.macro	CREATE_STACK_FRAME psworg,savearea
151	s	%r15,BASED(.Lc_spsize)	# make room for registers & psw
152	mvc	SP_PSW(8,%r15),0(%r12)	# move user PSW to stack
153	la	%r12,\psworg
154	st	%r2,SP_ORIG_R2(%r15)	# store original content of gpr 2
155	icm	%r12,12,__LC_SVC_ILC
156	stm	%r0,%r11,SP_R0(%r15)	# store gprs %r0-%r11 to kernel stack
157	st	%r12,SP_ILC(%r15)
158	mvc	SP_R12(16,%r15),\savearea # move %r12-%r15 to stack
159	la	%r12,0
160	st	%r12,__SF_BACKCHAIN(%r15)	# clear back chain
161	.endm
162
163	.macro	RESTORE_ALL psworg,sync
164	mvc	\psworg(8),SP_PSW(%r15) # move user PSW to lowcore
165	.if !\sync
166	ni	\psworg+1,0xfd		# clear wait state bit
167	.endif
168	lm	%r0,%r15,SP_R0(%r15)	# load gprs 0-15 of user
169	STORE_TIMER __LC_EXIT_TIMER
170	lpsw	\psworg			# back to caller
171	.endm
172
173/*
174 * Scheduler resume function, called by switch_to
175 *  gpr2 = (task_struct *) prev
176 *  gpr3 = (task_struct *) next
177 * Returns:
178 *  gpr2 = prev
179 */
180	.globl	__switch_to
181__switch_to:
182	basr	%r1,0
183__switch_to_base:
184	tm	__THREAD_per(%r3),0xe8		# new process is using per ?
185	bz	__switch_to_noper-__switch_to_base(%r1)	# if not we're fine
186	stctl	%c9,%c11,__SF_EMPTY(%r15)	# We are using per stuff
187	clc	__THREAD_per(12,%r3),__SF_EMPTY(%r15)
188	be	__switch_to_noper-__switch_to_base(%r1)	# we got away w/o bashing TLB's
189	lctl	%c9,%c11,__THREAD_per(%r3)	# Nope we didn't
190__switch_to_noper:
191	l	%r4,__THREAD_info(%r2)		# get thread_info of prev
192	tm	__TI_flags+3(%r4),_TIF_MCCK_PENDING # machine check pending?
193	bz	__switch_to_no_mcck-__switch_to_base(%r1)
194	ni	__TI_flags+3(%r4),255-_TIF_MCCK_PENDING # clear flag in prev
195	l	%r4,__THREAD_info(%r3)		# get thread_info of next
196	oi	__TI_flags+3(%r4),_TIF_MCCK_PENDING # set it in next
197__switch_to_no_mcck:
198	stm	%r6,%r15,__SF_GPRS(%r15)# store __switch_to registers of prev task
199	st	%r15,__THREAD_ksp(%r2)	# store kernel stack to prev->tss.ksp
200	l	%r15,__THREAD_ksp(%r3)	# load kernel stack from next->tss.ksp
201	lm	%r6,%r15,__SF_GPRS(%r15)# load __switch_to registers of next task
202	st	%r3,__LC_CURRENT	# __LC_CURRENT = current task struct
203	lctl	%c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4
204	l	%r3,__THREAD_info(%r3)	# load thread_info from task struct
205	st	%r3,__LC_THREAD_INFO
206	ahi	%r3,STACK_SIZE
207	st	%r3,__LC_KERNEL_STACK	# __LC_KERNEL_STACK = new kernel stack
208	br	%r14
209
210__critical_start:
211/*
212 * SVC interrupt handler routine. System calls are synchronous events and
213 * are executed with interrupts enabled.
214 */
215
216	.globl	system_call
217system_call:
218	STORE_TIMER __LC_SYNC_ENTER_TIMER
219sysc_saveall:
220	SAVE_ALL_BASE __LC_SAVE_AREA
221	SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
222	CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
223	lh	%r7,0x8a	  # get svc number from lowcore
224#ifdef CONFIG_VIRT_CPU_ACCOUNTING
225sysc_vtime:
226	tm	SP_PSW+1(%r15),0x01	# interrupting from user ?
227	bz	BASED(sysc_do_svc)
228	UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
229sysc_stime:
230	UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
231sysc_update:
232	mvc	__LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
233#endif
234sysc_do_svc:
235	l	%r9,__LC_THREAD_INFO	# load pointer to thread_info struct
236	sla	%r7,2			# *4 and test for svc 0
237	bnz	BASED(sysc_nr_ok)	# svc number > 0
238	# svc 0: system call number in %r1
239	cl	%r1,BASED(.Lnr_syscalls)
240	bnl	BASED(sysc_nr_ok)
241	lr	%r7,%r1 	  # copy svc number to %r7
242	sla	%r7,2		  # *4
243sysc_nr_ok:
244	mvc	SP_ARGS(4,%r15),SP_R7(%r15)
245sysc_do_restart:
246	l	%r8,BASED(.Lsysc_table)
247	tm	__TI_flags+3(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT)
248	l	%r8,0(%r7,%r8)	  # get system call addr.
249	bnz	BASED(sysc_tracesys)
250	basr	%r14,%r8	  # call sys_xxxx
251	st	%r2,SP_R2(%r15)   # store return value (change R2 on stack)
252
253sysc_return:
254	tm	SP_PSW+1(%r15),0x01	# returning to user ?
255	bno	BASED(sysc_leave)
256	tm	__TI_flags+3(%r9),_TIF_WORK_SVC
257	bnz	BASED(sysc_work)  # there is work to do (signals etc.)
258sysc_leave:
259	RESTORE_ALL __LC_RETURN_PSW,1
260
261#
262# recheck if there is more work to do
263#
264sysc_work_loop:
265	tm	__TI_flags+3(%r9),_TIF_WORK_SVC
266	bz	BASED(sysc_leave)	# there is no work to do
267#
268# One of the work bits is on. Find out which one.
269#
270sysc_work:
271	tm	__TI_flags+3(%r9),_TIF_MCCK_PENDING
272	bo	BASED(sysc_mcck_pending)
273	tm	__TI_flags+3(%r9),_TIF_NEED_RESCHED
274	bo	BASED(sysc_reschedule)
275	tm	__TI_flags+3(%r9),(_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK)
276	bnz	BASED(sysc_sigpending)
277	tm	__TI_flags+3(%r9),_TIF_RESTART_SVC
278	bo	BASED(sysc_restart)
279	tm	__TI_flags+3(%r9),_TIF_SINGLE_STEP
280	bo	BASED(sysc_singlestep)
281	b	BASED(sysc_leave)
282
283#
284# _TIF_NEED_RESCHED is set, call schedule
285#
286sysc_reschedule:
287	l	%r1,BASED(.Lschedule)
288	la	%r14,BASED(sysc_work_loop)
289	br	%r1			# call scheduler
290
291#
292# _TIF_MCCK_PENDING is set, call handler
293#
294sysc_mcck_pending:
295	l	%r1,BASED(.Ls390_handle_mcck)
296	la	%r14,BASED(sysc_work_loop)
297	br	%r1			# TIF bit will be cleared by handler
298
299#
300# _TIF_SIGPENDING or _TIF_RESTORE_SIGMASK is set, call do_signal
301#
302sysc_sigpending:
303	ni	__TI_flags+3(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
304	la	%r2,SP_PTREGS(%r15)	# load pt_regs
305	l	%r1,BASED(.Ldo_signal)
306	basr	%r14,%r1		# call do_signal
307	tm	__TI_flags+3(%r9),_TIF_RESTART_SVC
308	bo	BASED(sysc_restart)
309	tm	__TI_flags+3(%r9),_TIF_SINGLE_STEP
310	bo	BASED(sysc_singlestep)
311	b	BASED(sysc_work_loop)
312
313#
314# _TIF_RESTART_SVC is set, set up registers and restart svc
315#
316sysc_restart:
317	ni	__TI_flags+3(%r9),255-_TIF_RESTART_SVC # clear TIF_RESTART_SVC
318	l	%r7,SP_R2(%r15) 	# load new svc number
319	sla	%r7,2
320	mvc	SP_R2(4,%r15),SP_ORIG_R2(%r15) # restore first argument
321	lm	%r2,%r6,SP_R2(%r15)	# load svc arguments
322	b	BASED(sysc_do_restart)	# restart svc
323
324#
325# _TIF_SINGLE_STEP is set, call do_single_step
326#
327sysc_singlestep:
328	ni	__TI_flags+3(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
329	mvi	SP_TRAP+1(%r15),0x28	# set trap indication to pgm check
330	la	%r2,SP_PTREGS(%r15)	# address of register-save area
331	l	%r1,BASED(.Lhandle_per)	# load adr. of per handler
332	la	%r14,BASED(sysc_return)	# load adr. of system return
333	br	%r1			# branch to do_single_step
334
335#
336# call trace before and after sys_call
337#
338sysc_tracesys:
339	l	%r1,BASED(.Ltrace)
340	la	%r2,SP_PTREGS(%r15)	# load pt_regs
341	la	%r3,0
342	srl	%r7,2
343	st	%r7,SP_R2(%r15)
344	basr	%r14,%r1
345	clc	SP_R2(4,%r15),BASED(.Lnr_syscalls)
346	bnl	BASED(sysc_tracenogo)
347	l	%r8,BASED(.Lsysc_table)
348	l	%r7,SP_R2(%r15) 	# strace might have changed the
349	sll	%r7,2			#  system call
350	l	%r8,0(%r7,%r8)
351sysc_tracego:
352	lm	%r3,%r6,SP_R3(%r15)
353	l	%r2,SP_ORIG_R2(%r15)
354	basr	%r14,%r8		# call sys_xxx
355	st	%r2,SP_R2(%r15)		# store return value
356sysc_tracenogo:
357	tm	__TI_flags+3(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT)
358	bz	BASED(sysc_return)
359	l	%r1,BASED(.Ltrace)
360	la	%r2,SP_PTREGS(%r15)	# load pt_regs
361	la	%r3,1
362	la	%r14,BASED(sysc_return)
363	br	%r1
364
365#
366# a new process exits the kernel with ret_from_fork
367#
368	.globl	ret_from_fork
369ret_from_fork:
370	l	%r13,__LC_SVC_NEW_PSW+4
371	l	%r9,__LC_THREAD_INFO	# load pointer to thread_info struct
372	tm	SP_PSW+1(%r15),0x01	# forking a kernel thread ?
373	bo	BASED(0f)
374	st	%r15,SP_R15(%r15)	# store stack pointer for new kthread
3750:	l	%r1,BASED(.Lschedtail)
376	basr	%r14,%r1
377	TRACE_IRQS_ON
378	stosm	__SF_EMPTY(%r15),0x03	# reenable interrupts
379	b	BASED(sysc_return)
380
381#
382# kernel_execve function needs to deal with pt_regs that is not
383# at the usual place
384#
385	.globl	kernel_execve
386kernel_execve:
387	stm	%r12,%r15,48(%r15)
388	lr	%r14,%r15
389	l	%r13,__LC_SVC_NEW_PSW+4
390	s	%r15,BASED(.Lc_spsize)
391	st	%r14,__SF_BACKCHAIN(%r15)
392	la	%r12,SP_PTREGS(%r15)
393	xc	0(__PT_SIZE,%r12),0(%r12)
394	l	%r1,BASED(.Ldo_execve)
395	lr	%r5,%r12
396	basr	%r14,%r1
397	ltr	%r2,%r2
398	be	BASED(0f)
399	a	%r15,BASED(.Lc_spsize)
400	lm	%r12,%r15,48(%r15)
401	br	%r14
402	# execve succeeded.
4030:	stnsm	__SF_EMPTY(%r15),0xfc	# disable interrupts
404	l	%r15,__LC_KERNEL_STACK	# load ksp
405	s	%r15,BASED(.Lc_spsize)	# make room for registers & psw
406	l	%r9,__LC_THREAD_INFO
407	mvc	SP_PTREGS(__PT_SIZE,%r15),0(%r12)	# copy pt_regs
408	xc	__SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15)
409	stosm	__SF_EMPTY(%r15),0x03	# reenable interrupts
410	l	%r1,BASED(.Lexecve_tail)
411	basr	%r14,%r1
412	b	BASED(sysc_return)
413
414/*
415 * Program check handler routine
416 */
417
418	.globl	pgm_check_handler
419pgm_check_handler:
420	STORE_TIMER __LC_SYNC_ENTER_TIMER
421	SAVE_ALL_BASE __LC_SAVE_AREA
422	tm	__LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception
423	bnz	BASED(pgm_per)		# got per exception -> special case
424	SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
425	CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
426#ifdef CONFIG_VIRT_CPU_ACCOUNTING
427	tm	SP_PSW+1(%r15),0x01	# interrupting from user ?
428	bz	BASED(pgm_no_vtime)
429	UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
430	UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
431	mvc	__LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
432pgm_no_vtime:
433#endif
434	l	%r9,__LC_THREAD_INFO	# load pointer to thread_info struct
435	l	%r3,__LC_PGM_ILC	# load program interruption code
436	la	%r8,0x7f
437	nr	%r8,%r3
438pgm_do_call:
439	l	%r7,BASED(.Ljump_table)
440	sll	%r8,2
441	l	%r7,0(%r8,%r7)		# load address of handler routine
442	la	%r2,SP_PTREGS(%r15)	# address of register-save area
443	la	%r14,BASED(sysc_return)
444	br	%r7			# branch to interrupt-handler
445
446#
447# handle per exception
448#
449pgm_per:
450	tm	__LC_PGM_OLD_PSW,0x40	# test if per event recording is on
451	bnz	BASED(pgm_per_std)	# ok, normal per event from user space
452# ok its one of the special cases, now we need to find out which one
453	clc	__LC_PGM_OLD_PSW(8),__LC_SVC_NEW_PSW
454	be	BASED(pgm_svcper)
455# no interesting special case, ignore PER event
456	lm	%r12,%r15,__LC_SAVE_AREA
457	lpsw	0x28
458
459#
460# Normal per exception
461#
462pgm_per_std:
463	SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
464	CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
465#ifdef CONFIG_VIRT_CPU_ACCOUNTING
466	tm	SP_PSW+1(%r15),0x01	# interrupting from user ?
467	bz	BASED(pgm_no_vtime2)
468	UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
469	UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
470	mvc	__LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
471pgm_no_vtime2:
472#endif
473	l	%r9,__LC_THREAD_INFO	# load pointer to thread_info struct
474	l	%r1,__TI_task(%r9)
475	mvc	__THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
476	mvc	__THREAD_per+__PER_address(4,%r1),__LC_PER_ADDRESS
477	mvc	__THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
478	oi	__TI_flags+3(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
479	tm	SP_PSW+1(%r15),0x01	# kernel per event ?
480	bz	BASED(kernel_per)
481	l	%r3,__LC_PGM_ILC	# load program interruption code
482	la	%r8,0x7f
483	nr	%r8,%r3 		# clear per-event-bit and ilc
484	be	BASED(sysc_return)	# only per or per+check ?
485	b	BASED(pgm_do_call)
486
487#
488# it was a single stepped SVC that is causing all the trouble
489#
490pgm_svcper:
491	SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
492	CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
493#ifdef CONFIG_VIRT_CPU_ACCOUNTING
494	tm	SP_PSW+1(%r15),0x01	# interrupting from user ?
495	bz	BASED(pgm_no_vtime3)
496	UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
497	UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
498	mvc	__LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
499pgm_no_vtime3:
500#endif
501	lh	%r7,0x8a		# get svc number from lowcore
502	l	%r9,__LC_THREAD_INFO	# load pointer to thread_info struct
503	l	%r1,__TI_task(%r9)
504	mvc	__THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
505	mvc	__THREAD_per+__PER_address(4,%r1),__LC_PER_ADDRESS
506	mvc	__THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
507	oi	__TI_flags+3(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
508	TRACE_IRQS_ON
509	stosm	__SF_EMPTY(%r15),0x03	# reenable interrupts
510	b	BASED(sysc_do_svc)
511
512#
513# per was called from kernel, must be kprobes
514#
515kernel_per:
516	mvi	SP_TRAP+1(%r15),0x28	# set trap indication to pgm check
517	la	%r2,SP_PTREGS(%r15)	# address of register-save area
518	l	%r1,BASED(.Lhandle_per)	# load adr. of per handler
519	la	%r14,BASED(sysc_leave)	# load adr. of system return
520	br	%r1			# branch to do_single_step
521
522/*
523 * IO interrupt handler routine
524 */
525
526	.globl io_int_handler
527io_int_handler:
528	STORE_TIMER __LC_ASYNC_ENTER_TIMER
529	stck	__LC_INT_CLOCK
530	SAVE_ALL_BASE __LC_SAVE_AREA+16
531	SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+16
532	CREATE_STACK_FRAME __LC_IO_OLD_PSW,__LC_SAVE_AREA+16
533#ifdef CONFIG_VIRT_CPU_ACCOUNTING
534	tm	SP_PSW+1(%r15),0x01	# interrupting from user ?
535	bz	BASED(io_no_vtime)
536	UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
537	UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
538	mvc	__LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
539io_no_vtime:
540#endif
541	l	%r9,__LC_THREAD_INFO	# load pointer to thread_info struct
542	TRACE_IRQS_OFF
543	l	%r1,BASED(.Ldo_IRQ)	# load address of do_IRQ
544	la	%r2,SP_PTREGS(%r15)	# address of register-save area
545	basr	%r14,%r1		# branch to standard irq handler
546	TRACE_IRQS_ON
547
548io_return:
549	tm	SP_PSW+1(%r15),0x01	# returning to user ?
550#ifdef CONFIG_PREEMPT
551	bno	BASED(io_preempt)	# no -> check for preemptive scheduling
552#else
553	bno	BASED(io_leave) 	# no-> skip resched & signal
554#endif
555	tm	__TI_flags+3(%r9),_TIF_WORK_INT
556	bnz	BASED(io_work)		# there is work to do (signals etc.)
557io_leave:
558	RESTORE_ALL __LC_RETURN_PSW,0
559io_done:
560
561#ifdef CONFIG_PREEMPT
562io_preempt:
563	icm	%r0,15,__TI_precount(%r9)
564	bnz	BASED(io_leave)
565	l	%r1,SP_R15(%r15)
566	s	%r1,BASED(.Lc_spsize)
567	mvc	SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
568	xc	__SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain
569	lr	%r15,%r1
570io_resume_loop:
571	tm	__TI_flags+3(%r9),_TIF_NEED_RESCHED
572	bno	BASED(io_leave)
573	mvc	__TI_precount(4,%r9),BASED(.Lc_pactive)
574	stosm	__SF_EMPTY(%r15),0x03  # reenable interrupts
575	l	%r1,BASED(.Lschedule)
576	basr	%r14,%r1	       # call schedule
577	stnsm	__SF_EMPTY(%r15),0xfc  # disable I/O and ext. interrupts
578	xc	__TI_precount(4,%r9),__TI_precount(%r9)
579	b	BASED(io_resume_loop)
580#endif
581
582#
583# switch to kernel stack, then check the TIF bits
584#
585io_work:
586	l	%r1,__LC_KERNEL_STACK
587	s	%r1,BASED(.Lc_spsize)
588	mvc	SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
589	xc	__SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain
590	lr	%r15,%r1
591#
592# One of the work bits is on. Find out which one.
593# Checked are: _TIF_SIGPENDING, _TIF_RESTORE_SIGMASK, _TIF_NEED_RESCHED
594#		and _TIF_MCCK_PENDING
595#
596io_work_loop:
597	tm	__TI_flags+3(%r9),_TIF_MCCK_PENDING
598	bo	BASED(io_mcck_pending)
599	tm	__TI_flags+3(%r9),_TIF_NEED_RESCHED
600	bo	BASED(io_reschedule)
601	tm	__TI_flags+3(%r9),(_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK)
602	bnz	BASED(io_sigpending)
603	b	BASED(io_leave)
604
605#
606# _TIF_MCCK_PENDING is set, call handler
607#
608io_mcck_pending:
609	l	%r1,BASED(.Ls390_handle_mcck)
610	la	%r14,BASED(io_work_loop)
611	br	%r1			# TIF bit will be cleared by handler
612
613#
614# _TIF_NEED_RESCHED is set, call schedule
615#
616io_reschedule:
617	l	%r1,BASED(.Lschedule)
618	stosm	__SF_EMPTY(%r15),0x03	# reenable interrupts
619	basr	%r14,%r1		# call scheduler
620	stnsm	__SF_EMPTY(%r15),0xfc	# disable I/O and ext. interrupts
621	tm	__TI_flags+3(%r9),_TIF_WORK_INT
622	bz	BASED(io_leave) 	# there is no work to do
623	b	BASED(io_work_loop)
624
625#
626# _TIF_SIGPENDING or _TIF_RESTORE_SIGMASK is set, call do_signal
627#
628io_sigpending:
629	stosm	__SF_EMPTY(%r15),0x03	# reenable interrupts
630	la	%r2,SP_PTREGS(%r15)	# load pt_regs
631	l	%r1,BASED(.Ldo_signal)
632	basr	%r14,%r1		# call do_signal
633	stnsm	__SF_EMPTY(%r15),0xfc	# disable I/O and ext. interrupts
634	b	BASED(io_work_loop)
635
636/*
637 * External interrupt handler routine
638 */
639
640	.globl	ext_int_handler
641ext_int_handler:
642	STORE_TIMER __LC_ASYNC_ENTER_TIMER
643	stck	__LC_INT_CLOCK
644	SAVE_ALL_BASE __LC_SAVE_AREA+16
645	SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16
646	CREATE_STACK_FRAME __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16
647#ifdef CONFIG_VIRT_CPU_ACCOUNTING
648	tm	SP_PSW+1(%r15),0x01	# interrupting from user ?
649	bz	BASED(ext_no_vtime)
650	UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
651	UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
652	mvc	__LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
653ext_no_vtime:
654#endif
655	l	%r9,__LC_THREAD_INFO	# load pointer to thread_info struct
656	TRACE_IRQS_OFF
657	la	%r2,SP_PTREGS(%r15)	# address of register-save area
658	lh	%r3,__LC_EXT_INT_CODE	# get interruption code
659	l	%r1,BASED(.Ldo_extint)
660	basr	%r14,%r1
661	TRACE_IRQS_ON
662	b	BASED(io_return)
663
664__critical_end:
665
666/*
667 * Machine check handler routines
668 */
669
670	.globl mcck_int_handler
671mcck_int_handler:
672	spt	__LC_CPU_TIMER_SAVE_AREA	# revalidate cpu timer
673	lm	%r0,%r15,__LC_GPREGS_SAVE_AREA	# revalidate gprs
674	SAVE_ALL_BASE __LC_SAVE_AREA+32
675	la	%r12,__LC_MCK_OLD_PSW
676	tm	__LC_MCCK_CODE,0x80	# system damage?
677	bo	BASED(mcck_int_main)	# yes -> rest of mcck code invalid
678#ifdef CONFIG_VIRT_CPU_ACCOUNTING
679	mvc	__LC_SAVE_AREA+52(8),__LC_ASYNC_ENTER_TIMER
680	mvc	__LC_ASYNC_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA
681	tm	__LC_MCCK_CODE+5,0x02	# stored cpu timer value valid?
682	bo	BASED(1f)
683	la	%r14,__LC_SYNC_ENTER_TIMER
684	clc	0(8,%r14),__LC_ASYNC_ENTER_TIMER
685	bl	BASED(0f)
686	la	%r14,__LC_ASYNC_ENTER_TIMER
6870:	clc	0(8,%r14),__LC_EXIT_TIMER
688	bl	BASED(0f)
689	la	%r14,__LC_EXIT_TIMER
6900:	clc	0(8,%r14),__LC_LAST_UPDATE_TIMER
691	bl	BASED(0f)
692	la	%r14,__LC_LAST_UPDATE_TIMER
6930:	spt	0(%r14)
694	mvc	__LC_ASYNC_ENTER_TIMER(8),0(%r14)
6951:
696#endif
697	tm	__LC_MCCK_CODE+2,0x09	# mwp + ia of old psw valid?
698	bno	BASED(mcck_int_main)	# no -> skip cleanup critical
699	tm	__LC_MCK_OLD_PSW+1,0x01	# test problem state bit
700	bnz	BASED(mcck_int_main)	# from user -> load async stack
701	clc	__LC_MCK_OLD_PSW+4(4),BASED(.Lcritical_end)
702	bhe	BASED(mcck_int_main)
703	clc	__LC_MCK_OLD_PSW+4(4),BASED(.Lcritical_start)
704	bl	BASED(mcck_int_main)
705	l	%r14,BASED(.Lcleanup_critical)
706	basr	%r14,%r14
707mcck_int_main:
708	l	%r14,__LC_PANIC_STACK	# are we already on the panic stack?
709	slr	%r14,%r15
710	sra	%r14,PAGE_SHIFT
711	be	BASED(0f)
712	l	%r15,__LC_PANIC_STACK	# load panic stack
7130:	CREATE_STACK_FRAME __LC_MCK_OLD_PSW,__LC_SAVE_AREA+32
714#ifdef CONFIG_VIRT_CPU_ACCOUNTING
715	tm	__LC_MCCK_CODE+2,0x08	# mwp of old psw valid?
716	bno	BASED(mcck_no_vtime)	# no -> skip cleanup critical
717	tm	SP_PSW+1(%r15),0x01	# interrupting from user ?
718	bz	BASED(mcck_no_vtime)
719	UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
720	UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
721	mvc	__LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
722mcck_no_vtime:
723#endif
724	l	%r9,__LC_THREAD_INFO	# load pointer to thread_info struct
725	la	%r2,SP_PTREGS(%r15)	# load pt_regs
726	l	%r1,BASED(.Ls390_mcck)
727	basr	%r14,%r1		# call machine check handler
728	tm	SP_PSW+1(%r15),0x01	# returning to user ?
729	bno	BASED(mcck_return)
730	l	%r1,__LC_KERNEL_STACK	# switch to kernel stack
731	s	%r1,BASED(.Lc_spsize)
732	mvc	SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
733	xc	__SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain
734	lr	%r15,%r1
735	stosm	__SF_EMPTY(%r15),0x04	# turn dat on
736	tm	__TI_flags+3(%r9),_TIF_MCCK_PENDING
737	bno	BASED(mcck_return)
738	TRACE_IRQS_OFF
739	l	%r1,BASED(.Ls390_handle_mcck)
740	basr	%r14,%r1		# call machine check handler
741	TRACE_IRQS_ON
742mcck_return:
743	mvc	__LC_RETURN_MCCK_PSW(8),SP_PSW(%r15) # move return PSW
744	ni	__LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit
745#ifdef CONFIG_VIRT_CPU_ACCOUNTING
746	mvc	__LC_ASYNC_ENTER_TIMER(8),__LC_SAVE_AREA+52
747	tm	__LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
748	bno	BASED(0f)
749	lm	%r0,%r15,SP_R0(%r15)	# load gprs 0-15
750	stpt	__LC_EXIT_TIMER
751	lpsw	__LC_RETURN_MCCK_PSW	# back to caller
7520:
753#endif
754	lm	%r0,%r15,SP_R0(%r15)	# load gprs 0-15
755	lpsw	__LC_RETURN_MCCK_PSW	# back to caller
756
757	RESTORE_ALL __LC_RETURN_MCCK_PSW,0
758
759/*
760 * Restart interruption handler, kick starter for additional CPUs
761 */
762#ifdef CONFIG_SMP
763#ifndef CONFIG_HOTPLUG_CPU
764	.section .init.text,"ax"
765#endif
766	.globl restart_int_handler
767restart_int_handler:
768	l	%r15,__LC_SAVE_AREA+60	# load ksp
769	lctl	%c0,%c15,__LC_CREGS_SAVE_AREA # get new ctl regs
770	lam	%a0,%a15,__LC_AREGS_SAVE_AREA
771	lm	%r6,%r15,__SF_GPRS(%r15) # load registers from clone
772	stosm	__SF_EMPTY(%r15),0x04	# now we can turn dat on
773	basr	%r14,0
774	l	%r14,restart_addr-.(%r14)
775	br	%r14			# branch to start_secondary
776restart_addr:
777	.long	start_secondary
778#ifndef CONFIG_HOTPLUG_CPU
779	.previous
780#endif
781#else
782/*
783 * If we do not run with SMP enabled, let the new CPU crash ...
784 */
785	.globl restart_int_handler
786restart_int_handler:
787	basr	%r1,0
788restart_base:
789	lpsw	restart_crash-restart_base(%r1)
790	.align	8
791restart_crash:
792	.long	0x000a0000,0x00000000
793restart_go:
794#endif
795
796#ifdef CONFIG_CHECK_STACK
797/*
798 * The synchronous or the asynchronous stack overflowed. We are dead.
799 * No need to properly save the registers, we are going to panic anyway.
800 * Setup a pt_regs so that show_trace can provide a good call trace.
801 */
802stack_overflow:
803	l	%r15,__LC_PANIC_STACK	# change to panic stack
804	sl	%r15,BASED(.Lc_spsize)
805	mvc	SP_PSW(8,%r15),0(%r12)	# move user PSW to stack
806	stm	%r0,%r11,SP_R0(%r15)	# store gprs %r0-%r11 to kernel stack
807	la	%r1,__LC_SAVE_AREA
808	ch	%r12,BASED(.L0x020)	# old psw addr == __LC_SVC_OLD_PSW ?
809	be	BASED(0f)
810	ch	%r12,BASED(.L0x028)	# old psw addr == __LC_PGM_OLD_PSW ?
811	be	BASED(0f)
812	la	%r1,__LC_SAVE_AREA+16
8130:	mvc	SP_R12(16,%r15),0(%r1)	# move %r12-%r15 to stack
814	xc	__SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15) # clear back chain
815	l	%r1,BASED(1f)		# branch to kernel_stack_overflow
816	la	%r2,SP_PTREGS(%r15)	# load pt_regs
817	br	%r1
8181:	.long	kernel_stack_overflow
819#endif
820
821cleanup_table_system_call:
822	.long	system_call + 0x80000000, sysc_do_svc + 0x80000000
823cleanup_table_sysc_return:
824	.long	sysc_return + 0x80000000, sysc_leave + 0x80000000
825cleanup_table_sysc_leave:
826	.long	sysc_leave + 0x80000000, sysc_work_loop + 0x80000000
827cleanup_table_sysc_work_loop:
828	.long	sysc_work_loop + 0x80000000, sysc_reschedule + 0x80000000
829cleanup_table_io_return:
830	.long	io_return + 0x80000000, io_leave + 0x80000000
831cleanup_table_io_leave:
832	.long	io_leave + 0x80000000, io_done + 0x80000000
833cleanup_table_io_work_loop:
834	.long	io_work_loop + 0x80000000, io_mcck_pending + 0x80000000
835
836cleanup_critical:
837	clc	4(4,%r12),BASED(cleanup_table_system_call)
838	bl	BASED(0f)
839	clc	4(4,%r12),BASED(cleanup_table_system_call+4)
840	bl	BASED(cleanup_system_call)
8410:
842	clc	4(4,%r12),BASED(cleanup_table_sysc_return)
843	bl	BASED(0f)
844	clc	4(4,%r12),BASED(cleanup_table_sysc_return+4)
845	bl	BASED(cleanup_sysc_return)
8460:
847	clc	4(4,%r12),BASED(cleanup_table_sysc_leave)
848	bl	BASED(0f)
849	clc	4(4,%r12),BASED(cleanup_table_sysc_leave+4)
850	bl	BASED(cleanup_sysc_leave)
8510:
852	clc	4(4,%r12),BASED(cleanup_table_sysc_work_loop)
853	bl	BASED(0f)
854	clc	4(4,%r12),BASED(cleanup_table_sysc_work_loop+4)
855	bl	BASED(cleanup_sysc_return)
8560:
857	clc	4(4,%r12),BASED(cleanup_table_io_return)
858	bl	BASED(0f)
859	clc	4(4,%r12),BASED(cleanup_table_io_return+4)
860	bl	BASED(cleanup_io_return)
8610:
862	clc	4(4,%r12),BASED(cleanup_table_io_leave)
863	bl	BASED(0f)
864	clc	4(4,%r12),BASED(cleanup_table_io_leave+4)
865	bl	BASED(cleanup_io_leave)
8660:
867	clc	4(4,%r12),BASED(cleanup_table_io_work_loop)
868	bl	BASED(0f)
869	clc	4(4,%r12),BASED(cleanup_table_io_work_loop+4)
870	bl	BASED(cleanup_io_return)
8710:
872	br	%r14
873
874cleanup_system_call:
875	mvc	__LC_RETURN_PSW(8),0(%r12)
876	c	%r12,BASED(.Lmck_old_psw)
877	be	BASED(0f)
878	la	%r12,__LC_SAVE_AREA+16
879	b	BASED(1f)
8800:	la	%r12,__LC_SAVE_AREA+32
8811:
882#ifdef CONFIG_VIRT_CPU_ACCOUNTING
883	clc	__LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+4)
884	bh	BASED(0f)
885	mvc	__LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
8860:	clc	__LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+8)
887	bhe	BASED(cleanup_vtime)
888#endif
889	clc	__LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn)
890	bh	BASED(0f)
891	mvc	__LC_SAVE_AREA(16),0(%r12)
8920:	st	%r13,4(%r12)
893	st	%r12,__LC_SAVE_AREA+48	# argh
894	SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
895	CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
896	l	%r12,__LC_SAVE_AREA+48	# argh
897	st	%r15,12(%r12)
898	lh	%r7,0x8a
899#ifdef CONFIG_VIRT_CPU_ACCOUNTING
900cleanup_vtime:
901	clc	__LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+12)
902	bhe	BASED(cleanup_stime)
903	tm	SP_PSW+1(%r15),0x01	# interrupting from user ?
904	bz	BASED(cleanup_novtime)
905	UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
906cleanup_stime:
907	clc	__LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+16)
908	bh	BASED(cleanup_update)
909	UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
910cleanup_update:
911	mvc	__LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
912cleanup_novtime:
913#endif
914	mvc	__LC_RETURN_PSW+4(4),BASED(cleanup_table_system_call+4)
915	la	%r12,__LC_RETURN_PSW
916	br	%r14
917cleanup_system_call_insn:
918	.long	sysc_saveall + 0x80000000
919#ifdef CONFIG_VIRT_CPU_ACCOUNTING
920	.long	system_call + 0x80000000
921	.long	sysc_vtime + 0x80000000
922	.long	sysc_stime + 0x80000000
923	.long	sysc_update + 0x80000000
924#endif
925
926cleanup_sysc_return:
927	mvc	__LC_RETURN_PSW(4),0(%r12)
928	mvc	__LC_RETURN_PSW+4(4),BASED(cleanup_table_sysc_return)
929	la	%r12,__LC_RETURN_PSW
930	br	%r14
931
932cleanup_sysc_leave:
933	clc	4(4,%r12),BASED(cleanup_sysc_leave_insn)
934	be	BASED(2f)
935#ifdef CONFIG_VIRT_CPU_ACCOUNTING
936	mvc	__LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
937	clc	4(4,%r12),BASED(cleanup_sysc_leave_insn+4)
938	be	BASED(2f)
939#endif
940	mvc	__LC_RETURN_PSW(8),SP_PSW(%r15)
941	c	%r12,BASED(.Lmck_old_psw)
942	bne	BASED(0f)
943	mvc	__LC_SAVE_AREA+32(16),SP_R12(%r15)
944	b	BASED(1f)
9450:	mvc	__LC_SAVE_AREA+16(16),SP_R12(%r15)
9461:	lm	%r0,%r11,SP_R0(%r15)
947	l	%r15,SP_R15(%r15)
9482:	la	%r12,__LC_RETURN_PSW
949	br	%r14
950cleanup_sysc_leave_insn:
951#ifdef CONFIG_VIRT_CPU_ACCOUNTING
952	.long	sysc_leave + 14 + 0x80000000
953#endif
954	.long	sysc_leave + 10 + 0x80000000
955
956cleanup_io_return:
957	mvc	__LC_RETURN_PSW(4),0(%r12)
958	mvc	__LC_RETURN_PSW+4(4),BASED(cleanup_table_io_work_loop)
959	la	%r12,__LC_RETURN_PSW
960	br	%r14
961
962cleanup_io_leave:
963	clc	4(4,%r12),BASED(cleanup_io_leave_insn)
964	be	BASED(2f)
965#ifdef CONFIG_VIRT_CPU_ACCOUNTING
966	mvc	__LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
967	clc	4(4,%r12),BASED(cleanup_io_leave_insn+4)
968	be	BASED(2f)
969#endif
970	mvc	__LC_RETURN_PSW(8),SP_PSW(%r15)
971	c	%r12,BASED(.Lmck_old_psw)
972	bne	BASED(0f)
973	mvc	__LC_SAVE_AREA+32(16),SP_R12(%r15)
974	b	BASED(1f)
9750:	mvc	__LC_SAVE_AREA+16(16),SP_R12(%r15)
9761:	lm	%r0,%r11,SP_R0(%r15)
977	l	%r15,SP_R15(%r15)
9782:	la	%r12,__LC_RETURN_PSW
979	br	%r14
980cleanup_io_leave_insn:
981#ifdef CONFIG_VIRT_CPU_ACCOUNTING
982	.long	io_leave + 18 + 0x80000000
983#endif
984	.long	io_leave + 14 + 0x80000000
985
986/*
987 * Integer constants
988 */
989		.align	4
990.Lc_spsize:	.long	SP_SIZE
991.Lc_overhead:	.long	STACK_FRAME_OVERHEAD
992.Lc_pactive:	.long	PREEMPT_ACTIVE
993.Lnr_syscalls:	.long	NR_syscalls
994.L0x018:	.short	0x018
995.L0x020:	.short	0x020
996.L0x028:	.short	0x028
997.L0x030:	.short	0x030
998.L0x038:	.short	0x038
999.Lc_1:		.long	1
1000
1001/*
1002 * Symbol constants
1003 */
1004.Ls390_mcck:	.long	s390_do_machine_check
1005.Ls390_handle_mcck:
1006		.long	s390_handle_mcck
1007.Lmck_old_psw:	.long	__LC_MCK_OLD_PSW
1008.Ldo_IRQ:	.long	do_IRQ
1009.Ldo_extint:	.long	do_extint
1010.Ldo_signal:	.long	do_signal
1011.Lhandle_per:	.long	do_single_step
1012.Ldo_execve:	.long	do_execve
1013.Lexecve_tail:	.long	execve_tail
1014.Ljump_table:	.long	pgm_check_table
1015.Lschedule:	.long	schedule
1016.Ltrace:	.long	syscall_trace
1017.Lschedtail:	.long	schedule_tail
1018.Lsysc_table:	.long	sys_call_table
1019#ifdef CONFIG_TRACE_IRQFLAGS
1020.Ltrace_irq_on: .long	trace_hardirqs_on
1021.Ltrace_irq_off:
1022		.long	trace_hardirqs_off
1023#endif
1024.Lcritical_start:
1025		.long	__critical_start + 0x80000000
1026.Lcritical_end:
1027		.long	__critical_end + 0x80000000
1028.Lcleanup_critical:
1029		.long	cleanup_critical
1030
1031		.section .rodata, "a"
1032#define SYSCALL(esa,esame,emu)	.long esa
1033sys_call_table:
1034#include "syscalls.S"
1035#undef SYSCALL
1036