1/*
2 * r2300.c: R2000 and R3000 specific mmu/cache code.
3 *
4 * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
5 *
6 * with a lot of changes to make this thing work for R3000s
7 * Tx39XX R4k style caches added. HK
8 * Copyright (C) 1998, 1999, 2000 Harald Koerfgen
9 * Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
10 * Copyright (C) 2001, 2004  Maciej W. Rozycki
11 */
12#include <linux/init.h>
13#include <linux/kernel.h>
14#include <linux/sched.h>
15#include <linux/mm.h>
16
17#include <asm/page.h>
18#include <asm/pgtable.h>
19#include <asm/mmu_context.h>
20#include <asm/system.h>
21#include <asm/isadep.h>
22#include <asm/io.h>
23#include <asm/bootinfo.h>
24#include <asm/cpu.h>
25
26static unsigned long icache_size, dcache_size;		/* Size in bytes */
27static unsigned long icache_lsize, dcache_lsize;	/* Size in bytes */
28
29#undef DEBUG_CACHE
30
31unsigned long __init r3k_cache_size(unsigned long ca_flags)
32{
33	unsigned long flags, status, dummy, size;
34	volatile unsigned long *p;
35
36	p = (volatile unsigned long *) KSEG0;
37
38	flags = read_c0_status();
39
40	/* isolate cache space */
41	write_c0_status((ca_flags|flags)&~ST0_IEC);
42
43	*p = 0xa5a55a5a;
44	dummy = *p;
45	status = read_c0_status();
46
47	if (dummy != 0xa5a55a5a || (status & ST0_CM)) {
48		size = 0;
49	} else {
50		for (size = 128; size <= 0x40000; size <<= 1)
51			*(p + size) = 0;
52		*p = -1;
53		for (size = 128;
54		     (size <= 0x40000) && (*(p + size) == 0);
55		     size <<= 1)
56			;
57		if (size > 0x40000)
58			size = 0;
59	}
60
61	write_c0_status(flags);
62
63	return size * sizeof(*p);
64}
65
66unsigned long __init r3k_cache_lsize(unsigned long ca_flags)
67{
68	unsigned long flags, status, lsize, i;
69	volatile unsigned long *p;
70
71	p = (volatile unsigned long *) KSEG0;
72
73	flags = read_c0_status();
74
75	/* isolate cache space */
76	write_c0_status((ca_flags|flags)&~ST0_IEC);
77
78	for (i = 0; i < 128; i++)
79		*(p + i) = 0;
80	*(volatile unsigned char *)p = 0;
81	for (lsize = 1; lsize < 128; lsize <<= 1) {
82		*(p + lsize);
83		status = read_c0_status();
84		if (!(status & ST0_CM))
85			break;
86	}
87	for (i = 0; i < 128; i += lsize)
88		*(volatile unsigned char *)(p + i) = 0;
89
90	write_c0_status(flags);
91
92	return lsize * sizeof(*p);
93}
94
95static void __init r3k_probe_cache(void)
96{
97	dcache_size = r3k_cache_size(ST0_ISC);
98	if (dcache_size)
99		dcache_lsize = r3k_cache_lsize(ST0_ISC);
100
101	icache_size = r3k_cache_size(ST0_ISC|ST0_SWC);
102	if (icache_size)
103		icache_lsize = r3k_cache_lsize(ST0_ISC|ST0_SWC);
104}
105
106static void r3k_flush_icache_range(unsigned long start, unsigned long end)
107{
108	unsigned long size, i, flags;
109	volatile unsigned char *p;
110
111	size = end - start;
112	if (size > icache_size || KSEGX(start) != KSEG0) {
113		start = KSEG0;
114		size = icache_size;
115	}
116	p = (char *)start;
117
118	flags = read_c0_status();
119
120	/* isolate cache space */
121	write_c0_status((ST0_ISC|ST0_SWC|flags)&~ST0_IEC);
122
123	for (i = 0; i < size; i += 0x080) {
124		asm ( 	"sb\t$0, 0x000(%0)\n\t"
125			"sb\t$0, 0x004(%0)\n\t"
126			"sb\t$0, 0x008(%0)\n\t"
127			"sb\t$0, 0x00c(%0)\n\t"
128			"sb\t$0, 0x010(%0)\n\t"
129			"sb\t$0, 0x014(%0)\n\t"
130			"sb\t$0, 0x018(%0)\n\t"
131			"sb\t$0, 0x01c(%0)\n\t"
132			"sb\t$0, 0x020(%0)\n\t"
133			"sb\t$0, 0x024(%0)\n\t"
134			"sb\t$0, 0x028(%0)\n\t"
135			"sb\t$0, 0x02c(%0)\n\t"
136			"sb\t$0, 0x030(%0)\n\t"
137			"sb\t$0, 0x034(%0)\n\t"
138			"sb\t$0, 0x038(%0)\n\t"
139			"sb\t$0, 0x03c(%0)\n\t"
140			"sb\t$0, 0x040(%0)\n\t"
141			"sb\t$0, 0x044(%0)\n\t"
142			"sb\t$0, 0x048(%0)\n\t"
143			"sb\t$0, 0x04c(%0)\n\t"
144			"sb\t$0, 0x050(%0)\n\t"
145			"sb\t$0, 0x054(%0)\n\t"
146			"sb\t$0, 0x058(%0)\n\t"
147			"sb\t$0, 0x05c(%0)\n\t"
148			"sb\t$0, 0x060(%0)\n\t"
149			"sb\t$0, 0x064(%0)\n\t"
150			"sb\t$0, 0x068(%0)\n\t"
151			"sb\t$0, 0x06c(%0)\n\t"
152			"sb\t$0, 0x070(%0)\n\t"
153			"sb\t$0, 0x074(%0)\n\t"
154			"sb\t$0, 0x078(%0)\n\t"
155			"sb\t$0, 0x07c(%0)\n\t"
156			: : "r" (p) );
157		p += 0x080;
158	}
159
160	write_c0_status(flags);
161}
162
163static void r3k_flush_dcache_range(unsigned long start, unsigned long end)
164{
165	unsigned long size, i, flags;
166	volatile unsigned char *p;
167
168	size = end - start;
169	if (size > dcache_size || KSEGX(start) != KSEG0) {
170		start = KSEG0;
171		size = dcache_size;
172	}
173	p = (char *)start;
174
175	flags = read_c0_status();
176
177	/* isolate cache space */
178	write_c0_status((ST0_ISC|flags)&~ST0_IEC);
179
180	for (i = 0; i < size; i += 0x080) {
181		asm ( 	"sb\t$0, 0x000(%0)\n\t"
182			"sb\t$0, 0x004(%0)\n\t"
183			"sb\t$0, 0x008(%0)\n\t"
184			"sb\t$0, 0x00c(%0)\n\t"
185			"sb\t$0, 0x010(%0)\n\t"
186			"sb\t$0, 0x014(%0)\n\t"
187			"sb\t$0, 0x018(%0)\n\t"
188			"sb\t$0, 0x01c(%0)\n\t"
189			"sb\t$0, 0x020(%0)\n\t"
190			"sb\t$0, 0x024(%0)\n\t"
191			"sb\t$0, 0x028(%0)\n\t"
192			"sb\t$0, 0x02c(%0)\n\t"
193			"sb\t$0, 0x030(%0)\n\t"
194			"sb\t$0, 0x034(%0)\n\t"
195			"sb\t$0, 0x038(%0)\n\t"
196			"sb\t$0, 0x03c(%0)\n\t"
197			"sb\t$0, 0x040(%0)\n\t"
198			"sb\t$0, 0x044(%0)\n\t"
199			"sb\t$0, 0x048(%0)\n\t"
200			"sb\t$0, 0x04c(%0)\n\t"
201			"sb\t$0, 0x050(%0)\n\t"
202			"sb\t$0, 0x054(%0)\n\t"
203			"sb\t$0, 0x058(%0)\n\t"
204			"sb\t$0, 0x05c(%0)\n\t"
205			"sb\t$0, 0x060(%0)\n\t"
206			"sb\t$0, 0x064(%0)\n\t"
207			"sb\t$0, 0x068(%0)\n\t"
208			"sb\t$0, 0x06c(%0)\n\t"
209			"sb\t$0, 0x070(%0)\n\t"
210			"sb\t$0, 0x074(%0)\n\t"
211			"sb\t$0, 0x078(%0)\n\t"
212			"sb\t$0, 0x07c(%0)\n\t"
213			: : "r" (p) );
214		p += 0x080;
215	}
216
217	write_c0_status(flags);
218}
219
220static inline unsigned long get_phys_page (unsigned long addr,
221					   struct mm_struct *mm)
222{
223	pgd_t *pgd;
224	pud_t *pud;
225	pmd_t *pmd;
226	pte_t *pte;
227	unsigned long physpage;
228
229	pgd = pgd_offset(mm, addr);
230	pud = pud_offset(pgd, addr);
231	pmd = pmd_offset(pud, addr);
232	pte = pte_offset(pmd, addr);
233
234	if ((physpage = pte_val(*pte)) & _PAGE_VALID)
235		return KSEG0ADDR(physpage & PAGE_MASK);
236
237	return 0;
238}
239
240static inline void r3k_flush_cache_all(void)
241{
242}
243
244static inline void r3k___flush_cache_all(void)
245{
246	r3k_flush_dcache_range(KSEG0, KSEG0 + dcache_size);
247	r3k_flush_icache_range(KSEG0, KSEG0 + icache_size);
248}
249
250static void r3k_flush_cache_mm(struct mm_struct *mm)
251{
252}
253
254static void r3k_flush_cache_range(struct vm_area_struct *vma,
255	unsigned long start, unsigned long end)
256{
257}
258
259static void r3k_flush_cache_page(struct vm_area_struct *vma, unsigned long page, unsigned long pfn)
260{
261}
262
263static void local_r3k_flush_data_cache_page(void *addr)
264{
265}
266
267static void r3k_flush_data_cache_page(unsigned long addr)
268{
269}
270
271static void r3k_flush_cache_sigtramp(unsigned long addr)
272{
273	unsigned long flags;
274
275#ifdef DEBUG_CACHE
276	printk("csigtramp[%08lx]", addr);
277#endif
278
279	flags = read_c0_status();
280
281	write_c0_status(flags&~ST0_IEC);
282
283	/* Fill the TLB to avoid an exception with caches isolated. */
284	asm ( 	"lw\t$0, 0x000(%0)\n\t"
285		"lw\t$0, 0x004(%0)\n\t"
286		: : "r" (addr) );
287
288	write_c0_status((ST0_ISC|ST0_SWC|flags)&~ST0_IEC);
289
290	asm ( 	"sb\t$0, 0x000(%0)\n\t"
291		"sb\t$0, 0x004(%0)\n\t"
292		: : "r" (addr) );
293
294	write_c0_status(flags);
295}
296
297static void r3k_dma_cache_wback_inv(unsigned long start, unsigned long size)
298{
299	/* Catch bad driver code */
300	BUG_ON(size == 0);
301
302	iob();
303	r3k_flush_dcache_range(start, start + size);
304}
305
306void __init r3k_cache_init(void)
307{
308	extern void build_clear_page(void);
309	extern void build_copy_page(void);
310
311	r3k_probe_cache();
312
313	flush_cache_all = r3k_flush_cache_all;
314	__flush_cache_all = r3k___flush_cache_all;
315	flush_cache_mm = r3k_flush_cache_mm;
316	flush_cache_range = r3k_flush_cache_range;
317	flush_cache_page = r3k_flush_cache_page;
318	flush_icache_range = r3k_flush_icache_range;
319
320	flush_cache_sigtramp = r3k_flush_cache_sigtramp;
321	local_flush_data_cache_page = local_r3k_flush_data_cache_page;
322	flush_data_cache_page = r3k_flush_data_cache_page;
323
324	_dma_cache_wback_inv = r3k_dma_cache_wback_inv;
325	_dma_cache_wback = r3k_dma_cache_wback_inv;
326	_dma_cache_inv = r3k_dma_cache_wback_inv;
327
328	printk("Primary instruction cache %ldkB, linesize %ld bytes.\n",
329		icache_size >> 10, icache_lsize);
330	printk("Primary data cache %ldkB, linesize %ld bytes.\n",
331		dcache_size >> 10, dcache_lsize);
332
333	build_clear_page();
334	build_copy_page();
335}
336