1/*
2 *
3 * BRIEF MODULE DESCRIPTION
4 *	Alchemy Pb1200/Db1200 board setup.
5 *
6 *  This program is free software; you can redistribute  it and/or modify it
7 *  under  the terms of  the GNU General  Public License as published by the
8 *  Free Software Foundation;  either version 2 of the  License, or (at your
9 *  option) any later version.
10 *
11 *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
12 *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
13 *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
14 *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
15 *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
16 *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
17 *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
18 *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
19 *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
20 *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
21 *
22 *  You should have received a copy of the  GNU General Public License along
23 *  with this program; if not, write  to the Free Software Foundation, Inc.,
24 *  675 Mass Ave, Cambridge, MA 02139, USA.
25 */
26#include <linux/init.h>
27#include <linux/sched.h>
28#include <linux/ioport.h>
29#include <linux/mm.h>
30#include <linux/console.h>
31#include <linux/mc146818rtc.h>
32#include <linux/delay.h>
33
34#if defined(CONFIG_BLK_DEV_IDE_AU1XXX)
35#include <linux/ide.h>
36#endif
37
38#include <asm/cpu.h>
39#include <asm/bootinfo.h>
40#include <asm/irq.h>
41#include <asm/mipsregs.h>
42#include <asm/reboot.h>
43#include <asm/pgtable.h>
44#include <asm/mach-au1x00/au1000.h>
45#include <asm/mach-au1x00/au1xxx_dbdma.h>
46
47#ifdef CONFIG_MIPS_PB1200
48#include <asm/mach-pb1x00/pb1200.h>
49#endif
50
51#ifdef CONFIG_MIPS_DB1200
52#include <asm/mach-db1x00/db1200.h>
53#define PB1200_ETH_INT DB1200_ETH_INT
54#define PB1200_IDE_INT DB1200_IDE_INT
55#endif
56
57extern void _board_init_irq(void);
58extern void (*board_init_irq)(void);
59
60void board_reset (void)
61{
62	bcsr->resets = 0;
63	bcsr->system = 0;
64}
65
66void __init board_setup(void)
67{
68	char *argptr = NULL;
69	u32 pin_func;
70
71
72#if defined(CONFIG_I2C_AU1550)
73	{
74	u32 freq0, clksrc;
75
76	/* Select SMBUS in CPLD */
77	bcsr->resets &= ~(BCSR_RESETS_PCS0MUX);
78
79	pin_func = au_readl(SYS_PINFUNC);
80	au_sync();
81	pin_func &= ~(3<<17 | 1<<4);
82	/* Set GPIOs correctly */
83	pin_func |= 2<<17;
84	au_writel(pin_func, SYS_PINFUNC);
85	au_sync();
86
87	/* The i2c driver depends on 50Mhz clock */
88	freq0 = au_readl(SYS_FREQCTRL0);
89	au_sync();
90	freq0 &= ~(SYS_FC_FRDIV1_MASK | SYS_FC_FS1 | SYS_FC_FE1);
91	freq0 |= (3<<SYS_FC_FRDIV1_BIT);
92	/* 396Mhz / (3+1)*2 == 49.5Mhz */
93	au_writel(freq0, SYS_FREQCTRL0);
94	au_sync();
95	freq0 |= SYS_FC_FE1;
96	au_writel(freq0, SYS_FREQCTRL0);
97	au_sync();
98
99	clksrc = au_readl(SYS_CLKSRC);
100	au_sync();
101	clksrc &= ~0x01f00000;
102	/* bit 22 is EXTCLK0 for PSC0 */
103	clksrc |= (0x3 << 22);
104	au_writel(clksrc, SYS_CLKSRC);
105	au_sync();
106	}
107#endif
108
109#ifdef CONFIG_FB_AU1200
110	argptr = prom_getcmdline();
111#ifdef CONFIG_MIPS_PB1200
112	strcat(argptr, " video=au1200fb:panel:bs");
113#endif
114#ifdef CONFIG_MIPS_DB1200
115	strcat(argptr, " video=au1200fb:panel:bs");
116#endif
117#endif
118
119	/* The Pb1200 development board uses external MUX for PSC0 to
120	support SMB/SPI. bcsr->resets bit 12: 0=SMB 1=SPI
121	*/
122#if defined(CONFIG_AU1XXX_PSC_SPI) && defined(CONFIG_I2C_AU1550)
123	#error I2C and SPI are mutually exclusive. Both are physically connected to PSC0.\
124			Refer to Pb1200/Db1200 documentation.
125#elif defined(CONFIG_AU1XXX_PSC_SPI)
126	bcsr->resets |= BCSR_RESETS_PCS0MUX;
127	/*Hard Coding Value to enable Temp Sensors [bit 14] Value for SOC Au1200. Pls refer documentation*/
128	  bcsr->resets =0x900f;
129#elif defined(CONFIG_I2C_AU1550)
130	bcsr->resets &= (~BCSR_RESETS_PCS0MUX);
131#endif
132	au_sync();
133
134#ifdef CONFIG_MIPS_PB1200
135	printk("AMD Alchemy Pb1200 Board\n");
136#endif
137#ifdef CONFIG_MIPS_DB1200
138	printk("AMD Alchemy Db1200 Board\n");
139#endif
140
141	/* Setup Pb1200 External Interrupt Controller */
142	board_init_irq = _board_init_irq;
143}
144
145int
146board_au1200fb_panel (void)
147{
148	BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR;
149	int p;
150
151	p = bcsr->switches;
152	p >>= 8;
153	p &= 0x0F;
154	return p;
155}
156
157int
158board_au1200fb_panel_init (void)
159{
160	/* Apply power */
161    BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR;
162	bcsr->board |= (BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD | BCSR_BOARD_LCDBL);
163	/*printk("board_au1200fb_panel_init()\n"); */
164	return 0;
165}
166
167int
168board_au1200fb_panel_shutdown (void)
169{
170	/* Remove power */
171    BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR;
172	bcsr->board &= ~(BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD | BCSR_BOARD_LCDBL);
173	/*printk("board_au1200fb_panel_shutdown()\n"); */
174	return 0;
175}
176