1#include <linux/kernel.h>
2#include <linux/mm.h>
3#include <linux/init.h>
4#include <asm/processor.h>
5#include <asm/msr.h>
6#include "cpu.h"
7
8static void __cpuinit init_transmeta(struct cpuinfo_x86 *c)
9{
10	unsigned int cap_mask, uk, max, dummy;
11	unsigned int cms_rev1, cms_rev2;
12	unsigned int cpu_rev, cpu_freq = 0, cpu_flags, new_cpu_rev;
13	char cpu_info[65];
14
15	get_model_name(c);	/* Same as AMD/Cyrix */
16	display_cacheinfo(c);
17
18	/* Print CMS and CPU revision */
19	max = cpuid_eax(0x80860000);
20	cpu_rev = 0;
21	if ( max >= 0x80860001 ) {
22		cpuid(0x80860001, &dummy, &cpu_rev, &cpu_freq, &cpu_flags);
23		if (cpu_rev != 0x02000000) {
24			printk(KERN_INFO "CPU: Processor revision %u.%u.%u.%u, %u MHz\n",
25				(cpu_rev >> 24) & 0xff,
26				(cpu_rev >> 16) & 0xff,
27				(cpu_rev >> 8) & 0xff,
28				cpu_rev & 0xff,
29				cpu_freq);
30		}
31	}
32	if ( max >= 0x80860002 ) {
33		cpuid(0x80860002, &new_cpu_rev, &cms_rev1, &cms_rev2, &dummy);
34		if (cpu_rev == 0x02000000) {
35			printk(KERN_INFO "CPU: Processor revision %08X, %u MHz\n",
36				new_cpu_rev, cpu_freq);
37		}
38		printk(KERN_INFO "CPU: Code Morphing Software revision %u.%u.%u-%u-%u\n",
39		       (cms_rev1 >> 24) & 0xff,
40		       (cms_rev1 >> 16) & 0xff,
41		       (cms_rev1 >> 8) & 0xff,
42		       cms_rev1 & 0xff,
43		       cms_rev2);
44	}
45	if ( max >= 0x80860006 ) {
46		cpuid(0x80860003,
47		      (void *)&cpu_info[0],
48		      (void *)&cpu_info[4],
49		      (void *)&cpu_info[8],
50		      (void *)&cpu_info[12]);
51		cpuid(0x80860004,
52		      (void *)&cpu_info[16],
53		      (void *)&cpu_info[20],
54		      (void *)&cpu_info[24],
55		      (void *)&cpu_info[28]);
56		cpuid(0x80860005,
57		      (void *)&cpu_info[32],
58		      (void *)&cpu_info[36],
59		      (void *)&cpu_info[40],
60		      (void *)&cpu_info[44]);
61		cpuid(0x80860006,
62		      (void *)&cpu_info[48],
63		      (void *)&cpu_info[52],
64		      (void *)&cpu_info[56],
65		      (void *)&cpu_info[60]);
66		cpu_info[64] = '\0';
67		printk(KERN_INFO "CPU: %s\n", cpu_info);
68	}
69
70	/* Unhide possibly hidden capability flags */
71	rdmsr(0x80860004, cap_mask, uk);
72	wrmsr(0x80860004, ~0, uk);
73	c->x86_capability[0] = cpuid_edx(0x00000001);
74	wrmsr(0x80860004, cap_mask, uk);
75
76	/* All Transmeta CPUs have a constant TSC */
77	set_bit(X86_FEATURE_CONSTANT_TSC, c->x86_capability);
78
79	/* If we can run i686 user-space code, call us an i686 */
80#define USER686 ((1 << X86_FEATURE_TSC)|\
81		 (1 << X86_FEATURE_CX8)|\
82		 (1 << X86_FEATURE_CMOV))
83        if (c->x86 == 5 && (c->x86_capability[0] & USER686) == USER686)
84		c->x86 = 6;
85
86#ifdef CONFIG_SYSCTL
87	/* randomize_va_space slows us down enormously;
88	   it probably triggers retranslation of x86->native bytecode */
89	randomize_va_space = 0;
90#endif
91}
92
93static void __cpuinit transmeta_identify(struct cpuinfo_x86 * c)
94{
95	u32 xlvl;
96
97	/* Transmeta-defined flags: level 0x80860001 */
98	xlvl = cpuid_eax(0x80860000);
99	if ( (xlvl & 0xffff0000) == 0x80860000 ) {
100		if (  xlvl >= 0x80860001 )
101			c->x86_capability[2] = cpuid_edx(0x80860001);
102	}
103}
104
105static struct cpu_dev transmeta_cpu_dev __cpuinitdata = {
106	.c_vendor	= "Transmeta",
107	.c_ident	= { "GenuineTMx86", "TransmetaCPU" },
108	.c_init		= init_transmeta,
109	.c_identify	= transmeta_identify,
110};
111
112int __init transmeta_init_cpu(void)
113{
114	cpu_devs[X86_VENDOR_TRANSMETA] = &transmeta_cpu_dev;
115	return 0;
116}
117