1/* $Id: head.S,v 1.1.1.1 2007/08/03 18:51:41 Exp $ 2 * 3 * Head of the kernel - alter with care 4 * 5 * Copyright (C) 2000, 2001 Axis Communications AB 6 * 7 * Authors: Bjorn Wesen (bjornw@axis.com) 8 * 9 * $Log: head.S,v $ 10 * Revision 1.1.1.1 2007/08/03 18:51:41 rnuti 11 * Importing Linux MIPS Kernel 2.6.22 12 * 13 * Revision 1.10 2005/06/20 05:12:54 starvik 14 * Remove unnecessary diff to kernel.org tree 15 * 16 * Revision 1.9 2004/12/13 12:21:51 starvik 17 * Added I/O and DMA allocators from Linux 2.4 18 * 19 * Revision 1.8 2004/11/22 11:41:14 starvik 20 * Kernel command line may be supplied to kernel. Not used by Axis but may 21 * be used by customers. 22 * 23 * Revision 1.7 2004/05/14 07:58:01 starvik 24 * Merge of changes from 2.4 25 * 26 * Revision 1.6 2003/04/28 05:31:46 starvik 27 * Added section attributes 28 * 29 * Revision 1.5 2002/12/11 15:42:02 starvik 30 * Extracted v10 (ETRAX 100LX) specific stuff from arch/cris/kernel/*.c 31 * 32 * Revision 1.4 2002/11/07 09:00:44 starvik 33 * Names changed for init sections 34 * init_task_union -> init_thread_union 35 * 36 * Revision 1.3 2002/02/05 15:38:23 bjornw 37 * Oops.. non-CRAMFS_MAGIC should jump over the copying, not into it... 38 * 39 * Revision 1.2 2001/12/18 13:35:19 bjornw 40 * Applied the 2.4.13->2.4.16 CRIS patch to 2.5.1 (is a copy of 2.4.15). 41 * 42 * Revision 1.43 2001/11/08 15:09:43 starvik 43 * Only start MII clock if Ethernet is configured 44 * 45 * Revision 1.42 2001/11/08 14:37:34 starvik 46 * Start MII clock early to make sure that it is running at tranceiver reset 47 * 48 * Revision 1.41 2001/10/29 14:55:58 pkj 49 * Corrected pa$r0 to par0. 50 * 51 * Revision 1.40 2001/10/03 14:59:57 pkj 52 * Added support for resetting the Bluetooth hardware. 53 * 54 * Revision 1.39 2001/10/01 14:45:03 bjornw 55 * Removed underscores and added register prefixes 56 * 57 * Revision 1.38 2001/09/21 07:14:11 jonashg 58 * Made root filesystem (cramfs) use mtdblock driver when booting from flash. 59 * 60 * Revision 1.37 2001/09/11 13:44:29 orjanf 61 * Decouple usage of serial ports for debug and kgdb. 62 * 63 * Revision 1.36 2001/06/29 12:39:31 pkj 64 * Added support for mirroring the first flash to just below the 65 * second one, to make them look consecutive to cramfs. 66 * 67 * Revision 1.35 2001/06/25 14:07:00 hp 68 * Fix review comment. 69 * * head.S: Use IO_STATE, IO_FIELD and IO_MASK constructs instead of 70 * magic numbers. Add comment that -traditional must not be used. 71 * * entry.S (SYMBOL_NAME): Change redefinition to use ## concatenation. 72 * Correct and update comment. 73 * * Makefile (.S.o): Don't use -traditional. Add comment why the 74 * toplevel rule can't be used (now that there's a reason). 75 * 76 * Revision 1.34 2001/05/15 07:08:14 hp 77 * Tweak "notice" to reflect that both r8 r9 are used 78 * 79 * Revision 1.33 2001/05/15 06:40:05 hp 80 * Put bulk of code in .text.init, data in .data.init 81 * 82 * Revision 1.32 2001/05/15 06:18:56 hp 83 * Execute review comment: s/bcc/bhs/g; s/bcs/blo/g 84 * 85 * Revision 1.31 2001/05/15 06:08:40 hp 86 * Add sentence about autodetecting the bit31-MMU-bug 87 * 88 * Revision 1.30 2001/05/15 06:00:05 hp 89 * Update comment: LOW_MAP is not forced on xsim anymore. 90 * 91 * Revision 1.29 2001/04/18 12:51:59 orjanf 92 * * Reverted review change regarding the use of bcs/bcc. 93 * * Removed non-working LED-clearing code. 94 * 95 * Revision 1.28 2001/04/17 13:58:39 orjanf 96 * * Renamed CONFIG_KGDB to CONFIG_ETRAX_KGDB. 97 * 98 * Revision 1.27 2001/04/17 11:42:35 orjanf 99 * Changed according to review: 100 * * Added comment explaining memory map bug. 101 * * Changed bcs and bcc to blo and bhs, respectively. 102 * * Removed mentioning of Stallone and Olga boards. 103 * 104 * Revision 1.26 2001/04/06 12:31:07 jonashg 105 * Check for cramfs in flash before RAM instead of RAM before flash. 106 * 107 * Revision 1.25 2001/04/04 06:23:53 starvik 108 * Initialize DRAM if not already initialized 109 * 110 * Revision 1.24 2001/04/03 11:12:00 starvik 111 * Removed dram init (done by rescue or etrax100boot 112 * Corrected include 113 * 114 * Revision 1.23 2001/04/03 09:53:03 starvik 115 * Include hw_settings.S 116 * 117 * Revision 1.22 2001/03/26 14:23:26 bjornw 118 * Namechange of some config options 119 * 120 * Revision 1.21 2001/03/08 12:14:41 bjornw 121 * * Config name for ETRAX IDE was renamed 122 * * Removed G27 auto-setting when JULIETTE is chosen (need to make this 123 * a new config option later) 124 * 125 * Revision 1.20 2001/02/23 12:47:56 bjornw 126 * MMU regs during LOW_MAP updated to reflect a newer reality 127 * 128 * Revision 1.19 2001/02/19 11:12:07 bjornw 129 * Changed comment header format 130 * 131 * Revision 1.18 2001/02/15 07:25:38 starvik 132 * Added support for synchronous serial ports 133 * 134 * Revision 1.17 2001/02/08 15:53:13 starvik 135 * Last commit removed some important ifdefs 136 * 137 * Revision 1.16 2001/02/08 15:20:38 starvik 138 * Include dram_init.S as inline 139 * 140 * Revision 1.15 2001/01/29 18:12:01 bjornw 141 * Corrected some comments 142 * 143 * Revision 1.14 2001/01/29 13:11:29 starvik 144 * Include dram_init.S (with DRAM/SDRAM initialization) 145 * 146 * Revision 1.13 2001/01/23 14:54:57 markusl 147 * Updated for USB 148 * i.e. added r_gen_config settings 149 * 150 * Revision 1.12 2001/01/19 16:16:29 perf 151 * Added temporary mapping of 0x0c->0x0c to avoid flash loading confusion. 152 * Renamed serial options from ETRAX100 to ETRAX. 153 * 154 * Revision 1.11 2001/01/16 16:31:38 bjornw 155 * * Changed name and semantics of running_from_flash to romfs_in_flash, 156 * set by head.S to indicate to setup.c whether there is a cramfs image 157 * after the kernels BSS or not. Should work for all three boot-cases 158 * (DRAM with cramfs in DRAM, DRAM with cramfs in flash (compressed boot), 159 * and flash with cramfs in flash) 160 * 161 * Revision 1.10 2001/01/16 14:12:21 bjornw 162 * * Check for cramfs start passed in r9 from the decompressor, if all other 163 * cramfs options fail (if we boot from DRAM but don't find a cramfs image 164 * after the kernel in DRAM, it is probably still in the flash) 165 * * Check magic in cramfs detection when booting from flash directly 166 * 167 * Revision 1.9 2001/01/15 17:17:02 bjornw 168 * * Corrected the code that detects the cramfs lengths 169 * * Added a comment saying that the above does not work due to other 170 * reasons.. 171 * 172 * Revision 1.8 2001/01/15 16:27:51 jonashg 173 * Made boot after flashing work. 174 * * end destination is __vmlinux_end in RAM. 175 * * _romfs_start moved because of virtual memory. 176 * 177 * Revision 1.7 2000/11/21 13:55:29 bjornw 178 * Use CONFIG_CRIS_LOW_MAP for the low VM map instead of explicit CPU type 179 * 180 * Revision 1.6 2000/10/06 12:36:55 bjornw 181 * Forgot swapper_pg_dir when changing memory map.. 182 * 183 * Revision 1.5 2000/10/04 16:49:30 bjornw 184 * * Fixed memory mapping in LX 185 * * Check for cramfs instead of romfs 186 * 187 */ 188 189#define ASSEMBLER_MACROS_ONLY 190/* The IO_* macros use the ## token concatenation operator, so 191 -traditional must not be used when assembling this file. */ 192#include <asm/arch/sv_addr_ag.h> 193 194#define CRAMFS_MAGIC 0x28cd3d45 195#define RAM_INIT_MAGIC 0x56902387 196#define COMMAND_LINE_MAGIC 0x87109563 197 198#define START_ETHERNET_CLOCK IO_STATE(R_NETWORK_GEN_CONFIG, enable, on) |\ 199 IO_STATE(R_NETWORK_GEN_CONFIG, phy, mii_clk) 200 201 ;; exported symbols 202 203 .globl etrax_irv 204 .globl romfs_start 205 .globl romfs_length 206 .globl romfs_in_flash 207 .globl swapper_pg_dir 208 209 .text 210 211 ;; This is the entry point of the kernel. We are in supervisor mode. 212 ;; 0x00000000 if Flash, 0x40004000 if DRAM 213 ;; since etrax actually starts at address 2 when booting from flash, we 214 ;; put a nop (2 bytes) here first so we dont accidentally skip the di 215 ;; 216 ;; NOTICE! The registers r8 and r9 are used as parameters carrying 217 ;; information from the decompressor (if the kernel was compressed). 218 ;; They should not be used in the code below until read. 219 220 nop 221 di 222 223 ;; First setup the kseg_c mapping from where the kernel is linked 224 ;; to 0x40000000 (where the actual DRAM resides) otherwise 225 ;; we cannot do very much! See arch/cris/README.mm 226 ;; 227 ;; Notice that since we're potentially running at 0x00 or 0x40 right now, 228 ;; we will get a fault as soon as we enable the MMU if we dont 229 ;; temporarily map those segments linearily. 230 ;; 231 ;; Due to a bug in Etrax-100 LX version 1 we need to map the memory 232 ;; slightly different. The bug is that you can't remap bit 31 of 233 ;; an address. Though we can check the version register for 234 ;; whether the bug is present, some constants would then have to 235 ;; be variables, so we don't. The drawback is that you can "only" map 236 ;; 1G per process with CONFIG_CRIS_LOW_MAP. 237 238#ifdef CONFIG_CRIS_LOW_MAP 239 ; kseg mappings, temporary map of 0xc0->0x40 240 move.d IO_FIELD (R_MMU_KBASE_HI, base_c, 4) \ 241 | IO_FIELD (R_MMU_KBASE_HI, base_b, 0xb) \ 242 | IO_FIELD (R_MMU_KBASE_HI, base_9, 9) \ 243 | IO_FIELD (R_MMU_KBASE_HI, base_8, 8), $r0 244 move.d $r0, [R_MMU_KBASE_HI] 245 246 ; temporary map of 0x40->0x40 and 0x60->0x40 247 move.d IO_FIELD (R_MMU_KBASE_LO, base_6, 4) \ 248 | IO_FIELD (R_MMU_KBASE_LO, base_4, 4), $r0 249 move.d $r0, [R_MMU_KBASE_LO] 250 251 ; mmu enable, segs e,c,b,a,6,5,4,0 segment mapped 252 move.d IO_STATE (R_MMU_CONFIG, mmu_enable, enable) \ 253 | IO_STATE (R_MMU_CONFIG, inv_excp, enable) \ 254 | IO_STATE (R_MMU_CONFIG, acc_excp, enable) \ 255 | IO_STATE (R_MMU_CONFIG, we_excp, enable) \ 256 | IO_STATE (R_MMU_CONFIG, seg_f, page) \ 257 | IO_STATE (R_MMU_CONFIG, seg_e, seg) \ 258 | IO_STATE (R_MMU_CONFIG, seg_d, page) \ 259 | IO_STATE (R_MMU_CONFIG, seg_c, seg) \ 260 | IO_STATE (R_MMU_CONFIG, seg_b, seg) \ 261 | IO_STATE (R_MMU_CONFIG, seg_a, seg) \ 262 | IO_STATE (R_MMU_CONFIG, seg_9, page) \ 263 | IO_STATE (R_MMU_CONFIG, seg_8, page) \ 264 | IO_STATE (R_MMU_CONFIG, seg_7, page) \ 265 | IO_STATE (R_MMU_CONFIG, seg_6, seg) \ 266 | IO_STATE (R_MMU_CONFIG, seg_5, seg) \ 267 | IO_STATE (R_MMU_CONFIG, seg_4, seg) \ 268 | IO_STATE (R_MMU_CONFIG, seg_3, page) \ 269 | IO_STATE (R_MMU_CONFIG, seg_2, page) \ 270 | IO_STATE (R_MMU_CONFIG, seg_1, page) \ 271 | IO_STATE (R_MMU_CONFIG, seg_0, seg), $r0 272 move.d $r0, [R_MMU_CONFIG] 273#else 274 ; kseg mappings 275 move.d IO_FIELD (R_MMU_KBASE_HI, base_e, 8) \ 276 | IO_FIELD (R_MMU_KBASE_HI, base_c, 4) \ 277 | IO_FIELD (R_MMU_KBASE_HI, base_b, 0xb), $r0 278 move.d $r0, [R_MMU_KBASE_HI] 279 280 ; temporary map of 0x40->0x40 and 0x00->0x00 281 move.d IO_FIELD (R_MMU_KBASE_LO, base_4, 4), $r0 282 move.d $r0, [R_MMU_KBASE_LO] 283 284 ; mmu enable, segs f,e,c,b,4,0 segment mapped 285 move.d IO_STATE (R_MMU_CONFIG, mmu_enable, enable) \ 286 | IO_STATE (R_MMU_CONFIG, inv_excp, enable) \ 287 | IO_STATE (R_MMU_CONFIG, acc_excp, enable) \ 288 | IO_STATE (R_MMU_CONFIG, we_excp, enable) \ 289 | IO_STATE (R_MMU_CONFIG, seg_f, seg) \ 290 | IO_STATE (R_MMU_CONFIG, seg_e, seg) \ 291 | IO_STATE (R_MMU_CONFIG, seg_d, page) \ 292 | IO_STATE (R_MMU_CONFIG, seg_c, seg) \ 293 | IO_STATE (R_MMU_CONFIG, seg_b, seg) \ 294 | IO_STATE (R_MMU_CONFIG, seg_a, page) \ 295 | IO_STATE (R_MMU_CONFIG, seg_9, page) \ 296 | IO_STATE (R_MMU_CONFIG, seg_8, page) \ 297 | IO_STATE (R_MMU_CONFIG, seg_7, page) \ 298 | IO_STATE (R_MMU_CONFIG, seg_6, page) \ 299 | IO_STATE (R_MMU_CONFIG, seg_5, page) \ 300 | IO_STATE (R_MMU_CONFIG, seg_4, seg) \ 301 | IO_STATE (R_MMU_CONFIG, seg_3, page) \ 302 | IO_STATE (R_MMU_CONFIG, seg_2, page) \ 303 | IO_STATE (R_MMU_CONFIG, seg_1, page) \ 304 | IO_STATE (R_MMU_CONFIG, seg_0, seg), $r0 305 move.d $r0, [R_MMU_CONFIG] 306#endif 307 308 ;; Now we need to sort out the segments and their locations in RAM or 309 ;; Flash. The image in the Flash (or in DRAM) consists of 3 pieces: 310 ;; 1) kernel text, 2) kernel data, 3) ROM filesystem image 311 ;; But the linker has linked the kernel to expect this layout in 312 ;; DRAM memory: 313 ;; 1) kernel text, 2) kernel data, 3) kernel BSS 314 ;; (the location of the ROM filesystem is determined by the krom driver) 315 ;; If we boot this from Flash, we want to keep the ROM filesystem in 316 ;; the flash, we want to copy the text and need to copy the data to DRAM. 317 ;; But if we boot from DRAM, we need to move the ROMFS image 318 ;; from its position after kernel data, to after kernel BSS, BEFORE the 319 ;; kernel starts using the BSS area (since its "overlayed" with the ROMFS) 320 ;; 321 ;; In both cases, we start in un-cached mode, and need to jump into a 322 ;; cached PC after we're done fiddling around with the segments. 323 ;; 324 ;; arch/etrax100/etrax100.ld sets some symbols that define the start 325 ;; and end of each segment. 326 327 ;; Check if we start from DRAM or FLASH by testing PC 328 329 move.d $pc,$r0 330 and.d 0x7fffffff,$r0 ; get rid of the non-cache bit 331 cmp.d 0x10000,$r0 ; arbitrary... just something above this code 332 blo _inflash0 333 nop 334 335 jump _inram ; enter cached ram 336 337 ;; Jumpgate for branches. 338_inflash0: 339 jump _inflash 340 341 ;; Put this in a suitable section where we can reclaim storage 342 ;; after init. 343 .section ".init.text", "ax" 344_inflash: 345#ifdef CONFIG_ETRAX_ETHERNET 346 ;; Start MII clock to make sure it is running when tranceiver is reset 347 move.d START_ETHERNET_CLOCK, $r0 348 move.d $r0, [R_NETWORK_GEN_CONFIG] 349#endif 350 351 ;; Set up waitstates etc according to kernel configuration. 352#ifndef CONFIG_SVINTO_SIM 353 move.d CONFIG_ETRAX_DEF_R_WAITSTATES, $r0 354 move.d $r0, [R_WAITSTATES] 355 356 move.d CONFIG_ETRAX_DEF_R_BUS_CONFIG, $r0 357 move.d $r0, [R_BUS_CONFIG] 358#endif 359 360 ;; We need to initialze DRAM registers before we start using the DRAM 361 362 cmp.d RAM_INIT_MAGIC, $r8 ; Already initialized? 363 beq _dram_init_finished 364 nop 365 366#include "../lib/dram_init.S" 367 368_dram_init_finished: 369 ;; Copy text+data to DRAM 370 ;; This is fragile - the calculation of r4 as the image size depends 371 ;; on that the labels below actually are the first and last positions 372 ;; in the linker-script. 373 ;; 374 ;; Then the locating of the cramfs image depends on the aforementioned 375 ;; image being located in the flash at 0. This is most often not true, 376 ;; thus the following does not work (normally there is a rescue-block 377 ;; between the physical start of the flash and the flash-image start, 378 ;; and when run with compression, the kernel is actually unpacked to 379 ;; DRAM and we never get here in the first place :)) 380 381 moveq 0, $r0 ; source 382 move.d text_start, $r1 ; destination 383 move.d __vmlinux_end, $r2 ; end destination 384 move.d $r2, $r4 385 sub.d $r1, $r4 ; r4=__vmlinux_end in flash, used below 3861: move.w [$r0+], $r3 387 move.w $r3, [$r1+] 388 cmp.d $r2, $r1 389 blo 1b 390 nop 391 392 ;; We keep the cramfs in the flash. 393 ;; There might be none, but that does not matter because 394 ;; we don't do anything than read some bytes here. 395 396 moveq 0, $r0 397 move.d $r0, [romfs_length] ; default if there is no cramfs 398 399 move.d [$r4], $r0 ; cramfs_super.magic 400 cmp.d CRAMFS_MAGIC, $r0 401 bne 1f 402 nop 403 move.d [$r4 + 4], $r0 ; cramfs_super.size 404 move.d $r0, [romfs_length] 405#ifdef CONFIG_CRIS_LOW_MAP 406 add.d 0x50000000, $r4 ; add flash start in virtual memory (cached) 407#else 408 add.d 0xf0000000, $r4 ; add flash start in virtual memory (cached) 409#endif 410 move.d $r4, [romfs_start] 4111: 412 moveq 1, $r0 413 move.d $r0, [romfs_in_flash] 414 415 jump _start_it ; enter code, cached this time 416 417_inram: 418 ;; Move the ROM fs to after BSS end. This assumes that the cramfs 419 ;; second longword contains the length of the cramfs 420 421 moveq 0, $r0 422 move.d $r0, [romfs_length] ; default if there is no cramfs 423 424 ;; The kernel could have been unpacked to DRAM by the loader, but 425 ;; the cramfs image could still be in the Flash directly after the 426 ;; compressed kernel image. The loader passes the address of the 427 ;; byte succeeding the last compressed byte in the flash in the 428 ;; register r9 when starting the kernel. Check if r9 points to a 429 ;; decent cramfs image! 430 ;; (Notice that if this is not booted from the loader, r9 will be 431 ;; garbage but we do sanity checks on it, the chance that it points 432 ;; to a cramfs magic is small.. ) 433 434 cmp.d 0x0ffffff8, $r9 435 bhs _no_romfs_in_flash ; r9 points outside the flash area 436 nop 437 move.d [$r9], $r0 ; cramfs_super.magic 438 cmp.d CRAMFS_MAGIC, $r0 439 bne _no_romfs_in_flash 440 nop 441 move.d [$r9+4], $r0 ; cramfs_super.length 442 move.d $r0, [romfs_length] 443#ifdef CONFIG_CRIS_LOW_MAP 444 add.d 0x50000000, $r9 ; add flash start in virtual memory (cached) 445#else 446 add.d 0xf0000000, $r9 ; add flash start in virtual memory (cached) 447#endif 448 move.d $r9, [romfs_start] 449 450 moveq 1, $r0 451 move.d $r0, [romfs_in_flash] 452 453 jump _start_it ; enter code, cached this time 454 455_no_romfs_in_flash: 456 457 ;; Check if there is a cramfs (magic value). 458 ;; Notice that we check for cramfs magic value - which is 459 ;; the "rom fs" we'll possibly use in 2.4 if not JFFS (which does 460 ;; not need this mechanism anyway) 461 462 move.d __vmlinux_end, $r0; the image will be after the vmlinux end address 463 move.d [$r0], $r1 ; cramfs assumes same endian on host/target 464 cmp.d CRAMFS_MAGIC, $r1; magic value in cramfs superblock 465 bne 2f 466 nop 467 468 ;; Ok. What is its size ? 469 470 move.d [$r0 + 4], $r2 ; cramfs_super.size (again, no need to swapwb) 471 472 ;; We want to copy it to the end of the BSS 473 474 move.d _end, $r1 475 476 ;; Remember values so cramfs and setup can find this info 477 478 move.d $r1, [romfs_start] ; new romfs location 479 move.d $r2, [romfs_length] 480 481 ;; We need to copy it backwards, since they can be overlapping 482 483 add.d $r2, $r0 484 add.d $r2, $r1 485 486 ;; Go ahead. Make my loop. 487 488 lsrq 1, $r2 ; size is in bytes, we copy words 489 4901: move.w [$r0=$r0-2],$r3 491 move.w $r3,[$r1=$r1-2] 492 subq 1, $r2 493 bne 1b 494 nop 495 4962: 497 ;; Dont worry that the BSS is tainted. It will be cleared later. 498 499 moveq 0, $r0 500 move.d $r0, [romfs_in_flash] 501 502 jump _start_it ; better skip the additional cramfs check below 503 504_start_it: 505 506 ;; Check if kernel command line is supplied 507 cmp.d COMMAND_LINE_MAGIC, $r10 508 bne no_command_line 509 nop 510 511 move.d 256, $r13 512 move.d cris_command_line, $r10 513 or.d 0x80000000, $r11 ; Make it virtual 5141: 515 move.b [$r11+], $r12 516 move.b $r12, [$r10+] 517 subq 1, $r13 518 bne 1b 519 nop 520 521no_command_line: 522 523 ;; the kernel stack is overlayed with the task structure for each 524 ;; task. thus the initial kernel stack is in the same page as the 525 ;; init_task (but starts in the top of the page, size 8192) 526 move.d init_thread_union + 8192, $sp 527 move.d ibr_start,$r0 ; this symbol is set by the linker script 528 move $r0,$ibr 529 move.d $r0,[etrax_irv] ; set the interrupt base register and pointer 530 531 ;; Clear BSS region, from _bss_start to _end 532 533 move.d __bss_start, $r0 534 move.d _end, $r1 5351: clear.d [$r0+] 536 cmp.d $r1, $r0 537 blo 1b 538 nop 539 540#ifdef CONFIG_BLK_DEV_ETRAXIDE 541 ;; disable ATA before enabling it in genconfig below 542 moveq 0,$r0 543 move.d $r0,[R_ATA_CTRL_DATA] 544 move.d $r0,[R_ATA_TRANSFER_CNT] 545 move.d $r0,[R_ATA_CONFIG] 546#endif 547 548#ifdef CONFIG_JULIETTE 549 ;; configure external DMA channel 0 before enabling it in genconfig 550 551 moveq 0,$r0 552 move.d $r0,[R_EXT_DMA_0_ADDR] 553 ; cnt enable, word size, output, stop, size 0 554 move.d IO_STATE (R_EXT_DMA_0_CMD, cnt, enable) \ 555 | IO_STATE (R_EXT_DMA_0_CMD, rqpol, ahigh) \ 556 | IO_STATE (R_EXT_DMA_0_CMD, apol, ahigh) \ 557 | IO_STATE (R_EXT_DMA_0_CMD, rq_ack, burst) \ 558 | IO_STATE (R_EXT_DMA_0_CMD, wid, word) \ 559 | IO_STATE (R_EXT_DMA_0_CMD, dir, output) \ 560 | IO_STATE (R_EXT_DMA_0_CMD, run, stop) \ 561 | IO_FIELD (R_EXT_DMA_0_CMD, trf_count, 0),$r0 562 move.d $r0,[R_EXT_DMA_0_CMD] 563 564 ;; reset dma4 and wait for completion 565 566 moveq IO_STATE (R_DMA_CH4_CMD, cmd, reset),$r0 567 move.b $r0,[R_DMA_CH4_CMD] 5681: move.b [R_DMA_CH4_CMD],$r0 569 and.b IO_MASK (R_DMA_CH4_CMD, cmd),$r0 570 cmp.b IO_STATE (R_DMA_CH4_CMD, cmd, reset),$r0 571 beq 1b 572 nop 573 574 ;; reset dma5 and wait for completion 575 576 moveq IO_STATE (R_DMA_CH5_CMD, cmd, reset),$r0 577 move.b $r0,[R_DMA_CH5_CMD] 5781: move.b [R_DMA_CH5_CMD],$r0 579 and.b IO_MASK (R_DMA_CH5_CMD, cmd),$r0 580 cmp.b IO_STATE (R_DMA_CH5_CMD, cmd, reset),$r0 581 beq 1b 582 nop 583#endif 584 585 ;; Etrax product HW genconfig setup 586 587 moveq 0,$r0 588 589 ;; Init interfaces (disable them). 590 or.d IO_STATE (R_GEN_CONFIG, scsi0, disable) \ 591 | IO_STATE (R_GEN_CONFIG, ata, disable) \ 592 | IO_STATE (R_GEN_CONFIG, par0, disable) \ 593 | IO_STATE (R_GEN_CONFIG, ser2, disable) \ 594 | IO_STATE (R_GEN_CONFIG, mio, disable) \ 595 | IO_STATE (R_GEN_CONFIG, scsi1, disable) \ 596 | IO_STATE (R_GEN_CONFIG, scsi0w, disable) \ 597 | IO_STATE (R_GEN_CONFIG, par1, disable) \ 598 | IO_STATE (R_GEN_CONFIG, ser3, disable) \ 599 | IO_STATE (R_GEN_CONFIG, mio_w, disable) \ 600 | IO_STATE (R_GEN_CONFIG, usb1, disable) \ 601 | IO_STATE (R_GEN_CONFIG, usb2, disable) \ 602 | IO_STATE (R_GEN_CONFIG, par_w, disable),$r0 603 604 ;; Init DMA channel muxing (set to unused clients). 605 or.d IO_STATE (R_GEN_CONFIG, dma2, ata) \ 606 | IO_STATE (R_GEN_CONFIG, dma3, ata) \ 607 | IO_STATE (R_GEN_CONFIG, dma4, scsi1) \ 608 | IO_STATE (R_GEN_CONFIG, dma5, scsi1) \ 609 | IO_STATE (R_GEN_CONFIG, dma6, unused) \ 610 | IO_STATE (R_GEN_CONFIG, dma7, unused) \ 611 | IO_STATE (R_GEN_CONFIG, dma8, usb) \ 612 | IO_STATE (R_GEN_CONFIG, dma9, usb),$r0 613 614 615#if defined(CONFIG_ETRAX_DEF_R_PORT_G0_DIR_OUT) 616 or.d IO_STATE (R_GEN_CONFIG, g0dir, out),$r0 617#endif 618 619#if defined(CONFIG_ETRAX_DEF_R_PORT_G8_15_DIR_OUT) 620 or.d IO_STATE (R_GEN_CONFIG, g8_15dir, out),$r0 621#endif 622#if defined(CONFIG_ETRAX_DEF_R_PORT_G16_23_DIR_OUT) 623 or.d IO_STATE (R_GEN_CONFIG, g16_23dir, out),$r0 624#endif 625 626#if defined(CONFIG_ETRAX_DEF_R_PORT_G24_DIR_OUT) 627 or.d IO_STATE (R_GEN_CONFIG, g24dir, out),$r0 628#endif 629 630 move.d $r0,[genconfig_shadow] ; init a shadow register of R_GEN_CONFIG 631 632#ifndef CONFIG_SVINTO_SIM 633 move.d $r0,[R_GEN_CONFIG] 634 635 636 moveq IO_STATE (R_DMA_CH8_CMD, cmd, reset),$r0 637 move.b $r0,[R_DMA_CH8_CMD] ; reset (ser1 dma out) 638 move.b $r0,[R_DMA_CH9_CMD] ; reset (ser1 dma in) 6391: move.b [R_DMA_CH8_CMD],$r0 ; wait for reset cycle to finish 640 andq IO_MASK (R_DMA_CH8_CMD, cmd),$r0 641 cmpq IO_STATE (R_DMA_CH8_CMD, cmd, reset),$r0 642 beq 1b 643 nop 6441: move.b [R_DMA_CH9_CMD],$r0 ; wait for reset cycle to finish 645 andq IO_MASK (R_DMA_CH9_CMD, cmd),$r0 646 cmpq IO_STATE (R_DMA_CH9_CMD, cmd, reset),$r0 647 beq 1b 648 nop 649 650 ;; setup port PA and PB default initial directions and data 651 ;; including their shadow registers 652 653 move.b CONFIG_ETRAX_DEF_R_PORT_PA_DIR,$r0 654#if defined(CONFIG_BLUETOOTH) && defined(CONFIG_BLUETOOTH_RESET_PA7) 655 or.b IO_STATE (R_PORT_PA_DIR, dir7, output),$r0 656#endif 657 move.b $r0,[port_pa_dir_shadow] 658 move.b $r0,[R_PORT_PA_DIR] 659 move.b CONFIG_ETRAX_DEF_R_PORT_PA_DATA,$r0 660#if defined(CONFIG_BLUETOOTH) && defined(CONFIG_BLUETOOTH_RESET_PA7) 661#if defined(CONFIG_BLUETOOTH_RESET_ACTIVE_HIGH) 662 and.b ~(1 << 7),$r0 663#else 664 or.b (1 << 7),$r0 665#endif 666#endif 667 move.b $r0,[port_pa_data_shadow] 668 move.b $r0,[R_PORT_PA_DATA] 669 670 move.b CONFIG_ETRAX_DEF_R_PORT_PB_CONFIG,$r0 671 move.b $r0,[port_pb_config_shadow] 672 move.b $r0,[R_PORT_PB_CONFIG] 673 move.b CONFIG_ETRAX_DEF_R_PORT_PB_DIR,$r0 674#if defined(CONFIG_BLUETOOTH) && defined(CONFIG_BLUETOOTH_RESET_PB5) 675 or.b IO_STATE (R_PORT_PB_DIR, dir5, output),$r0 676#endif 677 move.b $r0,[port_pb_dir_shadow] 678 move.b $r0,[R_PORT_PB_DIR] 679 move.b CONFIG_ETRAX_DEF_R_PORT_PB_DATA,$r0 680#if defined(CONFIG_BLUETOOTH) && defined(CONFIG_BLUETOOTH_RESET_PB5) 681#if defined(CONFIG_BLUETOOTH_RESET_ACTIVE_HIGH) 682 and.b ~(1 << 5),$r0 683#else 684 or.b (1 << 5),$r0 685#endif 686#endif 687 move.b $r0,[port_pb_data_shadow] 688 move.b $r0,[R_PORT_PB_DATA] 689 690 moveq 0, $r0 691 move.d $r0,[port_pb_i2c_shadow] 692 move.d $r0, [R_PORT_PB_I2C] 693 694 moveq 0,$r0 695#if defined(CONFIG_BLUETOOTH) && defined(CONFIG_BLUETOOTH_RESET_G10) 696#if defined(CONFIG_BLUETOOTH_RESET_ACTIVE_HIGH) 697 and.d ~(1 << 10),$r0 698#else 699 or.d (1 << 10),$r0 700#endif 701#endif 702#if defined(CONFIG_BLUETOOTH) && defined(CONFIG_BLUETOOTH_RESET_G11) 703#if defined(CONFIG_BLUETOOTH_RESET_ACTIVE_HIGH) 704 and.d ~(1 << 11),$r0 705#else 706 or.d (1 << 11),$r0 707#endif 708#endif 709 move.d $r0,[port_g_data_shadow] 710 move.d $r0,[R_PORT_G_DATA] 711 712 ;; setup the serial port 0 at 115200 baud for debug purposes 713 714 moveq IO_STATE (R_SERIAL0_XOFF, tx_stop, enable) \ 715 | IO_STATE (R_SERIAL0_XOFF, auto_xoff, disable) \ 716 | IO_FIELD (R_SERIAL0_XOFF, xoff_char, 0),$r0 717 move.d $r0,[R_SERIAL0_XOFF] 718 719 ; 115.2kbaud for both transmit and receive 720 move.b IO_STATE (R_SERIAL0_BAUD, tr_baud, c115k2Hz) \ 721 | IO_STATE (R_SERIAL0_BAUD, rec_baud, c115k2Hz),$r0 722 move.b $r0,[R_SERIAL0_BAUD] 723 724 ; Set up and enable the serial0 receiver. 725 move.b IO_STATE (R_SERIAL0_REC_CTRL, dma_err, stop) \ 726 | IO_STATE (R_SERIAL0_REC_CTRL, rec_enable, enable) \ 727 | IO_STATE (R_SERIAL0_REC_CTRL, rts_, active) \ 728 | IO_STATE (R_SERIAL0_REC_CTRL, sampling, middle) \ 729 | IO_STATE (R_SERIAL0_REC_CTRL, rec_stick_par, normal) \ 730 | IO_STATE (R_SERIAL0_REC_CTRL, rec_par, even) \ 731 | IO_STATE (R_SERIAL0_REC_CTRL, rec_par_en, disable) \ 732 | IO_STATE (R_SERIAL0_REC_CTRL, rec_bitnr, rec_8bit),$r0 733 move.b $r0,[R_SERIAL0_REC_CTRL] 734 735 ; Set up and enable the serial0 transmitter. 736 move.b IO_FIELD (R_SERIAL0_TR_CTRL, txd, 0) \ 737 | IO_STATE (R_SERIAL0_TR_CTRL, tr_enable, enable) \ 738 | IO_STATE (R_SERIAL0_TR_CTRL, auto_cts, disabled) \ 739 | IO_STATE (R_SERIAL0_TR_CTRL, stop_bits, one_bit) \ 740 | IO_STATE (R_SERIAL0_TR_CTRL, tr_stick_par, normal) \ 741 | IO_STATE (R_SERIAL0_TR_CTRL, tr_par, even) \ 742 | IO_STATE (R_SERIAL0_TR_CTRL, tr_par_en, disable) \ 743 | IO_STATE (R_SERIAL0_TR_CTRL, tr_bitnr, tr_8bit),$r0 744 move.b $r0,[R_SERIAL0_TR_CTRL] 745 746 ;; setup the serial port 1 at 115200 baud for debug purposes 747 748 moveq IO_STATE (R_SERIAL1_XOFF, tx_stop, enable) \ 749 | IO_STATE (R_SERIAL1_XOFF, auto_xoff, disable) \ 750 | IO_FIELD (R_SERIAL1_XOFF, xoff_char, 0),$r0 751 move.d $r0,[R_SERIAL1_XOFF] 752 753 ; 115.2kbaud for both transmit and receive 754 move.b IO_STATE (R_SERIAL1_BAUD, tr_baud, c115k2Hz) \ 755 | IO_STATE (R_SERIAL1_BAUD, rec_baud, c115k2Hz),$r0 756 move.b $r0,[R_SERIAL1_BAUD] 757 758 ; Set up and enable the serial1 receiver. 759 move.b IO_STATE (R_SERIAL1_REC_CTRL, dma_err, stop) \ 760 | IO_STATE (R_SERIAL1_REC_CTRL, rec_enable, enable) \ 761 | IO_STATE (R_SERIAL1_REC_CTRL, rts_, active) \ 762 | IO_STATE (R_SERIAL1_REC_CTRL, sampling, middle) \ 763 | IO_STATE (R_SERIAL1_REC_CTRL, rec_stick_par, normal) \ 764 | IO_STATE (R_SERIAL1_REC_CTRL, rec_par, even) \ 765 | IO_STATE (R_SERIAL1_REC_CTRL, rec_par_en, disable) \ 766 | IO_STATE (R_SERIAL1_REC_CTRL, rec_bitnr, rec_8bit),$r0 767 move.b $r0,[R_SERIAL1_REC_CTRL] 768 769 ; Set up and enable the serial1 transmitter. 770 move.b IO_FIELD (R_SERIAL1_TR_CTRL, txd, 0) \ 771 | IO_STATE (R_SERIAL1_TR_CTRL, tr_enable, enable) \ 772 | IO_STATE (R_SERIAL1_TR_CTRL, auto_cts, disabled) \ 773 | IO_STATE (R_SERIAL1_TR_CTRL, stop_bits, one_bit) \ 774 | IO_STATE (R_SERIAL1_TR_CTRL, tr_stick_par, normal) \ 775 | IO_STATE (R_SERIAL1_TR_CTRL, tr_par, even) \ 776 | IO_STATE (R_SERIAL1_TR_CTRL, tr_par_en, disable) \ 777 | IO_STATE (R_SERIAL1_TR_CTRL, tr_bitnr, tr_8bit),$r0 778 move.b $r0,[R_SERIAL1_TR_CTRL] 779 780 781#ifdef CONFIG_ETRAX_SERIAL_PORT3 782 ;; setup the serial port 3 at 115200 baud for debug purposes 783 784 moveq IO_STATE (R_SERIAL3_XOFF, tx_stop, enable) \ 785 | IO_STATE (R_SERIAL3_XOFF, auto_xoff, disable) \ 786 | IO_FIELD (R_SERIAL3_XOFF, xoff_char, 0),$r0 787 move.d $r0,[R_SERIAL3_XOFF] 788 789 ; 115.2kbaud for both transmit and receive 790 move.b IO_STATE (R_SERIAL3_BAUD, tr_baud, c115k2Hz) \ 791 | IO_STATE (R_SERIAL3_BAUD, rec_baud, c115k2Hz),$r0 792 move.b $r0,[R_SERIAL3_BAUD] 793 794 ; Set up and enable the serial3 receiver. 795 move.b IO_STATE (R_SERIAL3_REC_CTRL, dma_err, stop) \ 796 | IO_STATE (R_SERIAL3_REC_CTRL, rec_enable, enable) \ 797 | IO_STATE (R_SERIAL3_REC_CTRL, rts_, active) \ 798 | IO_STATE (R_SERIAL3_REC_CTRL, sampling, middle) \ 799 | IO_STATE (R_SERIAL3_REC_CTRL, rec_stick_par, normal) \ 800 | IO_STATE (R_SERIAL3_REC_CTRL, rec_par, even) \ 801 | IO_STATE (R_SERIAL3_REC_CTRL, rec_par_en, disable) \ 802 | IO_STATE (R_SERIAL3_REC_CTRL, rec_bitnr, rec_8bit),$r0 803 move.b $r0,[R_SERIAL3_REC_CTRL] 804 805 ; Set up and enable the serial3 transmitter. 806 move.b IO_FIELD (R_SERIAL3_TR_CTRL, txd, 0) \ 807 | IO_STATE (R_SERIAL3_TR_CTRL, tr_enable, enable) \ 808 | IO_STATE (R_SERIAL3_TR_CTRL, auto_cts, disabled) \ 809 | IO_STATE (R_SERIAL3_TR_CTRL, stop_bits, one_bit) \ 810 | IO_STATE (R_SERIAL3_TR_CTRL, tr_stick_par, normal) \ 811 | IO_STATE (R_SERIAL3_TR_CTRL, tr_par, even) \ 812 | IO_STATE (R_SERIAL3_TR_CTRL, tr_par_en, disable) \ 813 | IO_STATE (R_SERIAL3_TR_CTRL, tr_bitnr, tr_8bit),$r0 814 move.b $r0,[R_SERIAL3_TR_CTRL] 815#endif 816 817#endif /* CONFIG_SVINTO_SIM */ 818 819 jump start_kernel ; jump into the C-function start_kernel in init/main.c 820 821 .data 822etrax_irv: 823 .dword 0 824romfs_start: 825 .dword 0 826romfs_length: 827 .dword 0 828romfs_in_flash: 829 .dword 0 830 831 ;; put some special pages at the beginning of the kernel aligned 832 ;; to page boundaries - the kernel cannot start until after this 833 834#ifdef CONFIG_CRIS_LOW_MAP 835swapper_pg_dir = 0x60002000 836#else 837swapper_pg_dir = 0xc0002000 838#endif 839 840 .section ".init.data", "aw" 841#include "../lib/hw_settings.S" 842