1#
2# For a description of the syntax of this configuration file,
3# see Documentation/kbuild/kconfig-language.txt.
4#
5
6mainmenu "uClinux/Blackfin (w/o MMU) Kernel Configuration"
7
8config MMU
9	bool
10	default n
11
12config FPU
13	bool
14	default n
15
16config RWSEM_GENERIC_SPINLOCK
17	bool
18	default y
19
20config RWSEM_XCHGADD_ALGORITHM
21	bool
22	default n
23
24config BLACKFIN
25	bool
26	default y
27
28config ZONE_DMA
29	bool
30	default y
31
32config BFIN
33	bool
34	default y
35
36config SEMAPHORE_SLEEPERS
37	bool
38	default y
39
40config GENERIC_FIND_NEXT_BIT
41	bool
42	default y
43
44config GENERIC_HWEIGHT
45	bool
46	default y
47
48config GENERIC_HARDIRQS
49	bool
50	default y
51
52config GENERIC_IRQ_PROBE
53        bool
54	default y
55
56config GENERIC_TIME
57	bool
58	default n
59
60config GENERIC_CALIBRATE_DELAY
61	bool
62	default y
63
64config FORCE_MAX_ZONEORDER
65	int
66	default "14"
67
68config GENERIC_CALIBRATE_DELAY
69	bool
70	default y
71
72config IRQCHIP_DEMUX_GPIO
73	bool
74	default y
75
76source "init/Kconfig"
77source "kernel/Kconfig.preempt"
78
79menu "Blackfin Processor Options"
80
81comment "Processor and Board Settings"
82
83choice
84	prompt "CPU"
85	default BF533
86
87config BF531
88	bool "BF531"
89	help
90	  BF531 Processor Support.
91
92config BF532
93	bool "BF532"
94	help
95	  BF532 Processor Support.
96
97config BF533
98	bool "BF533"
99	help
100	  BF533 Processor Support.
101
102config BF534
103	bool "BF534"
104	help
105	  BF534 Processor Support.
106
107config BF536
108	bool "BF536"
109	help
110	  BF536 Processor Support.
111
112config BF537
113	bool "BF537"
114	help
115	  BF537 Processor Support.
116
117config BF561
118	bool "BF561"
119	help
120	  Not Supported Yet - Work in progress - BF561 Processor Support.
121
122endchoice
123
124choice
125	prompt "Silicon Rev"
126	default BF_REV_0_2 if BF537
127	default BF_REV_0_3 if BF533
128
129config BF_REV_0_2
130	bool "0.2"
131	depends on (BF537 || BF536 || BF534)
132
133config BF_REV_0_3
134	bool "0.3"
135	depends on (BF561 || BF537 || BF536 || BF534 || BF533 || BF532 || BF531)
136
137config BF_REV_0_4
138	bool "0.4"
139	depends on (BF561 || BF533 || BF532 || BF531)
140
141config BF_REV_0_5
142	bool "0.5"
143	depends on (BF561 || BF533 || BF532 || BF531)
144
145config BF_REV_ANY
146	bool "any"
147
148config BF_REV_NONE
149	bool "none"
150
151endchoice
152
153config BFIN_DUAL_CORE
154	bool
155	depends on (BF561)
156	default y
157
158config BFIN_SINGLE_CORE
159	bool
160	depends on !BFIN_DUAL_CORE
161	default y
162
163choice
164	prompt "System type"
165	default BFIN533_STAMP
166	help
167	  Do NOT change the board here.  Please use the top level
168	  configuration to ensure that all the other settings are
169	  correct.
170
171config BFIN533_EZKIT
172	bool "BF533-EZKIT"
173	depends on (BF533 || BF532 || BF531)
174	help
175	  BF533-EZKIT-LITE board Support.
176
177config  BFIN533_STAMP
178	bool "BF533-STAMP"
179	depends on (BF533 || BF532 || BF531)
180	help
181	  BF533-STAMP board Support.
182
183config BFIN537_STAMP
184	bool "BF537-STAMP"
185	depends on (BF537 || BF536 || BF534)
186	help
187	  BF537-STAMP board Support.
188
189config BFIN533_BLUETECHNIX_CM
190	bool "Bluetechnix CM-BF533"
191	depends on (BF533)
192	help
193	  CM-BF533 support for EVAL- and DEV-Board.
194
195config BFIN537_BLUETECHNIX_CM
196	bool "Bluetechnix CM-BF537"
197	depends on (BF537)
198	help
199	  CM-BF537 support for EVAL- and DEV-Board.
200
201config BFIN561_BLUETECHNIX_CM
202	bool "Bluetechnix CM-BF561"
203	depends on (BF561)
204	help
205	  CM-BF561 support for EVAL- and DEV-Board.
206
207config BFIN561_EZKIT
208	bool "BF561-EZKIT"
209	depends on (BF561)
210	help
211	  BF561-EZKIT-LITE board Support.
212
213config BFIN561_TEPLA
214	bool "BF561-TEPLA"
215	depends on (BF561)
216	help
217	 BF561-TEPLA board Support.
218
219config PNAV10
220	bool "PNAV 1.0 board"
221	depends on (BF537)
222	help
223	  PNAV 1.0 board Support.
224
225config GENERIC_BOARD
226	bool "Custom"
227	depends on (BF537 || BF536 \
228		|| BF534 || BF561 || BF535 || BF533 || BF532 || BF531)
229	help
230	  GENERIC or Custom board Support.
231
232endchoice
233
234config MEM_GENERIC_BOARD
235	bool
236	depends on GENERIC_BOARD
237	default y
238
239config MEM_MT48LC64M4A2FB_7E
240	bool
241	depends on (BFIN533_STAMP)
242	default y
243
244config MEM_MT48LC16M16A2TG_75
245	bool
246	depends on (BFIN533_EZKIT || BFIN561_EZKIT \
247		|| BFIN533_BLUETECHNIX_CM || BFIN537_BLUETECHNIX_CM)
248	default y
249
250config MEM_MT48LC32M8A2_75
251	bool
252	depends on (BFIN537_STAMP || PNAV10)
253	default y
254
255config MEM_MT48LC8M32B2B5_7
256	bool
257	depends on (BFIN561_BLUETECHNIX_CM)
258	default y
259
260config BFIN_SHARED_FLASH_ENET
261	bool
262	depends on (BFIN533_STAMP)
263	default y
264
265source "arch/blackfin/mach-bf533/Kconfig"
266source "arch/blackfin/mach-bf561/Kconfig"
267source "arch/blackfin/mach-bf537/Kconfig"
268
269menu "Board customizations"
270
271config CMDLINE_BOOL
272	bool "Default bootloader kernel arguments"
273
274config CMDLINE
275	string "Initial kernel command string"
276	depends on CMDLINE_BOOL
277	default "console=ttyBF0,57600"
278	help
279	  If you don't have a boot loader capable of passing a command line string
280	  to the kernel, you may specify one here. As a minimum, you should specify
281	  the memory size and the root device (e.g., mem=8M, root=/dev/nfs).
282
283comment "Board Setup"
284
285config CLKIN_HZ
286	int "Crystal Frequency in Hz"
287	default "11059200" if BFIN533_STAMP
288	default "27000000" if BFIN533_EZKIT
289	default "25000000" if BFIN537_STAMP
290	default "30000000" if BFIN561_EZKIT
291	default "24576000" if PNAV10
292	help
293	  The frequency of CLKIN crystal oscillator on the board in Hz.
294
295config MEM_SIZE
296	int "SDRAM Memory Size in MBytes"
297	default  32 if BFIN533_EZKIT
298	default  64 if BFIN537_STAMP
299	default  64 if BFIN561_EZKIT
300	default 128 if BFIN533_STAMP
301	default  64 if PNAV10
302
303config MEM_ADD_WIDTH
304	int "SDRAM Memory Address Width"
305	default  9 if BFIN533_EZKIT
306	default  9 if BFIN561_EZKIT
307	default 10 if BFIN537_STAMP
308	default 11 if BFIN533_STAMP
309	default 10 if PNAV10
310
311config ENET_FLASH_PIN
312	int "PF port/pin used for flash and ethernet sharing"
313	depends on (BFIN533_STAMP)
314	default  0
315	help
316	  PF port/pin used for flash and ethernet sharing to allow other PF
317	  pins to be used on other platforms without having to touch common
318	  code.
319	  For example: PF0 --> 0,PF1 --> 1,PF2 --> 2, etc.
320
321config BOOT_LOAD
322	hex "Kernel load address for booting"
323	default "0x1000"
324	help
325	  This option allows you to set the load address of the kernel.
326	  This can be useful if you are on a board which has a small amount
327	  of memory or you wish to reserve some memory at the beginning of
328	  the address space.
329
330	  Note that you generally want to keep this value at or above 4k
331	  (0x1000) as this will allow the kernel to capture NULL pointer
332	  references.
333
334comment "LED Status Indicators"
335	depends on (BFIN533_STAMP || BFIN533_BLUETECHNIX_CM)
336
337config BFIN_ALIVE_LED
338	bool "Enable Board Alive"
339	depends on (BFIN533_STAMP || BFIN533_BLUETECHNIX_CM)
340	default n
341	help
342	  Blink the LEDs you select when the kernel is running.  Helps detect
343	  a hung kernel.
344
345config BFIN_ALIVE_LED_NUM
346	int "LED"
347	depends on BFIN_ALIVE_LED
348	range 1 3 if BFIN533_STAMP
349	default "3" if BFIN533_STAMP
350	help
351	  Select the LED (marked on the board) for you to blink.
352
353config BFIN_IDLE_LED
354	bool "Enable System Load/Idle LED"
355	depends on (BFIN533_STAMP || BFIN533_BLUETECHNIX_CM)
356	default n
357	help
358	  Blinks the LED you select when to determine kernel load.
359
360config BFIN_IDLE_LED_NUM
361	int "LED"
362	depends on BFIN_IDLE_LED
363	range 1 3 if BFIN533_STAMP
364	default "2" if BFIN533_STAMP
365	help
366	  Select the LED (marked on the board) for you to blink.
367
368#
369# Sorry - but you need to put the hex address here -
370#
371
372# Flag Data register
373config BFIN_ALIVE_LED_PORT
374	hex
375	default 0xFFC00700 if (BFIN533_STAMP)
376
377# Peripheral Flag Direction Register
378config BFIN_ALIVE_LED_DPORT
379	hex
380	default 0xFFC00730 if (BFIN533_STAMP)
381
382config BFIN_ALIVE_LED_PIN
383	hex
384	default 0x04 if (BFIN533_STAMP && BFIN_ALIVE_LED_NUM = 1)
385	default 0x08 if (BFIN533_STAMP && BFIN_ALIVE_LED_NUM = 2)
386	default 0x10 if (BFIN533_STAMP && BFIN_ALIVE_LED_NUM = 3)
387
388config BFIN_IDLE_LED_PORT
389	hex
390	default 0xFFC00700 if (BFIN533_STAMP)
391
392# Peripheral Flag Direction Register
393config BFIN_IDLE_LED_DPORT
394	hex
395	default 0xFFC00730 if (BFIN533_STAMP)
396
397config BFIN_IDLE_LED_PIN
398	hex
399	default 0x04 if (BFIN533_STAMP && BFIN_IDLE_LED_NUM = 1)
400	default 0x08 if (BFIN533_STAMP && BFIN_IDLE_LED_NUM = 2)
401	default 0x10 if (BFIN533_STAMP && BFIN_IDLE_LED_NUM = 3)
402
403endmenu
404
405
406menu "Blackfin Kernel Optimizations"
407
408comment "Timer Tick"
409
410source kernel/Kconfig.hz
411
412comment "Memory Optimizations"
413
414config I_ENTRY_L1
415	bool "Locate interrupt entry code in L1 Memory"
416	default y
417	help
418	  If enabled interrupt entry code (STORE/RESTORE CONTEXT) is linked
419	  into L1 instruction memory.(less latency)
420
421config EXCPT_IRQ_SYSC_L1
422	bool "Locate entire ASM lowlevel excepetion / interrupt - Syscall and CPLB handler code in L1 Memory"
423	default y
424	help
425	  If enabled entire ASM lowlevel exception and interrupt entry code (STORE/RESTORE CONTEXT) is linked
426	  into L1 instruction memory.(less latency)
427
428config DO_IRQ_L1
429	bool "Locate frequently called do_irq dispatcher function in L1 Memory"
430	default y
431	help
432	  If enabled frequently called do_irq dispatcher function is linked
433	  into L1 instruction memory.(less latency)
434
435config CORE_TIMER_IRQ_L1
436	bool "Locate frequently called timer_interrupt() function in L1 Memory"
437	default y
438	help
439	  If enabled frequently called timer_interrupt() function is linked
440	  into L1 instruction memory.(less latency)
441
442config IDLE_L1
443	bool "Locate frequently idle function in L1 Memory"
444	default y
445	help
446	  If enabled frequently called idle function is linked
447	  into L1 instruction memory.(less latency)
448
449config SCHEDULE_L1
450	bool "Locate kernel schedule function in L1 Memory"
451	default y
452	help
453	  If enabled frequently called kernel schedule is linked
454	  into L1 instruction memory.(less latency)
455
456config ARITHMETIC_OPS_L1
457	bool "Locate kernel owned arithmetic functions in L1 Memory"
458	default y
459	help
460	  If enabled arithmetic functions are linked
461	  into L1 instruction memory.(less latency)
462
463config ACCESS_OK_L1
464	bool "Locate access_ok function in L1 Memory"
465	default y
466	help
467	  If enabled access_ok function is linked
468	  into L1 instruction memory.(less latency)
469
470config MEMSET_L1
471	bool "Locate memset function in L1 Memory"
472	default y
473	help
474	  If enabled memset function is linked
475	  into L1 instruction memory.(less latency)
476
477config MEMCPY_L1
478	bool "Locate memcpy function in L1 Memory"
479	default y
480	help
481	  If enabled memcpy function is linked
482	  into L1 instruction memory.(less latency)
483
484config SYS_BFIN_SPINLOCK_L1
485	bool "Locate sys_bfin_spinlock function in L1 Memory"
486	default y
487	help
488	  If enabled sys_bfin_spinlock function is linked
489	  into L1 instruction memory.(less latency)
490
491config IP_CHECKSUM_L1
492	bool "Locate IP Checksum function in L1 Memory"
493	default n
494	help
495	  If enabled IP Checksum function is linked
496	  into L1 instruction memory.(less latency)
497
498config CACHELINE_ALIGNED_L1
499	bool "Locate cacheline_aligned data to L1 Data Memory"
500	default y
501	depends on !BF531
502	help
503	  If enabled cacheline_anligned data is linked
504	  into L1 data memory.(less latency)
505
506config SYSCALL_TAB_L1
507	bool "Locate Syscall Table L1 Data Memory"
508	default n
509	depends on !BF531
510	help
511	  If enabled the Syscall LUT is linked
512	  into L1 data memory.(less latency)
513
514config CPLB_SWITCH_TAB_L1
515	bool "Locate CPLB Switch Tables L1 Data Memory"
516	default n
517	depends on !BF531
518	help
519	  If enabled the CPLB Switch Tables are linked
520	  into L1 data memory.(less latency)
521
522endmenu
523
524
525choice
526	prompt "Kernel executes from"
527	help
528	  Choose the memory type that the kernel will be running in.
529
530config RAMKERNEL
531	bool "RAM"
532	help
533	  The kernel will be resident in RAM when running.
534
535config ROMKERNEL
536	bool "ROM"
537	help
538	  The kernel will be resident in FLASH/ROM when running.
539
540endchoice
541
542source "mm/Kconfig"
543
544config BFIN_DMA_5XX
545	bool "Enable DMA Support"
546	depends on (BF533 || BF532 || BF531 || BF537 || BF536 || BF534 || BF561)
547	default y
548	help
549	  DMA driver for BF5xx.
550
551choice
552	prompt "Uncached SDRAM region"
553	default DMA_UNCACHED_1M
554	depends BFIN_DMA_5XX
555config DMA_UNCACHED_2M
556	bool "Enable 2M DMA region"
557config DMA_UNCACHED_1M
558	bool "Enable 1M DMA region"
559config DMA_UNCACHED_NONE
560	bool "Disable DMA region"
561endchoice
562
563
564comment "Cache Support"
565config BLKFIN_CACHE
566	bool "Enable ICACHE"
567config BLKFIN_DCACHE
568	bool "Enable DCACHE"
569config BLKFIN_DCACHE_BANKA
570	bool "Enable only 16k BankA DCACHE - BankB is SRAM"
571	depends on BLKFIN_DCACHE && !BF531
572	default n
573config BLKFIN_CACHE_LOCK
574	bool "Enable Cache Locking"
575
576choice
577	prompt "Policy"
578	depends on BLKFIN_DCACHE
579	default BLKFIN_WB
580config BLKFIN_WB
581	bool "Write back"
582	help
583	  Write Back Policy:
584	    Cached data will be written back to SDRAM only when needed.
585	    This can give a nice increase in performance, but beware of
586	    broken drivers that do not properly invalidate/flush their
587	    cache.
588
589	  Write Through Policy:
590	    Cached data will always be written back to SDRAM when the
591	    cache is updated.  This is a completely safe setting, but
592	    performance is worse than Write Back.
593
594	  If you are unsure of the options and you want to be safe,
595	  then go with Write Through.
596
597config BLKFIN_WT
598	bool "Write through"
599	help
600	  Write Back Policy:
601	    Cached data will be written back to SDRAM only when needed.
602	    This can give a nice increase in performance, but beware of
603	    broken drivers that do not properly invalidate/flush their
604	    cache.
605
606	  Write Through Policy:
607	    Cached data will always be written back to SDRAM when the
608	    cache is updated.  This is a completely safe setting, but
609	    performance is worse than Write Back.
610
611	  If you are unsure of the options and you want to be safe,
612	  then go with Write Through.
613
614endchoice
615
616config L1_MAX_PIECE
617	int "Set the max L1 SRAM pieces"
618	default 16
619	help
620	  Set the max memory pieces for the L1 SRAM allocation algorithm.
621	  Min value is 16. Max value is 1024.
622
623menu "Clock Settings"
624
625
626config BFIN_KERNEL_CLOCK
627	bool "Re-program Clocks while Kernel boots?"
628	default n
629	help
630	  This option decides if kernel clocks are re-programed from the
631	  bootloader settings. If the clocks are not set, the SDRAM settings
632	  are also not changed, and the Bootloader does 100% of the hardware
633	  configuration.
634
635config VCO_MULT
636	int "VCO Multiplier"
637	depends on BFIN_KERNEL_CLOCK
638	default "22" if BFIN533_EZKIT
639	default "45" if BFIN533_STAMP
640	default "20" if BFIN537_STAMP
641	default "22" if BFIN533_BLUETECHNIX_CM
642	default "20" if BFIN537_BLUETECHNIX_CM
643	default "20" if BFIN561_BLUETECHNIX_CM
644	default "20" if BFIN561_EZKIT
645
646config CCLK_DIV
647	int "Core Clock Divider"
648	depends on BFIN_KERNEL_CLOCK
649	default 1 if BFIN533_EZKIT
650	default 1 if BFIN533_STAMP
651	default 1 if BFIN537_STAMP
652	default 1 if BFIN533_BLUETECHNIX_CM
653	default 1 if BFIN537_BLUETECHNIX_CM
654	default 1 if BFIN561_BLUETECHNIX_CM
655	default 1 if BFIN561_EZKIT
656
657config SCLK_DIV
658	int "System Clock Divider"
659	depends on BFIN_KERNEL_CLOCK
660	default 5 if BFIN533_EZKIT
661	default 5 if BFIN533_STAMP
662	default 4 if BFIN537_STAMP
663	default 5 if BFIN533_BLUETECHNIX_CM
664	default 4 if BFIN537_BLUETECHNIX_CM
665	default 4 if BFIN561_BLUETECHNIX_CM
666	default 5 if BFIN561_EZKIT
667
668config CLKIN_HALF
669	bool "Half ClockIn"
670	depends on BFIN_KERNEL_CLOCK
671	default n
672
673config PLL_BYPASS
674	bool "Bypass PLL"
675	depends on BFIN_KERNEL_CLOCK
676	default n
677
678endmenu
679
680comment "Asynchonous Memory Configuration"
681
682menu "EBIU_AMBCTL Global Control"
683config C_AMCKEN
684	bool "Enable CLKOUT"
685	default y
686
687config C_CDPRIO
688	bool "DMA has priority over core for ext. accesses"
689	default n
690
691config C_B0PEN
692	depends on BF561
693	bool "Bank 0 16 bit packing enable"
694	default y
695
696config C_B1PEN
697	depends on BF561
698	bool "Bank 1 16 bit packing enable"
699	default y
700
701config C_B2PEN
702	depends on BF561
703	bool "Bank 2 16 bit packing enable"
704	default y
705
706config C_B3PEN
707	depends on BF561
708	bool "Bank 3 16 bit packing enable"
709	default n
710
711choice
712	prompt"Enable Asynchonous Memory Banks"
713	default C_AMBEN_ALL
714
715config C_AMBEN
716	bool "Disable All Banks"
717
718config C_AMBEN_B0
719	bool "Enable Bank 0"
720
721config C_AMBEN_B0_B1
722	bool "Enable Bank 0 & 1"
723
724config C_AMBEN_B0_B1_B2
725	bool "Enable Bank 0 & 1 & 2"
726
727config C_AMBEN_ALL
728	bool "Enable All Banks"
729endchoice
730endmenu
731
732menu "EBIU_AMBCTL Control"
733config BANK_0
734	hex "Bank 0"
735	default 0x7BB0
736
737config BANK_1
738	hex "Bank 1"
739	default 0x7BB0
740
741config BANK_2
742	hex "Bank 2"
743	default 0x7BB0
744
745config BANK_3
746	hex "Bank 3"
747	default 0x99B3
748endmenu
749
750endmenu
751
752#############################################################################
753menu "Bus options (PCI, PCMCIA, EISA, MCA, ISA)"
754
755config PCI
756	bool "PCI support"
757	help
758	  Support for PCI bus.
759
760source "drivers/pci/Kconfig"
761
762config HOTPLUG
763	bool "Support for hot-pluggable device"
764	  help
765	  Say Y here if you want to plug devices into your computer while
766	  the system is running, and be able to use them quickly.  In many
767	  cases, the devices can likewise be unplugged at any time too.
768
769	  One well known example of this is PCMCIA- or PC-cards, credit-card
770	  size devices such as network cards, modems or hard drives which are
771	  plugged into slots found on all modern laptop computers.  Another
772	  example, used on modern desktops as well as laptops, is USB.
773
774	  Enable HOTPLUG and KMOD, and build a modular kernel.  Get agent
775	  software (at <http://linux-hotplug.sourceforge.net/>) and install it.
776	  Then your kernel will automatically call out to a user mode "policy
777	  agent" (/sbin/hotplug) to load modules and set up software needed
778	  to use devices as you hotplug them.
779
780source "drivers/pcmcia/Kconfig"
781
782source "drivers/pci/hotplug/Kconfig"
783
784endmenu
785
786menu "Executable file formats"
787
788source "fs/Kconfig.binfmt"
789
790endmenu
791
792menu "Power management options"
793source "kernel/power/Kconfig"
794
795choice
796	prompt "Select PM Wakeup Event Source"
797	default PM_WAKEUP_GPIO_BY_SIC_IWR
798	depends on PM
799	help
800	  If you have a GPIO already configured as input with the corresponding PORTx_MASK
801	  bit set - "Specify Wakeup Event by SIC_IWR value"
802
803config PM_WAKEUP_GPIO_BY_SIC_IWR
804	bool "Specify Wakeup Event by SIC_IWR value"
805config PM_WAKEUP_BY_GPIO
806	bool "Cause Wakeup Event by GPIO"
807config PM_WAKEUP_GPIO_API
808	bool "Configure Wakeup Event by PM GPIO API"
809
810endchoice
811
812config PM_WAKEUP_SIC_IWR
813	hex "Wakeup Events (SIC_IWR)"
814	depends on PM_WAKEUP_GPIO_BY_SIC_IWR
815	default 0x80000000 if (BF537 || BF536 || BF534)
816	default 0x100000 if (BF533 || BF532 || BF531)
817
818config PM_WAKEUP_GPIO_NUMBER
819	int "Wakeup GPIO number"
820	range 0 47
821	depends on PM_WAKEUP_BY_GPIO
822	default 2 if BFIN537_STAMP
823
824choice
825	prompt "GPIO Polarity"
826	depends on PM_WAKEUP_BY_GPIO
827	default PM_WAKEUP_GPIO_POLAR_H
828config  PM_WAKEUP_GPIO_POLAR_H
829	bool "Active High"
830config  PM_WAKEUP_GPIO_POLAR_L
831	bool "Active Low"
832config  PM_WAKEUP_GPIO_POLAR_EDGE_F
833	bool "Falling EDGE"
834config  PM_WAKEUP_GPIO_POLAR_EDGE_R
835	bool "Rising EDGE"
836config  PM_WAKEUP_GPIO_POLAR_EDGE_B
837	bool "Both EDGE"
838endchoice
839
840endmenu
841
842if (BF537 || BF533)
843
844menu "CPU Frequency scaling"
845
846source "drivers/cpufreq/Kconfig"
847
848config CPU_FREQ
849	bool
850	default n
851	help
852	  If you want to enable this option, you should select the
853	  DPMC driver from Character Devices.
854endmenu
855
856endif
857
858source "net/Kconfig"
859
860source "drivers/Kconfig"
861
862source "fs/Kconfig"
863
864source "arch/blackfin/oprofile/Kconfig"
865
866menu "Kernel hacking"
867
868source "lib/Kconfig.debug"
869
870config DEBUG_HWERR
871	bool "Hardware error interrupt debugging"
872	depends on DEBUG_KERNEL
873	help
874	  When enabled, the hardware error interrupt is never disabled, and
875	  will happen immediately when an error condition occurs.  This comes
876	  at a slight cost in code size, but is necessary if you are getting
877	  hardware error interrupts and need to know where they are coming
878	  from.
879
880config DEBUG_ICACHE_CHECK
881	bool "Check Instruction cache coherancy"
882	depends on DEBUG_KERNEL
883	depends on DEBUG_HWERR
884	help
885	  Say Y here if you are getting wierd unexplained errors. This will
886	  ensure that icache is what SDRAM says it should be, by doing a
887	  byte wise comparision between SDRAM and instruction cache. This
888	  also relocates the irq_panic() function to L1 memory, (which is
889	  un-cached).
890
891config DEBUG_KERNEL_START
892	bool "Debug Kernel Startup"
893	depends on DEBUG_KERNEL
894	help
895	  Say Y here to put in an mini-execption handler before the kernel
896	  replaces the bootloader exception handler. This will stop kernels
897	  from dieing at startup with no visible error messages.
898
899config DEBUG_SERIAL_EARLY_INIT
900	bool "Initialize serial driver early"
901	default n
902	depends on SERIAL_BFIN
903	help
904	  Say Y here if you want to get kernel output early when kernel
905	  crashes before the normal console initialization. If this option
906	  is enable, console output will always go to the ttyBF0, no matter
907	  what kernel boot paramters you set.
908
909config DEBUG_HUNT_FOR_ZERO
910	bool "Catch NULL pointer reads/writes"
911	default y
912	help
913	  Say Y here to catch reads/writes to anywhere in the memory range
914	  from 0x0000 - 0x0FFF (the first 4k) of memory.  This is useful in
915	  catching common programming errors such as NULL pointer dereferences.
916
917	  Misbehaving applications will be killed (generate a SEGV) while the
918	  kernel will trigger a panic.
919
920	  Enabling this option will take up an extra entry in CPLB table.
921	  Otherwise, there is no extra overhead.
922
923config DEBUG_BFIN_NO_KERN_HWTRACE
924	bool "Trace user apps (turn off hwtrace in kernel)"
925	default n
926	help
927	  Some pieces of the kernel contain a lot of flow changes which can
928	  quickly fill up the hardware trace buffer.  When debugging crashes,
929	  the hardware trace may indicate that the problem lies in kernel
930	  space when in reality an application is buggy.
931
932	  Say Y here to disable hardware tracing in some known "jumpy" pieces
933	  of code so that the trace buffer will extend further back.
934
935config DUAL_CORE_TEST_MODULE
936	tristate "Dual Core Test Module"
937	depends on (BF561)
938	default n
939	help
940	  Say Y here to build-in dual core test module for dual core test.
941
942config CPLB_INFO
943	bool "Display the CPLB information"
944	help
945	  Display the CPLB information.
946
947config ACCESS_CHECK
948	bool "Check the user pointer address"
949	default y
950	help
951	  Usually the pointer transfer from user space is checked to see if its
952	  address is in the kernel space.
953
954	  Say N here to disable that check to improve the performance.
955
956endmenu
957
958source "security/Kconfig"
959
960source "crypto/Kconfig"
961
962source "lib/Kconfig"
963