1/* linux/arch/arm/plat-s3c24xx/s3c244x-irq.c
2 *
3 * Copyright (c) 2003,2004 Simtec Electronics
4 *	Ben Dooks <ben@simtec.co.uk>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
19 *
20*/
21
22#include <linux/init.h>
23#include <linux/module.h>
24#include <linux/interrupt.h>
25#include <linux/ioport.h>
26#include <linux/sysdev.h>
27
28#include <asm/hardware.h>
29#include <asm/irq.h>
30#include <asm/io.h>
31
32#include <asm/mach/irq.h>
33
34#include <asm/arch/regs-irq.h>
35#include <asm/arch/regs-gpio.h>
36
37#include <asm/plat-s3c24xx/cpu.h>
38#include <asm/plat-s3c24xx/pm.h>
39#include <asm/plat-s3c24xx/irq.h>
40
41/* camera irq */
42
43static void s3c_irq_demux_cam(unsigned int irq,
44			      struct irq_desc *desc)
45{
46	unsigned int subsrc, submsk;
47	struct irq_desc *mydesc;
48
49	/* read the current pending interrupts, and the mask
50	 * for what it is available */
51
52	subsrc = __raw_readl(S3C2410_SUBSRCPND);
53	submsk = __raw_readl(S3C2410_INTSUBMSK);
54
55	subsrc &= ~submsk;
56	subsrc >>= 11;
57	subsrc &= 3;
58
59	if (subsrc != 0) {
60		if (subsrc & 1) {
61			mydesc = irq_desc + IRQ_S3C2440_CAM_C;
62			desc_handle_irq(IRQ_S3C2440_CAM_C, mydesc);
63		}
64		if (subsrc & 2) {
65			mydesc = irq_desc + IRQ_S3C2440_CAM_P;
66			desc_handle_irq(IRQ_S3C2440_CAM_P, mydesc);
67		}
68	}
69}
70
71#define INTMSK_CAM (1UL << (IRQ_CAM - IRQ_EINT0))
72
73static void
74s3c_irq_cam_mask(unsigned int irqno)
75{
76	s3c_irqsub_mask(irqno, INTMSK_CAM, 3<<11);
77}
78
79static void
80s3c_irq_cam_unmask(unsigned int irqno)
81{
82	s3c_irqsub_unmask(irqno, INTMSK_CAM);
83}
84
85static void
86s3c_irq_cam_ack(unsigned int irqno)
87{
88	s3c_irqsub_maskack(irqno, INTMSK_CAM, 3<<11);
89}
90
91static struct irq_chip s3c_irq_cam = {
92	.mask	    = s3c_irq_cam_mask,
93	.unmask	    = s3c_irq_cam_unmask,
94	.ack	    = s3c_irq_cam_ack,
95};
96
97static int s3c244x_irq_add(struct sys_device *sysdev)
98{
99	unsigned int irqno;
100
101	set_irq_chip(IRQ_NFCON, &s3c_irq_level_chip);
102	set_irq_handler(IRQ_NFCON, handle_level_irq);
103	set_irq_flags(IRQ_NFCON, IRQF_VALID);
104
105	/* add chained handler for camera */
106
107	set_irq_chip(IRQ_CAM, &s3c_irq_level_chip);
108	set_irq_handler(IRQ_CAM, handle_level_irq);
109	set_irq_chained_handler(IRQ_CAM, s3c_irq_demux_cam);
110
111	for (irqno = IRQ_S3C2440_CAM_C; irqno <= IRQ_S3C2440_CAM_P; irqno++) {
112		set_irq_chip(irqno, &s3c_irq_cam);
113		set_irq_handler(irqno, handle_level_irq);
114		set_irq_flags(irqno, IRQF_VALID);
115	}
116
117	return 0;
118}
119
120static struct sysdev_driver s3c2440_irq_driver = {
121	.add		= s3c244x_irq_add,
122	.suspend	= s3c24xx_irq_suspend,
123	.resume		= s3c24xx_irq_resume,
124};
125
126static int s3c2440_irq_init(void)
127{
128	return sysdev_driver_register(&s3c2440_sysclass, &s3c2440_irq_driver);
129}
130
131arch_initcall(s3c2440_irq_init);
132
133static struct sysdev_driver s3c2442_irq_driver = {
134	.add		= s3c244x_irq_add,
135	.suspend	= s3c24xx_irq_suspend,
136	.resume		= s3c24xx_irq_resume,
137};
138
139
140static int s3c2442_irq_init(void)
141{
142	return sysdev_driver_register(&s3c2442_sysclass, &s3c2442_irq_driver);
143}
144
145arch_initcall(s3c2442_irq_init);
146