1/* 2 * linux/arch/arm/plat-omap/timer32k.c 3 * 4 * OMAP 32K Timer 5 * 6 * Copyright (C) 2004 - 2005 Nokia Corporation 7 * Partial timer rewrite and additional dynamic tick timer support by 8 * Tony Lindgen <tony@atomide.com> and 9 * Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com> 10 * OMAP Dual-mode timer framework support by Timo Teras 11 * 12 * MPU timer code based on the older MPU timer code for OMAP 13 * Copyright (C) 2000 RidgeRun, Inc. 14 * Author: Greg Lonnon <glonnon@ridgerun.com> 15 * 16 * This program is free software; you can redistribute it and/or modify it 17 * under the terms of the GNU General Public License as published by the 18 * Free Software Foundation; either version 2 of the License, or (at your 19 * option) any later version. 20 * 21 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED 22 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 23 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN 24 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 27 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 28 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 * 32 * You should have received a copy of the GNU General Public License along 33 * with this program; if not, write to the Free Software Foundation, Inc., 34 * 675 Mass Ave, Cambridge, MA 02139, USA. 35 */ 36 37#include <linux/kernel.h> 38#include <linux/init.h> 39#include <linux/delay.h> 40#include <linux/interrupt.h> 41#include <linux/sched.h> 42#include <linux/spinlock.h> 43#include <linux/err.h> 44#include <linux/clk.h> 45#include <linux/clocksource.h> 46#include <linux/clockchips.h> 47 48#include <asm/system.h> 49#include <asm/hardware.h> 50#include <asm/io.h> 51#include <asm/leds.h> 52#include <asm/irq.h> 53#include <asm/mach/irq.h> 54#include <asm/mach/time.h> 55#include <asm/arch/dmtimer.h> 56 57struct sys_timer omap_timer; 58 59/* 60 * --------------------------------------------------------------------------- 61 * 32KHz OS timer 62 * 63 * This currently works only on 16xx, as 1510 does not have the continuous 64 * 32KHz synchronous timer. The 32KHz synchronous timer is used to keep track 65 * of time in addition to the 32KHz OS timer. Using only the 32KHz OS timer 66 * on 1510 would be possible, but the timer would not be as accurate as 67 * with the 32KHz synchronized timer. 68 * --------------------------------------------------------------------------- 69 */ 70 71#if defined(CONFIG_ARCH_OMAP16XX) 72#define TIMER_32K_SYNCHRONIZED 0xfffbc410 73#elif defined(CONFIG_ARCH_OMAP24XX) 74#define TIMER_32K_SYNCHRONIZED 0x48004010 75#else 76#error OMAP 32KHz timer does not currently work on 15XX! 77#endif 78 79/* 16xx specific defines */ 80#define OMAP1_32K_TIMER_BASE 0xfffb9000 81#define OMAP1_32K_TIMER_CR 0x08 82#define OMAP1_32K_TIMER_TVR 0x00 83#define OMAP1_32K_TIMER_TCR 0x04 84 85#define OMAP_32K_TICKS_PER_SEC (32768) 86 87/* 88 * TRM says 1 / HZ = ( TVR + 1) / 32768, so TRV = (32768 / HZ) - 1 89 * so with HZ = 128, TVR = 255. 90 */ 91#define OMAP_32K_TIMER_TICK_PERIOD ((OMAP_32K_TICKS_PER_SEC / HZ) - 1) 92 93#define JIFFIES_TO_HW_TICKS(nr_jiffies, clock_rate) \ 94 (((nr_jiffies) * (clock_rate)) / HZ) 95 96#if defined(CONFIG_ARCH_OMAP1) 97 98static inline void omap_32k_timer_write(int val, int reg) 99{ 100 omap_writew(val, OMAP1_32K_TIMER_BASE + reg); 101} 102 103static inline unsigned long omap_32k_timer_read(int reg) 104{ 105 return omap_readl(OMAP1_32K_TIMER_BASE + reg) & 0xffffff; 106} 107 108static inline void omap_32k_timer_start(unsigned long load_val) 109{ 110 if (!load_val) 111 load_val = 1; 112 omap_32k_timer_write(load_val, OMAP1_32K_TIMER_TVR); 113 omap_32k_timer_write(0x0f, OMAP1_32K_TIMER_CR); 114} 115 116static inline void omap_32k_timer_stop(void) 117{ 118 omap_32k_timer_write(0x0, OMAP1_32K_TIMER_CR); 119} 120 121#define omap_32k_timer_ack_irq() 122 123#elif defined(CONFIG_ARCH_OMAP2) 124 125static struct omap_dm_timer *gptimer; 126 127static inline void omap_32k_timer_start(unsigned long load_val) 128{ 129 omap_dm_timer_set_load(gptimer, 1, 0xffffffff - load_val); 130 omap_dm_timer_set_int_enable(gptimer, OMAP_TIMER_INT_OVERFLOW); 131 omap_dm_timer_start(gptimer); 132} 133 134static inline void omap_32k_timer_stop(void) 135{ 136 omap_dm_timer_stop(gptimer); 137} 138 139static inline void omap_32k_timer_ack_irq(void) 140{ 141 u32 status = omap_dm_timer_read_status(gptimer); 142 omap_dm_timer_write_status(gptimer, status); 143} 144 145#endif 146 147static void omap_32k_timer_set_mode(enum clock_event_mode mode, 148 struct clock_event_device *evt) 149{ 150 switch (mode) { 151 case CLOCK_EVT_MODE_ONESHOT: 152 case CLOCK_EVT_MODE_PERIODIC: 153 omap_32k_timer_start(OMAP_32K_TIMER_TICK_PERIOD); 154 break; 155 case CLOCK_EVT_MODE_UNUSED: 156 case CLOCK_EVT_MODE_SHUTDOWN: 157 omap_32k_timer_stop(); 158 break; 159 } 160} 161 162static struct clock_event_device clockevent_32k_timer = { 163 .name = "32k-timer", 164 .features = CLOCK_EVT_FEAT_PERIODIC, 165 .shift = 32, 166 .set_mode = omap_32k_timer_set_mode, 167}; 168 169/* 170 * The 32KHz synchronized timer is an additional timer on 16xx. 171 * It is always running. 172 */ 173static inline unsigned long omap_32k_sync_timer_read(void) 174{ 175 return omap_readl(TIMER_32K_SYNCHRONIZED); 176} 177 178/* 179 * Rounds down to nearest usec. Note that this will overflow for larger values. 180 */ 181static inline unsigned long omap_32k_ticks_to_usecs(unsigned long ticks_32k) 182{ 183 return (ticks_32k * 5*5*5*5*5*5) >> 9; 184} 185 186/* 187 * Rounds down to nearest nsec. 188 */ 189static inline unsigned long long 190omap_32k_ticks_to_nsecs(unsigned long ticks_32k) 191{ 192 return (unsigned long long) ticks_32k * 1000 * 5*5*5*5*5*5 >> 9; 193} 194 195static unsigned long omap_32k_last_tick = 0; 196 197/* 198 * Returns current time from boot in nsecs. It's OK for this to wrap 199 * around for now, as it's just a relative time stamp. 200 */ 201unsigned long long sched_clock(void) 202{ 203 return omap_32k_ticks_to_nsecs(omap_32k_sync_timer_read()); 204} 205 206static irqreturn_t omap_32k_timer_interrupt(int irq, void *dev_id) 207{ 208 struct clock_event_device *evt = &clockevent_32k_timer; 209 omap_32k_timer_ack_irq(); 210 211 evt->event_handler(evt); 212 213 return IRQ_HANDLED; 214} 215 216static struct irqaction omap_32k_timer_irq = { 217 .name = "32KHz timer", 218 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, 219 .handler = omap_32k_timer_interrupt, 220}; 221 222static __init void omap_init_32k_timer(void) 223{ 224 if (cpu_class_is_omap1()) 225 setup_irq(INT_OS_TIMER, &omap_32k_timer_irq); 226 omap_32k_last_tick = omap_32k_sync_timer_read(); 227 228#ifdef CONFIG_ARCH_OMAP2 229 /* REVISIT: Check 24xx TIOCP_CFG settings after idle works */ 230 if (cpu_is_omap24xx()) { 231 gptimer = omap_dm_timer_request_specific(1); 232 BUG_ON(gptimer == NULL); 233 234 omap_dm_timer_set_source(gptimer, OMAP_TIMER_SRC_32_KHZ); 235 setup_irq(omap_dm_timer_get_irq(gptimer), &omap_32k_timer_irq); 236 omap_dm_timer_set_int_enable(gptimer, 237 OMAP_TIMER_INT_CAPTURE | OMAP_TIMER_INT_OVERFLOW | 238 OMAP_TIMER_INT_MATCH); 239 } 240#endif 241 242 clockevent_32k_timer.mult = div_sc(OMAP_32K_TICKS_PER_SEC, 243 NSEC_PER_SEC, 244 clockevent_32k_timer.shift); 245 clockevent_32k_timer.max_delta_ns = 246 clockevent_delta2ns(0xfffffffe, &clockevent_32k_timer); 247 clockevent_32k_timer.min_delta_ns = 248 clockevent_delta2ns(1, &clockevent_32k_timer); 249 250 clockevent_32k_timer.cpumask = cpumask_of_cpu(0); 251 clockevents_register_device(&clockevent_32k_timer); 252} 253 254/* 255 * --------------------------------------------------------------------------- 256 * Timer initialization 257 * --------------------------------------------------------------------------- 258 */ 259static void __init omap_timer_init(void) 260{ 261#ifdef CONFIG_OMAP_DM_TIMER 262 omap_dm_timer_init(); 263#endif 264 omap_init_32k_timer(); 265} 266 267struct sys_timer omap_timer = { 268 .init = omap_timer_init, 269}; 270