1/* linux/arch/arm/mach-s3c2412/mach-vstms.c
2 *
3 * (C) 2006 Thomas Gleixner <tglx@linutronix.de>
4 *
5 * Derived from mach-smdk2413.c - (C) 2006 Simtec Electronics
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/kernel.h>
13#include <linux/types.h>
14#include <linux/interrupt.h>
15#include <linux/list.h>
16#include <linux/timer.h>
17#include <linux/init.h>
18#include <linux/serial_core.h>
19#include <linux/platform_device.h>
20
21#include <linux/mtd/mtd.h>
22#include <linux/mtd/nand.h>
23#include <linux/mtd/nand_ecc.h>
24#include <linux/mtd/partitions.h>
25
26#include <asm/mach/arch.h>
27#include <asm/mach/map.h>
28#include <asm/mach/irq.h>
29
30#include <asm/hardware.h>
31#include <asm/setup.h>
32#include <asm/io.h>
33#include <asm/irq.h>
34#include <asm/mach-types.h>
35
36#include <asm/arch/regs-serial.h>
37#include <asm/arch/regs-gpio.h>
38#include <asm/arch/regs-lcd.h>
39
40#include <asm/arch/idle.h>
41#include <asm/arch/fb.h>
42
43#include <asm/arch/nand.h>
44
45#include <asm/plat-s3c24xx/s3c2410.h>
46#include <asm/plat-s3c24xx/s3c2412.h>
47#include <asm/plat-s3c24xx/clock.h>
48#include <asm/plat-s3c24xx/devs.h>
49#include <asm/plat-s3c24xx/cpu.h>
50
51
52static struct map_desc vstms_iodesc[] __initdata = {
53};
54
55static struct s3c2410_uartcfg vstms_uartcfgs[] __initdata = {
56	[0] = {
57		.hwport	     = 0,
58		.flags	     = 0,
59		.ucon	     = 0x3c5,
60		.ulcon	     = 0x03,
61		.ufcon	     = 0x51,
62	},
63	[1] = {
64		.hwport	     = 1,
65		.flags	     = 0,
66		.ucon	     = 0x3c5,
67		.ulcon	     = 0x03,
68		.ufcon	     = 0x51,
69	},
70	[2] = {
71		.hwport	     = 2,
72		.flags	     = 0,
73		.ucon	     = 0x3c5,
74		.ulcon	     = 0x03,
75		.ufcon	     = 0x51,
76	}
77};
78
79static struct mtd_partition vstms_nand_part[] = {
80	[0] = {
81		.name	= "Boot Agent",
82		.size	= 0x7C000,
83		.offset	= 0,
84	},
85	[1] = {
86		.name	= "UBoot Config",
87		.offset = 0x7C000,
88		.size	= 0x4000,
89	},
90	[2] = {
91		.name	= "Kernel",
92		.offset = 0x80000,
93		.size	= 0x200000,
94	},
95	[3] = {
96		.name	= "RFS",
97		.offset	= 0x280000,
98		.size	= 0x3d80000,
99	},
100};
101
102static struct s3c2410_nand_set vstms_nand_sets[] = {
103	[0] = {
104		.name		= "NAND",
105		.nr_chips	= 1,
106		.nr_partitions	= ARRAY_SIZE(vstms_nand_part),
107		.partitions	= vstms_nand_part,
108	},
109};
110
111/* choose a set of timings which should suit most 512Mbit
112 * chips and beyond.
113*/
114
115static struct s3c2410_platform_nand vstms_nand_info = {
116	.tacls		= 20,
117	.twrph0		= 60,
118	.twrph1		= 20,
119	.nr_sets	= ARRAY_SIZE(vstms_nand_sets),
120	.sets		= vstms_nand_sets,
121};
122
123static struct platform_device *vstms_devices[] __initdata = {
124	&s3c_device_usb,
125	&s3c_device_wdt,
126	&s3c_device_i2c,
127	&s3c_device_iis,
128	&s3c_device_rtc,
129	&s3c_device_nand,
130};
131
132static void __init vstms_fixup(struct machine_desc *desc,
133				  struct tag *tags, char **cmdline,
134				  struct meminfo *mi)
135{
136	if (tags != phys_to_virt(S3C2410_SDRAM_PA + 0x100)) {
137		mi->nr_banks=1;
138		mi->bank[0].start = 0x30000000;
139		mi->bank[0].size = SZ_64M;
140		mi->bank[0].node = 0;
141	}
142}
143
144static void __init vstms_map_io(void)
145{
146	s3c_device_nand.dev.platform_data = &vstms_nand_info;
147
148	s3c24xx_init_io(vstms_iodesc, ARRAY_SIZE(vstms_iodesc));
149	s3c24xx_init_clocks(12000000);
150	s3c24xx_init_uarts(vstms_uartcfgs, ARRAY_SIZE(vstms_uartcfgs));
151}
152
153static void __init vstms_init(void)
154{
155	platform_add_devices(vstms_devices, ARRAY_SIZE(vstms_devices));
156}
157
158MACHINE_START(VSTMS, "VSTMS")
159	.phys_io	= S3C2410_PA_UART,
160	.io_pg_offst	= (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
161	.boot_params	= S3C2410_SDRAM_PA + 0x100,
162
163	.fixup		= vstms_fixup,
164	.init_irq	= s3c24xx_init_irq,
165	.init_machine	= vstms_init,
166	.map_io		= vstms_map_io,
167	.timer		= &s3c24xx_timer,
168MACHINE_END
169