1/*
2 * linux/arch/arm/mach-footbridge/netwinder-hw.c
3 *
4 * Netwinder machine fixup
5 *
6 * Copyright (C) 1998, 1999 Russell King, Phil Blundell
7 */
8#include <linux/module.h>
9#include <linux/ioport.h>
10#include <linux/kernel.h>
11#include <linux/delay.h>
12#include <linux/init.h>
13
14#include <asm/hardware/dec21285.h>
15#include <asm/io.h>
16#include <asm/leds.h>
17#include <asm/mach-types.h>
18#include <asm/setup.h>
19
20#include <asm/mach/arch.h>
21
22#include "common.h"
23
24#define IRDA_IO_BASE		0x180
25#define GP1_IO_BASE		0x338
26#define GP2_IO_BASE		0x33a
27
28
29#ifdef CONFIG_LEDS
30#define DEFAULT_LEDS	0
31#else
32#define DEFAULT_LEDS	GPIO_GREEN_LED
33#endif
34
35/*
36 * Winbond WB83977F accessibility stuff
37 */
38static inline void wb977_open(void)
39{
40	outb(0x87, 0x370);
41	outb(0x87, 0x370);
42}
43
44static inline void wb977_close(void)
45{
46	outb(0xaa, 0x370);
47}
48
49static inline void wb977_wb(int reg, int val)
50{
51	outb(reg, 0x370);
52	outb(val, 0x371);
53}
54
55static inline void wb977_ww(int reg, int val)
56{
57	outb(reg, 0x370);
58	outb(val >> 8, 0x371);
59	outb(reg + 1, 0x370);
60	outb(val & 255, 0x371);
61}
62
63#define wb977_device_select(dev)	wb977_wb(0x07, dev)
64#define wb977_device_disable()		wb977_wb(0x30, 0x00)
65#define wb977_device_enable()		wb977_wb(0x30, 0x01)
66
67/*
68 * This is a lock for accessing ports GP1_IO_BASE and GP2_IO_BASE
69 */
70DEFINE_SPINLOCK(gpio_lock);
71
72static unsigned int current_gpio_op;
73static unsigned int current_gpio_io;
74static unsigned int current_cpld;
75
76void gpio_modify_op(int mask, int set)
77{
78	unsigned int new_gpio, changed;
79
80	new_gpio = (current_gpio_op & ~mask) | set;
81	changed = new_gpio ^ current_gpio_op;
82	current_gpio_op = new_gpio;
83
84	if (changed & 0xff)
85		outb(new_gpio, GP1_IO_BASE);
86	if (changed & 0xff00)
87		outb(new_gpio >> 8, GP2_IO_BASE);
88}
89
90static inline void __gpio_modify_io(int mask, int in)
91{
92	unsigned int new_gpio, changed;
93	int port;
94
95	new_gpio = (current_gpio_io & ~mask) | in;
96	changed = new_gpio ^ current_gpio_io;
97	current_gpio_io = new_gpio;
98
99	changed >>= 1;
100	new_gpio >>= 1;
101
102	wb977_device_select(7);
103
104	for (port = 0xe1; changed && port < 0xe8; changed >>= 1) {
105		wb977_wb(port, new_gpio & 1);
106
107		port += 1;
108		new_gpio >>= 1;
109	}
110
111	wb977_device_select(8);
112
113	for (port = 0xe8; changed && port < 0xec; changed >>= 1) {
114		wb977_wb(port, new_gpio & 1);
115
116		port += 1;
117		new_gpio >>= 1;
118	}
119}
120
121void gpio_modify_io(int mask, int in)
122{
123	/* Open up the SuperIO chip */
124	wb977_open();
125
126	__gpio_modify_io(mask, in);
127
128	/* Close up the EFER gate */
129	wb977_close();
130}
131
132int gpio_read(void)
133{
134	return inb(GP1_IO_BASE) | inb(GP2_IO_BASE) << 8;
135}
136
137/*
138 * Initialise the Winbond W83977F global registers
139 */
140static inline void wb977_init_global(void)
141{
142	/*
143	 * Enable R/W config registers
144	 */
145	wb977_wb(0x26, 0x40);
146
147	/*
148	 * Power down FDC (not used)
149	 */
150	wb977_wb(0x22, 0xfe);
151
152	/*
153	 * GP12, GP11, CIRRX, IRRXH, GP10
154	 */
155	wb977_wb(0x2a, 0xc1);
156
157	/*
158	 * GP23, GP22, GP21, GP20, GP13
159	 */
160	wb977_wb(0x2b, 0x6b);
161
162	/*
163	 * GP17, GP16, GP15, GP14
164	 */
165	wb977_wb(0x2c, 0x55);
166}
167
168/*
169 * Initialise the Winbond W83977F printer port
170 */
171static inline void wb977_init_printer(void)
172{
173	wb977_device_select(1);
174
175	/*
176	 * mode 1 == EPP
177	 */
178	wb977_wb(0xf0, 0x01);
179}
180
181/*
182 * Initialise the Winbond W83977F keyboard controller
183 */
184static inline void wb977_init_keyboard(void)
185{
186	wb977_device_select(5);
187
188	/*
189	 * Keyboard controller address
190	 */
191	wb977_ww(0x60, 0x0060);
192	wb977_ww(0x62, 0x0064);
193
194	/*
195	 * Keyboard IRQ 1, active high, edge trigger
196	 */
197	wb977_wb(0x70, 1);
198	wb977_wb(0x71, 0x02);
199
200	/*
201	 * Mouse IRQ 5, active high, edge trigger
202	 */
203	wb977_wb(0x72, 5);
204	wb977_wb(0x73, 0x02);
205
206	/*
207	 * KBC 8MHz
208	 */
209	wb977_wb(0xf0, 0x40);
210
211	/*
212	 * Enable device
213	 */
214	wb977_device_enable();
215}
216
217/*
218 * Initialise the Winbond W83977F Infra-Red device
219 */
220static inline void wb977_init_irda(void)
221{
222	wb977_device_select(6);
223
224	/*
225	 * IR base address
226	 */
227	wb977_ww(0x60, IRDA_IO_BASE);
228
229	/*
230	 * IRDA IRQ 6, active high, edge trigger
231	 */
232	wb977_wb(0x70, 6);
233	wb977_wb(0x71, 0x02);
234
235	/*
236	 * RX DMA - ISA DMA 0
237	 */
238	wb977_wb(0x74, 0x00);
239
240	/*
241	 * TX DMA - Disable Tx DMA
242	 */
243	wb977_wb(0x75, 0x04);
244
245	/*
246	 * Append CRC, Enable bank selection
247	 */
248	wb977_wb(0xf0, 0x03);
249
250	/*
251	 * Enable device
252	 */
253	wb977_device_enable();
254}
255
256/*
257 * Initialise Winbond W83977F general purpose IO
258 */
259static inline void wb977_init_gpio(void)
260{
261	unsigned long flags;
262
263	/*
264	 * Set up initial I/O definitions
265	 */
266	current_gpio_io = -1;
267	__gpio_modify_io(-1, GPIO_DONE | GPIO_WDTIMER);
268
269	wb977_device_select(7);
270
271	/*
272	 * Group1 base address
273	 */
274	wb977_ww(0x60, GP1_IO_BASE);
275	wb977_ww(0x62, 0);
276	wb977_ww(0x64, 0);
277
278	/*
279	 * GP10 (Orage button) IRQ 10, active high, edge trigger
280	 */
281	wb977_wb(0x70, 10);
282	wb977_wb(0x71, 0x02);
283
284	/*
285	 * GP10: Debounce filter enabled, IRQ, input
286	 */
287	wb977_wb(0xe0, 0x19);
288
289	/*
290	 * Enable Group1
291	 */
292	wb977_device_enable();
293
294	wb977_device_select(8);
295
296	/*
297	 * Group2 base address
298	 */
299	wb977_ww(0x60, GP2_IO_BASE);
300
301	/*
302	 * Clear watchdog timer regs
303	 *  - timer disable
304	 */
305	wb977_wb(0xf2, 0x00);
306
307	/*
308	 *  - disable LED, no mouse nor keyboard IRQ
309	 */
310	wb977_wb(0xf3, 0x00);
311
312	/*
313	 *  - timer counting, disable power LED, disable timeouot
314	 */
315	wb977_wb(0xf4, 0x00);
316
317	/*
318	 * Enable group2
319	 */
320	wb977_device_enable();
321
322	/*
323	 * Set Group1/Group2 outputs
324	 */
325	spin_lock_irqsave(&gpio_lock, flags);
326	gpio_modify_op(-1, GPIO_RED_LED | GPIO_FAN);
327	spin_unlock_irqrestore(&gpio_lock, flags);
328}
329
330/*
331 * Initialise the Winbond W83977F chip.
332 */
333static void __init wb977_init(void)
334{
335	request_region(0x370, 2, "W83977AF configuration");
336
337	/*
338	 * Open up the SuperIO chip
339	 */
340	wb977_open();
341
342	/*
343	 * Initialise the global registers
344	 */
345	wb977_init_global();
346
347	/*
348	 * Initialise the various devices in
349	 * the multi-IO chip.
350	 */
351	wb977_init_printer();
352	wb977_init_keyboard();
353	wb977_init_irda();
354	wb977_init_gpio();
355
356	/*
357	 * Close up the EFER gate
358	 */
359	wb977_close();
360}
361
362void cpld_modify(int mask, int set)
363{
364	int msk;
365
366	current_cpld = (current_cpld & ~mask) | set;
367
368	gpio_modify_io(GPIO_DATA | GPIO_IOCLK | GPIO_IOLOAD, 0);
369	gpio_modify_op(GPIO_IOLOAD, 0);
370
371	for (msk = 8; msk; msk >>= 1) {
372		int bit = current_cpld & msk;
373
374		gpio_modify_op(GPIO_DATA | GPIO_IOCLK, bit ? GPIO_DATA : 0);
375		gpio_modify_op(GPIO_IOCLK, GPIO_IOCLK);
376	}
377
378	gpio_modify_op(GPIO_IOCLK|GPIO_DATA, 0);
379	gpio_modify_op(GPIO_IOLOAD|GPIO_DSCLK, GPIO_IOLOAD|GPIO_DSCLK);
380	gpio_modify_op(GPIO_IOLOAD, 0);
381}
382
383static void __init cpld_init(void)
384{
385	unsigned long flags;
386
387	spin_lock_irqsave(&gpio_lock, flags);
388	cpld_modify(-1, CPLD_UNMUTE | CPLD_7111_DISABLE);
389	spin_unlock_irqrestore(&gpio_lock, flags);
390}
391
392static unsigned char rwa_unlock[] __initdata =
393{ 0x00, 0x00, 0x6a, 0xb5, 0xda, 0xed, 0xf6, 0xfb, 0x7d, 0xbe, 0xdf, 0x6f, 0x37, 0x1b,
394  0x0d, 0x86, 0xc3, 0x61, 0xb0, 0x58, 0x2c, 0x16, 0x8b, 0x45, 0xa2, 0xd1, 0xe8, 0x74,
395  0x3a, 0x9d, 0xce, 0xe7, 0x73, 0x39 };
396
397#ifndef DEBUG
398#define dprintk(x...)
399#else
400#define dprintk(x...) printk(x)
401#endif
402
403#define WRITE_RWA(r,v) do { outb((r), 0x279); udelay(10); outb((v), 0xa79); } while (0)
404
405static inline void rwa010_unlock(void)
406{
407	int i;
408
409	WRITE_RWA(2, 2);
410	mdelay(10);
411
412	for (i = 0; i < sizeof(rwa_unlock); i++) {
413		outb(rwa_unlock[i], 0x279);
414		udelay(10);
415	}
416}
417
418static inline void rwa010_read_ident(void)
419{
420	unsigned char si[9];
421	int i, j;
422
423	WRITE_RWA(3, 0);
424	WRITE_RWA(0, 128);
425
426	outb(1, 0x279);
427
428	mdelay(1);
429
430	dprintk("Identifier: ");
431	for (i = 0; i < 9; i++) {
432		si[i] = 0;
433		for (j = 0; j < 8; j++) {
434			int bit;
435			udelay(250);
436			inb(0x203);
437			udelay(250);
438			bit = inb(0x203);
439			dprintk("%02X ", bit);
440			bit = (bit == 0xaa) ? 1 : 0;
441			si[i] |= bit << j;
442		}
443		dprintk("(%02X) ", si[i]);
444	}
445	dprintk("\n");
446}
447
448static inline void rwa010_global_init(void)
449{
450	WRITE_RWA(6, 2);	// Assign a card no = 2
451
452	dprintk("Card no = %d\n", inb(0x203));
453
454	/* disable the modem section of the chip */
455	WRITE_RWA(7, 3);
456	WRITE_RWA(0x30, 0);
457
458	/* disable the cdrom section of the chip */
459	WRITE_RWA(7, 4);
460	WRITE_RWA(0x30, 0);
461
462	/* disable the MPU-401 section of the chip */
463	WRITE_RWA(7, 2);
464	WRITE_RWA(0x30, 0);
465}
466
467static inline void rwa010_game_port_init(void)
468{
469	int i;
470
471	WRITE_RWA(7, 5);
472
473	dprintk("Slider base: ");
474	WRITE_RWA(0x61, 1);
475	i = inb(0x203);
476
477	WRITE_RWA(0x60, 2);
478	dprintk("%02X%02X (201)\n", inb(0x203), i);
479
480	WRITE_RWA(0x30, 1);
481}
482
483static inline void rwa010_waveartist_init(int base, int irq, int dma)
484{
485	int i;
486
487	WRITE_RWA(7, 0);
488
489	dprintk("WaveArtist base: ");
490	WRITE_RWA(0x61, base & 255);
491	i = inb(0x203);
492
493	WRITE_RWA(0x60, base >> 8);
494	dprintk("%02X%02X (%X),", inb(0x203), i, base);
495
496	WRITE_RWA(0x70, irq);
497	dprintk(" irq: %d (%d),", inb(0x203), irq);
498
499	WRITE_RWA(0x74, dma);
500	dprintk(" dma: %d (%d)\n", inb(0x203), dma);
501
502	WRITE_RWA(0x30, 1);
503}
504
505static inline void rwa010_soundblaster_init(int sb_base, int al_base, int irq, int dma)
506{
507	int i;
508
509	WRITE_RWA(7, 1);
510
511	dprintk("SoundBlaster base: ");
512	WRITE_RWA(0x61, sb_base & 255);
513	i = inb(0x203);
514
515	WRITE_RWA(0x60, sb_base >> 8);
516	dprintk("%02X%02X (%X),", inb(0x203), i, sb_base);
517
518	dprintk(" irq: ");
519	WRITE_RWA(0x70, irq);
520	dprintk("%d (%d),", inb(0x203), irq);
521
522	dprintk(" 8-bit DMA: ");
523	WRITE_RWA(0x74, dma);
524	dprintk("%d (%d)\n", inb(0x203), dma);
525
526	dprintk("AdLib base: ");
527	WRITE_RWA(0x63, al_base & 255);
528	i = inb(0x203);
529
530	WRITE_RWA(0x62, al_base >> 8);
531	dprintk("%02X%02X (%X)\n", inb(0x203), i, al_base);
532
533	WRITE_RWA(0x30, 1);
534}
535
536static void rwa010_soundblaster_reset(void)
537{
538	int i;
539
540	outb(1, 0x226);
541	udelay(3);
542	outb(0, 0x226);
543
544	for (i = 0; i < 5; i++) {
545		if (inb(0x22e) & 0x80)
546			break;
547		mdelay(1);
548	}
549	if (i == 5)
550		printk("SoundBlaster: DSP reset failed\n");
551
552	dprintk("SoundBlaster DSP reset: %02X (AA)\n", inb(0x22a));
553
554	for (i = 0; i < 5; i++) {
555		if ((inb(0x22c) & 0x80) == 0)
556			break;
557		mdelay(1);
558	}
559
560	if (i == 5)
561		printk("SoundBlaster: DSP not ready\n");
562	else {
563		outb(0xe1, 0x22c);
564
565		dprintk("SoundBlaster DSP id: ");
566		i = inb(0x22a);
567		udelay(1);
568		i |= inb(0x22a) << 8;
569		dprintk("%04X\n", i);
570
571		for (i = 0; i < 5; i++) {
572			if ((inb(0x22c) & 0x80) == 0)
573				break;
574			mdelay(1);
575		}
576
577		if (i == 5)
578			printk("SoundBlaster: could not turn speaker off\n");
579
580		outb(0xd3, 0x22c);
581	}
582
583	/* turn on OPL3 */
584	outb(5, 0x38a);
585	outb(1, 0x38b);
586}
587
588static void __init rwa010_init(void)
589{
590	rwa010_unlock();
591	rwa010_read_ident();
592	rwa010_global_init();
593	rwa010_game_port_init();
594	rwa010_waveartist_init(0x250, 3, 7);
595	rwa010_soundblaster_init(0x220, 0x388, 3, 1);
596	rwa010_soundblaster_reset();
597}
598
599EXPORT_SYMBOL(gpio_lock);
600EXPORT_SYMBOL(gpio_modify_op);
601EXPORT_SYMBOL(gpio_modify_io);
602EXPORT_SYMBOL(cpld_modify);
603EXPORT_SYMBOL(gpio_read);
604
605/*
606 * Initialise any other hardware after we've got the PCI bus
607 * initialised.  We may need the PCI bus to talk to this other
608 * hardware.
609 */
610static int __init nw_hw_init(void)
611{
612	if (machine_is_netwinder()) {
613		unsigned long flags;
614
615		wb977_init();
616		cpld_init();
617		rwa010_init();
618
619		spin_lock_irqsave(&gpio_lock, flags);
620		gpio_modify_op(GPIO_RED_LED|GPIO_GREEN_LED, DEFAULT_LEDS);
621		spin_unlock_irqrestore(&gpio_lock, flags);
622	}
623	return 0;
624}
625
626__initcall(nw_hw_init);
627
628/*
629 * Older NeTTroms either do not provide a parameters
630 * page, or they don't supply correct information in
631 * the parameter page.
632 */
633static void __init
634fixup_netwinder(struct machine_desc *desc, struct tag *tags,
635		char **cmdline, struct meminfo *mi)
636{
637#ifdef CONFIG_ISAPNP
638	extern int isapnp_disable;
639
640	/*
641	 * We must not use the kernels ISAPnP code
642	 * on the NetWinder - it will reset the settings
643	 * for the WaveArtist chip and render it inoperable.
644	 */
645	isapnp_disable = 1;
646#endif
647}
648
649MACHINE_START(NETWINDER, "Rebel-NetWinder")
650	/* Maintainer: Russell King/Rebel.com */
651	.phys_io	= DC21285_ARMCSR_BASE,
652	.io_pg_offst	= ((0xfe000000) >> 18) & 0xfffc,
653	.boot_params	= 0x00000100,
654	.video_start	= 0x000a0000,
655	.video_end	= 0x000bffff,
656	.reserve_lp0	= 1,
657	.reserve_lp2	= 1,
658	.fixup		= fixup_netwinder,
659	.map_io		= footbridge_map_io,
660	.init_irq	= footbridge_init_irq,
661	.timer		= &isa_timer,
662MACHINE_END
663