1/* 2 * arch/alpha/kernel/traps.c 3 * 4 * (C) Copyright 1994 Linus Torvalds 5 */ 6 7/* 8 * This file initializes the trap entry points 9 */ 10 11#include <linux/mm.h> 12#include <linux/sched.h> 13#include <linux/tty.h> 14#include <linux/delay.h> 15#include <linux/smp_lock.h> 16#include <linux/module.h> 17#include <linux/init.h> 18#include <linux/kallsyms.h> 19 20#include <asm/gentrap.h> 21#include <asm/uaccess.h> 22#include <asm/unaligned.h> 23#include <asm/sysinfo.h> 24#include <asm/hwrpb.h> 25#include <asm/mmu_context.h> 26 27#include "proto.h" 28 29 30static int opDEC_fix; 31 32static void __init 33opDEC_check(void) 34{ 35 __asm__ __volatile__ ( 36 /* Load the address of... */ 37 " br $16, 1f\n" 38 /* A stub instruction fault handler. Just add 4 to the 39 pc and continue. */ 40 " ldq $16, 8($sp)\n" 41 " addq $16, 4, $16\n" 42 " stq $16, 8($sp)\n" 43 " call_pal %[rti]\n" 44 /* Install the instruction fault handler. */ 45 "1: lda $17, 3\n" 46 " call_pal %[wrent]\n" 47 /* With that in place, the fault from the round-to-minf fp 48 insn will arrive either at the "lda 4" insn (bad) or one 49 past that (good). This places the correct fixup in %0. */ 50 " lda %[fix], 0\n" 51 " cvttq/svm $f31,$f31\n" 52 " lda %[fix], 4" 53 : [fix] "=r" (opDEC_fix) 54 : [rti] "n" (PAL_rti), [wrent] "n" (PAL_wrent) 55 : "$0", "$1", "$16", "$17", "$22", "$23", "$24", "$25"); 56 57 if (opDEC_fix) 58 printk("opDEC fixup enabled.\n"); 59} 60 61void 62dik_show_regs(struct pt_regs *regs, unsigned long *r9_15) 63{ 64 printk("pc = [<%016lx>] ra = [<%016lx>] ps = %04lx %s\n", 65 regs->pc, regs->r26, regs->ps, print_tainted()); 66 print_symbol("pc is at %s\n", regs->pc); 67 print_symbol("ra is at %s\n", regs->r26 ); 68 printk("v0 = %016lx t0 = %016lx t1 = %016lx\n", 69 regs->r0, regs->r1, regs->r2); 70 printk("t2 = %016lx t3 = %016lx t4 = %016lx\n", 71 regs->r3, regs->r4, regs->r5); 72 printk("t5 = %016lx t6 = %016lx t7 = %016lx\n", 73 regs->r6, regs->r7, regs->r8); 74 75 if (r9_15) { 76 printk("s0 = %016lx s1 = %016lx s2 = %016lx\n", 77 r9_15[9], r9_15[10], r9_15[11]); 78 printk("s3 = %016lx s4 = %016lx s5 = %016lx\n", 79 r9_15[12], r9_15[13], r9_15[14]); 80 printk("s6 = %016lx\n", r9_15[15]); 81 } 82 83 printk("a0 = %016lx a1 = %016lx a2 = %016lx\n", 84 regs->r16, regs->r17, regs->r18); 85 printk("a3 = %016lx a4 = %016lx a5 = %016lx\n", 86 regs->r19, regs->r20, regs->r21); 87 printk("t8 = %016lx t9 = %016lx t10= %016lx\n", 88 regs->r22, regs->r23, regs->r24); 89 printk("t11= %016lx pv = %016lx at = %016lx\n", 90 regs->r25, regs->r27, regs->r28); 91 printk("gp = %016lx sp = %p\n", regs->gp, regs+1); 92} 93 94 95static void 96dik_show_code(unsigned int *pc) 97{ 98 long i; 99 100 printk("Code:"); 101 for (i = -6; i < 2; i++) { 102 unsigned int insn; 103 if (__get_user(insn, (unsigned int __user *)pc + i)) 104 break; 105 printk("%c%08x%c", i ? ' ' : '<', insn, i ? ' ' : '>'); 106 } 107 printk("\n"); 108} 109 110static void 111dik_show_trace(unsigned long *sp) 112{ 113 long i = 0; 114 printk("Trace:\n"); 115 while (0x1ff8 & (unsigned long) sp) { 116 extern char _stext[], _etext[]; 117 unsigned long tmp = *sp; 118 sp++; 119 if (tmp < (unsigned long) &_stext) 120 continue; 121 if (tmp >= (unsigned long) &_etext) 122 continue; 123 printk("[<%lx>]", tmp); 124 print_symbol(" %s", tmp); 125 printk("\n"); 126 if (i > 40) { 127 printk(" ..."); 128 break; 129 } 130 } 131 printk("\n"); 132} 133 134static int kstack_depth_to_print = 24; 135 136void show_stack(struct task_struct *task, unsigned long *sp) 137{ 138 unsigned long *stack; 139 int i; 140 141 /* 142 * debugging aid: "show_stack(NULL);" prints the 143 * back trace for this cpu. 144 */ 145 if(sp==NULL) 146 sp=(unsigned long*)&sp; 147 148 stack = sp; 149 for(i=0; i < kstack_depth_to_print; i++) { 150 if (((long) stack & (THREAD_SIZE-1)) == 0) 151 break; 152 if (i && ((i % 4) == 0)) 153 printk("\n "); 154 printk("%016lx ", *stack++); 155 } 156 printk("\n"); 157 dik_show_trace(sp); 158} 159 160void dump_stack(void) 161{ 162 show_stack(NULL, NULL); 163} 164 165EXPORT_SYMBOL(dump_stack); 166 167void 168die_if_kernel(char * str, struct pt_regs *regs, long err, unsigned long *r9_15) 169{ 170 if (regs->ps & 8) 171 return; 172#ifdef CONFIG_SMP 173 printk("CPU %d ", hard_smp_processor_id()); 174#endif 175 printk("%s(%d): %s %ld\n", current->comm, current->pid, str, err); 176 dik_show_regs(regs, r9_15); 177 dik_show_trace((unsigned long *)(regs+1)); 178 dik_show_code((unsigned int *)regs->pc); 179 180 if (test_and_set_thread_flag (TIF_DIE_IF_KERNEL)) { 181 printk("die_if_kernel recursion detected.\n"); 182 local_irq_enable(); 183 while (1); 184 } 185 do_exit(SIGSEGV); 186} 187 188#ifndef CONFIG_MATHEMU 189static long dummy_emul(void) { return 0; } 190long (*alpha_fp_emul_imprecise)(struct pt_regs *regs, unsigned long writemask) 191 = (void *)dummy_emul; 192long (*alpha_fp_emul) (unsigned long pc) 193 = (void *)dummy_emul; 194#else 195long alpha_fp_emul_imprecise(struct pt_regs *regs, unsigned long writemask); 196long alpha_fp_emul (unsigned long pc); 197#endif 198 199asmlinkage void 200do_entArith(unsigned long summary, unsigned long write_mask, 201 struct pt_regs *regs) 202{ 203 long si_code = FPE_FLTINV; 204 siginfo_t info; 205 206 if (summary & 1) { 207 /* Software-completion summary bit is set, so try to 208 emulate the instruction. If the processor supports 209 precise exceptions, we don't have to search. */ 210 if (!amask(AMASK_PRECISE_TRAP)) 211 si_code = alpha_fp_emul(regs->pc - 4); 212 else 213 si_code = alpha_fp_emul_imprecise(regs, write_mask); 214 if (si_code == 0) 215 return; 216 } 217 die_if_kernel("Arithmetic fault", regs, 0, NULL); 218 219 info.si_signo = SIGFPE; 220 info.si_errno = 0; 221 info.si_code = si_code; 222 info.si_addr = (void __user *) regs->pc; 223 send_sig_info(SIGFPE, &info, current); 224} 225 226asmlinkage void 227do_entIF(unsigned long type, struct pt_regs *regs) 228{ 229 siginfo_t info; 230 int signo, code; 231 232 if ((regs->ps & ~IPL_MAX) == 0) { 233 if (type == 1) { 234 const unsigned int *data 235 = (const unsigned int *) regs->pc; 236 printk("Kernel bug at %s:%d\n", 237 (const char *)(data[1] | (long)data[2] << 32), 238 data[0]); 239 } 240 die_if_kernel((type == 1 ? "Kernel Bug" : "Instruction fault"), 241 regs, type, NULL); 242 } 243 244 switch (type) { 245 case 0: /* breakpoint */ 246 info.si_signo = SIGTRAP; 247 info.si_errno = 0; 248 info.si_code = TRAP_BRKPT; 249 info.si_trapno = 0; 250 info.si_addr = (void __user *) regs->pc; 251 252 if (ptrace_cancel_bpt(current)) { 253 regs->pc -= 4; /* make pc point to former bpt */ 254 } 255 256 send_sig_info(SIGTRAP, &info, current); 257 return; 258 259 case 1: /* bugcheck */ 260 info.si_signo = SIGTRAP; 261 info.si_errno = 0; 262 info.si_code = __SI_FAULT; 263 info.si_addr = (void __user *) regs->pc; 264 info.si_trapno = 0; 265 send_sig_info(SIGTRAP, &info, current); 266 return; 267 268 case 2: /* gentrap */ 269 info.si_addr = (void __user *) regs->pc; 270 info.si_trapno = regs->r16; 271 switch ((long) regs->r16) { 272 case GEN_INTOVF: 273 signo = SIGFPE; 274 code = FPE_INTOVF; 275 break; 276 case GEN_INTDIV: 277 signo = SIGFPE; 278 code = FPE_INTDIV; 279 break; 280 case GEN_FLTOVF: 281 signo = SIGFPE; 282 code = FPE_FLTOVF; 283 break; 284 case GEN_FLTDIV: 285 signo = SIGFPE; 286 code = FPE_FLTDIV; 287 break; 288 case GEN_FLTUND: 289 signo = SIGFPE; 290 code = FPE_FLTUND; 291 break; 292 case GEN_FLTINV: 293 signo = SIGFPE; 294 code = FPE_FLTINV; 295 break; 296 case GEN_FLTINE: 297 signo = SIGFPE; 298 code = FPE_FLTRES; 299 break; 300 case GEN_ROPRAND: 301 signo = SIGFPE; 302 code = __SI_FAULT; 303 break; 304 305 case GEN_DECOVF: 306 case GEN_DECDIV: 307 case GEN_DECINV: 308 case GEN_ASSERTERR: 309 case GEN_NULPTRERR: 310 case GEN_STKOVF: 311 case GEN_STRLENERR: 312 case GEN_SUBSTRERR: 313 case GEN_RANGERR: 314 case GEN_SUBRNG: 315 case GEN_SUBRNG1: 316 case GEN_SUBRNG2: 317 case GEN_SUBRNG3: 318 case GEN_SUBRNG4: 319 case GEN_SUBRNG5: 320 case GEN_SUBRNG6: 321 case GEN_SUBRNG7: 322 default: 323 signo = SIGTRAP; 324 code = __SI_FAULT; 325 break; 326 } 327 328 info.si_signo = signo; 329 info.si_errno = 0; 330 info.si_code = code; 331 info.si_addr = (void __user *) regs->pc; 332 send_sig_info(signo, &info, current); 333 return; 334 335 case 4: /* opDEC */ 336 if (implver() == IMPLVER_EV4) { 337 long si_code; 338 339 /* The some versions of SRM do not handle 340 the opDEC properly - they return the PC of the 341 opDEC fault, not the instruction after as the 342 Alpha architecture requires. Here we fix it up. 343 We do this by intentionally causing an opDEC 344 fault during the boot sequence and testing if 345 we get the correct PC. If not, we set a flag 346 to correct it every time through. */ 347 regs->pc += opDEC_fix; 348 349 /* EV4 does not implement anything except normal 350 rounding. Everything else will come here as 351 an illegal instruction. Emulate them. */ 352 si_code = alpha_fp_emul(regs->pc - 4); 353 if (si_code == 0) 354 return; 355 if (si_code > 0) { 356 info.si_signo = SIGFPE; 357 info.si_errno = 0; 358 info.si_code = si_code; 359 info.si_addr = (void __user *) regs->pc; 360 send_sig_info(SIGFPE, &info, current); 361 return; 362 } 363 } 364 break; 365 366 case 3: /* FEN fault */ 367 /* Irritating users can call PAL_clrfen to disable the 368 FPU for the process. The kernel will then trap in 369 do_switch_stack and undo_switch_stack when we try 370 to save and restore the FP registers. 371 372 Given that GCC by default generates code that uses the 373 FP registers, PAL_clrfen is not useful except for DoS 374 attacks. So turn the bleeding FPU back on and be done 375 with it. */ 376 current_thread_info()->pcb.flags |= 1; 377 __reload_thread(¤t_thread_info()->pcb); 378 return; 379 380 case 5: /* illoc */ 381 default: /* unexpected instruction-fault type */ 382 ; 383 } 384 385 info.si_signo = SIGILL; 386 info.si_errno = 0; 387 info.si_code = ILL_ILLOPC; 388 info.si_addr = (void __user *) regs->pc; 389 send_sig_info(SIGILL, &info, current); 390} 391 392/* There is an ifdef in the PALcode in MILO that enables a 393 "kernel debugging entry point" as an unprivileged call_pal. 394 395 We don't want to have anything to do with it, but unfortunately 396 several versions of MILO included in distributions have it enabled, 397 and if we don't put something on the entry point we'll oops. */ 398 399asmlinkage void 400do_entDbg(struct pt_regs *regs) 401{ 402 siginfo_t info; 403 404 die_if_kernel("Instruction fault", regs, 0, NULL); 405 406 info.si_signo = SIGILL; 407 info.si_errno = 0; 408 info.si_code = ILL_ILLOPC; 409 info.si_addr = (void __user *) regs->pc; 410 force_sig_info(SIGILL, &info, current); 411} 412 413 414/* 415 * entUna has a different register layout to be reasonably simple. It 416 * needs access to all the integer registers (the kernel doesn't use 417 * fp-regs), and it needs to have them in order for simpler access. 418 * 419 * Due to the non-standard register layout (and because we don't want 420 * to handle floating-point regs), user-mode unaligned accesses are 421 * handled separately by do_entUnaUser below. 422 * 423 * Oh, btw, we don't handle the "gp" register correctly, but if we fault 424 * on a gp-register unaligned load/store, something is _very_ wrong 425 * in the kernel anyway.. 426 */ 427struct allregs { 428 unsigned long regs[32]; 429 unsigned long ps, pc, gp, a0, a1, a2; 430}; 431 432struct unaligned_stat { 433 unsigned long count, va, pc; 434} unaligned[2]; 435 436 437/* Macro for exception fixup code to access integer registers. */ 438#define una_reg(r) (regs->regs[(r) >= 16 && (r) <= 18 ? (r)+19 : (r)]) 439 440 441asmlinkage void 442do_entUna(void * va, unsigned long opcode, unsigned long reg, 443 struct allregs *regs) 444{ 445 long error, tmp1, tmp2, tmp3, tmp4; 446 unsigned long pc = regs->pc - 4; 447 const struct exception_table_entry *fixup; 448 449 unaligned[0].count++; 450 unaligned[0].va = (unsigned long) va; 451 unaligned[0].pc = pc; 452 453 /* We don't want to use the generic get/put unaligned macros as 454 we want to trap exceptions. Only if we actually get an 455 exception will we decide whether we should have caught it. */ 456 457 switch (opcode) { 458 case 0x0c: /* ldwu */ 459 __asm__ __volatile__( 460 "1: ldq_u %1,0(%3)\n" 461 "2: ldq_u %2,1(%3)\n" 462 " extwl %1,%3,%1\n" 463 " extwh %2,%3,%2\n" 464 "3:\n" 465 ".section __ex_table,\"a\"\n" 466 " .long 1b - .\n" 467 " lda %1,3b-1b(%0)\n" 468 " .long 2b - .\n" 469 " lda %2,3b-2b(%0)\n" 470 ".previous" 471 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2) 472 : "r"(va), "0"(0)); 473 if (error) 474 goto got_exception; 475 una_reg(reg) = tmp1|tmp2; 476 return; 477 478 case 0x28: /* ldl */ 479 __asm__ __volatile__( 480 "1: ldq_u %1,0(%3)\n" 481 "2: ldq_u %2,3(%3)\n" 482 " extll %1,%3,%1\n" 483 " extlh %2,%3,%2\n" 484 "3:\n" 485 ".section __ex_table,\"a\"\n" 486 " .long 1b - .\n" 487 " lda %1,3b-1b(%0)\n" 488 " .long 2b - .\n" 489 " lda %2,3b-2b(%0)\n" 490 ".previous" 491 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2) 492 : "r"(va), "0"(0)); 493 if (error) 494 goto got_exception; 495 una_reg(reg) = (int)(tmp1|tmp2); 496 return; 497 498 case 0x29: /* ldq */ 499 __asm__ __volatile__( 500 "1: ldq_u %1,0(%3)\n" 501 "2: ldq_u %2,7(%3)\n" 502 " extql %1,%3,%1\n" 503 " extqh %2,%3,%2\n" 504 "3:\n" 505 ".section __ex_table,\"a\"\n" 506 " .long 1b - .\n" 507 " lda %1,3b-1b(%0)\n" 508 " .long 2b - .\n" 509 " lda %2,3b-2b(%0)\n" 510 ".previous" 511 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2) 512 : "r"(va), "0"(0)); 513 if (error) 514 goto got_exception; 515 una_reg(reg) = tmp1|tmp2; 516 return; 517 518 /* Note that the store sequences do not indicate that they change 519 memory because it _should_ be affecting nothing in this context. 520 (Otherwise we have other, much larger, problems.) */ 521 case 0x0d: /* stw */ 522 __asm__ __volatile__( 523 "1: ldq_u %2,1(%5)\n" 524 "2: ldq_u %1,0(%5)\n" 525 " inswh %6,%5,%4\n" 526 " inswl %6,%5,%3\n" 527 " mskwh %2,%5,%2\n" 528 " mskwl %1,%5,%1\n" 529 " or %2,%4,%2\n" 530 " or %1,%3,%1\n" 531 "3: stq_u %2,1(%5)\n" 532 "4: stq_u %1,0(%5)\n" 533 "5:\n" 534 ".section __ex_table,\"a\"\n" 535 " .long 1b - .\n" 536 " lda %2,5b-1b(%0)\n" 537 " .long 2b - .\n" 538 " lda %1,5b-2b(%0)\n" 539 " .long 3b - .\n" 540 " lda $31,5b-3b(%0)\n" 541 " .long 4b - .\n" 542 " lda $31,5b-4b(%0)\n" 543 ".previous" 544 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2), 545 "=&r"(tmp3), "=&r"(tmp4) 546 : "r"(va), "r"(una_reg(reg)), "0"(0)); 547 if (error) 548 goto got_exception; 549 return; 550 551 case 0x2c: /* stl */ 552 __asm__ __volatile__( 553 "1: ldq_u %2,3(%5)\n" 554 "2: ldq_u %1,0(%5)\n" 555 " inslh %6,%5,%4\n" 556 " insll %6,%5,%3\n" 557 " msklh %2,%5,%2\n" 558 " mskll %1,%5,%1\n" 559 " or %2,%4,%2\n" 560 " or %1,%3,%1\n" 561 "3: stq_u %2,3(%5)\n" 562 "4: stq_u %1,0(%5)\n" 563 "5:\n" 564 ".section __ex_table,\"a\"\n" 565 " .long 1b - .\n" 566 " lda %2,5b-1b(%0)\n" 567 " .long 2b - .\n" 568 " lda %1,5b-2b(%0)\n" 569 " .long 3b - .\n" 570 " lda $31,5b-3b(%0)\n" 571 " .long 4b - .\n" 572 " lda $31,5b-4b(%0)\n" 573 ".previous" 574 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2), 575 "=&r"(tmp3), "=&r"(tmp4) 576 : "r"(va), "r"(una_reg(reg)), "0"(0)); 577 if (error) 578 goto got_exception; 579 return; 580 581 case 0x2d: /* stq */ 582 __asm__ __volatile__( 583 "1: ldq_u %2,7(%5)\n" 584 "2: ldq_u %1,0(%5)\n" 585 " insqh %6,%5,%4\n" 586 " insql %6,%5,%3\n" 587 " mskqh %2,%5,%2\n" 588 " mskql %1,%5,%1\n" 589 " or %2,%4,%2\n" 590 " or %1,%3,%1\n" 591 "3: stq_u %2,7(%5)\n" 592 "4: stq_u %1,0(%5)\n" 593 "5:\n" 594 ".section __ex_table,\"a\"\n\t" 595 " .long 1b - .\n" 596 " lda %2,5b-1b(%0)\n" 597 " .long 2b - .\n" 598 " lda %1,5b-2b(%0)\n" 599 " .long 3b - .\n" 600 " lda $31,5b-3b(%0)\n" 601 " .long 4b - .\n" 602 " lda $31,5b-4b(%0)\n" 603 ".previous" 604 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2), 605 "=&r"(tmp3), "=&r"(tmp4) 606 : "r"(va), "r"(una_reg(reg)), "0"(0)); 607 if (error) 608 goto got_exception; 609 return; 610 } 611 612 lock_kernel(); 613 printk("Bad unaligned kernel access at %016lx: %p %lx %ld\n", 614 pc, va, opcode, reg); 615 do_exit(SIGSEGV); 616 617got_exception: 618 /* Ok, we caught the exception, but we don't want it. Is there 619 someone to pass it along to? */ 620 if ((fixup = search_exception_tables(pc)) != 0) { 621 unsigned long newpc; 622 newpc = fixup_exception(una_reg, fixup, pc); 623 624 printk("Forwarding unaligned exception at %lx (%lx)\n", 625 pc, newpc); 626 627 regs->pc = newpc; 628 return; 629 } 630 631 /* 632 * Yikes! No one to forward the exception to. 633 * Since the registers are in a weird format, dump them ourselves. 634 */ 635 lock_kernel(); 636 637 printk("%s(%d): unhandled unaligned exception\n", 638 current->comm, current->pid); 639 640 printk("pc = [<%016lx>] ra = [<%016lx>] ps = %04lx\n", 641 pc, una_reg(26), regs->ps); 642 printk("r0 = %016lx r1 = %016lx r2 = %016lx\n", 643 una_reg(0), una_reg(1), una_reg(2)); 644 printk("r3 = %016lx r4 = %016lx r5 = %016lx\n", 645 una_reg(3), una_reg(4), una_reg(5)); 646 printk("r6 = %016lx r7 = %016lx r8 = %016lx\n", 647 una_reg(6), una_reg(7), una_reg(8)); 648 printk("r9 = %016lx r10= %016lx r11= %016lx\n", 649 una_reg(9), una_reg(10), una_reg(11)); 650 printk("r12= %016lx r13= %016lx r14= %016lx\n", 651 una_reg(12), una_reg(13), una_reg(14)); 652 printk("r15= %016lx\n", una_reg(15)); 653 printk("r16= %016lx r17= %016lx r18= %016lx\n", 654 una_reg(16), una_reg(17), una_reg(18)); 655 printk("r19= %016lx r20= %016lx r21= %016lx\n", 656 una_reg(19), una_reg(20), una_reg(21)); 657 printk("r22= %016lx r23= %016lx r24= %016lx\n", 658 una_reg(22), una_reg(23), una_reg(24)); 659 printk("r25= %016lx r27= %016lx r28= %016lx\n", 660 una_reg(25), una_reg(27), una_reg(28)); 661 printk("gp = %016lx sp = %p\n", regs->gp, regs+1); 662 663 dik_show_code((unsigned int *)pc); 664 dik_show_trace((unsigned long *)(regs+1)); 665 666 if (test_and_set_thread_flag (TIF_DIE_IF_KERNEL)) { 667 printk("die_if_kernel recursion detected.\n"); 668 local_irq_enable(); 669 while (1); 670 } 671 do_exit(SIGSEGV); 672} 673 674/* 675 * Convert an s-floating point value in memory format to the 676 * corresponding value in register format. The exponent 677 * needs to be remapped to preserve non-finite values 678 * (infinities, not-a-numbers, denormals). 679 */ 680static inline unsigned long 681s_mem_to_reg (unsigned long s_mem) 682{ 683 unsigned long frac = (s_mem >> 0) & 0x7fffff; 684 unsigned long sign = (s_mem >> 31) & 0x1; 685 unsigned long exp_msb = (s_mem >> 30) & 0x1; 686 unsigned long exp_low = (s_mem >> 23) & 0x7f; 687 unsigned long exp; 688 689 exp = (exp_msb << 10) | exp_low; /* common case */ 690 if (exp_msb) { 691 if (exp_low == 0x7f) { 692 exp = 0x7ff; 693 } 694 } else { 695 if (exp_low == 0x00) { 696 exp = 0x000; 697 } else { 698 exp |= (0x7 << 7); 699 } 700 } 701 return (sign << 63) | (exp << 52) | (frac << 29); 702} 703 704/* 705 * Convert an s-floating point value in register format to the 706 * corresponding value in memory format. 707 */ 708static inline unsigned long 709s_reg_to_mem (unsigned long s_reg) 710{ 711 return ((s_reg >> 62) << 30) | ((s_reg << 5) >> 34); 712} 713 714/* 715 * Handle user-level unaligned fault. Handling user-level unaligned 716 * faults is *extremely* slow and produces nasty messages. A user 717 * program *should* fix unaligned faults ASAP. 718 * 719 * Notice that we have (almost) the regular kernel stack layout here, 720 * so finding the appropriate registers is a little more difficult 721 * than in the kernel case. 722 * 723 * Finally, we handle regular integer load/stores only. In 724 * particular, load-linked/store-conditionally and floating point 725 * load/stores are not supported. The former make no sense with 726 * unaligned faults (they are guaranteed to fail) and I don't think 727 * the latter will occur in any decent program. 728 * 729 * Sigh. We *do* have to handle some FP operations, because GCC will 730 * uses them as temporary storage for integer memory to memory copies. 731 * However, we need to deal with stt/ldt and sts/lds only. 732 */ 733 734#define OP_INT_MASK ( 1L << 0x28 | 1L << 0x2c /* ldl stl */ \ 735 | 1L << 0x29 | 1L << 0x2d /* ldq stq */ \ 736 | 1L << 0x0c | 1L << 0x0d /* ldwu stw */ \ 737 | 1L << 0x0a | 1L << 0x0e ) /* ldbu stb */ 738 739#define OP_WRITE_MASK ( 1L << 0x26 | 1L << 0x27 /* sts stt */ \ 740 | 1L << 0x2c | 1L << 0x2d /* stl stq */ \ 741 | 1L << 0x0d | 1L << 0x0e ) /* stw stb */ 742 743#define R(x) ((size_t) &((struct pt_regs *)0)->x) 744 745static int unauser_reg_offsets[32] = { 746 R(r0), R(r1), R(r2), R(r3), R(r4), R(r5), R(r6), R(r7), R(r8), 747 /* r9 ... r15 are stored in front of regs. */ 748 -56, -48, -40, -32, -24, -16, -8, 749 R(r16), R(r17), R(r18), 750 R(r19), R(r20), R(r21), R(r22), R(r23), R(r24), R(r25), R(r26), 751 R(r27), R(r28), R(gp), 752 0, 0 753}; 754 755#undef R 756 757asmlinkage void 758do_entUnaUser(void __user * va, unsigned long opcode, 759 unsigned long reg, struct pt_regs *regs) 760{ 761 static int cnt = 0; 762 static long last_time = 0; 763 764 unsigned long tmp1, tmp2, tmp3, tmp4; 765 unsigned long fake_reg, *reg_addr = &fake_reg; 766 siginfo_t info; 767 long error; 768 769 /* Check the UAC bits to decide what the user wants us to do 770 with the unaliged access. */ 771 772 if (!test_thread_flag (TIF_UAC_NOPRINT)) { 773 if (cnt >= 5 && jiffies - last_time > 5*HZ) { 774 cnt = 0; 775 } 776 if (++cnt < 5) { 777 printk("%s(%d): unaligned trap at %016lx: %p %lx %ld\n", 778 current->comm, current->pid, 779 regs->pc - 4, va, opcode, reg); 780 } 781 last_time = jiffies; 782 } 783 if (test_thread_flag (TIF_UAC_SIGBUS)) 784 goto give_sigbus; 785 /* Not sure why you'd want to use this, but... */ 786 if (test_thread_flag (TIF_UAC_NOFIX)) 787 return; 788 789 /* Don't bother reading ds in the access check since we already 790 know that this came from the user. Also rely on the fact that 791 the page at TASK_SIZE is unmapped and so can't be touched anyway. */ 792 if (!__access_ok((unsigned long)va, 0, USER_DS)) 793 goto give_sigsegv; 794 795 ++unaligned[1].count; 796 unaligned[1].va = (unsigned long)va; 797 unaligned[1].pc = regs->pc - 4; 798 799 if ((1L << opcode) & OP_INT_MASK) { 800 /* it's an integer load/store */ 801 if (reg < 30) { 802 reg_addr = (unsigned long *) 803 ((char *)regs + unauser_reg_offsets[reg]); 804 } else if (reg == 30) { 805 /* usp in PAL regs */ 806 fake_reg = rdusp(); 807 } else { 808 /* zero "register" */ 809 fake_reg = 0; 810 } 811 } 812 813 /* We don't want to use the generic get/put unaligned macros as 814 we want to trap exceptions. Only if we actually get an 815 exception will we decide whether we should have caught it. */ 816 817 switch (opcode) { 818 case 0x0c: /* ldwu */ 819 __asm__ __volatile__( 820 "1: ldq_u %1,0(%3)\n" 821 "2: ldq_u %2,1(%3)\n" 822 " extwl %1,%3,%1\n" 823 " extwh %2,%3,%2\n" 824 "3:\n" 825 ".section __ex_table,\"a\"\n" 826 " .long 1b - .\n" 827 " lda %1,3b-1b(%0)\n" 828 " .long 2b - .\n" 829 " lda %2,3b-2b(%0)\n" 830 ".previous" 831 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2) 832 : "r"(va), "0"(0)); 833 if (error) 834 goto give_sigsegv; 835 *reg_addr = tmp1|tmp2; 836 break; 837 838 case 0x22: /* lds */ 839 __asm__ __volatile__( 840 "1: ldq_u %1,0(%3)\n" 841 "2: ldq_u %2,3(%3)\n" 842 " extll %1,%3,%1\n" 843 " extlh %2,%3,%2\n" 844 "3:\n" 845 ".section __ex_table,\"a\"\n" 846 " .long 1b - .\n" 847 " lda %1,3b-1b(%0)\n" 848 " .long 2b - .\n" 849 " lda %2,3b-2b(%0)\n" 850 ".previous" 851 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2) 852 : "r"(va), "0"(0)); 853 if (error) 854 goto give_sigsegv; 855 alpha_write_fp_reg(reg, s_mem_to_reg((int)(tmp1|tmp2))); 856 return; 857 858 case 0x23: /* ldt */ 859 __asm__ __volatile__( 860 "1: ldq_u %1,0(%3)\n" 861 "2: ldq_u %2,7(%3)\n" 862 " extql %1,%3,%1\n" 863 " extqh %2,%3,%2\n" 864 "3:\n" 865 ".section __ex_table,\"a\"\n" 866 " .long 1b - .\n" 867 " lda %1,3b-1b(%0)\n" 868 " .long 2b - .\n" 869 " lda %2,3b-2b(%0)\n" 870 ".previous" 871 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2) 872 : "r"(va), "0"(0)); 873 if (error) 874 goto give_sigsegv; 875 alpha_write_fp_reg(reg, tmp1|tmp2); 876 return; 877 878 case 0x28: /* ldl */ 879 __asm__ __volatile__( 880 "1: ldq_u %1,0(%3)\n" 881 "2: ldq_u %2,3(%3)\n" 882 " extll %1,%3,%1\n" 883 " extlh %2,%3,%2\n" 884 "3:\n" 885 ".section __ex_table,\"a\"\n" 886 " .long 1b - .\n" 887 " lda %1,3b-1b(%0)\n" 888 " .long 2b - .\n" 889 " lda %2,3b-2b(%0)\n" 890 ".previous" 891 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2) 892 : "r"(va), "0"(0)); 893 if (error) 894 goto give_sigsegv; 895 *reg_addr = (int)(tmp1|tmp2); 896 break; 897 898 case 0x29: /* ldq */ 899 __asm__ __volatile__( 900 "1: ldq_u %1,0(%3)\n" 901 "2: ldq_u %2,7(%3)\n" 902 " extql %1,%3,%1\n" 903 " extqh %2,%3,%2\n" 904 "3:\n" 905 ".section __ex_table,\"a\"\n" 906 " .long 1b - .\n" 907 " lda %1,3b-1b(%0)\n" 908 " .long 2b - .\n" 909 " lda %2,3b-2b(%0)\n" 910 ".previous" 911 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2) 912 : "r"(va), "0"(0)); 913 if (error) 914 goto give_sigsegv; 915 *reg_addr = tmp1|tmp2; 916 break; 917 918 /* Note that the store sequences do not indicate that they change 919 memory because it _should_ be affecting nothing in this context. 920 (Otherwise we have other, much larger, problems.) */ 921 case 0x0d: /* stw */ 922 __asm__ __volatile__( 923 "1: ldq_u %2,1(%5)\n" 924 "2: ldq_u %1,0(%5)\n" 925 " inswh %6,%5,%4\n" 926 " inswl %6,%5,%3\n" 927 " mskwh %2,%5,%2\n" 928 " mskwl %1,%5,%1\n" 929 " or %2,%4,%2\n" 930 " or %1,%3,%1\n" 931 "3: stq_u %2,1(%5)\n" 932 "4: stq_u %1,0(%5)\n" 933 "5:\n" 934 ".section __ex_table,\"a\"\n" 935 " .long 1b - .\n" 936 " lda %2,5b-1b(%0)\n" 937 " .long 2b - .\n" 938 " lda %1,5b-2b(%0)\n" 939 " .long 3b - .\n" 940 " lda $31,5b-3b(%0)\n" 941 " .long 4b - .\n" 942 " lda $31,5b-4b(%0)\n" 943 ".previous" 944 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2), 945 "=&r"(tmp3), "=&r"(tmp4) 946 : "r"(va), "r"(*reg_addr), "0"(0)); 947 if (error) 948 goto give_sigsegv; 949 return; 950 951 case 0x26: /* sts */ 952 fake_reg = s_reg_to_mem(alpha_read_fp_reg(reg)); 953 /* FALLTHRU */ 954 955 case 0x2c: /* stl */ 956 __asm__ __volatile__( 957 "1: ldq_u %2,3(%5)\n" 958 "2: ldq_u %1,0(%5)\n" 959 " inslh %6,%5,%4\n" 960 " insll %6,%5,%3\n" 961 " msklh %2,%5,%2\n" 962 " mskll %1,%5,%1\n" 963 " or %2,%4,%2\n" 964 " or %1,%3,%1\n" 965 "3: stq_u %2,3(%5)\n" 966 "4: stq_u %1,0(%5)\n" 967 "5:\n" 968 ".section __ex_table,\"a\"\n" 969 " .long 1b - .\n" 970 " lda %2,5b-1b(%0)\n" 971 " .long 2b - .\n" 972 " lda %1,5b-2b(%0)\n" 973 " .long 3b - .\n" 974 " lda $31,5b-3b(%0)\n" 975 " .long 4b - .\n" 976 " lda $31,5b-4b(%0)\n" 977 ".previous" 978 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2), 979 "=&r"(tmp3), "=&r"(tmp4) 980 : "r"(va), "r"(*reg_addr), "0"(0)); 981 if (error) 982 goto give_sigsegv; 983 return; 984 985 case 0x27: /* stt */ 986 fake_reg = alpha_read_fp_reg(reg); 987 /* FALLTHRU */ 988 989 case 0x2d: /* stq */ 990 __asm__ __volatile__( 991 "1: ldq_u %2,7(%5)\n" 992 "2: ldq_u %1,0(%5)\n" 993 " insqh %6,%5,%4\n" 994 " insql %6,%5,%3\n" 995 " mskqh %2,%5,%2\n" 996 " mskql %1,%5,%1\n" 997 " or %2,%4,%2\n" 998 " or %1,%3,%1\n" 999 "3: stq_u %2,7(%5)\n" 1000 "4: stq_u %1,0(%5)\n" 1001 "5:\n" 1002 ".section __ex_table,\"a\"\n\t" 1003 " .long 1b - .\n" 1004 " lda %2,5b-1b(%0)\n" 1005 " .long 2b - .\n" 1006 " lda %1,5b-2b(%0)\n" 1007 " .long 3b - .\n" 1008 " lda $31,5b-3b(%0)\n" 1009 " .long 4b - .\n" 1010 " lda $31,5b-4b(%0)\n" 1011 ".previous" 1012 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2), 1013 "=&r"(tmp3), "=&r"(tmp4) 1014 : "r"(va), "r"(*reg_addr), "0"(0)); 1015 if (error) 1016 goto give_sigsegv; 1017 return; 1018 1019 default: 1020 /* What instruction were you trying to use, exactly? */ 1021 goto give_sigbus; 1022 } 1023 1024 /* Only integer loads should get here; everyone else returns early. */ 1025 if (reg == 30) 1026 wrusp(fake_reg); 1027 return; 1028 1029give_sigsegv: 1030 regs->pc -= 4; /* make pc point to faulting insn */ 1031 info.si_signo = SIGSEGV; 1032 info.si_errno = 0; 1033 1034 /* We need to replicate some of the logic in mm/fault.c, 1035 since we don't have access to the fault code in the 1036 exception handling return path. */ 1037 if (!__access_ok((unsigned long)va, 0, USER_DS)) 1038 info.si_code = SEGV_ACCERR; 1039 else { 1040 struct mm_struct *mm = current->mm; 1041 down_read(&mm->mmap_sem); 1042 if (find_vma(mm, (unsigned long)va)) 1043 info.si_code = SEGV_ACCERR; 1044 else 1045 info.si_code = SEGV_MAPERR; 1046 up_read(&mm->mmap_sem); 1047 } 1048 info.si_addr = va; 1049 send_sig_info(SIGSEGV, &info, current); 1050 return; 1051 1052give_sigbus: 1053 regs->pc -= 4; 1054 info.si_signo = SIGBUS; 1055 info.si_errno = 0; 1056 info.si_code = BUS_ADRALN; 1057 info.si_addr = va; 1058 send_sig_info(SIGBUS, &info, current); 1059 return; 1060} 1061 1062void __init 1063trap_init(void) 1064{ 1065 /* Tell PAL-code what global pointer we want in the kernel. */ 1066 register unsigned long gptr __asm__("$29"); 1067 wrkgp(gptr); 1068 1069 /* Hack for Multia (UDB) and JENSEN: some of their SRMs have 1070 a bug in the handling of the opDEC fault. Fix it up if so. */ 1071 if (implver() == IMPLVER_EV4) 1072 opDEC_check(); 1073 1074 wrent(entArith, 1); 1075 wrent(entMM, 2); 1076 wrent(entIF, 3); 1077 wrent(entUna, 4); 1078 wrent(entSys, 5); 1079 wrent(entDbg, 6); 1080} 1081