1Kernel driver lm90
2==================
3
4Supported chips:
5  * National Semiconductor LM90
6    Prefix: 'lm90'
7    Addresses scanned: I2C 0x4c
8    Datasheet: Publicly available at the National Semiconductor website
9               http://www.national.com/pf/LM/LM90.html
10  * National Semiconductor LM89
11    Prefix: 'lm99'
12    Addresses scanned: I2C 0x4c and 0x4d
13    Datasheet: Publicly available at the National Semiconductor website
14               http://www.national.com/pf/LM/LM89.html
15  * National Semiconductor LM99
16    Prefix: 'lm99'
17    Addresses scanned: I2C 0x4c and 0x4d
18    Datasheet: Publicly available at the National Semiconductor website
19               http://www.national.com/pf/LM/LM99.html
20  * National Semiconductor LM86
21    Prefix: 'lm86'
22    Addresses scanned: I2C 0x4c
23    Datasheet: Publicly available at the National Semiconductor website
24               http://www.national.com/pf/LM/LM86.html
25  * Analog Devices ADM1032
26    Prefix: 'adm1032'
27    Addresses scanned: I2C 0x4c and 0x4d
28    Datasheet: Publicly available at the Analog Devices website
29               http://www.analog.com/en/prod/0,2877,ADM1032,00.html
30  * Analog Devices ADT7461
31    Prefix: 'adt7461'
32    Addresses scanned: I2C 0x4c and 0x4d
33    Datasheet: Publicly available at the Analog Devices website
34               http://www.analog.com/en/prod/0,2877,ADT7461,00.html
35    Note: Only if in ADM1032 compatibility mode
36  * Maxim MAX6657
37    Prefix: 'max6657'
38    Addresses scanned: I2C 0x4c
39    Datasheet: Publicly available at the Maxim website
40               http://www.maxim-ic.com/quick_view2.cfm/qv_pk/2578
41  * Maxim MAX6658
42    Prefix: 'max6657'
43    Addresses scanned: I2C 0x4c
44    Datasheet: Publicly available at the Maxim website
45               http://www.maxim-ic.com/quick_view2.cfm/qv_pk/2578
46  * Maxim MAX6659
47    Prefix: 'max6657'
48    Addresses scanned: I2C 0x4c, 0x4d (unsupported 0x4e)
49    Datasheet: Publicly available at the Maxim website
50               http://www.maxim-ic.com/quick_view2.cfm/qv_pk/2578
51
52
53Author: Jean Delvare <khali@linux-fr.org>
54
55
56Description
57-----------
58
59The LM90 is a digital temperature sensor. It senses its own temperature as
60well as the temperature of up to one external diode. It is compatible
61with many other devices such as the LM86, the LM89, the LM99, the ADM1032,
62the MAX6657, MAX6658 and the MAX6659 all of which are supported by this driver.
63Note that there is no easy way to differentiate between the last three
64variants. The extra address and features of the MAX6659 are not supported by
65this driver. Additionally, the ADT7461 is supported if found in ADM1032
66compatibility mode.
67
68The specificity of this family of chipsets over the ADM1021/LM84
69family is that it features critical limits with hysteresis, and an
70increased resolution of the remote temperature measurement.
71
72The different chipsets of the family are not strictly identical, although
73very similar. This driver doesn't handle any specific feature for now,
74with the exception of SMBus PEC. For reference, here comes a non-exhaustive
75list of specific features:
76
77LM90:
78  * Filter and alert configuration register at 0xBF.
79  * ALERT is triggered by temperatures over critical limits.
80
81LM86 and LM89:
82  * Same as LM90
83  * Better external channel accuracy
84
85LM99:
86  * Same as LM89
87  * External temperature shifted by 16 degrees down
88
89ADM1032:
90  * Consecutive alert register at 0x22.
91  * Conversion averaging.
92  * Up to 64 conversions/s.
93  * ALERT is triggered by open remote sensor.
94  * SMBus PEC support for Write Byte and Receive Byte transactions.
95
96ADT7461
97  * Extended temperature range (breaks compatibility)
98  * Lower resolution for remote temperature
99
100MAX6657 and MAX6658:
101  * Remote sensor type selection
102
103MAX6659
104  * Selectable address
105  * Second critical temperature limit
106  * Remote sensor type selection
107
108All temperature values are given in degrees Celsius. Resolution
109is 1.0 degree for the local temperature, 0.125 degree for the remote
110temperature.
111
112Each sensor has its own high and low limits, plus a critical limit.
113Additionally, there is a relative hysteresis value common to both critical
114values. To make life easier to user-space applications, two absolute values
115are exported, one for each channel, but these values are of course linked.
116Only the local hysteresis can be set from user-space, and the same delta
117applies to the remote hysteresis.
118
119The lm90 driver will not update its values more frequently than every
120other second; reading them more often will do no harm, but will return
121'old' values.
122
123PEC Support
124-----------
125
126The ADM1032 is the only chip of the family which supports PEC. It does
127not support PEC on all transactions though, so some care must be taken.
128
129When reading a register value, the PEC byte is computed and sent by the
130ADM1032 chip. However, in the case of a combined transaction (SMBus Read
131Byte), the ADM1032 computes the CRC value over only the second half of
132the message rather than its entirety, because it thinks the first half
133of the message belongs to a different transaction. As a result, the CRC
134value differs from what the SMBus master expects, and all reads fail.
135
136For this reason, the lm90 driver will enable PEC for the ADM1032 only if
137the bus supports the SMBus Send Byte and Receive Byte transaction types.
138These transactions will be used to read register values, instead of
139SMBus Read Byte, and PEC will work properly.
140
141Additionally, the ADM1032 doesn't support SMBus Send Byte with PEC.
142Instead, it will try to write the PEC value to the register (because the
143SMBus Send Byte transaction with PEC is similar to a Write Byte transaction
144without PEC), which is not what we want. Thus, PEC is explicitely disabled
145on SMBus Send Byte transactions in the lm90 driver.
146
147PEC on byte data transactions represents a significant increase in bandwidth
148usage (+33% for writes, +25% for reads) in normal conditions. With the need
149to use two SMBus transaction for reads, this overhead jumps to +50%. Worse,
150two transactions will typically mean twice as much delay waiting for
151transaction completion, effectively doubling the register cache refresh time.
152I guess reliability comes at a price, but it's quite expensive this time.
153
154So, as not everyone might enjoy the slowdown, PEC can be disabled through
155sysfs. Just write 0 to the "pec" file and PEC will be disabled. Write 1
156to that file to enable PEC again.
157