1/******************************************************************************* 2Copyright (C) Marvell International Ltd. and its affiliates 3 4This software file (the "File") is owned and distributed by Marvell 5International Ltd. and/or its affiliates ("Marvell") under the following 6alternative licensing terms. Once you have made an election to distribute the 7File under one of the following license alternatives, please (i) delete this 8introductory statement regarding license alternatives, (ii) delete the two 9license alternatives that you have not elected to use and (iii) preserve the 10Marvell copyright notice above. 11 12 13******************************************************************************** 14Marvell GPL License Option 15 16If you received this File from Marvell, you may opt to use, redistribute and/or 17modify this File in accordance with the terms and conditions of the General 18Public License Version 2, June 1991 (the "GPL License"), a copy of which is 19available along with the File in the license.txt file or by writing to the Free 20Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 21on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 22 23THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 24WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 25DISCLAIMED. The GPL License provides additional details about this warranty 26disclaimer. 27*******************************************************************************/ 28#ifndef __mvCpuL2Cntrs_h__ 29#define __mvCpuL2Cntrs_h__ 30 31#include "mvTypes.h" 32#include "mvOs.h" 33 34 35#define MV_CPU_L2_CNTRS_NUM 2 36 37typedef enum 38{ 39 MV_CPU_L2_CNTRS_ENABLE = 0, 40 MV_CPU_L2_CNTRS_DATA_REQ, 41 MV_CPU_L2_CNTRS_DATA_MISS_REQ, 42 MV_CPU_L2_CNTRS_INST_REQ, 43 MV_CPU_L2_CNTRS_INST_MISS_REQ, 44 MV_CPU_L2_CNTRS_DATA_READ_REQ, 45 MV_CPU_L2_CNTRS_DATA_READ_MISS_REQ, 46 MV_CPU_L2_CNTRS_DATA_WRITE_REQ, 47 MV_CPU_L2_CNTRS_DATA_WRITE_MISS_REQ, 48 MV_CPU_L2_CNTRS_RESERVED, 49 MV_CPU_L2_CNTRS_DIRTY_EVICT_REQ, 50 MV_CPU_L2_CNTRS_EVICT_BUFF_STALL, 51 MV_CPU_L2_CNTRS_ACTIVE_CYCLES, 52 53} MV_CPU_L2_CNTRS_OPS; 54 55typedef struct 56{ 57 char name[16]; 58 MV_CPU_L2_CNTRS_OPS operation; 59 int opIdx; 60 MV_U32 overhead; 61 62} MV_CPU_L2_CNTRS_ENTRY; 63 64 65typedef struct 66{ 67 char name[16]; 68 MV_U32 num_of_measurements; 69 MV_U32 avg_sample_count; 70 MV_U64 counters_before[MV_CPU_L2_CNTRS_NUM]; 71 MV_U64 counters_after[MV_CPU_L2_CNTRS_NUM]; 72 MV_U64 counters_sum[MV_CPU_L2_CNTRS_NUM]; 73 74} MV_CPU_L2_CNTRS_EVENT; 75 76 77MV_STATUS mvCpuL2CntrsProgram(int counter, MV_CPU_L2_CNTRS_OPS op, 78 char* name, MV_U32 overhead); 79void mvCpuL2CntrsInit(void); 80MV_CPU_L2_CNTRS_EVENT* mvCpuL2CntrsEventCreate(char* name, MV_U32 print_threshold); 81void mvCpuL2CntrsEventDelete(MV_CPU_L2_CNTRS_EVENT* event); 82void mvCpuL2CntrsReset(void); 83void mvCpuL2CntrsShow(MV_CPU_L2_CNTRS_EVENT* pEvent); 84void mvCpuL2CntrsEventClear(MV_CPU_L2_CNTRS_EVENT* pEvent); 85 86static INLINE MV_U64 mvCpuL2CntrsRead(const int counter) 87{ 88 MV_U32 low = 0, high = 0; 89 90 switch(counter) 91 { 92 case 0: 93 MV_ASM ("mrc p15, 6, %0, c15, c13, 0" : "=r" (low)); 94 MV_ASM ("mrc p15, 6, %0, c15, c13, 1" : "=r" (high)); 95 break; 96 97 case 1: 98 MV_ASM ("mrc p15, 6, %0, c15, c13, 2" : "=r" (low)); 99 MV_ASM ("mrc p15, 6, %0, c15, c13, 3" : "=r" (high)); 100 break; 101 102 default: 103 mvOsPrintf("mvCpuL2CntrsRead: bad counter number (%d)\n", counter); 104 } 105 return (((MV_U64)high << 32 ) | low); 106 107} 108 109static INLINE void mvCpuL2CntrsReadBefore(MV_CPU_L2_CNTRS_EVENT* pEvent) 110{ 111 int i; 112 113 for(i=0; i<MV_CPU_L2_CNTRS_NUM; i++) 114 pEvent->counters_before[i] = mvCpuL2CntrsRead(i); 115} 116 117static INLINE void mvCpuL2CntrsReadAfter(MV_CPU_L2_CNTRS_EVENT* pEvent) 118{ 119 int i; 120 121 for(i=0; i<MV_CPU_L2_CNTRS_NUM; i++) 122 { 123 pEvent->counters_after[i] = mvCpuL2CntrsRead(i); 124 pEvent->counters_sum[i] += (pEvent->counters_after[i] - pEvent->counters_before[i]); 125 } 126 pEvent->num_of_measurements++; 127} 128 129 130#ifdef CONFIG_MV_CPU_L2_PERF_CNTRS 131 132#define MV_CPU_L2_CNTRS_READ(counter) mvCpuL2CntrsRead(counter) 133 134#define MV_CPU_L2_CNTRS_START(event) mvCpuL2CntrsReadBefore(event) 135 136#define MV_CPU_L2_CNTRS_STOP(event) mvCpuL2CntrsReadAfter(event) 137 138#define MV_CPU_L2_CNTRS_SHOW(event) mvCpuL2CntrsShow(event) 139 140#else 141 142#define MV_CPU_L2_CNTRS_READ(counter) 143#define MV_CPU_L2_CNTRS_START(event) 144#define MV_CPU_L2_CNTRS_STOP(event) 145#define MV_CPU_L2_CNTRS_SHOW(event) 146 147#endif /* CONFIG_MV_CPU_L2_PERF_CNTRS */ 148 149 150#endif /* __mvCpuL2Cntrs_h__ */ 151 152