1/*
2 *  Copyright (C) 2008 I2SE GmbH
3 *  Copyright (C) 2010 IEQualize GmbH
4 *  Copyright (C) 2010-2011 Michael Heimpold
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
19 */
20
21#include <linux/types.h>
22#include <linux/init.h>
23#include <linux/mm.h>
24#include <linux/module.h>
25#include <linux/platform_device.h>
26#include <linux/fb.h>
27
28#include <mach/hardware.h>
29#include <asm/setup.h>
30#include <asm/mach-types.h>
31#include <asm/irq.h>
32
33#include <asm/mach/arch.h>
34#include <asm/mach/map.h>
35#include <asm/mach/irq.h>
36
37#include <mach/board.h>
38#include <mach/gpio.h>
39#include <mach/at91sam9_smc.h>
40
41#include <video/atmel_lcdc.h>
42
43#include "sam9_smc.h"
44#include "generic.h"
45
46#include <linux/atmel_serial.h>
47
48
49static void __init tqma9263_map_io(void)
50{
51	unsigned pins;
52
53	/* Initialize processor: 18.432 MHz crystal */
54	at91_initialize(18432000);
55
56	/* DGBU on ttyS0. (Rx & Tx only) */
57	at91_register_uart(0, 0, 0);
58
59	/* USART0 on ttyS1 */
60	pins = ATMEL_UART_CTS | ATMEL_UART_RTS |
61	       ATMEL_UART_DSR | ATMEL_UART_DTR |
62	       ATMEL_UART_DCD | ATMEL_UART_RI;
63	at91_register_uart(AT91SAM9263_ID_US0, 1, pins);
64
65	/* USART1 on ttyS2 */
66	pins = ATMEL_UART_RTS;
67	at91_register_uart(AT91SAM9263_ID_US1, 2, pins);
68
69	/* USART2 on ttyS3 */
70	pins = ATMEL_UART_RTS;
71	at91_register_uart(AT91SAM9263_ID_US2, 3, pins);
72
73	/* set serial console to ttyS0 (ie, DBGU) */
74	at91_set_serial_console(0);
75}
76
77
78/*
79 * USB Host port
80 */
81static struct at91_usbh_data __initdata tqma9263_usbh_data = {
82	.ports			= 2,
83	.vbus_pin		= { AT91_PIN_PA24, AT91_PIN_PA21 },
84	.vbus_pin_active_low	= 0,
85};
86
87
88/*
89 * USB Device port
90 */
91static struct at91_udc_data __initdata tqma9263_udc_data = {
92	.vbus_pin	= AT91_PIN_PA25,
93	.pullup_pin	= 0,			/* pull-up driven by UDC */
94};
95
96
97/*
98 * MCI (SD/MMC)
99 */
100static struct at91_mmc_data __initdata tqma9263_mmc_data = {
101	.wire4		= 1,
102	.det_pin	= AT91_PIN_PE18,
103	.wp_pin		= AT91_PIN_PB28,
104};
105
106
107/*
108 * MACB Ethernet device
109 */
110static struct macb_platform_data __initdata tqma9263_macb_data = {
111	.phy_irq_pin	= AT91_PIN_PE31,
112	.is_rmii	= 1,
113};
114
115
116/*
117 * I2C devices
118 */
119static struct i2c_board_info __initdata tqma9263_i2c_devices[] = {
120	{
121		I2C_BOARD_INFO("pcf8563", 0x51),
122	},
123	{
124		I2C_BOARD_INFO("24c04", 0x52),
125	},
126};
127
128
129/*
130 * NAND flash
131 */
132static struct mtd_partition __initdata tqma9263_nand_partition[] = {
133	{
134		.name	= "uboot",
135		.offset	= 0,
136		.size	= 3 * SZ_128K,
137	},
138	{
139		.name	= "uboot-env",
140		.offset	= MTDPART_OFS_NXTBLK,
141		.size	= SZ_128K,
142	},
143	{
144		.name	= "linux",
145		.offset	= MTDPART_OFS_NXTBLK,
146		.size	= SZ_2M,
147	},
148	{
149		.name	= "rootfs",
150		.offset	= MTDPART_OFS_NXTBLK,
151		.size	= MTDPART_SIZ_FULL,
152	},
153};
154
155static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
156{
157	*num_partitions = ARRAY_SIZE(tqma9263_nand_partition);
158	return tqma9263_nand_partition;
159}
160
161static struct atmel_nand_data __initdata tqma9263_nand_data = {
162	.ale			= 21,
163	.cle			= 22,
164	.rdy_pin		= AT91_PIN_PD14,
165	.enable_pin		= AT91_PIN_PD15,
166};
167
168static struct sam9_smc_config __initdata tqma9263_nand_smc_config = {
169	.ncs_read_setup		= 0,
170	.nrd_setup		= 1,
171	.ncs_write_setup	= 0,
172	.nwe_setup		= 1,
173
174	.ncs_read_pulse		= 3,
175	.nrd_pulse		= 3,
176	.ncs_write_pulse	= 3,
177	.nwe_pulse		= 3,
178
179	.read_cycle		= 5,
180	.write_cycle		= 5,
181
182	.mode			= AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_DBW_8,
183	.tdf_cycles		= 2,
184};
185
186static void __init tqma9263_add_device_nand(void)
187{
188	/* configure chip-select 3 (NAND) */
189	sam9_smc_configure(0, 3, &tqma9263_nand_smc_config);
190
191	at91_add_device_nand(&tqma9263_nand_data);
192}
193
194
195static void __init tqma9263_board_init(void)
196{
197	/* Serial */
198	at91_add_device_serial();
199	/* USB Host */
200	at91_add_device_usbh(&tqma9263_usbh_data);
201	/* USB Device */
202	at91_add_device_udc(&tqma9263_udc_data);
203	/* MMC */
204	at91_add_device_mmc(1, &tqma9263_mmc_data);
205	/* I2C */
206	at91_add_device_i2c(tqma9263_i2c_devices, ARRAY_SIZE(tqma9263_i2c_devices));
207	/* Ethernet */
208	at91_add_device_eth(&tqma9263_macb_data);
209	/* NAND flash */
210	tqma9263_add_device_nand();
211}
212
213MACHINE_START(TQMA9263, "TQ Components TQMa9263")
214	/* Maintainer: Michael Heimpold */
215	.timer		= &at91sam926x_timer,
216	.map_io		= tqma9263_map_io,
217	.init_irq	= at91_init_irq_default,
218	.init_machine	= tqma9263_board_init,
219MACHINE_END
220