1/*
2 * Copyright (c) 2012, The Linux Foundation. All rights reserved.
3 * Permission to use, copy, modify, and/or distribute this software for
4 * any purpose with or without fee is hereby granted, provided that the
5 * above copyright notice and this permission notice appear in all copies.
6 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
7 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
8 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
9 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
10 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
11 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
12 * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
13 */
14
15
16#ifndef _ATHENA_PORT_CTRL_H
17#define _ATHENA_PORT_CTRL_H
18
19#ifdef __cplusplus
20extern "C" {
21#endif                          /* __cplusplus */
22
23#include "fal/fal_port_ctrl.h"
24
25    sw_error_t athena_port_ctrl_init(a_uint32_t dev_id);
26
27#ifdef IN_PORTCONTROL
28#define ATHENA_PORT_CTRL_INIT(rv, dev_id) \
29    { \
30        rv = athena_port_ctrl_init(dev_id); \
31        SW_RTN_ON_ERROR(rv); \
32    }
33#else
34#define ATHENA_PORT_CTRL_INIT(rv, dev_id)
35#endif
36
37#ifdef HSL_STANDALONG
38
39
40    HSL_LOCAL sw_error_t
41    athena_port_duplex_set(a_uint32_t dev_id, fal_port_t port_id,
42                           fal_port_duplex_t duplex);
43
44
45
46    HSL_LOCAL sw_error_t
47    athena_port_duplex_get(a_uint32_t dev_id, fal_port_t port_id,
48                           fal_port_duplex_t * pduplex);
49
50
51
52    HSL_LOCAL sw_error_t
53    athena_port_speed_set(a_uint32_t dev_id, fal_port_t port_id,
54                          fal_port_speed_t speed);
55
56
57
58    HSL_LOCAL sw_error_t
59    athena_port_speed_get(a_uint32_t dev_id, fal_port_t port_id,
60                          fal_port_speed_t * pspeed);
61
62
63
64    HSL_LOCAL sw_error_t
65    athena_port_autoneg_status_get(a_uint32_t dev_id, fal_port_t port_id,
66                                   a_bool_t * status);
67
68
69
70    HSL_LOCAL sw_error_t
71    athena_port_autoneg_enable(a_uint32_t dev_id, fal_port_t port_id);
72
73
74
75    HSL_LOCAL sw_error_t
76    athena_port_autoneg_restart(a_uint32_t dev_id, fal_port_t port_id);
77
78
79
80    HSL_LOCAL sw_error_t
81    athena_port_autoneg_adv_set(a_uint32_t dev_id, fal_port_t port_id,
82                                a_uint32_t autoadv);
83
84
85
86    HSL_LOCAL sw_error_t
87    athena_port_autoneg_adv_get(a_uint32_t dev_id, fal_port_t port_id,
88                                a_uint32_t * autoadv);
89
90
91
92    HSL_LOCAL sw_error_t
93    athena_port_igmps_status_set(a_uint32_t dev_id, fal_port_t port_id,
94                                 a_bool_t enable);
95
96
97
98    HSL_LOCAL sw_error_t
99    athena_port_igmps_status_get(a_uint32_t dev_id, fal_port_t port_id,
100                                 a_bool_t * enable);
101
102
103    HSL_LOCAL sw_error_t
104    athena_port_powersave_set(a_uint32_t dev_id, fal_port_t port_id, a_bool_t enable);
105
106
107
108    HSL_LOCAL sw_error_t
109    athena_port_powersave_get(a_uint32_t dev_id, fal_port_t port_id, a_bool_t *enable);
110
111
112
113    HSL_LOCAL sw_error_t
114    athena_port_hibernate_set(a_uint32_t dev_id, fal_port_t port_id, a_bool_t enable);
115
116
117
118    HSL_LOCAL sw_error_t
119    athena_port_hibernate_get(a_uint32_t dev_id, fal_port_t port_id, a_bool_t *enable);
120
121
122#endif
123
124#ifdef __cplusplus
125}
126#endif                          /* __cplusplus */
127#endif                          /* _ATHENA_PORT_CTRL_H */
128