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1/*
2 * Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 *  You should have received a copy of the  GNU General Public License along
9 *  with this program; if not, write  to the Free Software Foundation, Inc.,
10 *  675 Mass Ave, Cambridge, MA 02139, USA.
11 *
12 */
13
14#include <linux/kernel.h>
15#include <linux/module.h>
16#include <linux/platform_device.h>
17#include <linux/slab.h>
18
19#include <linux/delay.h>
20
21#include <sound/core.h>
22#include <sound/pcm.h>
23#include <sound/pcm_params.h>
24#include <sound/initval.h>
25#include <sound/soc-dapm.h>
26#include <sound/soc.h>
27
28#define JZ4740_REG_CODEC_1 0x0
29#define JZ4740_REG_CODEC_2 0x1
30
31#define JZ4740_CODEC_1_LINE_ENABLE BIT(29)
32#define JZ4740_CODEC_1_MIC_ENABLE BIT(28)
33#define JZ4740_CODEC_1_SW1_ENABLE BIT(27)
34#define JZ4740_CODEC_1_ADC_ENABLE BIT(26)
35#define JZ4740_CODEC_1_SW2_ENABLE BIT(25)
36#define JZ4740_CODEC_1_DAC_ENABLE BIT(24)
37#define JZ4740_CODEC_1_VREF_DISABLE BIT(20)
38#define JZ4740_CODEC_1_VREF_AMP_DISABLE BIT(19)
39#define JZ4740_CODEC_1_VREF_PULLDOWN BIT(18)
40#define JZ4740_CODEC_1_VREF_LOW_CURRENT BIT(17)
41#define JZ4740_CODEC_1_VREF_HIGH_CURRENT BIT(16)
42#define JZ4740_CODEC_1_HEADPHONE_DISABLE BIT(14)
43#define JZ4740_CODEC_1_HEADPHONE_AMP_CHANGE_ANY BIT(13)
44#define JZ4740_CODEC_1_HEADPHONE_CHARGE BIT(12)
45#define JZ4740_CODEC_1_HEADPHONE_PULLDOWN (BIT(11) | BIT(10))
46#define JZ4740_CODEC_1_HEADPHONE_POWERDOWN_M BIT(9)
47#define JZ4740_CODEC_1_HEADPHONE_POWERDOWN BIT(8)
48#define JZ4740_CODEC_1_SUSPEND BIT(1)
49#define JZ4740_CODEC_1_RESET BIT(0)
50
51#define JZ4740_CODEC_1_LINE_ENABLE_OFFSET 29
52#define JZ4740_CODEC_1_MIC_ENABLE_OFFSET 28
53#define JZ4740_CODEC_1_SW1_ENABLE_OFFSET 27
54#define JZ4740_CODEC_1_ADC_ENABLE_OFFSET 26
55#define JZ4740_CODEC_1_SW2_ENABLE_OFFSET 25
56#define JZ4740_CODEC_1_DAC_ENABLE_OFFSET 24
57#define JZ4740_CODEC_1_HEADPHONE_DISABLE_OFFSET 14
58#define JZ4740_CODEC_1_HEADPHONE_POWERDOWN_OFFSET 8
59
60#define JZ4740_CODEC_2_INPUT_VOLUME_MASK		0x1f0000
61#define JZ4740_CODEC_2_SAMPLE_RATE_MASK			0x000f00
62#define JZ4740_CODEC_2_MIC_BOOST_GAIN_MASK		0x000030
63#define JZ4740_CODEC_2_HEADPHONE_VOLUME_MASK	0x000003
64
65#define JZ4740_CODEC_2_INPUT_VOLUME_OFFSET		16
66#define JZ4740_CODEC_2_SAMPLE_RATE_OFFSET		 8
67#define JZ4740_CODEC_2_MIC_BOOST_GAIN_OFFSET	 4
68#define JZ4740_CODEC_2_HEADPHONE_VOLUME_OFFSET	 0
69
70static const uint32_t jz4740_codec_regs[] = {
71	0x021b2302, 0x00170803,
72};
73
74struct jz4740_codec {
75	void __iomem *base;
76	struct resource *mem;
77
78	uint32_t reg_cache[2];
79	struct snd_soc_codec codec;
80};
81
82static inline struct jz4740_codec *codec_to_jz4740(struct snd_soc_codec *codec)
83{
84	return container_of(codec, struct jz4740_codec, codec);
85}
86
87static unsigned int jz4740_codec_read(struct snd_soc_codec *codec,
88	unsigned int reg)
89{
90	struct jz4740_codec *jz4740_codec = codec_to_jz4740(codec);
91	return readl(jz4740_codec->base + (reg << 2));
92}
93
94static int jz4740_codec_write(struct snd_soc_codec *codec, unsigned int reg,
95	unsigned int val)
96{
97	struct jz4740_codec *jz4740_codec = codec_to_jz4740(codec);
98
99	jz4740_codec->reg_cache[reg] = val;
100	writel(val, jz4740_codec->base + (reg << 2));
101
102	return 0;
103}
104
105static const struct snd_kcontrol_new jz4740_codec_controls[] = {
106	SOC_SINGLE("Master Playback Volume", JZ4740_REG_CODEC_2,
107			JZ4740_CODEC_2_HEADPHONE_VOLUME_OFFSET, 3, 0),
108	SOC_SINGLE("Master Capture Volume", JZ4740_REG_CODEC_2,
109			JZ4740_CODEC_2_INPUT_VOLUME_OFFSET, 31, 0),
110	SOC_SINGLE("Master Playback Switch", JZ4740_REG_CODEC_1,
111			JZ4740_CODEC_1_HEADPHONE_DISABLE_OFFSET, 1, 1),
112	SOC_SINGLE("Mic Capture Volume", JZ4740_REG_CODEC_2,
113			JZ4740_CODEC_2_MIC_BOOST_GAIN_OFFSET, 3, 0),
114};
115
116static const struct snd_kcontrol_new jz4740_codec_output_controls[] = {
117	SOC_DAPM_SINGLE("Bypass Switch", JZ4740_REG_CODEC_1,
118			JZ4740_CODEC_1_SW1_ENABLE_OFFSET, 1, 0),
119	SOC_DAPM_SINGLE("DAC Switch", JZ4740_REG_CODEC_1,
120			JZ4740_CODEC_1_SW2_ENABLE_OFFSET, 1, 0),
121};
122
123static const struct snd_kcontrol_new jz4740_codec_input_controls[] = {
124	SOC_DAPM_SINGLE("Line Capture Switch", JZ4740_REG_CODEC_1,
125			JZ4740_CODEC_1_LINE_ENABLE_OFFSET, 1, 0),
126	SOC_DAPM_SINGLE("Mic Capture Switch", JZ4740_REG_CODEC_1,
127			JZ4740_CODEC_1_MIC_ENABLE_OFFSET, 1, 0),
128};
129
130static const struct snd_soc_dapm_widget jz4740_codec_dapm_widgets[] = {
131	SND_SOC_DAPM_ADC("ADC", "Capture", JZ4740_REG_CODEC_1,
132			JZ4740_CODEC_1_ADC_ENABLE_OFFSET, 0),
133	SND_SOC_DAPM_DAC("DAC", "Playback", JZ4740_REG_CODEC_1,
134			JZ4740_CODEC_1_DAC_ENABLE_OFFSET, 0),
135
136	SND_SOC_DAPM_MIXER("Output Mixer", JZ4740_REG_CODEC_1,
137			JZ4740_CODEC_1_HEADPHONE_POWERDOWN_OFFSET, 1,
138			jz4740_codec_output_controls,
139			ARRAY_SIZE(jz4740_codec_output_controls)),
140
141	SND_SOC_DAPM_MIXER_NAMED_CTL("Input Mixer", SND_SOC_NOPM, 0, 0,
142			jz4740_codec_input_controls,
143			ARRAY_SIZE(jz4740_codec_input_controls)),
144	SND_SOC_DAPM_MIXER("Line Input", SND_SOC_NOPM, 0, 0, NULL, 0),
145
146	SND_SOC_DAPM_OUTPUT("LOUT"),
147	SND_SOC_DAPM_OUTPUT("ROUT"),
148
149	SND_SOC_DAPM_INPUT("MIC"),
150	SND_SOC_DAPM_INPUT("LIN"),
151	SND_SOC_DAPM_INPUT("RIN"),
152};
153
154static const struct snd_soc_dapm_route jz4740_codec_dapm_routes[] = {
155	{"Line Input", NULL, "LIN"},
156	{"Line Input", NULL, "RIN"},
157
158	{"Input Mixer", "Line Capture Switch", "Line Input"},
159	{"Input Mixer", "Mic Capture Switch", "MIC"},
160
161	{"ADC", NULL, "Input Mixer"},
162
163	{"Output Mixer", "Bypass Switch", "Input Mixer"},
164	{"Output Mixer", "DAC Switch", "DAC"},
165
166	{"LOUT", NULL, "Output Mixer"},
167	{"ROUT", NULL, "Output Mixer"},
168};
169
170static int jz4740_codec_hw_params(struct snd_pcm_substream *substream,
171	struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
172{
173	uint32_t val;
174	struct snd_soc_pcm_runtime *rtd = substream->private_data;
175	struct snd_soc_device *socdev = rtd->socdev;
176	struct snd_soc_codec *codec = socdev->card->codec;
177
178	switch (params_rate(params)) {
179	case 8000:
180		val = 0;
181		break;
182	case 11025:
183		val = 1;
184		break;
185	case 12000:
186		val = 2;
187		break;
188	case 16000:
189		val = 3;
190		break;
191	case 22050:
192		val = 4;
193		break;
194	case 24000:
195		val = 5;
196		break;
197	case 32000:
198		val = 6;
199		break;
200	case 44100:
201		val = 7;
202		break;
203	case 48000:
204		val = 8;
205		break;
206	default:
207		return -EINVAL;
208	}
209
210	val <<= JZ4740_CODEC_2_SAMPLE_RATE_OFFSET;
211
212	snd_soc_update_bits(codec, JZ4740_REG_CODEC_2,
213				JZ4740_CODEC_2_SAMPLE_RATE_MASK, val);
214
215	return 0;
216}
217
218static struct snd_soc_dai_ops jz4740_codec_dai_ops = {
219	.hw_params = jz4740_codec_hw_params,
220};
221
222struct snd_soc_dai jz4740_codec_dai = {
223	.name = "jz4740",
224	.playback = {
225		.stream_name = "Playback",
226		.channels_min = 2,
227		.channels_max = 2,
228		.rates = SNDRV_PCM_RATE_8000_48000,
229		.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8,
230	},
231	.capture = {
232		.stream_name = "Capture",
233		.channels_min = 2,
234		.channels_max = 2,
235		.rates = SNDRV_PCM_RATE_8000_48000,
236		.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8,
237	},
238	.ops = &jz4740_codec_dai_ops,
239	.symmetric_rates = 1,
240};
241EXPORT_SYMBOL_GPL(jz4740_codec_dai);
242
243static void jz4740_codec_wakeup(struct snd_soc_codec *codec)
244{
245	int i;
246	uint32_t *cache = codec->reg_cache;
247
248	snd_soc_update_bits(codec, JZ4740_REG_CODEC_1,
249		JZ4740_CODEC_1_RESET, JZ4740_CODEC_1_RESET);
250	udelay(2);
251
252	snd_soc_update_bits(codec, JZ4740_REG_CODEC_1,
253		JZ4740_CODEC_1_SUSPEND | JZ4740_CODEC_1_RESET, 0);
254
255	for (i = 0; i < ARRAY_SIZE(jz4740_codec_regs); ++i)
256		jz4740_codec_write(codec, i, cache[i]);
257}
258
259static int jz4740_codec_set_bias_level(struct snd_soc_codec *codec,
260	enum snd_soc_bias_level level)
261{
262	unsigned int mask;
263	unsigned int value;
264
265	switch (level) {
266	case SND_SOC_BIAS_ON:
267		break;
268	case SND_SOC_BIAS_PREPARE:
269		mask = JZ4740_CODEC_1_VREF_DISABLE |
270				JZ4740_CODEC_1_VREF_AMP_DISABLE |
271				JZ4740_CODEC_1_HEADPHONE_POWERDOWN_M;
272		value = 0;
273
274		snd_soc_update_bits(codec, JZ4740_REG_CODEC_1, mask, value);
275		break;
276	case SND_SOC_BIAS_STANDBY:
277		/* The only way to clear the suspend flag is to reset the codec */
278		if (codec->bias_level == SND_SOC_BIAS_OFF)
279			jz4740_codec_wakeup(codec);
280
281		mask = JZ4740_CODEC_1_VREF_DISABLE |
282			JZ4740_CODEC_1_VREF_AMP_DISABLE |
283			JZ4740_CODEC_1_HEADPHONE_POWERDOWN_M;
284		value = JZ4740_CODEC_1_VREF_DISABLE |
285			JZ4740_CODEC_1_VREF_AMP_DISABLE |
286			JZ4740_CODEC_1_HEADPHONE_POWERDOWN_M;
287
288		snd_soc_update_bits(codec, JZ4740_REG_CODEC_1, mask, value);
289		break;
290	case SND_SOC_BIAS_OFF:
291		mask = JZ4740_CODEC_1_SUSPEND;
292		value = JZ4740_CODEC_1_SUSPEND;
293
294		snd_soc_update_bits(codec, JZ4740_REG_CODEC_1, mask, value);
295		break;
296	default:
297		break;
298	}
299
300	codec->bias_level = level;
301
302	return 0;
303}
304
305static struct snd_soc_codec *jz4740_codec_codec;
306
307static int jz4740_codec_dev_probe(struct platform_device *pdev)
308{
309	int ret;
310	struct snd_soc_device *socdev = platform_get_drvdata(pdev);
311	struct snd_soc_codec *codec = jz4740_codec_codec;
312
313	BUG_ON(!codec);
314
315	socdev->card->codec = codec;
316
317	ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
318	if (ret) {
319		dev_err(&pdev->dev, "Failed to create pcms: %d\n", ret);
320		return ret;
321	}
322
323	snd_soc_add_controls(codec, jz4740_codec_controls,
324		ARRAY_SIZE(jz4740_codec_controls));
325
326	snd_soc_dapm_new_controls(codec, jz4740_codec_dapm_widgets,
327		ARRAY_SIZE(jz4740_codec_dapm_widgets));
328
329	snd_soc_dapm_add_routes(codec, jz4740_codec_dapm_routes,
330		ARRAY_SIZE(jz4740_codec_dapm_routes));
331
332	snd_soc_dapm_new_widgets(codec);
333
334	return 0;
335}
336
337static int jz4740_codec_dev_remove(struct platform_device *pdev)
338{
339	struct snd_soc_device *socdev = platform_get_drvdata(pdev);
340
341	snd_soc_free_pcms(socdev);
342	snd_soc_dapm_free(socdev);
343
344	return 0;
345}
346
347#ifdef CONFIG_PM_SLEEP
348
349static int jz4740_codec_suspend(struct platform_device *pdev, pm_message_t state)
350{
351	struct snd_soc_device *socdev = platform_get_drvdata(pdev);
352	struct snd_soc_codec *codec = socdev->card->codec;
353
354	return jz4740_codec_set_bias_level(codec, SND_SOC_BIAS_OFF);
355}
356
357static int jz4740_codec_resume(struct platform_device *pdev)
358{
359	struct snd_soc_device *socdev = platform_get_drvdata(pdev);
360	struct snd_soc_codec *codec = socdev->card->codec;
361
362	return jz4740_codec_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
363}
364
365#else
366#define jz4740_codec_suspend NULL
367#define jz4740_codec_resume NULL
368#endif
369
370struct snd_soc_codec_device soc_codec_dev_jz4740_codec = {
371	.probe = jz4740_codec_dev_probe,
372	.remove = jz4740_codec_dev_remove,
373	.suspend = jz4740_codec_suspend,
374	.resume = jz4740_codec_resume,
375};
376EXPORT_SYMBOL_GPL(soc_codec_dev_jz4740_codec);
377
378static int __devinit jz4740_codec_probe(struct platform_device *pdev)
379{
380	int ret;
381	struct jz4740_codec *jz4740_codec;
382	struct snd_soc_codec *codec;
383	struct resource *mem;
384
385	jz4740_codec = kzalloc(sizeof(*jz4740_codec), GFP_KERNEL);
386	if (!jz4740_codec)
387		return -ENOMEM;
388
389	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
390	if (!mem) {
391		dev_err(&pdev->dev, "Failed to get mmio memory resource\n");
392		ret = -ENOENT;
393		goto err_free_codec;
394	}
395
396	mem = request_mem_region(mem->start, resource_size(mem), pdev->name);
397	if (!mem) {
398		dev_err(&pdev->dev, "Failed to request mmio memory region\n");
399		ret = -EBUSY;
400		goto err_free_codec;
401	}
402
403	jz4740_codec->base = ioremap(mem->start, resource_size(mem));
404	if (!jz4740_codec->base) {
405		dev_err(&pdev->dev, "Failed to ioremap mmio memory\n");
406		ret = -EBUSY;
407		goto err_release_mem_region;
408	}
409	jz4740_codec->mem = mem;
410
411	jz4740_codec_dai.dev = &pdev->dev;
412
413	codec = &jz4740_codec->codec;
414
415	codec->dev		= &pdev->dev;
416	codec->name		= "jz4740";
417	codec->owner		= THIS_MODULE;
418
419	codec->read		= jz4740_codec_read;
420	codec->write		= jz4740_codec_write;
421	codec->set_bias_level	= jz4740_codec_set_bias_level;
422	codec->bias_level	= SND_SOC_BIAS_OFF;
423
424	codec->dai		= &jz4740_codec_dai;
425	codec->num_dai		= 1;
426
427	codec->reg_cache	= jz4740_codec->reg_cache;
428	codec->reg_cache_size	= 2;
429	memcpy(codec->reg_cache, jz4740_codec_regs, sizeof(jz4740_codec_regs));
430
431	mutex_init(&codec->mutex);
432	INIT_LIST_HEAD(&codec->dapm_widgets);
433	INIT_LIST_HEAD(&codec->dapm_paths);
434
435	jz4740_codec_codec = codec;
436
437	snd_soc_update_bits(codec, JZ4740_REG_CODEC_1,
438			JZ4740_CODEC_1_SW2_ENABLE, JZ4740_CODEC_1_SW2_ENABLE);
439
440	platform_set_drvdata(pdev, jz4740_codec);
441
442	ret = snd_soc_register_codec(codec);
443	if (ret) {
444		dev_err(&pdev->dev, "Failed to register codec\n");
445		goto err_iounmap;
446	}
447
448	ret = snd_soc_register_dai(&jz4740_codec_dai);
449	if (ret) {
450		dev_err(&pdev->dev, "Failed to register codec dai\n");
451		goto err_unregister_codec;
452	}
453
454	jz4740_codec_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
455
456	return 0;
457
458err_unregister_codec:
459	snd_soc_unregister_codec(codec);
460err_iounmap:
461	iounmap(jz4740_codec->base);
462err_release_mem_region:
463	release_mem_region(mem->start, resource_size(mem));
464err_free_codec:
465	kfree(jz4740_codec);
466
467	return ret;
468}
469
470static int __devexit jz4740_codec_remove(struct platform_device *pdev)
471{
472	struct jz4740_codec *jz4740_codec = platform_get_drvdata(pdev);
473	struct resource *mem = jz4740_codec->mem;
474
475	snd_soc_unregister_dai(&jz4740_codec_dai);
476	snd_soc_unregister_codec(&jz4740_codec->codec);
477
478	iounmap(jz4740_codec->base);
479	release_mem_region(mem->start, resource_size(mem));
480
481	platform_set_drvdata(pdev, NULL);
482	kfree(jz4740_codec);
483
484	return 0;
485}
486
487static struct platform_driver jz4740_codec_driver = {
488	.probe = jz4740_codec_probe,
489	.remove = __devexit_p(jz4740_codec_remove),
490	.driver = {
491		.name = "jz4740-codec",
492		.owner = THIS_MODULE,
493	},
494};
495
496static int __init jz4740_codec_init(void)
497{
498	return platform_driver_register(&jz4740_codec_driver);
499}
500module_init(jz4740_codec_init);
501
502static void __exit jz4740_codec_exit(void)
503{
504	platform_driver_unregister(&jz4740_codec_driver);
505}
506module_exit(jz4740_codec_exit);
507
508MODULE_DESCRIPTION("JZ4740 SoC internal codec driver");
509MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
510MODULE_LICENSE("GPL v2");
511MODULE_ALIAS("platform:jz4740-codec");
512