1/********************************************************************* 2 * 3 * Turtle Beach MultiSound Sound Card Driver for Linux 4 * Linux 2.0/2.2 Version 5 * 6 * msnd_pinnacle.c / msnd_classic.c 7 * 8 * -- If MSND_CLASSIC is defined: 9 * 10 * -> driver for Turtle Beach Classic/Monterey/Tahiti 11 * 12 * -- Else 13 * 14 * -> driver for Turtle Beach Pinnacle/Fiji 15 * 16 * Copyright (C) 1998 Andrew Veliath 17 * 18 * This program is free software; you can redistribute it and/or modify 19 * it under the terms of the GNU General Public License as published by 20 * the Free Software Foundation; either version 2 of the License, or 21 * (at your option) any later version. 22 * 23 * This program is distributed in the hope that it will be useful, 24 * but WITHOUT ANY WARRANTY; without even the implied warranty of 25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 26 * GNU General Public License for more details. 27 * 28 * You should have received a copy of the GNU General Public License 29 * along with this program; if not, write to the Free Software 30 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 31 * 32 * 12-3-2000 Modified IO port validation Steve Sycamore 33 * 34 ********************************************************************/ 35 36#include <linux/kernel.h> 37#include <linux/module.h> 38#include <linux/types.h> 39#include <linux/delay.h> 40#include <linux/init.h> 41#include <linux/interrupt.h> 42#include <linux/smp_lock.h> 43#include <linux/gfp.h> 44#include <asm/irq.h> 45#include <asm/io.h> 46#include "sound_config.h" 47#include "sound_firmware.h" 48#ifdef MSND_CLASSIC 49# ifndef __alpha__ 50# define SLOWIO 51# endif 52#endif 53#include "msnd.h" 54#ifdef MSND_CLASSIC 55# ifdef CONFIG_MSNDCLAS_HAVE_BOOT 56# define HAVE_DSPCODEH 57# endif 58# include "msnd_classic.h" 59# define LOGNAME "msnd_classic" 60#else 61# ifdef CONFIG_MSNDPIN_HAVE_BOOT 62# define HAVE_DSPCODEH 63# endif 64# include "msnd_pinnacle.h" 65# define LOGNAME "msnd_pinnacle" 66#endif 67 68#ifndef CONFIG_MSND_WRITE_NDELAY 69# define CONFIG_MSND_WRITE_NDELAY 1 70#endif 71 72#define get_play_delay_jiffies(size) ((size) * HZ * \ 73 dev.play_sample_size / 8 / \ 74 dev.play_sample_rate / \ 75 dev.play_channels) 76 77#define get_rec_delay_jiffies(size) ((size) * HZ * \ 78 dev.rec_sample_size / 8 / \ 79 dev.rec_sample_rate / \ 80 dev.rec_channels) 81 82static multisound_dev_t dev; 83 84#ifndef HAVE_DSPCODEH 85static char *dspini, *permini; 86static int sizeof_dspini, sizeof_permini; 87#endif 88 89static int dsp_full_reset(void); 90static void dsp_write_flush(void); 91 92static __inline__ int chk_send_dsp_cmd(multisound_dev_t *dev, register BYTE cmd) 93{ 94 if (msnd_send_dsp_cmd(dev, cmd) == 0) 95 return 0; 96 dsp_full_reset(); 97 return msnd_send_dsp_cmd(dev, cmd); 98} 99 100static void reset_play_queue(void) 101{ 102 int n; 103 LPDAQD lpDAQ; 104 105 dev.last_playbank = -1; 106 writew(PCTODSP_OFFSET(0 * DAQDS__size), dev.DAPQ + JQS_wHead); 107 writew(PCTODSP_OFFSET(0 * DAQDS__size), dev.DAPQ + JQS_wTail); 108 109 for (n = 0, lpDAQ = dev.base + DAPQ_DATA_BUFF; n < 3; ++n, lpDAQ += DAQDS__size) { 110 writew(PCTODSP_BASED((DWORD)(DAP_BUFF_SIZE * n)), lpDAQ + DAQDS_wStart); 111 writew(0, lpDAQ + DAQDS_wSize); 112 writew(1, lpDAQ + DAQDS_wFormat); 113 writew(dev.play_sample_size, lpDAQ + DAQDS_wSampleSize); 114 writew(dev.play_channels, lpDAQ + DAQDS_wChannels); 115 writew(dev.play_sample_rate, lpDAQ + DAQDS_wSampleRate); 116 writew(HIMT_PLAY_DONE * 0x100 + n, lpDAQ + DAQDS_wIntMsg); 117 writew(n, lpDAQ + DAQDS_wFlags); 118 } 119} 120 121static void reset_record_queue(void) 122{ 123 int n; 124 LPDAQD lpDAQ; 125 unsigned long flags; 126 127 dev.last_recbank = 2; 128 writew(PCTODSP_OFFSET(0 * DAQDS__size), dev.DARQ + JQS_wHead); 129 writew(PCTODSP_OFFSET(dev.last_recbank * DAQDS__size), dev.DARQ + JQS_wTail); 130 131 /* Critical section: bank 1 access */ 132 spin_lock_irqsave(&dev.lock, flags); 133 msnd_outb(HPBLKSEL_1, dev.io + HP_BLKS); 134 memset_io(dev.base, 0, DAR_BUFF_SIZE * 3); 135 msnd_outb(HPBLKSEL_0, dev.io + HP_BLKS); 136 spin_unlock_irqrestore(&dev.lock, flags); 137 138 for (n = 0, lpDAQ = dev.base + DARQ_DATA_BUFF; n < 3; ++n, lpDAQ += DAQDS__size) { 139 writew(PCTODSP_BASED((DWORD)(DAR_BUFF_SIZE * n)) + 0x4000, lpDAQ + DAQDS_wStart); 140 writew(DAR_BUFF_SIZE, lpDAQ + DAQDS_wSize); 141 writew(1, lpDAQ + DAQDS_wFormat); 142 writew(dev.rec_sample_size, lpDAQ + DAQDS_wSampleSize); 143 writew(dev.rec_channels, lpDAQ + DAQDS_wChannels); 144 writew(dev.rec_sample_rate, lpDAQ + DAQDS_wSampleRate); 145 writew(HIMT_RECORD_DONE * 0x100 + n, lpDAQ + DAQDS_wIntMsg); 146 writew(n, lpDAQ + DAQDS_wFlags); 147 } 148} 149 150static void reset_queues(void) 151{ 152 if (dev.mode & FMODE_WRITE) { 153 msnd_fifo_make_empty(&dev.DAPF); 154 reset_play_queue(); 155 } 156 if (dev.mode & FMODE_READ) { 157 msnd_fifo_make_empty(&dev.DARF); 158 reset_record_queue(); 159 } 160} 161 162static int dsp_set_format(struct file *file, int val) 163{ 164 int data, i; 165 LPDAQD lpDAQ, lpDARQ; 166 167 lpDAQ = dev.base + DAPQ_DATA_BUFF; 168 lpDARQ = dev.base + DARQ_DATA_BUFF; 169 170 switch (val) { 171 case AFMT_U8: 172 case AFMT_S16_LE: 173 data = val; 174 break; 175 default: 176 data = DEFSAMPLESIZE; 177 break; 178 } 179 180 for (i = 0; i < 3; ++i, lpDAQ += DAQDS__size, lpDARQ += DAQDS__size) { 181 if (file->f_mode & FMODE_WRITE) 182 writew(data, lpDAQ + DAQDS_wSampleSize); 183 if (file->f_mode & FMODE_READ) 184 writew(data, lpDARQ + DAQDS_wSampleSize); 185 } 186 if (file->f_mode & FMODE_WRITE) 187 dev.play_sample_size = data; 188 if (file->f_mode & FMODE_READ) 189 dev.rec_sample_size = data; 190 191 return data; 192} 193 194static int dsp_get_frag_size(void) 195{ 196 int size; 197 size = dev.fifosize / 4; 198 if (size > 32 * 1024) 199 size = 32 * 1024; 200 return size; 201} 202 203static int dsp_ioctl(struct file *file, unsigned int cmd, unsigned long arg) 204{ 205 int val, i, data, tmp; 206 LPDAQD lpDAQ, lpDARQ; 207 audio_buf_info abinfo; 208 unsigned long flags; 209 int __user *p = (int __user *)arg; 210 211 lpDAQ = dev.base + DAPQ_DATA_BUFF; 212 lpDARQ = dev.base + DARQ_DATA_BUFF; 213 214 switch (cmd) { 215 case SNDCTL_DSP_SUBDIVIDE: 216 case SNDCTL_DSP_SETFRAGMENT: 217 case SNDCTL_DSP_SETDUPLEX: 218 case SNDCTL_DSP_POST: 219 return 0; 220 221 case SNDCTL_DSP_GETIPTR: 222 case SNDCTL_DSP_GETOPTR: 223 case SNDCTL_DSP_MAPINBUF: 224 case SNDCTL_DSP_MAPOUTBUF: 225 return -EINVAL; 226 227 case SNDCTL_DSP_GETOSPACE: 228 if (!(file->f_mode & FMODE_WRITE)) 229 return -EINVAL; 230 spin_lock_irqsave(&dev.lock, flags); 231 abinfo.fragsize = dsp_get_frag_size(); 232 abinfo.bytes = dev.DAPF.n - dev.DAPF.len; 233 abinfo.fragstotal = dev.DAPF.n / abinfo.fragsize; 234 abinfo.fragments = abinfo.bytes / abinfo.fragsize; 235 spin_unlock_irqrestore(&dev.lock, flags); 236 return copy_to_user((void __user *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0; 237 238 case SNDCTL_DSP_GETISPACE: 239 if (!(file->f_mode & FMODE_READ)) 240 return -EINVAL; 241 spin_lock_irqsave(&dev.lock, flags); 242 abinfo.fragsize = dsp_get_frag_size(); 243 abinfo.bytes = dev.DARF.n - dev.DARF.len; 244 abinfo.fragstotal = dev.DARF.n / abinfo.fragsize; 245 abinfo.fragments = abinfo.bytes / abinfo.fragsize; 246 spin_unlock_irqrestore(&dev.lock, flags); 247 return copy_to_user((void __user *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0; 248 249 case SNDCTL_DSP_RESET: 250 dev.nresets = 0; 251 reset_queues(); 252 return 0; 253 254 case SNDCTL_DSP_SYNC: 255 dsp_write_flush(); 256 return 0; 257 258 case SNDCTL_DSP_GETBLKSIZE: 259 tmp = dsp_get_frag_size(); 260 if (put_user(tmp, p)) 261 return -EFAULT; 262 return 0; 263 264 case SNDCTL_DSP_GETFMTS: 265 val = AFMT_S16_LE | AFMT_U8; 266 if (put_user(val, p)) 267 return -EFAULT; 268 return 0; 269 270 case SNDCTL_DSP_SETFMT: 271 if (get_user(val, p)) 272 return -EFAULT; 273 274 if (file->f_mode & FMODE_WRITE) 275 data = val == AFMT_QUERY 276 ? dev.play_sample_size 277 : dsp_set_format(file, val); 278 else 279 data = val == AFMT_QUERY 280 ? dev.rec_sample_size 281 : dsp_set_format(file, val); 282 283 if (put_user(data, p)) 284 return -EFAULT; 285 return 0; 286 287 case SNDCTL_DSP_NONBLOCK: 288 if (!test_bit(F_DISABLE_WRITE_NDELAY, &dev.flags) && 289 file->f_mode & FMODE_WRITE) 290 dev.play_ndelay = 1; 291 if (file->f_mode & FMODE_READ) 292 dev.rec_ndelay = 1; 293 return 0; 294 295 case SNDCTL_DSP_GETCAPS: 296 val = DSP_CAP_DUPLEX | DSP_CAP_BATCH; 297 if (put_user(val, p)) 298 return -EFAULT; 299 return 0; 300 301 case SNDCTL_DSP_SPEED: 302 if (get_user(val, p)) 303 return -EFAULT; 304 305 if (val < 8000) 306 val = 8000; 307 308 if (val > 48000) 309 val = 48000; 310 311 data = val; 312 313 for (i = 0; i < 3; ++i, lpDAQ += DAQDS__size, lpDARQ += DAQDS__size) { 314 if (file->f_mode & FMODE_WRITE) 315 writew(data, lpDAQ + DAQDS_wSampleRate); 316 if (file->f_mode & FMODE_READ) 317 writew(data, lpDARQ + DAQDS_wSampleRate); 318 } 319 if (file->f_mode & FMODE_WRITE) 320 dev.play_sample_rate = data; 321 if (file->f_mode & FMODE_READ) 322 dev.rec_sample_rate = data; 323 324 if (put_user(data, p)) 325 return -EFAULT; 326 return 0; 327 328 case SNDCTL_DSP_CHANNELS: 329 case SNDCTL_DSP_STEREO: 330 if (get_user(val, p)) 331 return -EFAULT; 332 333 if (cmd == SNDCTL_DSP_CHANNELS) { 334 switch (val) { 335 case 1: 336 case 2: 337 data = val; 338 break; 339 default: 340 val = data = 2; 341 break; 342 } 343 } else { 344 switch (val) { 345 case 0: 346 data = 1; 347 break; 348 default: 349 val = 1; 350 case 1: 351 data = 2; 352 break; 353 } 354 } 355 356 for (i = 0; i < 3; ++i, lpDAQ += DAQDS__size, lpDARQ += DAQDS__size) { 357 if (file->f_mode & FMODE_WRITE) 358 writew(data, lpDAQ + DAQDS_wChannels); 359 if (file->f_mode & FMODE_READ) 360 writew(data, lpDARQ + DAQDS_wChannels); 361 } 362 if (file->f_mode & FMODE_WRITE) 363 dev.play_channels = data; 364 if (file->f_mode & FMODE_READ) 365 dev.rec_channels = data; 366 367 if (put_user(val, p)) 368 return -EFAULT; 369 return 0; 370 } 371 372 return -EINVAL; 373} 374 375static int mixer_get(int d) 376{ 377 if (d > 31) 378 return -EINVAL; 379 380 switch (d) { 381 case SOUND_MIXER_VOLUME: 382 case SOUND_MIXER_PCM: 383 case SOUND_MIXER_LINE: 384 case SOUND_MIXER_IMIX: 385 case SOUND_MIXER_LINE1: 386#ifndef MSND_CLASSIC 387 case SOUND_MIXER_MIC: 388 case SOUND_MIXER_SYNTH: 389#endif 390 return (dev.left_levels[d] >> 8) * 100 / 0xff | 391 (((dev.right_levels[d] >> 8) * 100 / 0xff) << 8); 392 default: 393 return 0; 394 } 395} 396 397#define update_volm(a,b) \ 398 writew((dev.left_levels[a] >> 1) * \ 399 readw(dev.SMA + SMA_wCurrMastVolLeft) / 0xffff, \ 400 dev.SMA + SMA_##b##Left); \ 401 writew((dev.right_levels[a] >> 1) * \ 402 readw(dev.SMA + SMA_wCurrMastVolRight) / 0xffff, \ 403 dev.SMA + SMA_##b##Right); 404 405#define update_potm(d,s,ar) \ 406 writeb((dev.left_levels[d] >> 8) * \ 407 readw(dev.SMA + SMA_wCurrMastVolLeft) / 0xffff, \ 408 dev.SMA + SMA_##s##Left); \ 409 writeb((dev.right_levels[d] >> 8) * \ 410 readw(dev.SMA + SMA_wCurrMastVolRight) / 0xffff, \ 411 dev.SMA + SMA_##s##Right); \ 412 if (msnd_send_word(&dev, 0, 0, ar) == 0) \ 413 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ); 414 415#define update_pot(d,s,ar) \ 416 writeb(dev.left_levels[d] >> 8, \ 417 dev.SMA + SMA_##s##Left); \ 418 writeb(dev.right_levels[d] >> 8, \ 419 dev.SMA + SMA_##s##Right); \ 420 if (msnd_send_word(&dev, 0, 0, ar) == 0) \ 421 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ); 422 423static int mixer_set(int d, int value) 424{ 425 int left = value & 0x000000ff; 426 int right = (value & 0x0000ff00) >> 8; 427 int bLeft, bRight; 428 int wLeft, wRight; 429 int updatemaster = 0; 430 431 if (d > 31) 432 return -EINVAL; 433 434 bLeft = left * 0xff / 100; 435 wLeft = left * 0xffff / 100; 436 437 bRight = right * 0xff / 100; 438 wRight = right * 0xffff / 100; 439 440 dev.left_levels[d] = wLeft; 441 dev.right_levels[d] = wRight; 442 443 switch (d) { 444 /* master volume unscaled controls */ 445 case SOUND_MIXER_LINE: /* line pot control */ 446 /* scaled by IMIX in digital mix */ 447 writeb(bLeft, dev.SMA + SMA_bInPotPosLeft); 448 writeb(bRight, dev.SMA + SMA_bInPotPosRight); 449 if (msnd_send_word(&dev, 0, 0, HDEXAR_IN_SET_POTS) == 0) 450 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ); 451 break; 452#ifndef MSND_CLASSIC 453 case SOUND_MIXER_MIC: /* mic pot control */ 454 /* scaled by IMIX in digital mix */ 455 writeb(bLeft, dev.SMA + SMA_bMicPotPosLeft); 456 writeb(bRight, dev.SMA + SMA_bMicPotPosRight); 457 if (msnd_send_word(&dev, 0, 0, HDEXAR_MIC_SET_POTS) == 0) 458 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ); 459 break; 460#endif 461 case SOUND_MIXER_VOLUME: /* master volume */ 462 writew(wLeft, dev.SMA + SMA_wCurrMastVolLeft); 463 writew(wRight, dev.SMA + SMA_wCurrMastVolRight); 464 /* fall through */ 465 466 case SOUND_MIXER_LINE1: /* aux pot control */ 467 /* scaled by master volume */ 468 /* fall through */ 469 470 /* digital controls */ 471 case SOUND_MIXER_SYNTH: /* synth vol (dsp mix) */ 472 case SOUND_MIXER_PCM: /* pcm vol (dsp mix) */ 473 case SOUND_MIXER_IMIX: /* input monitor (dsp mix) */ 474 /* scaled by master volume */ 475 updatemaster = 1; 476 break; 477 478 default: 479 return 0; 480 } 481 482 if (updatemaster) { 483 /* update master volume scaled controls */ 484 update_volm(SOUND_MIXER_PCM, wCurrPlayVol); 485 update_volm(SOUND_MIXER_IMIX, wCurrInVol); 486#ifndef MSND_CLASSIC 487 update_volm(SOUND_MIXER_SYNTH, wCurrMHdrVol); 488#endif 489 update_potm(SOUND_MIXER_LINE1, bAuxPotPos, HDEXAR_AUX_SET_POTS); 490 } 491 492 return mixer_get(d); 493} 494 495static void mixer_setup(void) 496{ 497 update_pot(SOUND_MIXER_LINE, bInPotPos, HDEXAR_IN_SET_POTS); 498 update_potm(SOUND_MIXER_LINE1, bAuxPotPos, HDEXAR_AUX_SET_POTS); 499 update_volm(SOUND_MIXER_PCM, wCurrPlayVol); 500 update_volm(SOUND_MIXER_IMIX, wCurrInVol); 501#ifndef MSND_CLASSIC 502 update_pot(SOUND_MIXER_MIC, bMicPotPos, HDEXAR_MIC_SET_POTS); 503 update_volm(SOUND_MIXER_SYNTH, wCurrMHdrVol); 504#endif 505} 506 507static unsigned long set_recsrc(unsigned long recsrc) 508{ 509 if (dev.recsrc == recsrc) 510 return dev.recsrc; 511#ifdef HAVE_NORECSRC 512 else if (recsrc == 0) 513 dev.recsrc = 0; 514#endif 515 else 516 dev.recsrc ^= recsrc; 517 518#ifndef MSND_CLASSIC 519 if (dev.recsrc & SOUND_MASK_IMIX) { 520 if (msnd_send_word(&dev, 0, 0, HDEXAR_SET_ANA_IN) == 0) 521 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ); 522 } 523 else if (dev.recsrc & SOUND_MASK_SYNTH) { 524 if (msnd_send_word(&dev, 0, 0, HDEXAR_SET_SYNTH_IN) == 0) 525 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ); 526 } 527 else if ((dev.recsrc & SOUND_MASK_DIGITAL1) && test_bit(F_HAVEDIGITAL, &dev.flags)) { 528 if (msnd_send_word(&dev, 0, 0, HDEXAR_SET_DAT_IN) == 0) 529 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ); 530 } 531 else { 532#ifdef HAVE_NORECSRC 533 /* Select no input (?) */ 534 dev.recsrc = 0; 535#else 536 dev.recsrc = SOUND_MASK_IMIX; 537 if (msnd_send_word(&dev, 0, 0, HDEXAR_SET_ANA_IN) == 0) 538 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ); 539#endif 540 } 541#endif /* MSND_CLASSIC */ 542 543 return dev.recsrc; 544} 545 546static unsigned long force_recsrc(unsigned long recsrc) 547{ 548 dev.recsrc = 0; 549 return set_recsrc(recsrc); 550} 551 552#define set_mixer_info() \ 553 memset(&info, 0, sizeof(info)); \ 554 strlcpy(info.id, "MSNDMIXER", sizeof(info.id)); \ 555 strlcpy(info.name, "MultiSound Mixer", sizeof(info.name)); 556 557static int mixer_ioctl(unsigned int cmd, unsigned long arg) 558{ 559 if (cmd == SOUND_MIXER_INFO) { 560 mixer_info info; 561 set_mixer_info(); 562 info.modify_counter = dev.mixer_mod_count; 563 if (copy_to_user((void __user *)arg, &info, sizeof(info))) 564 return -EFAULT; 565 return 0; 566 } else if (cmd == SOUND_OLD_MIXER_INFO) { 567 _old_mixer_info info; 568 set_mixer_info(); 569 if (copy_to_user((void __user *)arg, &info, sizeof(info))) 570 return -EFAULT; 571 return 0; 572 } else if (cmd == SOUND_MIXER_PRIVATE1) { 573 dev.nresets = 0; 574 dsp_full_reset(); 575 return 0; 576 } else if (((cmd >> 8) & 0xff) == 'M') { 577 int val = 0; 578 579 if (_SIOC_DIR(cmd) & _SIOC_WRITE) { 580 switch (cmd & 0xff) { 581 case SOUND_MIXER_RECSRC: 582 if (get_user(val, (int __user *)arg)) 583 return -EFAULT; 584 val = set_recsrc(val); 585 break; 586 587 default: 588 if (get_user(val, (int __user *)arg)) 589 return -EFAULT; 590 val = mixer_set(cmd & 0xff, val); 591 break; 592 } 593 ++dev.mixer_mod_count; 594 return put_user(val, (int __user *)arg); 595 } else { 596 switch (cmd & 0xff) { 597 case SOUND_MIXER_RECSRC: 598 val = dev.recsrc; 599 break; 600 601 case SOUND_MIXER_DEVMASK: 602 case SOUND_MIXER_STEREODEVS: 603 val = SOUND_MASK_PCM | 604 SOUND_MASK_LINE | 605 SOUND_MASK_IMIX | 606 SOUND_MASK_LINE1 | 607#ifndef MSND_CLASSIC 608 SOUND_MASK_MIC | 609 SOUND_MASK_SYNTH | 610#endif 611 SOUND_MASK_VOLUME; 612 break; 613 614 case SOUND_MIXER_RECMASK: 615#ifdef MSND_CLASSIC 616 val = 0; 617#else 618 val = SOUND_MASK_IMIX | 619 SOUND_MASK_SYNTH; 620 if (test_bit(F_HAVEDIGITAL, &dev.flags)) 621 val |= SOUND_MASK_DIGITAL1; 622#endif 623 break; 624 625 case SOUND_MIXER_CAPS: 626 val = SOUND_CAP_EXCL_INPUT; 627 break; 628 629 default: 630 if ((val = mixer_get(cmd & 0xff)) < 0) 631 return -EINVAL; 632 break; 633 } 634 } 635 636 return put_user(val, (int __user *)arg); 637 } 638 639 return -EINVAL; 640} 641 642static long dev_ioctl(struct file *file, unsigned int cmd, unsigned long arg) 643{ 644 int minor = iminor(file->f_path.dentry->d_inode); 645 int ret; 646 647 if (cmd == OSS_GETVERSION) { 648 int sound_version = SOUND_VERSION; 649 return put_user(sound_version, (int __user *)arg); 650 } 651 652 ret = -EINVAL; 653 654 lock_kernel(); 655 if (minor == dev.dsp_minor) 656 ret = dsp_ioctl(file, cmd, arg); 657 else if (minor == dev.mixer_minor) 658 ret = mixer_ioctl(cmd, arg); 659 unlock_kernel(); 660 661 return ret; 662} 663 664static void dsp_write_flush(void) 665{ 666 if (!(dev.mode & FMODE_WRITE) || !test_bit(F_WRITING, &dev.flags)) 667 return; 668 set_bit(F_WRITEFLUSH, &dev.flags); 669 interruptible_sleep_on_timeout( 670 &dev.writeflush, 671 get_play_delay_jiffies(dev.DAPF.len)); 672 clear_bit(F_WRITEFLUSH, &dev.flags); 673 if (!signal_pending(current)) { 674 current->state = TASK_INTERRUPTIBLE; 675 schedule_timeout(get_play_delay_jiffies(DAP_BUFF_SIZE)); 676 } 677 clear_bit(F_WRITING, &dev.flags); 678} 679 680static void dsp_halt(struct file *file) 681{ 682 if ((file ? file->f_mode : dev.mode) & FMODE_READ) { 683 clear_bit(F_READING, &dev.flags); 684 chk_send_dsp_cmd(&dev, HDEX_RECORD_STOP); 685 msnd_disable_irq(&dev); 686 if (file) { 687 printk(KERN_DEBUG LOGNAME ": Stopping read for %p\n", file); 688 dev.mode &= ~FMODE_READ; 689 } 690 clear_bit(F_AUDIO_READ_INUSE, &dev.flags); 691 } 692 if ((file ? file->f_mode : dev.mode) & FMODE_WRITE) { 693 if (test_bit(F_WRITING, &dev.flags)) { 694 dsp_write_flush(); 695 chk_send_dsp_cmd(&dev, HDEX_PLAY_STOP); 696 } 697 msnd_disable_irq(&dev); 698 if (file) { 699 printk(KERN_DEBUG LOGNAME ": Stopping write for %p\n", file); 700 dev.mode &= ~FMODE_WRITE; 701 } 702 clear_bit(F_AUDIO_WRITE_INUSE, &dev.flags); 703 } 704} 705 706static int dsp_release(struct file *file) 707{ 708 dsp_halt(file); 709 return 0; 710} 711 712static int dsp_open(struct file *file) 713{ 714 if ((file ? file->f_mode : dev.mode) & FMODE_WRITE) { 715 set_bit(F_AUDIO_WRITE_INUSE, &dev.flags); 716 clear_bit(F_WRITING, &dev.flags); 717 msnd_fifo_make_empty(&dev.DAPF); 718 reset_play_queue(); 719 if (file) { 720 printk(KERN_DEBUG LOGNAME ": Starting write for %p\n", file); 721 dev.mode |= FMODE_WRITE; 722 } 723 msnd_enable_irq(&dev); 724 } 725 if ((file ? file->f_mode : dev.mode) & FMODE_READ) { 726 set_bit(F_AUDIO_READ_INUSE, &dev.flags); 727 clear_bit(F_READING, &dev.flags); 728 msnd_fifo_make_empty(&dev.DARF); 729 reset_record_queue(); 730 if (file) { 731 printk(KERN_DEBUG LOGNAME ": Starting read for %p\n", file); 732 dev.mode |= FMODE_READ; 733 } 734 msnd_enable_irq(&dev); 735 } 736 return 0; 737} 738 739static void set_default_play_audio_parameters(void) 740{ 741 dev.play_sample_size = DEFSAMPLESIZE; 742 dev.play_sample_rate = DEFSAMPLERATE; 743 dev.play_channels = DEFCHANNELS; 744} 745 746static void set_default_rec_audio_parameters(void) 747{ 748 dev.rec_sample_size = DEFSAMPLESIZE; 749 dev.rec_sample_rate = DEFSAMPLERATE; 750 dev.rec_channels = DEFCHANNELS; 751} 752 753static void set_default_audio_parameters(void) 754{ 755 set_default_play_audio_parameters(); 756 set_default_rec_audio_parameters(); 757} 758 759static int dev_open(struct inode *inode, struct file *file) 760{ 761 int minor = iminor(inode); 762 int err = 0; 763 764 lock_kernel(); 765 if (minor == dev.dsp_minor) { 766 if ((file->f_mode & FMODE_WRITE && 767 test_bit(F_AUDIO_WRITE_INUSE, &dev.flags)) || 768 (file->f_mode & FMODE_READ && 769 test_bit(F_AUDIO_READ_INUSE, &dev.flags))) { 770 err = -EBUSY; 771 goto out; 772 } 773 774 if ((err = dsp_open(file)) >= 0) { 775 dev.nresets = 0; 776 if (file->f_mode & FMODE_WRITE) { 777 set_default_play_audio_parameters(); 778 if (!test_bit(F_DISABLE_WRITE_NDELAY, &dev.flags)) 779 dev.play_ndelay = (file->f_flags & O_NDELAY) ? 1 : 0; 780 else 781 dev.play_ndelay = 0; 782 } 783 if (file->f_mode & FMODE_READ) { 784 set_default_rec_audio_parameters(); 785 dev.rec_ndelay = (file->f_flags & O_NDELAY) ? 1 : 0; 786 } 787 } 788 } 789 else if (minor == dev.mixer_minor) { 790 /* nothing */ 791 } else 792 err = -EINVAL; 793out: 794 unlock_kernel(); 795 return err; 796} 797 798static int dev_release(struct inode *inode, struct file *file) 799{ 800 int minor = iminor(inode); 801 int err = 0; 802 803 lock_kernel(); 804 if (minor == dev.dsp_minor) 805 err = dsp_release(file); 806 else if (minor == dev.mixer_minor) { 807 /* nothing */ 808 } else 809 err = -EINVAL; 810 unlock_kernel(); 811 return err; 812} 813 814static __inline__ int pack_DARQ_to_DARF(register int bank) 815{ 816 register int size, timeout = 3; 817 register WORD wTmp; 818 LPDAQD DAQD; 819 820 /* Increment the tail and check for queue wrap */ 821 wTmp = readw(dev.DARQ + JQS_wTail) + PCTODSP_OFFSET(DAQDS__size); 822 if (wTmp > readw(dev.DARQ + JQS_wSize)) 823 wTmp = 0; 824 while (wTmp == readw(dev.DARQ + JQS_wHead) && timeout--) 825 udelay(1); 826 writew(wTmp, dev.DARQ + JQS_wTail); 827 828 /* Get our digital audio queue struct */ 829 DAQD = bank * DAQDS__size + dev.base + DARQ_DATA_BUFF; 830 831 /* Get length of data */ 832 size = readw(DAQD + DAQDS_wSize); 833 834 /* Read data from the head (unprotected bank 1 access okay 835 since this is only called inside an interrupt) */ 836 msnd_outb(HPBLKSEL_1, dev.io + HP_BLKS); 837 msnd_fifo_write_io( 838 &dev.DARF, 839 dev.base + bank * DAR_BUFF_SIZE, 840 size); 841 msnd_outb(HPBLKSEL_0, dev.io + HP_BLKS); 842 843 return 1; 844} 845 846static __inline__ int pack_DAPF_to_DAPQ(register int start) 847{ 848 register WORD DAPQ_tail; 849 register int protect = start, nbanks = 0; 850 LPDAQD DAQD; 851 852 DAPQ_tail = readw(dev.DAPQ + JQS_wTail); 853 while (DAPQ_tail != readw(dev.DAPQ + JQS_wHead) || start) { 854 register int bank_num = DAPQ_tail / PCTODSP_OFFSET(DAQDS__size); 855 register int n; 856 unsigned long flags; 857 858 /* Write the data to the new tail */ 859 if (protect) { 860 /* Critical section: protect fifo in non-interrupt */ 861 spin_lock_irqsave(&dev.lock, flags); 862 n = msnd_fifo_read_io( 863 &dev.DAPF, 864 dev.base + bank_num * DAP_BUFF_SIZE, 865 DAP_BUFF_SIZE); 866 spin_unlock_irqrestore(&dev.lock, flags); 867 } else { 868 n = msnd_fifo_read_io( 869 &dev.DAPF, 870 dev.base + bank_num * DAP_BUFF_SIZE, 871 DAP_BUFF_SIZE); 872 } 873 if (!n) 874 break; 875 876 if (start) 877 start = 0; 878 879 /* Get our digital audio queue struct */ 880 DAQD = bank_num * DAQDS__size + dev.base + DAPQ_DATA_BUFF; 881 882 /* Write size of this bank */ 883 writew(n, DAQD + DAQDS_wSize); 884 ++nbanks; 885 886 /* Then advance the tail */ 887 DAPQ_tail = (++bank_num % 3) * PCTODSP_OFFSET(DAQDS__size); 888 writew(DAPQ_tail, dev.DAPQ + JQS_wTail); 889 /* Tell the DSP to play the bank */ 890 msnd_send_dsp_cmd(&dev, HDEX_PLAY_START); 891 } 892 return nbanks; 893} 894 895static int dsp_read(char __user *buf, size_t len) 896{ 897 int count = len; 898 char *page = (char *)__get_free_page(GFP_KERNEL); 899 900 if (!page) 901 return -ENOMEM; 902 903 while (count > 0) { 904 int n, k; 905 unsigned long flags; 906 907 k = PAGE_SIZE; 908 if (k > count) 909 k = count; 910 911 /* Critical section: protect fifo in non-interrupt */ 912 spin_lock_irqsave(&dev.lock, flags); 913 n = msnd_fifo_read(&dev.DARF, page, k); 914 spin_unlock_irqrestore(&dev.lock, flags); 915 if (copy_to_user(buf, page, n)) { 916 free_page((unsigned long)page); 917 return -EFAULT; 918 } 919 buf += n; 920 count -= n; 921 922 if (n == k && count) 923 continue; 924 925 if (!test_bit(F_READING, &dev.flags) && dev.mode & FMODE_READ) { 926 dev.last_recbank = -1; 927 if (chk_send_dsp_cmd(&dev, HDEX_RECORD_START) == 0) 928 set_bit(F_READING, &dev.flags); 929 } 930 931 if (dev.rec_ndelay) { 932 free_page((unsigned long)page); 933 return count == len ? -EAGAIN : len - count; 934 } 935 936 if (count > 0) { 937 set_bit(F_READBLOCK, &dev.flags); 938 if (!interruptible_sleep_on_timeout( 939 &dev.readblock, 940 get_rec_delay_jiffies(DAR_BUFF_SIZE))) 941 clear_bit(F_READING, &dev.flags); 942 clear_bit(F_READBLOCK, &dev.flags); 943 if (signal_pending(current)) { 944 free_page((unsigned long)page); 945 return -EINTR; 946 } 947 } 948 } 949 free_page((unsigned long)page); 950 return len - count; 951} 952 953static int dsp_write(const char __user *buf, size_t len) 954{ 955 int count = len; 956 char *page = (char *)__get_free_page(GFP_KERNEL); 957 958 if (!page) 959 return -ENOMEM; 960 961 while (count > 0) { 962 int n, k; 963 unsigned long flags; 964 965 k = PAGE_SIZE; 966 if (k > count) 967 k = count; 968 969 if (copy_from_user(page, buf, k)) { 970 free_page((unsigned long)page); 971 return -EFAULT; 972 } 973 974 /* Critical section: protect fifo in non-interrupt */ 975 spin_lock_irqsave(&dev.lock, flags); 976 n = msnd_fifo_write(&dev.DAPF, page, k); 977 spin_unlock_irqrestore(&dev.lock, flags); 978 buf += n; 979 count -= n; 980 981 if (count && n == k) 982 continue; 983 984 if (!test_bit(F_WRITING, &dev.flags) && (dev.mode & FMODE_WRITE)) { 985 dev.last_playbank = -1; 986 if (pack_DAPF_to_DAPQ(1) > 0) 987 set_bit(F_WRITING, &dev.flags); 988 } 989 990 if (dev.play_ndelay) { 991 free_page((unsigned long)page); 992 return count == len ? -EAGAIN : len - count; 993 } 994 995 if (count > 0) { 996 set_bit(F_WRITEBLOCK, &dev.flags); 997 interruptible_sleep_on_timeout( 998 &dev.writeblock, 999 get_play_delay_jiffies(DAP_BUFF_SIZE)); 1000 clear_bit(F_WRITEBLOCK, &dev.flags); 1001 if (signal_pending(current)) { 1002 free_page((unsigned long)page); 1003 return -EINTR; 1004 } 1005 } 1006 } 1007 1008 free_page((unsigned long)page); 1009 return len - count; 1010} 1011 1012static ssize_t dev_read(struct file *file, char __user *buf, size_t count, loff_t *off) 1013{ 1014 int minor = iminor(file->f_path.dentry->d_inode); 1015 if (minor == dev.dsp_minor) 1016 return dsp_read(buf, count); 1017 else 1018 return -EINVAL; 1019} 1020 1021static ssize_t dev_write(struct file *file, const char __user *buf, size_t count, loff_t *off) 1022{ 1023 int minor = iminor(file->f_path.dentry->d_inode); 1024 if (minor == dev.dsp_minor) 1025 return dsp_write(buf, count); 1026 else 1027 return -EINVAL; 1028} 1029 1030static __inline__ void eval_dsp_msg(register WORD wMessage) 1031{ 1032 switch (HIBYTE(wMessage)) { 1033 case HIMT_PLAY_DONE: 1034 if (dev.last_playbank == LOBYTE(wMessage) || !test_bit(F_WRITING, &dev.flags)) 1035 break; 1036 dev.last_playbank = LOBYTE(wMessage); 1037 1038 if (pack_DAPF_to_DAPQ(0) <= 0) { 1039 if (!test_bit(F_WRITEBLOCK, &dev.flags)) { 1040 if (test_and_clear_bit(F_WRITEFLUSH, &dev.flags)) 1041 wake_up_interruptible(&dev.writeflush); 1042 } 1043 clear_bit(F_WRITING, &dev.flags); 1044 } 1045 1046 if (test_bit(F_WRITEBLOCK, &dev.flags)) 1047 wake_up_interruptible(&dev.writeblock); 1048 break; 1049 1050 case HIMT_RECORD_DONE: 1051 if (dev.last_recbank == LOBYTE(wMessage)) 1052 break; 1053 dev.last_recbank = LOBYTE(wMessage); 1054 1055 pack_DARQ_to_DARF(dev.last_recbank); 1056 1057 if (test_bit(F_READBLOCK, &dev.flags)) 1058 wake_up_interruptible(&dev.readblock); 1059 break; 1060 1061 case HIMT_DSP: 1062 switch (LOBYTE(wMessage)) { 1063#ifndef MSND_CLASSIC 1064 case HIDSP_PLAY_UNDER: 1065#endif 1066 case HIDSP_INT_PLAY_UNDER: 1067/* printk(KERN_DEBUG LOGNAME ": Play underflow\n"); */ 1068 clear_bit(F_WRITING, &dev.flags); 1069 break; 1070 1071 case HIDSP_INT_RECORD_OVER: 1072/* printk(KERN_DEBUG LOGNAME ": Record overflow\n"); */ 1073 clear_bit(F_READING, &dev.flags); 1074 break; 1075 1076 default: 1077/* printk(KERN_DEBUG LOGNAME ": DSP message %d 0x%02x\n", 1078 LOBYTE(wMessage), LOBYTE(wMessage)); */ 1079 break; 1080 } 1081 break; 1082 1083 case HIMT_MIDI_IN_UCHAR: 1084 if (dev.midi_in_interrupt) 1085 (*dev.midi_in_interrupt)(&dev); 1086 break; 1087 1088 default: 1089/* printk(KERN_DEBUG LOGNAME ": HIMT message %d 0x%02x\n", HIBYTE(wMessage), HIBYTE(wMessage)); */ 1090 break; 1091 } 1092} 1093 1094static irqreturn_t intr(int irq, void *dev_id) 1095{ 1096 /* Send ack to DSP */ 1097 msnd_inb(dev.io + HP_RXL); 1098 1099 /* Evaluate queued DSP messages */ 1100 while (readw(dev.DSPQ + JQS_wTail) != readw(dev.DSPQ + JQS_wHead)) { 1101 register WORD wTmp; 1102 1103 eval_dsp_msg(readw(dev.pwDSPQData + 2*readw(dev.DSPQ + JQS_wHead))); 1104 1105 if ((wTmp = readw(dev.DSPQ + JQS_wHead) + 1) > readw(dev.DSPQ + JQS_wSize)) 1106 writew(0, dev.DSPQ + JQS_wHead); 1107 else 1108 writew(wTmp, dev.DSPQ + JQS_wHead); 1109 } 1110 return IRQ_HANDLED; 1111} 1112 1113static const struct file_operations dev_fileops = { 1114 .owner = THIS_MODULE, 1115 .read = dev_read, 1116 .write = dev_write, 1117 .unlocked_ioctl = dev_ioctl, 1118 .open = dev_open, 1119 .release = dev_release, 1120}; 1121 1122static int reset_dsp(void) 1123{ 1124 int timeout = 100; 1125 1126 msnd_outb(HPDSPRESET_ON, dev.io + HP_DSPR); 1127 mdelay(1); 1128#ifndef MSND_CLASSIC 1129 dev.info = msnd_inb(dev.io + HP_INFO); 1130#endif 1131 msnd_outb(HPDSPRESET_OFF, dev.io + HP_DSPR); 1132 mdelay(1); 1133 while (timeout-- > 0) { 1134 if (msnd_inb(dev.io + HP_CVR) == HP_CVR_DEF) 1135 return 0; 1136 mdelay(1); 1137 } 1138 printk(KERN_ERR LOGNAME ": Cannot reset DSP\n"); 1139 1140 return -EIO; 1141} 1142 1143static int __init probe_multisound(void) 1144{ 1145#ifndef MSND_CLASSIC 1146 char *xv, *rev = NULL; 1147 char *pin = "Pinnacle", *fiji = "Fiji"; 1148 char *pinfiji = "Pinnacle/Fiji"; 1149#endif 1150 1151 if (!request_region(dev.io, dev.numio, "probing")) { 1152 printk(KERN_ERR LOGNAME ": I/O port conflict\n"); 1153 return -ENODEV; 1154 } 1155 1156 if (reset_dsp() < 0) { 1157 release_region(dev.io, dev.numio); 1158 return -ENODEV; 1159 } 1160 1161#ifdef MSND_CLASSIC 1162 dev.name = "Classic/Tahiti/Monterey"; 1163 printk(KERN_INFO LOGNAME ": %s, " 1164#else 1165 switch (dev.info >> 4) { 1166 case 0xf: xv = "<= 1.15"; break; 1167 case 0x1: xv = "1.18/1.2"; break; 1168 case 0x2: xv = "1.3"; break; 1169 case 0x3: xv = "1.4"; break; 1170 default: xv = "unknown"; break; 1171 } 1172 1173 switch (dev.info & 0x7) { 1174 case 0x0: rev = "I"; dev.name = pin; break; 1175 case 0x1: rev = "F"; dev.name = pin; break; 1176 case 0x2: rev = "G"; dev.name = pin; break; 1177 case 0x3: rev = "H"; dev.name = pin; break; 1178 case 0x4: rev = "E"; dev.name = fiji; break; 1179 case 0x5: rev = "C"; dev.name = fiji; break; 1180 case 0x6: rev = "D"; dev.name = fiji; break; 1181 case 0x7: 1182 rev = "A-B (Fiji) or A-E (Pinnacle)"; 1183 dev.name = pinfiji; 1184 break; 1185 } 1186 printk(KERN_INFO LOGNAME ": %s revision %s, Xilinx version %s, " 1187#endif /* MSND_CLASSIC */ 1188 "I/O 0x%x-0x%x, IRQ %d, memory mapped to %p-%p\n", 1189 dev.name, 1190#ifndef MSND_CLASSIC 1191 rev, xv, 1192#endif 1193 dev.io, dev.io + dev.numio - 1, 1194 dev.irq, 1195 dev.base, dev.base + 0x7fff); 1196 1197 release_region(dev.io, dev.numio); 1198 return 0; 1199} 1200 1201static int init_sma(void) 1202{ 1203 static int initted; 1204 WORD mastVolLeft, mastVolRight; 1205 unsigned long flags; 1206 1207#ifdef MSND_CLASSIC 1208 msnd_outb(dev.memid, dev.io + HP_MEMM); 1209#endif 1210 msnd_outb(HPBLKSEL_0, dev.io + HP_BLKS); 1211 if (initted) { 1212 mastVolLeft = readw(dev.SMA + SMA_wCurrMastVolLeft); 1213 mastVolRight = readw(dev.SMA + SMA_wCurrMastVolRight); 1214 } else 1215 mastVolLeft = mastVolRight = 0; 1216 memset_io(dev.base, 0, 0x8000); 1217 1218 /* Critical section: bank 1 access */ 1219 spin_lock_irqsave(&dev.lock, flags); 1220 msnd_outb(HPBLKSEL_1, dev.io + HP_BLKS); 1221 memset_io(dev.base, 0, 0x8000); 1222 msnd_outb(HPBLKSEL_0, dev.io + HP_BLKS); 1223 spin_unlock_irqrestore(&dev.lock, flags); 1224 1225 dev.pwDSPQData = (dev.base + DSPQ_DATA_BUFF); 1226 dev.pwMODQData = (dev.base + MODQ_DATA_BUFF); 1227 dev.pwMIDQData = (dev.base + MIDQ_DATA_BUFF); 1228 1229 /* Motorola 56k shared memory base */ 1230 dev.SMA = dev.base + SMA_STRUCT_START; 1231 1232 /* Digital audio play queue */ 1233 dev.DAPQ = dev.base + DAPQ_OFFSET; 1234 msnd_init_queue(dev.DAPQ, DAPQ_DATA_BUFF, DAPQ_BUFF_SIZE); 1235 1236 /* Digital audio record queue */ 1237 dev.DARQ = dev.base + DARQ_OFFSET; 1238 msnd_init_queue(dev.DARQ, DARQ_DATA_BUFF, DARQ_BUFF_SIZE); 1239 1240 /* MIDI out queue */ 1241 dev.MODQ = dev.base + MODQ_OFFSET; 1242 msnd_init_queue(dev.MODQ, MODQ_DATA_BUFF, MODQ_BUFF_SIZE); 1243 1244 /* MIDI in queue */ 1245 dev.MIDQ = dev.base + MIDQ_OFFSET; 1246 msnd_init_queue(dev.MIDQ, MIDQ_DATA_BUFF, MIDQ_BUFF_SIZE); 1247 1248 /* DSP -> host message queue */ 1249 dev.DSPQ = dev.base + DSPQ_OFFSET; 1250 msnd_init_queue(dev.DSPQ, DSPQ_DATA_BUFF, DSPQ_BUFF_SIZE); 1251 1252 /* Setup some DSP values */ 1253#ifndef MSND_CLASSIC 1254 writew(1, dev.SMA + SMA_wCurrPlayFormat); 1255 writew(dev.play_sample_size, dev.SMA + SMA_wCurrPlaySampleSize); 1256 writew(dev.play_channels, dev.SMA + SMA_wCurrPlayChannels); 1257 writew(dev.play_sample_rate, dev.SMA + SMA_wCurrPlaySampleRate); 1258#endif 1259 writew(dev.play_sample_rate, dev.SMA + SMA_wCalFreqAtoD); 1260 writew(mastVolLeft, dev.SMA + SMA_wCurrMastVolLeft); 1261 writew(mastVolRight, dev.SMA + SMA_wCurrMastVolRight); 1262#ifndef MSND_CLASSIC 1263 writel(0x00010000, dev.SMA + SMA_dwCurrPlayPitch); 1264 writel(0x00000001, dev.SMA + SMA_dwCurrPlayRate); 1265#endif 1266 writew(0x303, dev.SMA + SMA_wCurrInputTagBits); 1267 1268 initted = 1; 1269 1270 return 0; 1271} 1272 1273static int __init calibrate_adc(WORD srate) 1274{ 1275 writew(srate, dev.SMA + SMA_wCalFreqAtoD); 1276 if (dev.calibrate_signal == 0) 1277 writew(readw(dev.SMA + SMA_wCurrHostStatusFlags) 1278 | 0x0001, dev.SMA + SMA_wCurrHostStatusFlags); 1279 else 1280 writew(readw(dev.SMA + SMA_wCurrHostStatusFlags) 1281 & ~0x0001, dev.SMA + SMA_wCurrHostStatusFlags); 1282 if (msnd_send_word(&dev, 0, 0, HDEXAR_CAL_A_TO_D) == 0 && 1283 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ) == 0) { 1284 current->state = TASK_INTERRUPTIBLE; 1285 schedule_timeout(HZ / 3); 1286 return 0; 1287 } 1288 printk(KERN_WARNING LOGNAME ": ADC calibration failed\n"); 1289 1290 return -EIO; 1291} 1292 1293static int upload_dsp_code(void) 1294{ 1295 msnd_outb(HPBLKSEL_0, dev.io + HP_BLKS); 1296#ifndef HAVE_DSPCODEH 1297 INITCODESIZE = mod_firmware_load(INITCODEFILE, &INITCODE); 1298 if (!INITCODE) { 1299 printk(KERN_ERR LOGNAME ": Error loading " INITCODEFILE); 1300 return -EBUSY; 1301 } 1302 1303 PERMCODESIZE = mod_firmware_load(PERMCODEFILE, &PERMCODE); 1304 if (!PERMCODE) { 1305 printk(KERN_ERR LOGNAME ": Error loading " PERMCODEFILE); 1306 vfree(INITCODE); 1307 return -EBUSY; 1308 } 1309#endif 1310 memcpy_toio(dev.base, PERMCODE, PERMCODESIZE); 1311 if (msnd_upload_host(&dev, INITCODE, INITCODESIZE) < 0) { 1312 printk(KERN_WARNING LOGNAME ": Error uploading to DSP\n"); 1313 return -ENODEV; 1314 } 1315#ifdef HAVE_DSPCODEH 1316 printk(KERN_INFO LOGNAME ": DSP firmware uploaded (resident)\n"); 1317#else 1318 printk(KERN_INFO LOGNAME ": DSP firmware uploaded\n"); 1319#endif 1320 1321#ifndef HAVE_DSPCODEH 1322 vfree(INITCODE); 1323 vfree(PERMCODE); 1324#endif 1325 1326 return 0; 1327} 1328 1329#ifdef MSND_CLASSIC 1330static void reset_proteus(void) 1331{ 1332 msnd_outb(HPPRORESET_ON, dev.io + HP_PROR); 1333 mdelay(TIME_PRO_RESET); 1334 msnd_outb(HPPRORESET_OFF, dev.io + HP_PROR); 1335 mdelay(TIME_PRO_RESET_DONE); 1336} 1337#endif 1338 1339static int initialize(void) 1340{ 1341 int err, timeout; 1342 1343#ifdef MSND_CLASSIC 1344 msnd_outb(HPWAITSTATE_0, dev.io + HP_WAIT); 1345 msnd_outb(HPBITMODE_16, dev.io + HP_BITM); 1346 1347 reset_proteus(); 1348#endif 1349 if ((err = init_sma()) < 0) { 1350 printk(KERN_WARNING LOGNAME ": Cannot initialize SMA\n"); 1351 return err; 1352 } 1353 1354 if ((err = reset_dsp()) < 0) 1355 return err; 1356 1357 if ((err = upload_dsp_code()) < 0) { 1358 printk(KERN_WARNING LOGNAME ": Cannot upload DSP code\n"); 1359 return err; 1360 } 1361 1362 timeout = 200; 1363 while (readw(dev.base)) { 1364 mdelay(1); 1365 if (!timeout--) { 1366 printk(KERN_DEBUG LOGNAME ": DSP reset timeout\n"); 1367 return -EIO; 1368 } 1369 } 1370 1371 mixer_setup(); 1372 1373 return 0; 1374} 1375 1376static int dsp_full_reset(void) 1377{ 1378 int rv; 1379 1380 if (test_bit(F_RESETTING, &dev.flags) || ++dev.nresets > 10) 1381 return 0; 1382 1383 set_bit(F_RESETTING, &dev.flags); 1384 printk(KERN_INFO LOGNAME ": DSP reset\n"); 1385 dsp_halt(NULL); /* Unconditionally halt */ 1386 if ((rv = initialize())) 1387 printk(KERN_WARNING LOGNAME ": DSP reset failed\n"); 1388 force_recsrc(dev.recsrc); 1389 dsp_open(NULL); 1390 clear_bit(F_RESETTING, &dev.flags); 1391 1392 return rv; 1393} 1394 1395static int __init attach_multisound(void) 1396{ 1397 int err; 1398 1399 if ((err = request_irq(dev.irq, intr, 0, dev.name, &dev)) < 0) { 1400 printk(KERN_ERR LOGNAME ": Couldn't grab IRQ %d\n", dev.irq); 1401 return err; 1402 } 1403 if (request_region(dev.io, dev.numio, dev.name) == NULL) { 1404 free_irq(dev.irq, &dev); 1405 return -EBUSY; 1406 } 1407 1408 err = dsp_full_reset(); 1409 if (err < 0) { 1410 release_region(dev.io, dev.numio); 1411 free_irq(dev.irq, &dev); 1412 return err; 1413 } 1414 1415 if ((err = msnd_register(&dev)) < 0) { 1416 printk(KERN_ERR LOGNAME ": Unable to register MultiSound\n"); 1417 release_region(dev.io, dev.numio); 1418 free_irq(dev.irq, &dev); 1419 return err; 1420 } 1421 1422 if ((dev.dsp_minor = register_sound_dsp(&dev_fileops, -1)) < 0) { 1423 printk(KERN_ERR LOGNAME ": Unable to register DSP operations\n"); 1424 msnd_unregister(&dev); 1425 release_region(dev.io, dev.numio); 1426 free_irq(dev.irq, &dev); 1427 return dev.dsp_minor; 1428 } 1429 1430 if ((dev.mixer_minor = register_sound_mixer(&dev_fileops, -1)) < 0) { 1431 printk(KERN_ERR LOGNAME ": Unable to register mixer operations\n"); 1432 unregister_sound_mixer(dev.mixer_minor); 1433 msnd_unregister(&dev); 1434 release_region(dev.io, dev.numio); 1435 free_irq(dev.irq, &dev); 1436 return dev.mixer_minor; 1437 } 1438 1439 dev.ext_midi_dev = dev.hdr_midi_dev = -1; 1440 1441 disable_irq(dev.irq); 1442 calibrate_adc(dev.play_sample_rate); 1443#ifndef MSND_CLASSIC 1444 force_recsrc(SOUND_MASK_IMIX); 1445#endif 1446 1447 return 0; 1448} 1449 1450static void __exit unload_multisound(void) 1451{ 1452 release_region(dev.io, dev.numio); 1453 free_irq(dev.irq, &dev); 1454 unregister_sound_mixer(dev.mixer_minor); 1455 unregister_sound_dsp(dev.dsp_minor); 1456 msnd_unregister(&dev); 1457} 1458 1459#ifndef MSND_CLASSIC 1460 1461/* Pinnacle/Fiji Logical Device Configuration */ 1462 1463static int __init msnd_write_cfg(int cfg, int reg, int value) 1464{ 1465 msnd_outb(reg, cfg); 1466 msnd_outb(value, cfg + 1); 1467 if (value != msnd_inb(cfg + 1)) { 1468 printk(KERN_ERR LOGNAME ": msnd_write_cfg: I/O error\n"); 1469 return -EIO; 1470 } 1471 return 0; 1472} 1473 1474static int __init msnd_write_cfg_io0(int cfg, int num, WORD io) 1475{ 1476 if (msnd_write_cfg(cfg, IREG_LOGDEVICE, num)) 1477 return -EIO; 1478 if (msnd_write_cfg(cfg, IREG_IO0_BASEHI, HIBYTE(io))) 1479 return -EIO; 1480 if (msnd_write_cfg(cfg, IREG_IO0_BASELO, LOBYTE(io))) 1481 return -EIO; 1482 return 0; 1483} 1484 1485static int __init msnd_write_cfg_io1(int cfg, int num, WORD io) 1486{ 1487 if (msnd_write_cfg(cfg, IREG_LOGDEVICE, num)) 1488 return -EIO; 1489 if (msnd_write_cfg(cfg, IREG_IO1_BASEHI, HIBYTE(io))) 1490 return -EIO; 1491 if (msnd_write_cfg(cfg, IREG_IO1_BASELO, LOBYTE(io))) 1492 return -EIO; 1493 return 0; 1494} 1495 1496static int __init msnd_write_cfg_irq(int cfg, int num, WORD irq) 1497{ 1498 if (msnd_write_cfg(cfg, IREG_LOGDEVICE, num)) 1499 return -EIO; 1500 if (msnd_write_cfg(cfg, IREG_IRQ_NUMBER, LOBYTE(irq))) 1501 return -EIO; 1502 if (msnd_write_cfg(cfg, IREG_IRQ_TYPE, IRQTYPE_EDGE)) 1503 return -EIO; 1504 return 0; 1505} 1506 1507static int __init msnd_write_cfg_mem(int cfg, int num, int mem) 1508{ 1509 WORD wmem; 1510 1511 mem >>= 8; 1512 mem &= 0xfff; 1513 wmem = (WORD)mem; 1514 if (msnd_write_cfg(cfg, IREG_LOGDEVICE, num)) 1515 return -EIO; 1516 if (msnd_write_cfg(cfg, IREG_MEMBASEHI, HIBYTE(wmem))) 1517 return -EIO; 1518 if (msnd_write_cfg(cfg, IREG_MEMBASELO, LOBYTE(wmem))) 1519 return -EIO; 1520 if (wmem && msnd_write_cfg(cfg, IREG_MEMCONTROL, (MEMTYPE_HIADDR | MEMTYPE_16BIT))) 1521 return -EIO; 1522 return 0; 1523} 1524 1525static int __init msnd_activate_logical(int cfg, int num) 1526{ 1527 if (msnd_write_cfg(cfg, IREG_LOGDEVICE, num)) 1528 return -EIO; 1529 if (msnd_write_cfg(cfg, IREG_ACTIVATE, LD_ACTIVATE)) 1530 return -EIO; 1531 return 0; 1532} 1533 1534static int __init msnd_write_cfg_logical(int cfg, int num, WORD io0, WORD io1, WORD irq, int mem) 1535{ 1536 if (msnd_write_cfg(cfg, IREG_LOGDEVICE, num)) 1537 return -EIO; 1538 if (msnd_write_cfg_io0(cfg, num, io0)) 1539 return -EIO; 1540 if (msnd_write_cfg_io1(cfg, num, io1)) 1541 return -EIO; 1542 if (msnd_write_cfg_irq(cfg, num, irq)) 1543 return -EIO; 1544 if (msnd_write_cfg_mem(cfg, num, mem)) 1545 return -EIO; 1546 if (msnd_activate_logical(cfg, num)) 1547 return -EIO; 1548 return 0; 1549} 1550 1551typedef struct msnd_pinnacle_cfg_device { 1552 WORD io0, io1, irq; 1553 int mem; 1554} msnd_pinnacle_cfg_t[4]; 1555 1556static int __init msnd_pinnacle_cfg_devices(int cfg, int reset, msnd_pinnacle_cfg_t device) 1557{ 1558 int i; 1559 1560 /* Reset devices if told to */ 1561 if (reset) { 1562 printk(KERN_INFO LOGNAME ": Resetting all devices\n"); 1563 for (i = 0; i < 4; ++i) 1564 if (msnd_write_cfg_logical(cfg, i, 0, 0, 0, 0)) 1565 return -EIO; 1566 } 1567 1568 /* Configure specified devices */ 1569 for (i = 0; i < 4; ++i) { 1570 1571 switch (i) { 1572 case 0: /* DSP */ 1573 if (!(device[i].io0 && device[i].irq && device[i].mem)) 1574 continue; 1575 break; 1576 case 1: /* MPU */ 1577 if (!(device[i].io0 && device[i].irq)) 1578 continue; 1579 printk(KERN_INFO LOGNAME 1580 ": Configuring MPU to I/O 0x%x IRQ %d\n", 1581 device[i].io0, device[i].irq); 1582 break; 1583 case 2: /* IDE */ 1584 if (!(device[i].io0 && device[i].io1 && device[i].irq)) 1585 continue; 1586 printk(KERN_INFO LOGNAME 1587 ": Configuring IDE to I/O 0x%x, 0x%x IRQ %d\n", 1588 device[i].io0, device[i].io1, device[i].irq); 1589 break; 1590 case 3: /* Joystick */ 1591 if (!(device[i].io0)) 1592 continue; 1593 printk(KERN_INFO LOGNAME 1594 ": Configuring joystick to I/O 0x%x\n", 1595 device[i].io0); 1596 break; 1597 } 1598 1599 /* Configure the device */ 1600 if (msnd_write_cfg_logical(cfg, i, device[i].io0, device[i].io1, device[i].irq, device[i].mem)) 1601 return -EIO; 1602 } 1603 1604 return 0; 1605} 1606#endif 1607 1608#ifdef MODULE 1609MODULE_AUTHOR ("Andrew Veliath <andrewtv@usa.net>"); 1610MODULE_DESCRIPTION ("Turtle Beach " LONGNAME " Linux Driver"); 1611MODULE_LICENSE("GPL"); 1612 1613static int io __initdata = -1; 1614static int irq __initdata = -1; 1615static int mem __initdata = -1; 1616static int write_ndelay __initdata = -1; 1617 1618#ifndef MSND_CLASSIC 1619/* Pinnacle/Fiji non-PnP Config Port */ 1620static int cfg __initdata = -1; 1621 1622/* Extra Peripheral Configuration */ 1623static int reset __initdata = 0; 1624static int mpu_io __initdata = 0; 1625static int mpu_irq __initdata = 0; 1626static int ide_io0 __initdata = 0; 1627static int ide_io1 __initdata = 0; 1628static int ide_irq __initdata = 0; 1629static int joystick_io __initdata = 0; 1630 1631/* If we have the digital daugherboard... */ 1632static int digital __initdata = 0; 1633#endif 1634 1635static int fifosize __initdata = DEFFIFOSIZE; 1636static int calibrate_signal __initdata = 0; 1637 1638#else /* not a module */ 1639 1640static int write_ndelay __initdata = -1; 1641 1642#ifdef MSND_CLASSIC 1643static int io __initdata = CONFIG_MSNDCLAS_IO; 1644static int irq __initdata = CONFIG_MSNDCLAS_IRQ; 1645static int mem __initdata = CONFIG_MSNDCLAS_MEM; 1646#else /* Pinnacle/Fiji */ 1647 1648static int io __initdata = CONFIG_MSNDPIN_IO; 1649static int irq __initdata = CONFIG_MSNDPIN_IRQ; 1650static int mem __initdata = CONFIG_MSNDPIN_MEM; 1651 1652/* Pinnacle/Fiji non-PnP Config Port */ 1653#ifdef CONFIG_MSNDPIN_NONPNP 1654# ifndef CONFIG_MSNDPIN_CFG 1655# define CONFIG_MSNDPIN_CFG 0x250 1656# endif 1657#else 1658# ifdef CONFIG_MSNDPIN_CFG 1659# undef CONFIG_MSNDPIN_CFG 1660# endif 1661# define CONFIG_MSNDPIN_CFG -1 1662#endif 1663static int cfg __initdata = CONFIG_MSNDPIN_CFG; 1664/* If not a module, we don't need to bother with reset=1 */ 1665static int reset; 1666 1667/* Extra Peripheral Configuration (Default: Disable) */ 1668#ifndef CONFIG_MSNDPIN_MPU_IO 1669# define CONFIG_MSNDPIN_MPU_IO 0 1670#endif 1671static int mpu_io __initdata = CONFIG_MSNDPIN_MPU_IO; 1672 1673#ifndef CONFIG_MSNDPIN_MPU_IRQ 1674# define CONFIG_MSNDPIN_MPU_IRQ 0 1675#endif 1676static int mpu_irq __initdata = CONFIG_MSNDPIN_MPU_IRQ; 1677 1678#ifndef CONFIG_MSNDPIN_IDE_IO0 1679# define CONFIG_MSNDPIN_IDE_IO0 0 1680#endif 1681static int ide_io0 __initdata = CONFIG_MSNDPIN_IDE_IO0; 1682 1683#ifndef CONFIG_MSNDPIN_IDE_IO1 1684# define CONFIG_MSNDPIN_IDE_IO1 0 1685#endif 1686static int ide_io1 __initdata = CONFIG_MSNDPIN_IDE_IO1; 1687 1688#ifndef CONFIG_MSNDPIN_IDE_IRQ 1689# define CONFIG_MSNDPIN_IDE_IRQ 0 1690#endif 1691static int ide_irq __initdata = CONFIG_MSNDPIN_IDE_IRQ; 1692 1693#ifndef CONFIG_MSNDPIN_JOYSTICK_IO 1694# define CONFIG_MSNDPIN_JOYSTICK_IO 0 1695#endif 1696static int joystick_io __initdata = CONFIG_MSNDPIN_JOYSTICK_IO; 1697 1698/* Have SPDIF (Digital) Daughterboard */ 1699#ifndef CONFIG_MSNDPIN_DIGITAL 1700# define CONFIG_MSNDPIN_DIGITAL 0 1701#endif 1702static int digital __initdata = CONFIG_MSNDPIN_DIGITAL; 1703 1704#endif /* MSND_CLASSIC */ 1705 1706#ifndef CONFIG_MSND_FIFOSIZE 1707# define CONFIG_MSND_FIFOSIZE DEFFIFOSIZE 1708#endif 1709static int fifosize __initdata = CONFIG_MSND_FIFOSIZE; 1710 1711#ifndef CONFIG_MSND_CALSIGNAL 1712# define CONFIG_MSND_CALSIGNAL 0 1713#endif 1714static int 1715calibrate_signal __initdata = CONFIG_MSND_CALSIGNAL; 1716#endif /* MODULE */ 1717 1718module_param (io, int, 0); 1719module_param (irq, int, 0); 1720module_param (mem, int, 0); 1721module_param (write_ndelay, int, 0); 1722module_param (fifosize, int, 0); 1723module_param (calibrate_signal, int, 0); 1724#ifndef MSND_CLASSIC 1725module_param (digital, bool, 0); 1726module_param (cfg, int, 0); 1727module_param (reset, int, 0); 1728module_param (mpu_io, int, 0); 1729module_param (mpu_irq, int, 0); 1730module_param (ide_io0, int, 0); 1731module_param (ide_io1, int, 0); 1732module_param (ide_irq, int, 0); 1733module_param (joystick_io, int, 0); 1734#endif 1735 1736static int __init msnd_init(void) 1737{ 1738 int err; 1739#ifndef MSND_CLASSIC 1740 static msnd_pinnacle_cfg_t pinnacle_devs; 1741#endif /* MSND_CLASSIC */ 1742 1743 printk(KERN_INFO LOGNAME ": Turtle Beach " LONGNAME " Linux Driver Version " 1744 VERSION ", Copyright (C) 1998 Andrew Veliath\n"); 1745 1746 if (io == -1 || irq == -1 || mem == -1) 1747 printk(KERN_WARNING LOGNAME ": io, irq and mem must be set\n"); 1748 1749#ifdef MSND_CLASSIC 1750 if (io == -1 || 1751 !(io == 0x290 || 1752 io == 0x260 || 1753 io == 0x250 || 1754 io == 0x240 || 1755 io == 0x230 || 1756 io == 0x220 || 1757 io == 0x210 || 1758 io == 0x3e0)) { 1759 printk(KERN_ERR LOGNAME ": \"io\" - DSP I/O base must be set to 0x210, 0x220, 0x230, 0x240, 0x250, 0x260, 0x290, or 0x3E0\n"); 1760 return -EINVAL; 1761 } 1762#else 1763 if (io == -1 || 1764 io < 0x100 || 1765 io > 0x3e0 || 1766 (io % 0x10) != 0) { 1767 printk(KERN_ERR LOGNAME ": \"io\" - DSP I/O base must within the range 0x100 to 0x3E0 and must be evenly divisible by 0x10\n"); 1768 return -EINVAL; 1769 } 1770#endif /* MSND_CLASSIC */ 1771 1772 if (irq == -1 || 1773 !(irq == 5 || 1774 irq == 7 || 1775 irq == 9 || 1776 irq == 10 || 1777 irq == 11 || 1778 irq == 12)) { 1779 printk(KERN_ERR LOGNAME ": \"irq\" - must be set to 5, 7, 9, 10, 11 or 12\n"); 1780 return -EINVAL; 1781 } 1782 1783 if (mem == -1 || 1784 !(mem == 0xb0000 || 1785 mem == 0xc8000 || 1786 mem == 0xd0000 || 1787 mem == 0xd8000 || 1788 mem == 0xe0000 || 1789 mem == 0xe8000)) { 1790 printk(KERN_ERR LOGNAME ": \"mem\" - must be set to " 1791 "0xb0000, 0xc8000, 0xd0000, 0xd8000, 0xe0000 or 0xe8000\n"); 1792 return -EINVAL; 1793 } 1794 1795#ifdef MSND_CLASSIC 1796 switch (irq) { 1797 case 5: dev.irqid = HPIRQ_5; break; 1798 case 7: dev.irqid = HPIRQ_7; break; 1799 case 9: dev.irqid = HPIRQ_9; break; 1800 case 10: dev.irqid = HPIRQ_10; break; 1801 case 11: dev.irqid = HPIRQ_11; break; 1802 case 12: dev.irqid = HPIRQ_12; break; 1803 } 1804 1805 switch (mem) { 1806 case 0xb0000: dev.memid = HPMEM_B000; break; 1807 case 0xc8000: dev.memid = HPMEM_C800; break; 1808 case 0xd0000: dev.memid = HPMEM_D000; break; 1809 case 0xd8000: dev.memid = HPMEM_D800; break; 1810 case 0xe0000: dev.memid = HPMEM_E000; break; 1811 case 0xe8000: dev.memid = HPMEM_E800; break; 1812 } 1813#else 1814 if (cfg == -1) { 1815 printk(KERN_INFO LOGNAME ": Assuming PnP mode\n"); 1816 } else if (cfg != 0x250 && cfg != 0x260 && cfg != 0x270) { 1817 printk(KERN_INFO LOGNAME ": Config port must be 0x250, 0x260 or 0x270 (or unspecified for PnP mode)\n"); 1818 return -EINVAL; 1819 } else { 1820 printk(KERN_INFO LOGNAME ": Non-PnP mode: configuring at port 0x%x\n", cfg); 1821 1822 /* DSP */ 1823 pinnacle_devs[0].io0 = io; 1824 pinnacle_devs[0].irq = irq; 1825 pinnacle_devs[0].mem = mem; 1826 1827 /* The following are Pinnacle specific */ 1828 1829 /* MPU */ 1830 pinnacle_devs[1].io0 = mpu_io; 1831 pinnacle_devs[1].irq = mpu_irq; 1832 1833 /* IDE */ 1834 pinnacle_devs[2].io0 = ide_io0; 1835 pinnacle_devs[2].io1 = ide_io1; 1836 pinnacle_devs[2].irq = ide_irq; 1837 1838 /* Joystick */ 1839 pinnacle_devs[3].io0 = joystick_io; 1840 1841 if (!request_region(cfg, 2, "Pinnacle/Fiji Config")) { 1842 printk(KERN_ERR LOGNAME ": Config port 0x%x conflict\n", cfg); 1843 return -EIO; 1844 } 1845 1846 if (msnd_pinnacle_cfg_devices(cfg, reset, pinnacle_devs)) { 1847 printk(KERN_ERR LOGNAME ": Device configuration error\n"); 1848 release_region(cfg, 2); 1849 return -EIO; 1850 } 1851 release_region(cfg, 2); 1852 } 1853#endif /* MSND_CLASSIC */ 1854 1855 if (fifosize < 16) 1856 fifosize = 16; 1857 1858 if (fifosize > 1024) 1859 fifosize = 1024; 1860 1861 set_default_audio_parameters(); 1862#ifdef MSND_CLASSIC 1863 dev.type = msndClassic; 1864#else 1865 dev.type = msndPinnacle; 1866#endif 1867 dev.io = io; 1868 dev.numio = DSP_NUMIO; 1869 dev.irq = irq; 1870 dev.base = ioremap(mem, 0x8000); 1871 dev.fifosize = fifosize * 1024; 1872 dev.calibrate_signal = calibrate_signal ? 1 : 0; 1873 dev.recsrc = 0; 1874 dev.dspq_data_buff = DSPQ_DATA_BUFF; 1875 dev.dspq_buff_size = DSPQ_BUFF_SIZE; 1876 if (write_ndelay == -1) 1877 write_ndelay = CONFIG_MSND_WRITE_NDELAY; 1878 if (write_ndelay) 1879 clear_bit(F_DISABLE_WRITE_NDELAY, &dev.flags); 1880 else 1881 set_bit(F_DISABLE_WRITE_NDELAY, &dev.flags); 1882#ifndef MSND_CLASSIC 1883 if (digital) 1884 set_bit(F_HAVEDIGITAL, &dev.flags); 1885#endif 1886 init_waitqueue_head(&dev.writeblock); 1887 init_waitqueue_head(&dev.readblock); 1888 init_waitqueue_head(&dev.writeflush); 1889 msnd_fifo_init(&dev.DAPF); 1890 msnd_fifo_init(&dev.DARF); 1891 spin_lock_init(&dev.lock); 1892 printk(KERN_INFO LOGNAME ": %u byte audio FIFOs (x2)\n", dev.fifosize); 1893 if ((err = msnd_fifo_alloc(&dev.DAPF, dev.fifosize)) < 0) { 1894 printk(KERN_ERR LOGNAME ": Couldn't allocate write FIFO\n"); 1895 return err; 1896 } 1897 1898 if ((err = msnd_fifo_alloc(&dev.DARF, dev.fifosize)) < 0) { 1899 printk(KERN_ERR LOGNAME ": Couldn't allocate read FIFO\n"); 1900 msnd_fifo_free(&dev.DAPF); 1901 return err; 1902 } 1903 1904 if ((err = probe_multisound()) < 0) { 1905 printk(KERN_ERR LOGNAME ": Probe failed\n"); 1906 msnd_fifo_free(&dev.DAPF); 1907 msnd_fifo_free(&dev.DARF); 1908 return err; 1909 } 1910 1911 if ((err = attach_multisound()) < 0) { 1912 printk(KERN_ERR LOGNAME ": Attach failed\n"); 1913 msnd_fifo_free(&dev.DAPF); 1914 msnd_fifo_free(&dev.DARF); 1915 return err; 1916 } 1917 1918 return 0; 1919} 1920 1921static void __exit msdn_cleanup(void) 1922{ 1923 unload_multisound(); 1924 msnd_fifo_free(&dev.DAPF); 1925 msnd_fifo_free(&dev.DARF); 1926} 1927 1928module_init(msnd_init); 1929module_exit(msdn_cleanup); 1930