1#ifndef __SOUND_TRIDENT_H 2#define __SOUND_TRIDENT_H 3 4/* 5 * audio@tridentmicro.com 6 * Fri Feb 19 15:55:28 MST 1999 7 * Definitions for Trident 4DWave DX/NX chips 8 * 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License as published by 12 * the Free Software Foundation; either version 2 of the License, or 13 * (at your option) any later version. 14 * 15 * This program is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 * 20 * You should have received a copy of the GNU General Public License 21 * along with this program; if not, write to the Free Software 22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 23 * 24 */ 25 26#include "pcm.h" 27#include "mpu401.h" 28#include "ac97_codec.h" 29#include "util_mem.h" 30 31#define TRIDENT_DEVICE_ID_DX ((PCI_VENDOR_ID_TRIDENT<<16)|PCI_DEVICE_ID_TRIDENT_4DWAVE_DX) 32#define TRIDENT_DEVICE_ID_NX ((PCI_VENDOR_ID_TRIDENT<<16)|PCI_DEVICE_ID_TRIDENT_4DWAVE_NX) 33#define TRIDENT_DEVICE_ID_SI7018 ((PCI_VENDOR_ID_SI<<16)|PCI_DEVICE_ID_SI_7018) 34 35#define SNDRV_TRIDENT_VOICE_TYPE_PCM 0 36#define SNDRV_TRIDENT_VOICE_TYPE_SYNTH 1 37#define SNDRV_TRIDENT_VOICE_TYPE_MIDI 2 38 39#define SNDRV_TRIDENT_VFLG_RUNNING (1<<0) 40 41/* TLB code constants */ 42#define SNDRV_TRIDENT_PAGE_SIZE 4096 43#define SNDRV_TRIDENT_PAGE_SHIFT 12 44#define SNDRV_TRIDENT_PAGE_MASK ((1<<SNDRV_TRIDENT_PAGE_SHIFT)-1) 45#define SNDRV_TRIDENT_MAX_PAGES 4096 46 47/* 48 * Direct registers 49 */ 50 51#define TRID_REG(trident, x) ((trident)->port + (x)) 52 53#define ID_4DWAVE_DX 0x2000 54#define ID_4DWAVE_NX 0x2001 55 56/* Bank definitions */ 57 58#define T4D_BANK_A 0 59#define T4D_BANK_B 1 60#define T4D_NUM_BANKS 2 61 62/* Register definitions */ 63 64/* Global registers */ 65 66enum global_control_bits { 67 CHANNEL_IDX = 0x0000003f, 68 OVERRUN_IE = 0x00000400, /* interrupt enable: capture overrun */ 69 UNDERRUN_IE = 0x00000800, /* interrupt enable: playback underrun */ 70 ENDLP_IE = 0x00001000, /* interrupt enable: end of buffer */ 71 MIDLP_IE = 0x00002000, /* interrupt enable: middle buffer */ 72 ETOG_IE = 0x00004000, /* interrupt enable: envelope toggling */ 73 EDROP_IE = 0x00008000, /* interrupt enable: envelope drop */ 74 BANK_B_EN = 0x00010000, /* SiS: enable bank B (64 channels) */ 75 PCMIN_B_MIX = 0x00020000, /* SiS: PCM IN B mixing enable */ 76 I2S_OUT_ASSIGN = 0x00040000, /* SiS: I2S Out contains surround PCM */ 77 SPDIF_OUT_ASSIGN= 0x00080000, /* SiS: 0=S/PDIF L/R | 1=PCM Out FIFO */ 78 MAIN_OUT_ASSIGN = 0x00100000, /* SiS: 0=PCM Out FIFO | 1=MMC Out buffer */ 79}; 80 81enum miscint_bits { 82 PB_UNDERRUN_IRQ = 0x00000001, REC_OVERRUN_IRQ = 0x00000002, 83 SB_IRQ = 0x00000004, MPU401_IRQ = 0x00000008, 84 OPL3_IRQ = 0x00000010, ADDRESS_IRQ = 0x00000020, 85 ENVELOPE_IRQ = 0x00000040, PB_UNDERRUN = 0x00000100, 86 REC_OVERRUN = 0x00000200, MIXER_UNDERFLOW = 0x00000400, 87 MIXER_OVERFLOW = 0x00000800, NX_SB_IRQ_DISABLE = 0x00001000, 88 ST_TARGET_REACHED = 0x00008000, 89 PB_24K_MODE = 0x00010000, ST_IRQ_EN = 0x00800000, 90 ACGPIO_IRQ = 0x01000000 91}; 92 93/* T2 legacy dma control registers. */ 94#define LEGACY_DMAR0 0x00 // ADR0 95#define LEGACY_DMAR4 0x04 // CNT0 96#define LEGACY_DMAR6 0x06 // CNT0 - High bits 97#define LEGACY_DMAR11 0x0b // MOD 98#define LEGACY_DMAR15 0x0f // MMR 99 100#define T4D_START_A 0x80 101#define T4D_STOP_A 0x84 102#define T4D_DLY_A 0x88 103#define T4D_SIGN_CSO_A 0x8c 104#define T4D_CSPF_A 0x90 105#define T4D_CSPF_B 0xbc 106#define T4D_CEBC_A 0x94 107#define T4D_AINT_A 0x98 108#define T4D_AINTEN_A 0x9c 109#define T4D_LFO_GC_CIR 0xa0 110#define T4D_MUSICVOL_WAVEVOL 0xa8 111#define T4D_SBDELTA_DELTA_R 0xac 112#define T4D_MISCINT 0xb0 113#define T4D_START_B 0xb4 114#define T4D_STOP_B 0xb8 115#define T4D_SBBL_SBCL 0xc0 116#define T4D_SBCTRL_SBE2R_SBDD 0xc4 117#define T4D_STIMER 0xc8 118#define T4D_AINT_B 0xd8 119#define T4D_AINTEN_B 0xdc 120#define T4D_RCI 0x70 121 122/* MPU-401 UART */ 123#define T4D_MPU401_BASE 0x20 124#define T4D_MPUR0 0x20 125#define T4D_MPUR1 0x21 126#define T4D_MPUR2 0x22 127#define T4D_MPUR3 0x23 128 129/* S/PDIF Registers */ 130#define NX_SPCTRL_SPCSO 0x24 131#define NX_SPLBA 0x28 132#define NX_SPESO 0x2c 133#define NX_SPCSTATUS 0x64 134 135/* Joystick */ 136#define GAMEPORT_GCR 0x30 137#define GAMEPORT_MODE_ADC 0x80 138#define GAMEPORT_LEGACY 0x31 139#define GAMEPORT_AXES 0x34 140 141/* NX Specific Registers */ 142#define NX_TLBC 0x6c 143 144/* Channel Registers */ 145 146#define CH_START 0xe0 147 148#define CH_DX_CSO_ALPHA_FMS 0xe0 149#define CH_DX_ESO_DELTA 0xe8 150#define CH_DX_FMC_RVOL_CVOL 0xec 151 152#define CH_NX_DELTA_CSO 0xe0 153#define CH_NX_DELTA_ESO 0xe8 154#define CH_NX_ALPHA_FMS_FMC_RVOL_CVOL 0xec 155 156#define CH_LBA 0xe4 157#define CH_GVSEL_PAN_VOL_CTRL_EC 0xf0 158#define CH_EBUF1 0xf4 159#define CH_EBUF2 0xf8 160 161/* AC-97 Registers */ 162 163#define DX_ACR0_AC97_W 0x40 164#define DX_ACR1_AC97_R 0x44 165#define DX_ACR2_AC97_COM_STAT 0x48 166 167#define NX_ACR0_AC97_COM_STAT 0x40 168#define NX_ACR1_AC97_W 0x44 169#define NX_ACR2_AC97_R_PRIMARY 0x48 170#define NX_ACR3_AC97_R_SECONDARY 0x4c 171 172#define SI_AC97_WRITE 0x40 173#define SI_AC97_READ 0x44 174#define SI_SERIAL_INTF_CTRL 0x48 175#define SI_AC97_GPIO 0x4c 176#define SI_ASR0 0x50 177#define SI_SPDIF_CS 0x70 178#define SI_GPIO 0x7c 179 180enum trident_nx_ac97_bits { 181 /* ACR1-3 */ 182 NX_AC97_BUSY_WRITE = 0x0800, 183 NX_AC97_BUSY_READ = 0x0800, 184 NX_AC97_BUSY_DATA = 0x0400, 185 NX_AC97_WRITE_SECONDARY = 0x0100, 186 /* ACR0 */ 187 NX_AC97_SECONDARY_READY = 0x0040, 188 NX_AC97_SECONDARY_RECORD = 0x0020, 189 NX_AC97_SURROUND_OUTPUT = 0x0010, 190 NX_AC97_PRIMARY_READY = 0x0008, 191 NX_AC97_PRIMARY_RECORD = 0x0004, 192 NX_AC97_PCM_OUTPUT = 0x0002, 193 NX_AC97_WARM_RESET = 0x0001 194}; 195 196enum trident_dx_ac97_bits { 197 DX_AC97_BUSY_WRITE = 0x8000, 198 DX_AC97_BUSY_READ = 0x8000, 199 DX_AC97_READY = 0x0010, 200 DX_AC97_RECORD = 0x0008, 201 DX_AC97_PLAYBACK = 0x0002 202}; 203 204enum sis7018_ac97_bits { 205 SI_AC97_BUSY_WRITE = 0x00008000, 206 SI_AC97_AUDIO_BUSY = 0x00004000, 207 SI_AC97_MODEM_BUSY = 0x00002000, 208 SI_AC97_BUSY_READ = 0x00008000, 209 SI_AC97_SECONDARY = 0x00000080, 210}; 211 212enum serial_intf_ctrl_bits { 213 WARM_RESET = 0x00000001, 214 COLD_RESET = 0x00000002, 215 I2S_CLOCK = 0x00000004, 216 PCM_SEC_AC97 = 0x00000008, 217 AC97_DBL_RATE = 0x00000010, 218 SPDIF_EN = 0x00000020, 219 I2S_OUTPUT_EN = 0x00000040, 220 I2S_INPUT_EN = 0x00000080, 221 PCMIN = 0x00000100, 222 LINE1IN = 0x00000200, 223 MICIN = 0x00000400, 224 LINE2IN = 0x00000800, 225 HEAD_SET_IN = 0x00001000, 226 GPIOIN = 0x00002000, 227 /* 7018 spec says id = 01 but the demo board routed to 10 228 SECONDARY_ID= 0x00004000, */ 229 SECONDARY_ID = 0x00004000, 230 PCMOUT = 0x00010000, 231 SURROUT = 0x00020000, 232 CENTEROUT = 0x00040000, 233 LFEOUT = 0x00080000, 234 LINE1OUT = 0x00100000, 235 LINE2OUT = 0x00200000, 236 GPIOOUT = 0x00400000, 237 SI_AC97_PRIMARY_READY = 0x01000000, 238 SI_AC97_SECONDARY_READY = 0x02000000, 239 SI_AC97_POWERDOWN = 0x04000000, 240}; 241 242/* PCM defaults */ 243 244#define T4D_DEFAULT_PCM_VOL 10 /* 0 - 255 */ 245#define T4D_DEFAULT_PCM_PAN 0 /* 0 - 127 */ 246#define T4D_DEFAULT_PCM_RVOL 127 /* 0 - 127 */ 247#define T4D_DEFAULT_PCM_CVOL 127 /* 0 - 127 */ 248 249struct snd_trident; 250struct snd_trident_voice; 251struct snd_trident_pcm_mixer; 252 253struct snd_trident_port { 254 struct snd_midi_channel_set * chset; 255 struct snd_trident * trident; 256 int mode; /* operation mode */ 257 int client; /* sequencer client number */ 258 int port; /* sequencer port number */ 259 unsigned int midi_has_voices: 1; 260}; 261 262struct snd_trident_memblk_arg { 263 short first_page, last_page; 264}; 265 266struct snd_trident_tlb { 267 unsigned int * entries; /* 16k-aligned TLB table */ 268 dma_addr_t entries_dmaaddr; /* 16k-aligned PCI address to TLB table */ 269 unsigned long * shadow_entries; /* shadow entries with virtual addresses */ 270 struct snd_dma_buffer buffer; 271 struct snd_util_memhdr * memhdr; /* page allocation list */ 272 struct snd_dma_buffer silent_page; 273}; 274 275struct snd_trident_voice { 276 unsigned int number; 277 unsigned int use: 1, 278 pcm: 1, 279 synth:1, 280 midi: 1; 281 unsigned int flags; 282 unsigned char client; 283 unsigned char port; 284 unsigned char index; 285 286 struct snd_trident_sample_ops *sample_ops; 287 288 /* channel parameters */ 289 unsigned int CSO; /* 24 bits (16 on DX) */ 290 unsigned int ESO; /* 24 bits (16 on DX) */ 291 unsigned int LBA; /* 30 bits */ 292 unsigned short EC; /* 12 bits */ 293 unsigned short Alpha; /* 12 bits */ 294 unsigned short Delta; /* 16 bits */ 295 unsigned short Attribute; /* 16 bits - SiS 7018 */ 296 unsigned short Vol; /* 12 bits (6.6) */ 297 unsigned char Pan; /* 7 bits (1.4.2) */ 298 unsigned char GVSel; /* 1 bit */ 299 unsigned char RVol; /* 7 bits (5.2) */ 300 unsigned char CVol; /* 7 bits (5.2) */ 301 unsigned char FMC; /* 2 bits */ 302 unsigned char CTRL; /* 4 bits */ 303 unsigned char FMS; /* 4 bits */ 304 unsigned char LFO; /* 8 bits */ 305 306 unsigned int negCSO; /* nonzero - use negative CSO */ 307 308 struct snd_util_memblk *memblk; /* memory block if TLB enabled */ 309 310 /* PCM data */ 311 312 struct snd_trident *trident; 313 struct snd_pcm_substream *substream; 314 struct snd_trident_voice *extra; /* extra PCM voice (acts as interrupt generator) */ 315 unsigned int running: 1, 316 capture: 1, 317 spdif: 1, 318 foldback: 1, 319 isync: 1, 320 isync2: 1, 321 isync3: 1; 322 int foldback_chan; /* foldback subdevice number */ 323 unsigned int stimer; /* global sample timer (to detect spurious interrupts) */ 324 unsigned int spurious_threshold; /* spurious threshold */ 325 unsigned int isync_mark; 326 unsigned int isync_max; 327 unsigned int isync_ESO; 328 329 /* --- */ 330 331 void *private_data; 332 void (*private_free)(struct snd_trident_voice *voice); 333}; 334 335struct snd_4dwave { 336 int seq_client; 337 338 struct snd_trident_port seq_ports[4]; 339 struct snd_trident_voice voices[64]; 340 341 int ChanSynthCount; /* number of allocated synth channels */ 342 int max_size; /* maximum synth memory size in bytes */ 343 int current_size; /* current allocated synth mem in bytes */ 344}; 345 346struct snd_trident_pcm_mixer { 347 struct snd_trident_voice *voice; /* active voice */ 348 unsigned short vol; /* front volume */ 349 unsigned char pan; /* pan control */ 350 unsigned char rvol; /* rear volume */ 351 unsigned char cvol; /* center volume */ 352 unsigned char pad; 353}; 354 355struct snd_trident { 356 int irq; 357 358 unsigned int device; /* device ID */ 359 360 unsigned char bDMAStart; 361 362 unsigned long port; 363 unsigned long midi_port; 364 365 unsigned int spurious_irq_count; 366 unsigned int spurious_irq_max_delta; 367 368 struct snd_trident_tlb tlb; /* TLB entries for NX cards */ 369 370 unsigned char spdif_ctrl; 371 unsigned char spdif_pcm_ctrl; 372 unsigned int spdif_bits; 373 unsigned int spdif_pcm_bits; 374 struct snd_kcontrol *spdif_pcm_ctl; /* S/PDIF settings */ 375 unsigned int ac97_ctrl; 376 377 unsigned int ChanMap[2]; /* allocation map for hardware channels */ 378 379 int ChanPCM; /* max number of PCM channels */ 380 int ChanPCMcnt; /* actual number of PCM channels */ 381 382 unsigned int ac97_detect: 1; /* 1 = AC97 in detection phase */ 383 unsigned int in_suspend: 1; /* 1 during suspend/resume */ 384 385 struct snd_4dwave synth; /* synth specific variables */ 386 387 spinlock_t event_lock; 388 spinlock_t voice_alloc; 389 390 struct snd_dma_device dma_dev; 391 392 struct pci_dev *pci; 393 struct snd_card *card; 394 struct snd_pcm *pcm; /* ADC/DAC PCM */ 395 struct snd_pcm *foldback; /* Foldback PCM */ 396 struct snd_pcm *spdif; /* SPDIF PCM */ 397 struct snd_rawmidi *rmidi; 398 399 struct snd_ac97_bus *ac97_bus; 400 struct snd_ac97 *ac97; 401 struct snd_ac97 *ac97_sec; 402 403 unsigned int musicvol_wavevol; 404 struct snd_trident_pcm_mixer pcm_mixer[32]; 405 struct snd_kcontrol *ctl_vol; /* front volume */ 406 struct snd_kcontrol *ctl_pan; /* pan */ 407 struct snd_kcontrol *ctl_rvol; /* rear volume */ 408 struct snd_kcontrol *ctl_cvol; /* center volume */ 409 410 spinlock_t reg_lock; 411 412 struct gameport *gameport; 413}; 414 415int snd_trident_create(struct snd_card *card, 416 struct pci_dev *pci, 417 int pcm_streams, 418 int pcm_spdif_device, 419 int max_wavetable_size, 420 struct snd_trident ** rtrident); 421int snd_trident_create_gameport(struct snd_trident *trident); 422 423int snd_trident_pcm(struct snd_trident * trident, int device, struct snd_pcm **rpcm); 424int snd_trident_foldback_pcm(struct snd_trident * trident, int device, struct snd_pcm **rpcm); 425int snd_trident_spdif_pcm(struct snd_trident * trident, int device, struct snd_pcm **rpcm); 426int snd_trident_attach_synthesizer(struct snd_trident * trident); 427struct snd_trident_voice *snd_trident_alloc_voice(struct snd_trident * trident, int type, 428 int client, int port); 429void snd_trident_free_voice(struct snd_trident * trident, struct snd_trident_voice *voice); 430void snd_trident_start_voice(struct snd_trident * trident, unsigned int voice); 431void snd_trident_stop_voice(struct snd_trident * trident, unsigned int voice); 432void snd_trident_write_voice_regs(struct snd_trident * trident, struct snd_trident_voice *voice); 433int snd_trident_suspend(struct pci_dev *pci, pm_message_t state); 434int snd_trident_resume(struct pci_dev *pci); 435 436/* TLB memory allocation */ 437struct snd_util_memblk *snd_trident_alloc_pages(struct snd_trident *trident, 438 struct snd_pcm_substream *substream); 439int snd_trident_free_pages(struct snd_trident *trident, struct snd_util_memblk *blk); 440struct snd_util_memblk *snd_trident_synth_alloc(struct snd_trident *trident, unsigned int size); 441int snd_trident_synth_free(struct snd_trident *trident, struct snd_util_memblk *blk); 442int snd_trident_synth_copy_from_user(struct snd_trident *trident, struct snd_util_memblk *blk, 443 int offset, const char __user *data, int size); 444 445#endif /* __SOUND_TRIDENT_H */ 446