1/* 2 * Copyright 1998-2009 VIA Technologies, Inc. All Rights Reserved. 3 * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved. 4 * Copyright 2009 Jonathan Corbet <corbet@lwn.net> 5 */ 6 7/* 8 * Core code for the Via multifunction framebuffer device. 9 */ 10#include <linux/via-core.h> 11#include <linux/via_i2c.h> 12#include <linux/via-gpio.h> 13#include "global.h" 14 15#include <linux/module.h> 16#include <linux/interrupt.h> 17#include <linux/platform_device.h> 18 19/* 20 * The default port config. 21 */ 22static struct via_port_cfg adap_configs[] = { 23 [VIA_PORT_26] = { VIA_PORT_I2C, VIA_MODE_OFF, VIASR, 0x26 }, 24 [VIA_PORT_31] = { VIA_PORT_I2C, VIA_MODE_I2C, VIASR, 0x31 }, 25 [VIA_PORT_25] = { VIA_PORT_GPIO, VIA_MODE_GPIO, VIASR, 0x25 }, 26 [VIA_PORT_2C] = { VIA_PORT_GPIO, VIA_MODE_I2C, VIASR, 0x2c }, 27 [VIA_PORT_3D] = { VIA_PORT_GPIO, VIA_MODE_GPIO, VIASR, 0x3d }, 28 { 0, 0, 0, 0 } 29}; 30 31/* 32 * We currently only support one viafb device (will there ever be 33 * more than one?), so just declare it globally here. 34 */ 35static struct viafb_dev global_dev; 36 37 38/* 39 * Basic register access; spinlock required. 40 */ 41static inline void viafb_mmio_write(int reg, u32 v) 42{ 43 iowrite32(v, global_dev.engine_mmio + reg); 44} 45 46static inline int viafb_mmio_read(int reg) 47{ 48 return ioread32(global_dev.engine_mmio + reg); 49} 50 51/* ---------------------------------------------------------------------- */ 52/* 53 * Interrupt management. We have a single IRQ line for a lot of 54 * different functions, so we need to share it. The design here 55 * is that we don't want to reimplement the shared IRQ code here; 56 * we also want to avoid having contention for a single handler thread. 57 * So each subdev driver which needs interrupts just requests 58 * them directly from the kernel. We just have what's needed for 59 * overall access to the interrupt control register. 60 */ 61 62/* 63 * Which interrupts are enabled now? 64 */ 65static u32 viafb_enabled_ints; 66 67static void __devinit viafb_int_init(void) 68{ 69 viafb_enabled_ints = 0; 70 71 viafb_mmio_write(VDE_INTERRUPT, 0); 72} 73 74/* 75 * Allow subdevs to ask for specific interrupts to be enabled. These 76 * functions must be called with reg_lock held 77 */ 78void viafb_irq_enable(u32 mask) 79{ 80 viafb_enabled_ints |= mask; 81 viafb_mmio_write(VDE_INTERRUPT, viafb_enabled_ints | VDE_I_ENABLE); 82} 83EXPORT_SYMBOL_GPL(viafb_irq_enable); 84 85void viafb_irq_disable(u32 mask) 86{ 87 viafb_enabled_ints &= ~mask; 88 if (viafb_enabled_ints == 0) 89 viafb_mmio_write(VDE_INTERRUPT, 0); /* Disable entirely */ 90 else 91 viafb_mmio_write(VDE_INTERRUPT, 92 viafb_enabled_ints | VDE_I_ENABLE); 93} 94EXPORT_SYMBOL_GPL(viafb_irq_disable); 95 96/* ---------------------------------------------------------------------- */ 97/* 98 * Access to the DMA engine. This currently provides what the camera 99 * driver needs (i.e. outgoing only) but is easily expandable if need 100 * be. 101 */ 102 103/* 104 * There are four DMA channels in the vx855. For now, we only 105 * use one of them, though. Most of the time, the DMA channel 106 * will be idle, so we keep the IRQ handler unregistered except 107 * when some subsystem has indicated an interest. 108 */ 109static int viafb_dma_users; 110static DECLARE_COMPLETION(viafb_dma_completion); 111/* 112 * This mutex protects viafb_dma_users and our global interrupt 113 * registration state; it also serializes access to the DMA 114 * engine. 115 */ 116static DEFINE_MUTEX(viafb_dma_lock); 117 118/* 119 * The VX855 DMA descriptor (used for s/g transfers) looks 120 * like this. 121 */ 122struct viafb_vx855_dma_descr { 123 u32 addr_low; /* Low part of phys addr */ 124 u32 addr_high; /* High 12 bits of addr */ 125 u32 fb_offset; /* Offset into FB memory */ 126 u32 seg_size; /* Size, 16-byte units */ 127 u32 tile_mode; /* "tile mode" setting */ 128 u32 next_desc_low; /* Next descriptor addr */ 129 u32 next_desc_high; 130 u32 pad; /* Fill out to 64 bytes */ 131}; 132 133/* 134 * Flags added to the "next descriptor low" pointers 135 */ 136#define VIAFB_DMA_MAGIC 0x01 /* ??? Just has to be there */ 137#define VIAFB_DMA_FINAL_SEGMENT 0x02 /* Final segment */ 138 139/* 140 * The completion IRQ handler. 141 */ 142static irqreturn_t viafb_dma_irq(int irq, void *data) 143{ 144 int csr; 145 irqreturn_t ret = IRQ_NONE; 146 147 spin_lock(&global_dev.reg_lock); 148 csr = viafb_mmio_read(VDMA_CSR0); 149 if (csr & VDMA_C_DONE) { 150 viafb_mmio_write(VDMA_CSR0, VDMA_C_DONE); 151 complete(&viafb_dma_completion); 152 ret = IRQ_HANDLED; 153 } 154 spin_unlock(&global_dev.reg_lock); 155 return ret; 156} 157 158/* 159 * Indicate a need for DMA functionality. 160 */ 161int viafb_request_dma(void) 162{ 163 int ret = 0; 164 165 /* 166 * Only VX855 is supported currently. 167 */ 168 if (global_dev.chip_type != UNICHROME_VX855) 169 return -ENODEV; 170 /* 171 * Note the new user and set up our interrupt handler 172 * if need be. 173 */ 174 mutex_lock(&viafb_dma_lock); 175 viafb_dma_users++; 176 if (viafb_dma_users == 1) { 177 ret = request_irq(global_dev.pdev->irq, viafb_dma_irq, 178 IRQF_SHARED, "via-dma", &viafb_dma_users); 179 if (ret) 180 viafb_dma_users--; 181 else 182 viafb_irq_enable(VDE_I_DMA0TDEN); 183 } 184 mutex_unlock(&viafb_dma_lock); 185 return ret; 186} 187EXPORT_SYMBOL_GPL(viafb_request_dma); 188 189void viafb_release_dma(void) 190{ 191 mutex_lock(&viafb_dma_lock); 192 viafb_dma_users--; 193 if (viafb_dma_users == 0) { 194 viafb_irq_disable(VDE_I_DMA0TDEN); 195 free_irq(global_dev.pdev->irq, &viafb_dma_users); 196 } 197 mutex_unlock(&viafb_dma_lock); 198} 199EXPORT_SYMBOL_GPL(viafb_release_dma); 200 201 202 203/* 204 * Do a scatter/gather DMA copy from FB memory. You must have done 205 * a successful call to viafb_request_dma() first. 206 */ 207int viafb_dma_copy_out_sg(unsigned int offset, struct scatterlist *sg, int nsg) 208{ 209 struct viafb_vx855_dma_descr *descr; 210 void *descrpages; 211 dma_addr_t descr_handle; 212 unsigned long flags; 213 int i; 214 struct scatterlist *sgentry; 215 dma_addr_t nextdesc; 216 217 /* 218 * Get a place to put the descriptors. 219 */ 220 descrpages = dma_alloc_coherent(&global_dev.pdev->dev, 221 nsg*sizeof(struct viafb_vx855_dma_descr), 222 &descr_handle, GFP_KERNEL); 223 if (descrpages == NULL) { 224 dev_err(&global_dev.pdev->dev, "Unable to get descr page.\n"); 225 return -ENOMEM; 226 } 227 mutex_lock(&viafb_dma_lock); 228 /* 229 * Fill them in. 230 */ 231 descr = descrpages; 232 nextdesc = descr_handle + sizeof(struct viafb_vx855_dma_descr); 233 for_each_sg(sg, sgentry, nsg, i) { 234 dma_addr_t paddr = sg_dma_address(sgentry); 235 descr->addr_low = paddr & 0xfffffff0; 236 descr->addr_high = ((u64) paddr >> 32) & 0x0fff; 237 descr->fb_offset = offset; 238 descr->seg_size = sg_dma_len(sgentry) >> 4; 239 descr->tile_mode = 0; 240 descr->next_desc_low = (nextdesc&0xfffffff0) | VIAFB_DMA_MAGIC; 241 descr->next_desc_high = ((u64) nextdesc >> 32) & 0x0fff; 242 descr->pad = 0xffffffff; /* VIA driver does this */ 243 offset += sg_dma_len(sgentry); 244 nextdesc += sizeof(struct viafb_vx855_dma_descr); 245 descr++; 246 } 247 descr[-1].next_desc_low = VIAFB_DMA_FINAL_SEGMENT|VIAFB_DMA_MAGIC; 248 /* 249 * Program the engine. 250 */ 251 spin_lock_irqsave(&global_dev.reg_lock, flags); 252 init_completion(&viafb_dma_completion); 253 viafb_mmio_write(VDMA_DQWCR0, 0); 254 viafb_mmio_write(VDMA_CSR0, VDMA_C_ENABLE|VDMA_C_DONE); 255 viafb_mmio_write(VDMA_MR0, VDMA_MR_TDIE | VDMA_MR_CHAIN); 256 viafb_mmio_write(VDMA_DPRL0, descr_handle | VIAFB_DMA_MAGIC); 257 viafb_mmio_write(VDMA_DPRH0, 258 (((u64)descr_handle >> 32) & 0x0fff) | 0xf0000); 259 (void) viafb_mmio_read(VDMA_CSR0); 260 viafb_mmio_write(VDMA_CSR0, VDMA_C_ENABLE|VDMA_C_START); 261 spin_unlock_irqrestore(&global_dev.reg_lock, flags); 262 /* 263 * Now we just wait until the interrupt handler says 264 * we're done. Except that, actually, we need to wait a little 265 * longer: the interrupts seem to jump the gun a little and we 266 * get corrupted frames sometimes. 267 */ 268 wait_for_completion_timeout(&viafb_dma_completion, 1); 269 msleep(1); 270 if ((viafb_mmio_read(VDMA_CSR0)&VDMA_C_DONE) == 0) 271 printk(KERN_ERR "VIA DMA timeout!\n"); 272 /* 273 * Clean up and we're done. 274 */ 275 viafb_mmio_write(VDMA_CSR0, VDMA_C_DONE); 276 viafb_mmio_write(VDMA_MR0, 0); /* Reset int enable */ 277 mutex_unlock(&viafb_dma_lock); 278 dma_free_coherent(&global_dev.pdev->dev, 279 nsg*sizeof(struct viafb_vx855_dma_descr), descrpages, 280 descr_handle); 281 return 0; 282} 283EXPORT_SYMBOL_GPL(viafb_dma_copy_out_sg); 284 285 286/* ---------------------------------------------------------------------- */ 287/* 288 * Figure out how big our framebuffer memory is. Kind of ugly, 289 * but evidently we can't trust the information found in the 290 * fbdev configuration area. 291 */ 292static u16 via_function3[] = { 293 CLE266_FUNCTION3, KM400_FUNCTION3, CN400_FUNCTION3, CN700_FUNCTION3, 294 CX700_FUNCTION3, KM800_FUNCTION3, KM890_FUNCTION3, P4M890_FUNCTION3, 295 P4M900_FUNCTION3, VX800_FUNCTION3, VX855_FUNCTION3, 296}; 297 298/* Get the BIOS-configured framebuffer size from PCI configuration space 299 * of function 3 in the respective chipset */ 300static int viafb_get_fb_size_from_pci(int chip_type) 301{ 302 int i; 303 u8 offset = 0; 304 u32 FBSize; 305 u32 VideoMemSize; 306 307 /* search for the "FUNCTION3" device in this chipset */ 308 for (i = 0; i < ARRAY_SIZE(via_function3); i++) { 309 struct pci_dev *pdev; 310 311 pdev = pci_get_device(PCI_VENDOR_ID_VIA, via_function3[i], 312 NULL); 313 if (!pdev) 314 continue; 315 316 DEBUG_MSG(KERN_INFO "Device ID = %x\n", pdev->device); 317 318 switch (pdev->device) { 319 case CLE266_FUNCTION3: 320 case KM400_FUNCTION3: 321 offset = 0xE0; 322 break; 323 case CN400_FUNCTION3: 324 case CN700_FUNCTION3: 325 case CX700_FUNCTION3: 326 case KM800_FUNCTION3: 327 case KM890_FUNCTION3: 328 case P4M890_FUNCTION3: 329 case P4M900_FUNCTION3: 330 case VX800_FUNCTION3: 331 case VX855_FUNCTION3: 332 /*case CN750_FUNCTION3: */ 333 offset = 0xA0; 334 break; 335 } 336 337 if (!offset) 338 break; 339 340 pci_read_config_dword(pdev, offset, &FBSize); 341 pci_dev_put(pdev); 342 } 343 344 if (!offset) { 345 printk(KERN_ERR "cannot determine framebuffer size\n"); 346 return -EIO; 347 } 348 349 FBSize = FBSize & 0x00007000; 350 DEBUG_MSG(KERN_INFO "FB Size = %x\n", FBSize); 351 352 if (chip_type < UNICHROME_CX700) { 353 switch (FBSize) { 354 case 0x00004000: 355 VideoMemSize = (16 << 20); /*16M */ 356 break; 357 358 case 0x00005000: 359 VideoMemSize = (32 << 20); /*32M */ 360 break; 361 362 case 0x00006000: 363 VideoMemSize = (64 << 20); /*64M */ 364 break; 365 366 default: 367 VideoMemSize = (32 << 20); /*32M */ 368 break; 369 } 370 } else { 371 switch (FBSize) { 372 case 0x00001000: 373 VideoMemSize = (8 << 20); /*8M */ 374 break; 375 376 case 0x00002000: 377 VideoMemSize = (16 << 20); /*16M */ 378 break; 379 380 case 0x00003000: 381 VideoMemSize = (32 << 20); /*32M */ 382 break; 383 384 case 0x00004000: 385 VideoMemSize = (64 << 20); /*64M */ 386 break; 387 388 case 0x00005000: 389 VideoMemSize = (128 << 20); /*128M */ 390 break; 391 392 case 0x00006000: 393 VideoMemSize = (256 << 20); /*256M */ 394 break; 395 396 case 0x00007000: /* Only on VX855/875 */ 397 VideoMemSize = (512 << 20); /*512M */ 398 break; 399 400 default: 401 VideoMemSize = (32 << 20); /*32M */ 402 break; 403 } 404 } 405 406 return VideoMemSize; 407} 408 409 410/* 411 * Figure out and map our MMIO regions. 412 */ 413static int __devinit via_pci_setup_mmio(struct viafb_dev *vdev) 414{ 415 int ret; 416 /* 417 * Hook up to the device registers. Note that we soldier 418 * on if it fails; the framebuffer can operate (without 419 * acceleration) without this region. 420 */ 421 vdev->engine_start = pci_resource_start(vdev->pdev, 1); 422 vdev->engine_len = pci_resource_len(vdev->pdev, 1); 423 vdev->engine_mmio = ioremap_nocache(vdev->engine_start, 424 vdev->engine_len); 425 if (vdev->engine_mmio == NULL) 426 dev_err(&vdev->pdev->dev, 427 "Unable to map engine MMIO; operation will be " 428 "slow and crippled.\n"); 429 /* 430 * Map in framebuffer memory. For now, failure here is 431 * fatal. Unfortunately, in the absence of significant 432 * vmalloc space, failure here is also entirely plausible. 433 * Eventually we want to move away from mapping this 434 * entire region. 435 */ 436 vdev->fbmem_start = pci_resource_start(vdev->pdev, 0); 437 ret = vdev->fbmem_len = viafb_get_fb_size_from_pci(vdev->chip_type); 438 if (ret < 0) 439 goto out_unmap; 440 vdev->fbmem = ioremap_nocache(vdev->fbmem_start, vdev->fbmem_len); 441 if (vdev->fbmem == NULL) { 442 ret = -ENOMEM; 443 goto out_unmap; 444 } 445 return 0; 446out_unmap: 447 iounmap(vdev->engine_mmio); 448 return ret; 449} 450 451static void via_pci_teardown_mmio(struct viafb_dev *vdev) 452{ 453 iounmap(vdev->fbmem); 454 iounmap(vdev->engine_mmio); 455} 456 457/* 458 * Create our subsidiary devices. 459 */ 460static struct viafb_subdev_info { 461 char *name; 462 struct platform_device *platdev; 463} viafb_subdevs[] = { 464 { 465 .name = "viafb-gpio", 466 }, 467 { 468 .name = "viafb-i2c", 469 } 470}; 471#define N_SUBDEVS ARRAY_SIZE(viafb_subdevs) 472 473static int __devinit via_create_subdev(struct viafb_dev *vdev, 474 struct viafb_subdev_info *info) 475{ 476 int ret; 477 478 info->platdev = platform_device_alloc(info->name, -1); 479 if (!info->platdev) { 480 dev_err(&vdev->pdev->dev, "Unable to allocate pdev %s\n", 481 info->name); 482 return -ENOMEM; 483 } 484 info->platdev->dev.parent = &vdev->pdev->dev; 485 info->platdev->dev.platform_data = vdev; 486 ret = platform_device_add(info->platdev); 487 if (ret) { 488 dev_err(&vdev->pdev->dev, "Unable to add pdev %s\n", 489 info->name); 490 platform_device_put(info->platdev); 491 info->platdev = NULL; 492 } 493 return ret; 494} 495 496static int __devinit via_setup_subdevs(struct viafb_dev *vdev) 497{ 498 int i; 499 500 /* 501 * Ignore return values. Even if some of the devices 502 * fail to be created, we'll still be able to use some 503 * of the rest. 504 */ 505 for (i = 0; i < N_SUBDEVS; i++) 506 via_create_subdev(vdev, viafb_subdevs + i); 507 return 0; 508} 509 510static void via_teardown_subdevs(void) 511{ 512 int i; 513 514 for (i = 0; i < N_SUBDEVS; i++) 515 if (viafb_subdevs[i].platdev) { 516 viafb_subdevs[i].platdev->dev.platform_data = NULL; 517 platform_device_unregister(viafb_subdevs[i].platdev); 518 } 519} 520 521 522static int __devinit via_pci_probe(struct pci_dev *pdev, 523 const struct pci_device_id *ent) 524{ 525 int ret; 526 527 ret = pci_enable_device(pdev); 528 if (ret) 529 return ret; 530 /* 531 * Global device initialization. 532 */ 533 memset(&global_dev, 0, sizeof(global_dev)); 534 global_dev.pdev = pdev; 535 global_dev.chip_type = ent->driver_data; 536 global_dev.port_cfg = adap_configs; 537 spin_lock_init(&global_dev.reg_lock); 538 ret = via_pci_setup_mmio(&global_dev); 539 if (ret) 540 goto out_disable; 541 /* 542 * Set up interrupts and create our subdevices. Continue even if 543 * some things fail. 544 */ 545 viafb_int_init(); 546 via_setup_subdevs(&global_dev); 547 /* 548 * Set up the framebuffer device 549 */ 550 ret = via_fb_pci_probe(&global_dev); 551 if (ret) 552 goto out_subdevs; 553 return 0; 554 555out_subdevs: 556 via_teardown_subdevs(); 557 via_pci_teardown_mmio(&global_dev); 558out_disable: 559 pci_disable_device(pdev); 560 return ret; 561} 562 563static void __devexit via_pci_remove(struct pci_dev *pdev) 564{ 565 via_teardown_subdevs(); 566 via_fb_pci_remove(pdev); 567 via_pci_teardown_mmio(&global_dev); 568 pci_disable_device(pdev); 569} 570 571 572static struct pci_device_id via_pci_table[] __devinitdata = { 573 { PCI_DEVICE(PCI_VENDOR_ID_VIA, UNICHROME_CLE266_DID), 574 .driver_data = UNICHROME_CLE266 }, 575 { PCI_DEVICE(PCI_VENDOR_ID_VIA, UNICHROME_K400_DID), 576 .driver_data = UNICHROME_K400 }, 577 { PCI_DEVICE(PCI_VENDOR_ID_VIA, UNICHROME_K800_DID), 578 .driver_data = UNICHROME_K800 }, 579 { PCI_DEVICE(PCI_VENDOR_ID_VIA, UNICHROME_PM800_DID), 580 .driver_data = UNICHROME_PM800 }, 581 { PCI_DEVICE(PCI_VENDOR_ID_VIA, UNICHROME_CN700_DID), 582 .driver_data = UNICHROME_CN700 }, 583 { PCI_DEVICE(PCI_VENDOR_ID_VIA, UNICHROME_CX700_DID), 584 .driver_data = UNICHROME_CX700 }, 585 { PCI_DEVICE(PCI_VENDOR_ID_VIA, UNICHROME_CN750_DID), 586 .driver_data = UNICHROME_CN750 }, 587 { PCI_DEVICE(PCI_VENDOR_ID_VIA, UNICHROME_K8M890_DID), 588 .driver_data = UNICHROME_K8M890 }, 589 { PCI_DEVICE(PCI_VENDOR_ID_VIA, UNICHROME_P4M890_DID), 590 .driver_data = UNICHROME_P4M890 }, 591 { PCI_DEVICE(PCI_VENDOR_ID_VIA, UNICHROME_P4M900_DID), 592 .driver_data = UNICHROME_P4M900 }, 593 { PCI_DEVICE(PCI_VENDOR_ID_VIA, UNICHROME_VX800_DID), 594 .driver_data = UNICHROME_VX800 }, 595 { PCI_DEVICE(PCI_VENDOR_ID_VIA, UNICHROME_VX855_DID), 596 .driver_data = UNICHROME_VX855 }, 597 { } 598}; 599MODULE_DEVICE_TABLE(pci, via_pci_table); 600 601static struct pci_driver via_driver = { 602 .name = "viafb", 603 .id_table = via_pci_table, 604 .probe = via_pci_probe, 605 .remove = __devexit_p(via_pci_remove), 606}; 607 608static int __init via_core_init(void) 609{ 610 int ret; 611 612 ret = viafb_init(); 613 if (ret) 614 return ret; 615 viafb_i2c_init(); 616 viafb_gpio_init(); 617 return pci_register_driver(&via_driver); 618} 619 620static void __exit via_core_exit(void) 621{ 622 pci_unregister_driver(&via_driver); 623 viafb_gpio_exit(); 624 viafb_i2c_exit(); 625 viafb_exit(); 626} 627 628module_init(via_core_init); 629module_exit(via_core_exit); 630