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  • only in /netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/usb/host/
1/*
2 * OHCI HCD(Host Controller Driver) for USB.
3 *
4 *(C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
5 *(C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net>
6 *(C) Copyright 2002 Hewlett-Packard Company
7 *
8 * Bus glue for Toshiba Mobile IO(TMIO) Controller's OHCI core
9 * (C) Copyright 2005 Chris Humbert <mahadri-usb@drigon.com>
10 * (C) Copyright 2007, 2008 Dmitry Baryshkov <dbaryshkov@gmail.com>
11 *
12 * This is known to work with the following variants:
13 *	TC6393XB revision 3	(32kB SRAM)
14 *
15 * The TMIO's OHCI core DMAs through a small internal buffer that
16 * is directly addressable by the CPU.
17 *
18 * Written from sparse documentation from Toshiba and Sharp's driver
19 * for the 2.4 kernel,
20 *	usb-ohci-tc6393.c(C) Copyright 2004 Lineo Solutions, Inc.
21 *
22 * This program is free software; you can redistribute it and/or modify
23 * it under the terms of the GNU General Public License version 2 as
24 * published by the Free Software Foundation.
25 */
26
27/*#include <linux/fs.h>
28#include <linux/mount.h>
29#include <linux/pagemap.h>
30#include <linux/init.h>
31#include <linux/namei.h>
32#include <linux/sched.h>*/
33#include <linux/platform_device.h>
34#include <linux/mfd/core.h>
35#include <linux/mfd/tmio.h>
36#include <linux/dma-mapping.h>
37
38/*-------------------------------------------------------------------------*/
39
40/*
41 * USB Host Controller Configuration Register
42 */
43#define CCR_REVID	0x08	/* b Revision ID				*/
44#define CCR_BASE	0x10	/* l USB Control Register Base Address Low	*/
45#define CCR_ILME	0x40	/* b Internal Local Memory Enable		*/
46#define CCR_PM		0x4c	/* w Power Management			*/
47#define CCR_INTC	0x50	/* b INT Control				*/
48#define CCR_LMW1L	0x54	/* w Local Memory Window 1 LMADRS Low	*/
49#define CCR_LMW1H	0x56	/* w Local Memory Window 1 LMADRS High	*/
50#define CCR_LMW1BL	0x58	/* w Local Memory Window 1 Base Address Low	*/
51#define CCR_LMW1BH	0x5A	/* w Local Memory Window 1 Base Address High	*/
52#define CCR_LMW2L	0x5C	/* w Local Memory Window 2 LMADRS Low	*/
53#define CCR_LMW2H	0x5E	/* w Local Memory Window 2 LMADRS High	*/
54#define CCR_LMW2BL	0x60	/* w Local Memory Window 2 Base Address Low	*/
55#define CCR_LMW2BH	0x62	/* w Local Memory Window 2 Base Address High	*/
56#define CCR_MISC	0xFC	/* b MISC					*/
57
58#define CCR_PM_GKEN      0x0001
59#define CCR_PM_CKRNEN    0x0002
60#define CCR_PM_USBPW1    0x0004
61#define CCR_PM_USBPW2    0x0008
62#define CCR_PM_USBPW3    0x0008
63#define CCR_PM_PMEE      0x0100
64#define CCR_PM_PMES      0x8000
65
66/*-------------------------------------------------------------------------*/
67
68struct tmio_hcd {
69	void __iomem		*ccr;
70	spinlock_t		lock; /* protects RMW cycles */
71};
72
73#define hcd_to_tmio(hcd)	((struct tmio_hcd *)(hcd_to_ohci(hcd) + 1))
74
75/*-------------------------------------------------------------------------*/
76
77static void tmio_write_pm(struct platform_device *dev)
78{
79	struct usb_hcd *hcd = platform_get_drvdata(dev);
80	struct tmio_hcd *tmio = hcd_to_tmio(hcd);
81	u16 pm;
82	unsigned long flags;
83
84	spin_lock_irqsave(&tmio->lock, flags);
85
86	pm = CCR_PM_GKEN | CCR_PM_CKRNEN |
87	     CCR_PM_PMEE | CCR_PM_PMES;
88
89	tmio_iowrite16(pm, tmio->ccr + CCR_PM);
90	spin_unlock_irqrestore(&tmio->lock, flags);
91}
92
93static void tmio_stop_hc(struct platform_device *dev)
94{
95	struct usb_hcd *hcd = platform_get_drvdata(dev);
96	struct ohci_hcd *ohci = hcd_to_ohci(hcd);
97	struct tmio_hcd *tmio = hcd_to_tmio(hcd);
98	u16 pm;
99
100	pm = CCR_PM_GKEN | CCR_PM_CKRNEN;
101	switch (ohci->num_ports) {
102		default:
103			dev_err(&dev->dev, "Unsupported amount of ports: %d\n", ohci->num_ports);
104		case 3:
105			pm |= CCR_PM_USBPW3;
106		case 2:
107			pm |= CCR_PM_USBPW2;
108		case 1:
109			pm |= CCR_PM_USBPW1;
110	}
111	tmio_iowrite8(0, tmio->ccr + CCR_INTC);
112	tmio_iowrite8(0, tmio->ccr + CCR_ILME);
113	tmio_iowrite16(0, tmio->ccr + CCR_BASE);
114	tmio_iowrite16(0, tmio->ccr + CCR_BASE + 2);
115	tmio_iowrite16(pm, tmio->ccr + CCR_PM);
116}
117
118static void tmio_start_hc(struct platform_device *dev)
119{
120	struct usb_hcd *hcd = platform_get_drvdata(dev);
121	struct tmio_hcd *tmio = hcd_to_tmio(hcd);
122	unsigned long base = hcd->rsrc_start;
123
124	tmio_write_pm(dev);
125	tmio_iowrite16(base, tmio->ccr + CCR_BASE);
126	tmio_iowrite16(base >> 16, tmio->ccr + CCR_BASE + 2);
127	tmio_iowrite8(1, tmio->ccr + CCR_ILME);
128	tmio_iowrite8(2, tmio->ccr + CCR_INTC);
129
130	dev_info(&dev->dev, "revision %d @ 0x%08llx, irq %d\n",
131			tmio_ioread8(tmio->ccr + CCR_REVID), hcd->rsrc_start, hcd->irq);
132}
133
134static int ohci_tmio_start(struct usb_hcd *hcd)
135{
136	struct ohci_hcd *ohci = hcd_to_ohci(hcd);
137	int ret;
138
139	if ((ret = ohci_init(ohci)) < 0)
140		return ret;
141
142	if ((ret = ohci_run(ohci)) < 0) {
143		err("can't start %s", hcd->self.bus_name);
144		ohci_stop(hcd);
145		return ret;
146	}
147
148	return 0;
149}
150
151static const struct hc_driver ohci_tmio_hc_driver = {
152	.description =		hcd_name,
153	.product_desc =		"TMIO OHCI USB Host Controller",
154	.hcd_priv_size =	sizeof(struct ohci_hcd) + sizeof (struct tmio_hcd),
155
156	/* generic hardware linkage */
157	.irq =			ohci_irq,
158	.flags =		HCD_USB11 | HCD_MEMORY | HCD_LOCAL_MEM,
159
160	/* basic lifecycle operations */
161	.start =		ohci_tmio_start,
162	.stop =			ohci_stop,
163	.shutdown =		ohci_shutdown,
164
165	/* managing i/o requests and associated device resources */
166	.urb_enqueue =		ohci_urb_enqueue,
167	.urb_dequeue =		ohci_urb_dequeue,
168	.endpoint_disable =	ohci_endpoint_disable,
169
170	/* scheduling support */
171	.get_frame_number =	ohci_get_frame,
172
173	/* root hub support */
174	.hub_status_data =	ohci_hub_status_data,
175	.hub_control =		ohci_hub_control,
176#ifdef	CONFIG_PM
177	.bus_suspend =		ohci_bus_suspend,
178	.bus_resume =		ohci_bus_resume,
179#endif
180	.start_port_reset =	ohci_start_port_reset,
181};
182
183/*-------------------------------------------------------------------------*/
184static struct platform_driver ohci_hcd_tmio_driver;
185
186static int __devinit ohci_hcd_tmio_drv_probe(struct platform_device *dev)
187{
188	struct mfd_cell *cell = dev->dev.platform_data;
189	struct resource *regs = platform_get_resource(dev, IORESOURCE_MEM, 0);
190	struct resource *config = platform_get_resource(dev, IORESOURCE_MEM, 1);
191	struct resource *sram = platform_get_resource(dev, IORESOURCE_MEM, 2);
192	int irq = platform_get_irq(dev, 0);
193	struct tmio_hcd *tmio;
194	struct ohci_hcd *ohci;
195	struct usb_hcd *hcd;
196	int ret;
197
198	if (usb_disabled())
199		return -ENODEV;
200
201	if (!cell)
202		return -EINVAL;
203
204	hcd = usb_create_hcd(&ohci_tmio_hc_driver, &dev->dev, dev_name(&dev->dev));
205	if (!hcd) {
206		ret = -ENOMEM;
207		goto err_usb_create_hcd;
208	}
209
210	hcd->rsrc_start = regs->start;
211	hcd->rsrc_len = regs->end - regs->start + 1;
212
213	tmio = hcd_to_tmio(hcd);
214
215	spin_lock_init(&tmio->lock);
216
217	tmio->ccr = ioremap(config->start, config->end - config->start + 1);
218	if (!tmio->ccr) {
219		ret = -ENOMEM;
220		goto err_ioremap_ccr;
221	}
222
223	hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
224	if (!hcd->regs) {
225		ret = -ENOMEM;
226		goto err_ioremap_regs;
227	}
228
229	if (!dma_declare_coherent_memory(&dev->dev, sram->start,
230				sram->start,
231				sram->end - sram->start + 1,
232				DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE)) {
233		ret = -EBUSY;
234		goto err_dma_declare;
235	}
236
237	if (cell->enable) {
238		ret = cell->enable(dev);
239		if (ret)
240			goto err_enable;
241	}
242
243	tmio_start_hc(dev);
244	ohci = hcd_to_ohci(hcd);
245	ohci_hcd_init(ohci);
246
247	ret = usb_add_hcd(hcd, irq, IRQF_DISABLED);
248	if (ret)
249		goto err_add_hcd;
250
251	if (ret == 0)
252		return ret;
253
254	usb_remove_hcd(hcd);
255
256err_add_hcd:
257	tmio_stop_hc(dev);
258	if (cell->disable)
259		cell->disable(dev);
260err_enable:
261	dma_release_declared_memory(&dev->dev);
262err_dma_declare:
263	iounmap(hcd->regs);
264err_ioremap_regs:
265	iounmap(tmio->ccr);
266err_ioremap_ccr:
267	usb_put_hcd(hcd);
268err_usb_create_hcd:
269
270	return ret;
271}
272
273static int __devexit ohci_hcd_tmio_drv_remove(struct platform_device *dev)
274{
275	struct usb_hcd *hcd = platform_get_drvdata(dev);
276	struct tmio_hcd *tmio = hcd_to_tmio(hcd);
277	struct mfd_cell *cell = dev->dev.platform_data;
278
279	usb_remove_hcd(hcd);
280	tmio_stop_hc(dev);
281	if (cell->disable)
282		cell->disable(dev);
283	dma_release_declared_memory(&dev->dev);
284	iounmap(hcd->regs);
285	iounmap(tmio->ccr);
286	usb_put_hcd(hcd);
287
288	platform_set_drvdata(dev, NULL);
289
290	return 0;
291}
292
293#ifdef CONFIG_PM
294static int ohci_hcd_tmio_drv_suspend(struct platform_device *dev, pm_message_t state)
295{
296	struct mfd_cell *cell = dev->dev.platform_data;
297	struct usb_hcd *hcd = platform_get_drvdata(dev);
298	struct ohci_hcd *ohci = hcd_to_ohci(hcd);
299	struct tmio_hcd *tmio = hcd_to_tmio(hcd);
300	unsigned long flags;
301	u8 misc;
302	int ret;
303
304	if (time_before(jiffies, ohci->next_statechange))
305		msleep(5);
306	ohci->next_statechange = jiffies;
307
308	spin_lock_irqsave(&tmio->lock, flags);
309
310	misc = tmio_ioread8(tmio->ccr + CCR_MISC);
311	misc |= 1 << 3; /* USSUSP */
312	tmio_iowrite8(misc, tmio->ccr + CCR_MISC);
313
314	spin_unlock_irqrestore(&tmio->lock, flags);
315
316	if (cell->suspend) {
317		ret = cell->suspend(dev);
318		if (ret)
319			return ret;
320	}
321
322	hcd->state = HC_STATE_SUSPENDED;
323
324	return 0;
325}
326
327static int ohci_hcd_tmio_drv_resume(struct platform_device *dev)
328{
329	struct mfd_cell *cell = dev->dev.platform_data;
330	struct usb_hcd *hcd = platform_get_drvdata(dev);
331	struct ohci_hcd *ohci = hcd_to_ohci(hcd);
332	struct tmio_hcd *tmio = hcd_to_tmio(hcd);
333	unsigned long flags;
334	u8 misc;
335	int ret;
336
337	if (time_before(jiffies, ohci->next_statechange))
338		msleep(5);
339	ohci->next_statechange = jiffies;
340
341	if (cell->resume) {
342		ret = cell->resume(dev);
343		if (ret)
344			return ret;
345	}
346
347	tmio_start_hc(dev);
348
349	spin_lock_irqsave(&tmio->lock, flags);
350
351	misc = tmio_ioread8(tmio->ccr + CCR_MISC);
352	misc &= ~(1 << 3); /* USSUSP */
353	tmio_iowrite8(misc, tmio->ccr + CCR_MISC);
354
355	spin_unlock_irqrestore(&tmio->lock, flags);
356
357	ohci_finish_controller_resume(hcd);
358
359	return 0;
360}
361#else
362#define ohci_hcd_tmio_drv_suspend NULL
363#define ohci_hcd_tmio_drv_resume NULL
364#endif
365
366static struct platform_driver ohci_hcd_tmio_driver = {
367	.probe		= ohci_hcd_tmio_drv_probe,
368	.remove		= __devexit_p(ohci_hcd_tmio_drv_remove),
369	.shutdown	= usb_hcd_platform_shutdown,
370	.suspend	= ohci_hcd_tmio_drv_suspend,
371	.resume		= ohci_hcd_tmio_drv_resume,
372	.driver		= {
373		.name	= "tmio-ohci",
374		.owner	= THIS_MODULE,
375	},
376};
377