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  • only in /netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/usb/host/
1/*
2 * ISP1362 HCD (Host Controller Driver) for USB.
3 *
4 * Copyright (C) 2005 Lothar Wassmann <LW@KARO-electronics.de>
5 *
6 * Derived from the SL811 HCD, rewritten for ISP116x.
7 * Copyright (C) 2005 Olav Kongas <ok@artecdesign.ee>
8 *
9 * Portions:
10 * Copyright (C) 2004 Psion Teklogix (for NetBook PRO)
11 * Copyright (C) 2004 David Brownell
12 */
13
14/*
15 * The ISP1362 chip requires a large delay (300ns and 462ns) between
16 * accesses to the address and data register.
17 * The following timing options exist:
18 *
19 * 1. Configure your memory controller to add such delays if it can (the best)
20 * 2. Implement platform-specific delay function possibly
21 *    combined with configuring the memory controller; see
22 *    include/linux/usb_isp1362.h for more info.
23 * 3. Use ndelay (easiest, poorest).
24 *
25 * Use the corresponding macros USE_PLATFORM_DELAY and USE_NDELAY in the
26 * platform specific section of isp1362.h to select the appropriate variant.
27 *
28 * Also note that according to the Philips "ISP1362 Errata" document
29 * Rev 1.00 from 27 May data corruption may occur when the #WR signal
30 * is reasserted (even with #CS deasserted) within 132ns after a
31 * write cycle to any controller register. If the hardware doesn't
32 * implement the recommended fix (gating the #WR with #CS) software
33 * must ensure that no further write cycle (not necessarily to the chip!)
34 * is issued by the CPU within this interval.
35
36 * For PXA25x this can be ensured by using VLIO with the maximum
37 * recovery time (MSCx = 0x7f8c) with a memory clock of 99.53 MHz.
38 */
39
40#ifdef CONFIG_USB_DEBUG
41# define ISP1362_DEBUG
42#else
43# undef ISP1362_DEBUG
44#endif
45
46/*
47 * The PXA255 UDC apparently doesn't handle GET_STATUS, GET_CONFIG and
48 * GET_INTERFACE requests correctly when the SETUP and DATA stages of the
49 * requests are carried out in separate frames. This will delay any SETUP
50 * packets until the start of the next frame so that this situation is
51 * unlikely to occur (and makes usbtest happy running with a PXA255 target
52 * device).
53 */
54#undef BUGGY_PXA2XX_UDC_USBTEST
55
56#undef PTD_TRACE
57#undef URB_TRACE
58#undef VERBOSE
59#undef REGISTERS
60
61/* This enables a memory test on the ISP1362 chip memory to make sure the
62 * chip access timing is correct.
63 */
64#undef CHIP_BUFFER_TEST
65
66#include <linux/module.h>
67#include <linux/moduleparam.h>
68#include <linux/kernel.h>
69#include <linux/delay.h>
70#include <linux/ioport.h>
71#include <linux/sched.h>
72#include <linux/slab.h>
73#include <linux/smp_lock.h>
74#include <linux/errno.h>
75#include <linux/init.h>
76#include <linux/list.h>
77#include <linux/interrupt.h>
78#include <linux/usb.h>
79#include <linux/usb/isp1362.h>
80#include <linux/usb/hcd.h>
81#include <linux/platform_device.h>
82#include <linux/pm.h>
83#include <linux/io.h>
84#include <linux/bitmap.h>
85
86#include <asm/irq.h>
87#include <asm/system.h>
88#include <asm/byteorder.h>
89#include <asm/unaligned.h>
90
91static int dbg_level;
92#ifdef ISP1362_DEBUG
93module_param(dbg_level, int, 0644);
94#else
95module_param(dbg_level, int, 0);
96#define	STUB_DEBUG_FILE
97#endif
98
99#include "../core/usb.h"
100#include "isp1362.h"
101
102
103#define DRIVER_VERSION	"2005-04-04"
104#define DRIVER_DESC	"ISP1362 USB Host Controller Driver"
105
106MODULE_DESCRIPTION(DRIVER_DESC);
107MODULE_LICENSE("GPL");
108
109static const char hcd_name[] = "isp1362-hcd";
110
111static void isp1362_hc_stop(struct usb_hcd *hcd);
112static int isp1362_hc_start(struct usb_hcd *hcd);
113
114/*-------------------------------------------------------------------------*/
115
116/*
117 * When called from the interrupthandler only isp1362_hcd->irqenb is modified,
118 * since the interrupt handler will write isp1362_hcd->irqenb to HCuPINT upon
119 * completion.
120 * We don't need a 'disable' counterpart, since interrupts will be disabled
121 * only by the interrupt handler.
122 */
123static inline void isp1362_enable_int(struct isp1362_hcd *isp1362_hcd, u16 mask)
124{
125	if ((isp1362_hcd->irqenb | mask) == isp1362_hcd->irqenb)
126		return;
127	if (mask & ~isp1362_hcd->irqenb)
128		isp1362_write_reg16(isp1362_hcd, HCuPINT, mask & ~isp1362_hcd->irqenb);
129	isp1362_hcd->irqenb |= mask;
130	if (isp1362_hcd->irq_active)
131		return;
132	isp1362_write_reg16(isp1362_hcd, HCuPINTENB, isp1362_hcd->irqenb);
133}
134
135/*-------------------------------------------------------------------------*/
136
137static inline struct isp1362_ep_queue *get_ptd_queue(struct isp1362_hcd *isp1362_hcd,
138						     u16 offset)
139{
140	struct isp1362_ep_queue *epq = NULL;
141
142	if (offset < isp1362_hcd->istl_queue[1].buf_start)
143		epq = &isp1362_hcd->istl_queue[0];
144	else if (offset < isp1362_hcd->intl_queue.buf_start)
145		epq = &isp1362_hcd->istl_queue[1];
146	else if (offset < isp1362_hcd->atl_queue.buf_start)
147		epq = &isp1362_hcd->intl_queue;
148	else if (offset < isp1362_hcd->atl_queue.buf_start +
149		   isp1362_hcd->atl_queue.buf_size)
150		epq = &isp1362_hcd->atl_queue;
151
152	if (epq)
153		DBG(1, "%s: PTD $%04x is on %s queue\n", __func__, offset, epq->name);
154	else
155		pr_warning("%s: invalid PTD $%04x\n", __func__, offset);
156
157	return epq;
158}
159
160static inline int get_ptd_offset(struct isp1362_ep_queue *epq, u8 index)
161{
162	int offset;
163
164	if (index * epq->blk_size > epq->buf_size) {
165		pr_warning("%s: Bad %s index %d(%d)\n", __func__, epq->name, index,
166		     epq->buf_size / epq->blk_size);
167		return -EINVAL;
168	}
169	offset = epq->buf_start + index * epq->blk_size;
170	DBG(3, "%s: %s PTD[%02x] # %04x\n", __func__, epq->name, index, offset);
171
172	return offset;
173}
174
175/*-------------------------------------------------------------------------*/
176
177static inline u16 max_transfer_size(struct isp1362_ep_queue *epq, size_t size,
178				    int mps)
179{
180	u16 xfer_size = min_t(size_t, MAX_XFER_SIZE, size);
181
182	xfer_size = min_t(size_t, xfer_size, epq->buf_avail * epq->blk_size - PTD_HEADER_SIZE);
183	if (xfer_size < size && xfer_size % mps)
184		xfer_size -= xfer_size % mps;
185
186	return xfer_size;
187}
188
189static int claim_ptd_buffers(struct isp1362_ep_queue *epq,
190			     struct isp1362_ep *ep, u16 len)
191{
192	int ptd_offset = -EINVAL;
193	int num_ptds = ((len + PTD_HEADER_SIZE - 1) / epq->blk_size) + 1;
194	int found;
195
196	BUG_ON(len > epq->buf_size);
197
198	if (!epq->buf_avail)
199		return -ENOMEM;
200
201	if (ep->num_ptds)
202		pr_err("%s: %s len %d/%d num_ptds %d buf_map %08lx skip_map %08lx\n", __func__,
203		    epq->name, len, epq->blk_size, num_ptds, epq->buf_map, epq->skip_map);
204	BUG_ON(ep->num_ptds != 0);
205
206	found = bitmap_find_next_zero_area(&epq->buf_map, epq->buf_count, 0,
207						num_ptds, 0);
208	if (found >= epq->buf_count)
209		return -EOVERFLOW;
210
211	DBG(1, "%s: Found %d PTDs[%d] for %d/%d byte\n", __func__,
212	    num_ptds, found, len, (int)(epq->blk_size - PTD_HEADER_SIZE));
213	ptd_offset = get_ptd_offset(epq, found);
214	WARN_ON(ptd_offset < 0);
215	ep->ptd_offset = ptd_offset;
216	ep->num_ptds += num_ptds;
217	epq->buf_avail -= num_ptds;
218	BUG_ON(epq->buf_avail > epq->buf_count);
219	ep->ptd_index = found;
220	bitmap_set(&epq->buf_map, found, num_ptds);
221	DBG(1, "%s: Done %s PTD[%d] $%04x, avail %d count %d claimed %d %08lx:%08lx\n",
222	    __func__, epq->name, ep->ptd_index, ep->ptd_offset,
223	    epq->buf_avail, epq->buf_count, num_ptds, epq->buf_map, epq->skip_map);
224
225	return found;
226}
227
228static inline void release_ptd_buffers(struct isp1362_ep_queue *epq, struct isp1362_ep *ep)
229{
230	int index = ep->ptd_index;
231	int last = ep->ptd_index + ep->num_ptds;
232
233	if (last > epq->buf_count)
234		pr_err("%s: ep %p req %d len %d %s PTD[%d] $%04x num_ptds %d buf_count %d buf_avail %d buf_map %08lx skip_map %08lx\n",
235		    __func__, ep, ep->num_req, ep->length, epq->name, ep->ptd_index,
236		    ep->ptd_offset, ep->num_ptds, epq->buf_count, epq->buf_avail,
237		    epq->buf_map, epq->skip_map);
238	BUG_ON(last > epq->buf_count);
239
240	for (; index < last; index++) {
241		__clear_bit(index, &epq->buf_map);
242		__set_bit(index, &epq->skip_map);
243	}
244	epq->buf_avail += ep->num_ptds;
245	epq->ptd_count--;
246
247	BUG_ON(epq->buf_avail > epq->buf_count);
248	BUG_ON(epq->ptd_count > epq->buf_count);
249
250	DBG(1, "%s: Done %s PTDs $%04x released %d avail %d count %d\n",
251	    __func__, epq->name,
252	    ep->ptd_offset, ep->num_ptds, epq->buf_avail, epq->buf_count);
253	DBG(1, "%s: buf_map %08lx skip_map %08lx\n", __func__,
254	    epq->buf_map, epq->skip_map);
255
256	ep->num_ptds = 0;
257	ep->ptd_offset = -EINVAL;
258	ep->ptd_index = -EINVAL;
259}
260
261/*-------------------------------------------------------------------------*/
262
263/*
264  Set up PTD's.
265*/
266static void prepare_ptd(struct isp1362_hcd *isp1362_hcd, struct urb *urb,
267			struct isp1362_ep *ep, struct isp1362_ep_queue *epq,
268			u16 fno)
269{
270	struct ptd *ptd;
271	int toggle;
272	int dir;
273	u16 len;
274	size_t buf_len = urb->transfer_buffer_length - urb->actual_length;
275
276	DBG(3, "%s: %s ep %p\n", __func__, epq->name, ep);
277
278	ptd = &ep->ptd;
279
280	ep->data = (unsigned char *)urb->transfer_buffer + urb->actual_length;
281
282	switch (ep->nextpid) {
283	case USB_PID_IN:
284		toggle = usb_gettoggle(urb->dev, ep->epnum, 0);
285		dir = PTD_DIR_IN;
286		if (usb_pipecontrol(urb->pipe)) {
287			len = min_t(size_t, ep->maxpacket, buf_len);
288		} else if (usb_pipeisoc(urb->pipe)) {
289			len = min_t(size_t, urb->iso_frame_desc[fno].length, MAX_XFER_SIZE);
290			ep->data = urb->transfer_buffer + urb->iso_frame_desc[fno].offset;
291		} else
292			len = max_transfer_size(epq, buf_len, ep->maxpacket);
293		DBG(1, "%s: IN    len %d/%d/%d from URB\n", __func__, len, ep->maxpacket,
294		    (int)buf_len);
295		break;
296	case USB_PID_OUT:
297		toggle = usb_gettoggle(urb->dev, ep->epnum, 1);
298		dir = PTD_DIR_OUT;
299		if (usb_pipecontrol(urb->pipe))
300			len = min_t(size_t, ep->maxpacket, buf_len);
301		else if (usb_pipeisoc(urb->pipe))
302			len = min_t(size_t, urb->iso_frame_desc[0].length, MAX_XFER_SIZE);
303		else
304			len = max_transfer_size(epq, buf_len, ep->maxpacket);
305		if (len == 0)
306			pr_info("%s: Sending ZERO packet: %d\n", __func__,
307			     urb->transfer_flags & URB_ZERO_PACKET);
308		DBG(1, "%s: OUT   len %d/%d/%d from URB\n", __func__, len, ep->maxpacket,
309		    (int)buf_len);
310		break;
311	case USB_PID_SETUP:
312		toggle = 0;
313		dir = PTD_DIR_SETUP;
314		len = sizeof(struct usb_ctrlrequest);
315		DBG(1, "%s: SETUP len %d\n", __func__, len);
316		ep->data = urb->setup_packet;
317		break;
318	case USB_PID_ACK:
319		toggle = 1;
320		len = 0;
321		dir = (urb->transfer_buffer_length && usb_pipein(urb->pipe)) ?
322			PTD_DIR_OUT : PTD_DIR_IN;
323		DBG(1, "%s: ACK   len %d\n", __func__, len);
324		break;
325	default:
326		toggle = dir = len = 0;
327		pr_err("%s@%d: ep->nextpid %02x\n", __func__, __LINE__, ep->nextpid);
328		BUG_ON(1);
329	}
330
331	ep->length = len;
332	if (!len)
333		ep->data = NULL;
334
335	ptd->count = PTD_CC_MSK | PTD_ACTIVE_MSK | PTD_TOGGLE(toggle);
336	ptd->mps = PTD_MPS(ep->maxpacket) | PTD_SPD(urb->dev->speed == USB_SPEED_LOW) |
337		PTD_EP(ep->epnum);
338	ptd->len = PTD_LEN(len) | PTD_DIR(dir);
339	ptd->faddr = PTD_FA(usb_pipedevice(urb->pipe));
340
341	if (usb_pipeint(urb->pipe)) {
342		ptd->faddr |= PTD_SF_INT(ep->branch);
343		ptd->faddr |= PTD_PR(ep->interval ? __ffs(ep->interval) : 0);
344	}
345	if (usb_pipeisoc(urb->pipe))
346		ptd->faddr |= PTD_SF_ISO(fno);
347
348	DBG(1, "%s: Finished\n", __func__);
349}
350
351static void isp1362_write_ptd(struct isp1362_hcd *isp1362_hcd, struct isp1362_ep *ep,
352			      struct isp1362_ep_queue *epq)
353{
354	struct ptd *ptd = &ep->ptd;
355	int len = PTD_GET_DIR(ptd) == PTD_DIR_IN ? 0 : ep->length;
356
357	_BUG_ON(ep->ptd_offset < 0);
358
359	prefetch(ptd);
360	isp1362_write_buffer(isp1362_hcd, ptd, ep->ptd_offset, PTD_HEADER_SIZE);
361	if (len)
362		isp1362_write_buffer(isp1362_hcd, ep->data,
363				     ep->ptd_offset + PTD_HEADER_SIZE, len);
364
365	dump_ptd(ptd);
366	dump_ptd_out_data(ptd, ep->data);
367}
368
369static void isp1362_read_ptd(struct isp1362_hcd *isp1362_hcd, struct isp1362_ep *ep,
370			     struct isp1362_ep_queue *epq)
371{
372	struct ptd *ptd = &ep->ptd;
373	int act_len;
374
375	WARN_ON(list_empty(&ep->active));
376	BUG_ON(ep->ptd_offset < 0);
377
378	list_del_init(&ep->active);
379	DBG(1, "%s: ep %p removed from active list %p\n", __func__, ep, &epq->active);
380
381	prefetchw(ptd);
382	isp1362_read_buffer(isp1362_hcd, ptd, ep->ptd_offset, PTD_HEADER_SIZE);
383	dump_ptd(ptd);
384	act_len = PTD_GET_COUNT(ptd);
385	if (PTD_GET_DIR(ptd) != PTD_DIR_IN || act_len == 0)
386		return;
387	if (act_len > ep->length)
388		pr_err("%s: ep %p PTD $%04x act_len %d ep->length %d\n", __func__, ep,
389			 ep->ptd_offset, act_len, ep->length);
390	BUG_ON(act_len > ep->length);
391	/* Only transfer the amount of data that has actually been overwritten
392	 * in the chip buffer. We don't want any data that doesn't belong to the
393	 * transfer to leak out of the chip to the callers transfer buffer!
394	 */
395	prefetchw(ep->data);
396	isp1362_read_buffer(isp1362_hcd, ep->data,
397			    ep->ptd_offset + PTD_HEADER_SIZE, act_len);
398	dump_ptd_in_data(ptd, ep->data);
399}
400
401/*
402 * INT PTDs will stay in the chip until data is available.
403 * This function will remove a PTD from the chip when the URB is dequeued.
404 * Must be called with the spinlock held and IRQs disabled
405 */
406static void remove_ptd(struct isp1362_hcd *isp1362_hcd, struct isp1362_ep *ep)
407
408{
409	int index;
410	struct isp1362_ep_queue *epq;
411
412	DBG(1, "%s: ep %p PTD[%d] $%04x\n", __func__, ep, ep->ptd_index, ep->ptd_offset);
413	BUG_ON(ep->ptd_offset < 0);
414
415	epq = get_ptd_queue(isp1362_hcd, ep->ptd_offset);
416	BUG_ON(!epq);
417
418	/* put ep in remove_list for cleanup */
419	WARN_ON(!list_empty(&ep->remove_list));
420	list_add_tail(&ep->remove_list, &isp1362_hcd->remove_list);
421	/* let SOF interrupt handle the cleanup */
422	isp1362_enable_int(isp1362_hcd, HCuPINT_SOF);
423
424	index = ep->ptd_index;
425	if (index < 0)
426		/* ISO queues don't have SKIP registers */
427		return;
428
429	DBG(1, "%s: Disabling PTD[%02x] $%04x %08lx|%08x\n", __func__,
430	    index, ep->ptd_offset, epq->skip_map, 1 << index);
431
432	/* prevent further processing of PTD (will be effective after next SOF) */
433	epq->skip_map |= 1 << index;
434	if (epq == &isp1362_hcd->atl_queue) {
435		DBG(2, "%s: ATLSKIP = %08x -> %08lx\n", __func__,
436		    isp1362_read_reg32(isp1362_hcd, HCATLSKIP), epq->skip_map);
437		isp1362_write_reg32(isp1362_hcd, HCATLSKIP, epq->skip_map);
438		if (~epq->skip_map == 0)
439			isp1362_clr_mask16(isp1362_hcd, HCBUFSTAT, HCBUFSTAT_ATL_ACTIVE);
440	} else if (epq == &isp1362_hcd->intl_queue) {
441		DBG(2, "%s: INTLSKIP = %08x -> %08lx\n", __func__,
442		    isp1362_read_reg32(isp1362_hcd, HCINTLSKIP), epq->skip_map);
443		isp1362_write_reg32(isp1362_hcd, HCINTLSKIP, epq->skip_map);
444		if (~epq->skip_map == 0)
445			isp1362_clr_mask16(isp1362_hcd, HCBUFSTAT, HCBUFSTAT_INTL_ACTIVE);
446	}
447}
448
449/*
450  Take done or failed requests out of schedule. Give back
451  processed urbs.
452*/
453static void finish_request(struct isp1362_hcd *isp1362_hcd, struct isp1362_ep *ep,
454			   struct urb *urb, int status)
455     __releases(isp1362_hcd->lock)
456     __acquires(isp1362_hcd->lock)
457{
458	urb->hcpriv = NULL;
459	ep->error_count = 0;
460
461	if (usb_pipecontrol(urb->pipe))
462		ep->nextpid = USB_PID_SETUP;
463
464	URB_DBG("%s: req %d FA %d ep%d%s %s: len %d/%d %s stat %d\n", __func__,
465		ep->num_req, usb_pipedevice(urb->pipe),
466		usb_pipeendpoint(urb->pipe),
467		!usb_pipein(urb->pipe) ? "out" : "in",
468		usb_pipecontrol(urb->pipe) ? "ctrl" :
469			usb_pipeint(urb->pipe) ? "int" :
470			usb_pipebulk(urb->pipe) ? "bulk" :
471			"iso",
472		urb->actual_length, urb->transfer_buffer_length,
473		!(urb->transfer_flags & URB_SHORT_NOT_OK) ?
474		"short_ok" : "", urb->status);
475
476
477	usb_hcd_unlink_urb_from_ep(isp1362_hcd_to_hcd(isp1362_hcd), urb);
478	spin_unlock(&isp1362_hcd->lock);
479	usb_hcd_giveback_urb(isp1362_hcd_to_hcd(isp1362_hcd), urb, status);
480	spin_lock(&isp1362_hcd->lock);
481
482	/* take idle endpoints out of the schedule right away */
483	if (!list_empty(&ep->hep->urb_list))
484		return;
485
486	/* async deschedule */
487	if (!list_empty(&ep->schedule)) {
488		list_del_init(&ep->schedule);
489		return;
490	}
491
492
493	if (ep->interval) {
494		/* periodic deschedule */
495		DBG(1, "deschedule qh%d/%p branch %d load %d bandwidth %d -> %d\n", ep->interval,
496		    ep, ep->branch, ep->load,
497		    isp1362_hcd->load[ep->branch],
498		    isp1362_hcd->load[ep->branch] - ep->load);
499		isp1362_hcd->load[ep->branch] -= ep->load;
500		ep->branch = PERIODIC_SIZE;
501	}
502}
503
504/*
505 * Analyze transfer results, handle partial transfers and errors
506*/
507static void postproc_ep(struct isp1362_hcd *isp1362_hcd, struct isp1362_ep *ep)
508{
509	struct urb *urb = get_urb(ep);
510	struct usb_device *udev;
511	struct ptd *ptd;
512	int short_ok;
513	u16 len;
514	int urbstat = -EINPROGRESS;
515	u8 cc;
516
517	DBG(2, "%s: ep %p req %d\n", __func__, ep, ep->num_req);
518
519	udev = urb->dev;
520	ptd = &ep->ptd;
521	cc = PTD_GET_CC(ptd);
522	if (cc == PTD_NOTACCESSED) {
523		pr_err("%s: req %d PTD %p Untouched by ISP1362\n", __func__,
524		    ep->num_req, ptd);
525		cc = PTD_DEVNOTRESP;
526	}
527
528	short_ok = !(urb->transfer_flags & URB_SHORT_NOT_OK);
529	len = urb->transfer_buffer_length - urb->actual_length;
530
531	/* Data underrun is special. For allowed underrun
532	   we clear the error and continue as normal. For
533	   forbidden underrun we finish the DATA stage
534	   immediately while for control transfer,
535	   we do a STATUS stage.
536	*/
537	if (cc == PTD_DATAUNDERRUN) {
538		if (short_ok) {
539			DBG(1, "%s: req %d Allowed data underrun short_%sok %d/%d/%d byte\n",
540			    __func__, ep->num_req, short_ok ? "" : "not_",
541			    PTD_GET_COUNT(ptd), ep->maxpacket, len);
542			cc = PTD_CC_NOERROR;
543			urbstat = 0;
544		} else {
545			DBG(1, "%s: req %d Data Underrun %s nextpid %02x short_%sok %d/%d/%d byte\n",
546			    __func__, ep->num_req,
547			    usb_pipein(urb->pipe) ? "IN" : "OUT", ep->nextpid,
548			    short_ok ? "" : "not_",
549			    PTD_GET_COUNT(ptd), ep->maxpacket, len);
550			if (usb_pipecontrol(urb->pipe)) {
551				ep->nextpid = USB_PID_ACK;
552				/* save the data underrun error code for later and
553				 * procede with the status stage
554				 */
555				urb->actual_length += PTD_GET_COUNT(ptd);
556				BUG_ON(urb->actual_length > urb->transfer_buffer_length);
557
558				if (urb->status == -EINPROGRESS)
559					urb->status = cc_to_error[PTD_DATAUNDERRUN];
560			} else {
561				usb_settoggle(udev, ep->epnum, ep->nextpid == USB_PID_OUT,
562					      PTD_GET_TOGGLE(ptd));
563				urbstat = cc_to_error[PTD_DATAUNDERRUN];
564			}
565			goto out;
566		}
567	}
568
569	if (cc != PTD_CC_NOERROR) {
570		if (++ep->error_count >= 3 || cc == PTD_CC_STALL || cc == PTD_DATAOVERRUN) {
571			urbstat = cc_to_error[cc];
572			DBG(1, "%s: req %d nextpid %02x, status %d, error %d, error_count %d\n",
573			    __func__, ep->num_req, ep->nextpid, urbstat, cc,
574			    ep->error_count);
575		}
576		goto out;
577	}
578
579	switch (ep->nextpid) {
580	case USB_PID_OUT:
581		if (PTD_GET_COUNT(ptd) != ep->length)
582			pr_err("%s: count=%d len=%d\n", __func__,
583			   PTD_GET_COUNT(ptd), ep->length);
584		BUG_ON(PTD_GET_COUNT(ptd) != ep->length);
585		urb->actual_length += ep->length;
586		BUG_ON(urb->actual_length > urb->transfer_buffer_length);
587		usb_settoggle(udev, ep->epnum, 1, PTD_GET_TOGGLE(ptd));
588		if (urb->actual_length == urb->transfer_buffer_length) {
589			DBG(3, "%s: req %d xfer complete %d/%d status %d -> 0\n", __func__,
590			    ep->num_req, len, ep->maxpacket, urbstat);
591			if (usb_pipecontrol(urb->pipe)) {
592				DBG(3, "%s: req %d %s Wait for ACK\n", __func__,
593				    ep->num_req,
594				    usb_pipein(urb->pipe) ? "IN" : "OUT");
595				ep->nextpid = USB_PID_ACK;
596			} else {
597				if (len % ep->maxpacket ||
598				    !(urb->transfer_flags & URB_ZERO_PACKET)) {
599					urbstat = 0;
600					DBG(3, "%s: req %d URB %s status %d count %d/%d/%d\n",
601					    __func__, ep->num_req, usb_pipein(urb->pipe) ? "IN" : "OUT",
602					    urbstat, len, ep->maxpacket, urb->actual_length);
603				}
604			}
605		}
606		break;
607	case USB_PID_IN:
608		len = PTD_GET_COUNT(ptd);
609		BUG_ON(len > ep->length);
610		urb->actual_length += len;
611		BUG_ON(urb->actual_length > urb->transfer_buffer_length);
612		usb_settoggle(udev, ep->epnum, 0, PTD_GET_TOGGLE(ptd));
613		/* if transfer completed or (allowed) data underrun */
614		if ((urb->transfer_buffer_length == urb->actual_length) ||
615		    len % ep->maxpacket) {
616			DBG(3, "%s: req %d xfer complete %d/%d status %d -> 0\n", __func__,
617			    ep->num_req, len, ep->maxpacket, urbstat);
618			if (usb_pipecontrol(urb->pipe)) {
619				DBG(3, "%s: req %d %s Wait for ACK\n", __func__,
620				    ep->num_req,
621				    usb_pipein(urb->pipe) ? "IN" : "OUT");
622				ep->nextpid = USB_PID_ACK;
623			} else {
624				urbstat = 0;
625				DBG(3, "%s: req %d URB %s status %d count %d/%d/%d\n",
626				    __func__, ep->num_req, usb_pipein(urb->pipe) ? "IN" : "OUT",
627				    urbstat, len, ep->maxpacket, urb->actual_length);
628			}
629		}
630		break;
631	case USB_PID_SETUP:
632		if (urb->transfer_buffer_length == urb->actual_length) {
633			ep->nextpid = USB_PID_ACK;
634		} else if (usb_pipeout(urb->pipe)) {
635			usb_settoggle(udev, 0, 1, 1);
636			ep->nextpid = USB_PID_OUT;
637		} else {
638			usb_settoggle(udev, 0, 0, 1);
639			ep->nextpid = USB_PID_IN;
640		}
641		break;
642	case USB_PID_ACK:
643		DBG(3, "%s: req %d got ACK %d -> 0\n", __func__, ep->num_req,
644		    urbstat);
645		WARN_ON(urbstat != -EINPROGRESS);
646		urbstat = 0;
647		ep->nextpid = 0;
648		break;
649	default:
650		BUG_ON(1);
651	}
652
653 out:
654	if (urbstat != -EINPROGRESS) {
655		DBG(2, "%s: Finishing ep %p req %d urb %p status %d\n", __func__,
656		    ep, ep->num_req, urb, urbstat);
657		finish_request(isp1362_hcd, ep, urb, urbstat);
658	}
659}
660
661static void finish_unlinks(struct isp1362_hcd *isp1362_hcd)
662{
663	struct isp1362_ep *ep;
664	struct isp1362_ep *tmp;
665
666	list_for_each_entry_safe(ep, tmp, &isp1362_hcd->remove_list, remove_list) {
667		struct isp1362_ep_queue *epq =
668			get_ptd_queue(isp1362_hcd, ep->ptd_offset);
669		int index = ep->ptd_index;
670
671		BUG_ON(epq == NULL);
672		if (index >= 0) {
673			DBG(1, "%s: remove PTD[%d] $%04x\n", __func__, index, ep->ptd_offset);
674			BUG_ON(ep->num_ptds == 0);
675			release_ptd_buffers(epq, ep);
676		}
677		if (!list_empty(&ep->hep->urb_list)) {
678			struct urb *urb = get_urb(ep);
679
680			DBG(1, "%s: Finishing req %d ep %p from remove_list\n", __func__,
681			    ep->num_req, ep);
682			finish_request(isp1362_hcd, ep, urb, -ESHUTDOWN);
683		}
684		WARN_ON(list_empty(&ep->active));
685		if (!list_empty(&ep->active)) {
686			list_del_init(&ep->active);
687			DBG(1, "%s: ep %p removed from active list\n", __func__, ep);
688		}
689		list_del_init(&ep->remove_list);
690		DBG(1, "%s: ep %p removed from remove_list\n", __func__, ep);
691	}
692	DBG(1, "%s: Done\n", __func__);
693}
694
695static inline void enable_atl_transfers(struct isp1362_hcd *isp1362_hcd, int count)
696{
697	if (count > 0) {
698		if (count < isp1362_hcd->atl_queue.ptd_count)
699			isp1362_write_reg16(isp1362_hcd, HCATLDTC, count);
700		isp1362_enable_int(isp1362_hcd, HCuPINT_ATL);
701		isp1362_write_reg32(isp1362_hcd, HCATLSKIP, isp1362_hcd->atl_queue.skip_map);
702		isp1362_set_mask16(isp1362_hcd, HCBUFSTAT, HCBUFSTAT_ATL_ACTIVE);
703	} else
704		isp1362_enable_int(isp1362_hcd, HCuPINT_SOF);
705}
706
707static inline void enable_intl_transfers(struct isp1362_hcd *isp1362_hcd)
708{
709	isp1362_enable_int(isp1362_hcd, HCuPINT_INTL);
710	isp1362_set_mask16(isp1362_hcd, HCBUFSTAT, HCBUFSTAT_INTL_ACTIVE);
711	isp1362_write_reg32(isp1362_hcd, HCINTLSKIP, isp1362_hcd->intl_queue.skip_map);
712}
713
714static inline void enable_istl_transfers(struct isp1362_hcd *isp1362_hcd, int flip)
715{
716	isp1362_enable_int(isp1362_hcd, flip ? HCuPINT_ISTL1 : HCuPINT_ISTL0);
717	isp1362_set_mask16(isp1362_hcd, HCBUFSTAT, flip ?
718			   HCBUFSTAT_ISTL1_FULL : HCBUFSTAT_ISTL0_FULL);
719}
720
721static int submit_req(struct isp1362_hcd *isp1362_hcd, struct urb *urb,
722		      struct isp1362_ep *ep, struct isp1362_ep_queue *epq)
723{
724	int index = epq->free_ptd;
725
726	prepare_ptd(isp1362_hcd, urb, ep, epq, 0);
727	index = claim_ptd_buffers(epq, ep, ep->length);
728	if (index == -ENOMEM) {
729		DBG(1, "%s: req %d No free %s PTD available: %d, %08lx:%08lx\n", __func__,
730		    ep->num_req, epq->name, ep->num_ptds, epq->buf_map, epq->skip_map);
731		return index;
732	} else if (index == -EOVERFLOW) {
733		DBG(1, "%s: req %d Not enough space for %d byte %s PTD %d %08lx:%08lx\n",
734		    __func__, ep->num_req, ep->length, epq->name, ep->num_ptds,
735		    epq->buf_map, epq->skip_map);
736		return index;
737	} else
738		BUG_ON(index < 0);
739	list_add_tail(&ep->active, &epq->active);
740	DBG(1, "%s: ep %p req %d len %d added to active list %p\n", __func__,
741	    ep, ep->num_req, ep->length, &epq->active);
742	DBG(1, "%s: Submitting %s PTD $%04x for ep %p req %d\n", __func__, epq->name,
743	    ep->ptd_offset, ep, ep->num_req);
744	isp1362_write_ptd(isp1362_hcd, ep, epq);
745	__clear_bit(ep->ptd_index, &epq->skip_map);
746
747	return 0;
748}
749
750static void start_atl_transfers(struct isp1362_hcd *isp1362_hcd)
751{
752	int ptd_count = 0;
753	struct isp1362_ep_queue *epq = &isp1362_hcd->atl_queue;
754	struct isp1362_ep *ep;
755	int defer = 0;
756
757	if (atomic_read(&epq->finishing)) {
758		DBG(1, "%s: finish_transfers is active for %s\n", __func__, epq->name);
759		return;
760	}
761
762	list_for_each_entry(ep, &isp1362_hcd->async, schedule) {
763		struct urb *urb = get_urb(ep);
764		int ret;
765
766		if (!list_empty(&ep->active)) {
767			DBG(2, "%s: Skipping active %s ep %p\n", __func__, epq->name, ep);
768			continue;
769		}
770
771		DBG(1, "%s: Processing %s ep %p req %d\n", __func__, epq->name,
772		    ep, ep->num_req);
773
774		ret = submit_req(isp1362_hcd, urb, ep, epq);
775		if (ret == -ENOMEM) {
776			defer = 1;
777			break;
778		} else if (ret == -EOVERFLOW) {
779			defer = 1;
780			continue;
781		}
782#ifdef BUGGY_PXA2XX_UDC_USBTEST
783		defer = ep->nextpid == USB_PID_SETUP;
784#endif
785		ptd_count++;
786	}
787
788	/* Avoid starving of endpoints */
789	if (isp1362_hcd->async.next != isp1362_hcd->async.prev) {
790		DBG(2, "%s: Cycling ASYNC schedule %d\n", __func__, ptd_count);
791		list_move(&isp1362_hcd->async, isp1362_hcd->async.next);
792	}
793	if (ptd_count || defer)
794		enable_atl_transfers(isp1362_hcd, defer ? 0 : ptd_count);
795
796	epq->ptd_count += ptd_count;
797	if (epq->ptd_count > epq->stat_maxptds) {
798		epq->stat_maxptds = epq->ptd_count;
799		DBG(0, "%s: max_ptds: %d\n", __func__, epq->stat_maxptds);
800	}
801}
802
803static void start_intl_transfers(struct isp1362_hcd *isp1362_hcd)
804{
805	int ptd_count = 0;
806	struct isp1362_ep_queue *epq = &isp1362_hcd->intl_queue;
807	struct isp1362_ep *ep;
808
809	if (atomic_read(&epq->finishing)) {
810		DBG(1, "%s: finish_transfers is active for %s\n", __func__, epq->name);
811		return;
812	}
813
814	list_for_each_entry(ep, &isp1362_hcd->periodic, schedule) {
815		struct urb *urb = get_urb(ep);
816		int ret;
817
818		if (!list_empty(&ep->active)) {
819			DBG(1, "%s: Skipping active %s ep %p\n", __func__,
820			    epq->name, ep);
821			continue;
822		}
823
824		DBG(1, "%s: Processing %s ep %p req %d\n", __func__,
825		    epq->name, ep, ep->num_req);
826		ret = submit_req(isp1362_hcd, urb, ep, epq);
827		if (ret == -ENOMEM)
828			break;
829		else if (ret == -EOVERFLOW)
830			continue;
831		ptd_count++;
832	}
833
834	if (ptd_count) {
835		static int last_count;
836
837		if (ptd_count != last_count) {
838			DBG(0, "%s: ptd_count: %d\n", __func__, ptd_count);
839			last_count = ptd_count;
840		}
841		enable_intl_transfers(isp1362_hcd);
842	}
843
844	epq->ptd_count += ptd_count;
845	if (epq->ptd_count > epq->stat_maxptds)
846		epq->stat_maxptds = epq->ptd_count;
847}
848
849static inline int next_ptd(struct isp1362_ep_queue *epq, struct isp1362_ep *ep)
850{
851	u16 ptd_offset = ep->ptd_offset;
852	int num_ptds = (ep->length + PTD_HEADER_SIZE + (epq->blk_size - 1)) / epq->blk_size;
853
854	DBG(2, "%s: PTD offset $%04x + %04x => %d * %04x -> $%04x\n", __func__, ptd_offset,
855	    ep->length, num_ptds, epq->blk_size, ptd_offset + num_ptds * epq->blk_size);
856
857	ptd_offset += num_ptds * epq->blk_size;
858	if (ptd_offset < epq->buf_start + epq->buf_size)
859		return ptd_offset;
860	else
861		return -ENOMEM;
862}
863
864static void start_iso_transfers(struct isp1362_hcd *isp1362_hcd)
865{
866	int ptd_count = 0;
867	int flip = isp1362_hcd->istl_flip;
868	struct isp1362_ep_queue *epq;
869	int ptd_offset;
870	struct isp1362_ep *ep;
871	struct isp1362_ep *tmp;
872	u16 fno = isp1362_read_reg32(isp1362_hcd, HCFMNUM);
873
874 fill2:
875	epq = &isp1362_hcd->istl_queue[flip];
876	if (atomic_read(&epq->finishing)) {
877		DBG(1, "%s: finish_transfers is active for %s\n", __func__, epq->name);
878		return;
879	}
880
881	if (!list_empty(&epq->active))
882		return;
883
884	ptd_offset = epq->buf_start;
885	list_for_each_entry_safe(ep, tmp, &isp1362_hcd->isoc, schedule) {
886		struct urb *urb = get_urb(ep);
887		s16 diff = fno - (u16)urb->start_frame;
888
889		DBG(1, "%s: Processing %s ep %p\n", __func__, epq->name, ep);
890
891		if (diff > urb->number_of_packets) {
892			/* time frame for this URB has elapsed */
893			finish_request(isp1362_hcd, ep, urb, -EOVERFLOW);
894			continue;
895		} else if (diff < -1) {
896			/* URB is not due in this frame or the next one.
897			 * Comparing with '-1' instead of '0' accounts for double
898			 * buffering in the ISP1362 which enables us to queue the PTD
899			 * one frame ahead of time
900			 */
901		} else if (diff == -1) {
902			/* submit PTD's that are due in the next frame */
903			prepare_ptd(isp1362_hcd, urb, ep, epq, fno);
904			if (ptd_offset + PTD_HEADER_SIZE + ep->length >
905			    epq->buf_start + epq->buf_size) {
906				pr_err("%s: Not enough ISO buffer space for %d byte PTD\n",
907				    __func__, ep->length);
908				continue;
909			}
910			ep->ptd_offset = ptd_offset;
911			list_add_tail(&ep->active, &epq->active);
912
913			ptd_offset = next_ptd(epq, ep);
914			if (ptd_offset < 0) {
915				pr_warning("%s: req %d No more %s PTD buffers available\n", __func__,
916				     ep->num_req, epq->name);
917				break;
918			}
919		}
920	}
921	list_for_each_entry(ep, &epq->active, active) {
922		if (epq->active.next == &ep->active)
923			ep->ptd.mps |= PTD_LAST_MSK;
924		isp1362_write_ptd(isp1362_hcd, ep, epq);
925		ptd_count++;
926	}
927
928	if (ptd_count)
929		enable_istl_transfers(isp1362_hcd, flip);
930
931	epq->ptd_count += ptd_count;
932	if (epq->ptd_count > epq->stat_maxptds)
933		epq->stat_maxptds = epq->ptd_count;
934
935	/* check, whether the second ISTL buffer may also be filled */
936	if (!(isp1362_read_reg16(isp1362_hcd, HCBUFSTAT) &
937	      (flip ? HCBUFSTAT_ISTL0_FULL : HCBUFSTAT_ISTL1_FULL))) {
938		fno++;
939		ptd_count = 0;
940		flip = 1 - flip;
941		goto fill2;
942	}
943}
944
945static void finish_transfers(struct isp1362_hcd *isp1362_hcd, unsigned long done_map,
946			     struct isp1362_ep_queue *epq)
947{
948	struct isp1362_ep *ep;
949	struct isp1362_ep *tmp;
950
951	if (list_empty(&epq->active)) {
952		DBG(1, "%s: Nothing to do for %s queue\n", __func__, epq->name);
953		return;
954	}
955
956	DBG(1, "%s: Finishing %s transfers %08lx\n", __func__, epq->name, done_map);
957
958	atomic_inc(&epq->finishing);
959	list_for_each_entry_safe(ep, tmp, &epq->active, active) {
960		int index = ep->ptd_index;
961
962		DBG(1, "%s: Checking %s PTD[%02x] $%04x\n", __func__, epq->name,
963		    index, ep->ptd_offset);
964
965		BUG_ON(index < 0);
966		if (__test_and_clear_bit(index, &done_map)) {
967			isp1362_read_ptd(isp1362_hcd, ep, epq);
968			epq->free_ptd = index;
969			BUG_ON(ep->num_ptds == 0);
970			release_ptd_buffers(epq, ep);
971
972			DBG(1, "%s: ep %p req %d removed from active list\n", __func__,
973			    ep, ep->num_req);
974			if (!list_empty(&ep->remove_list)) {
975				list_del_init(&ep->remove_list);
976				DBG(1, "%s: ep %p removed from remove list\n", __func__, ep);
977			}
978			DBG(1, "%s: Postprocessing %s ep %p req %d\n", __func__, epq->name,
979			    ep, ep->num_req);
980			postproc_ep(isp1362_hcd, ep);
981		}
982		if (!done_map)
983			break;
984	}
985	if (done_map)
986		pr_warning("%s: done_map not clear: %08lx:%08lx\n", __func__, done_map,
987		     epq->skip_map);
988	atomic_dec(&epq->finishing);
989}
990
991static void finish_iso_transfers(struct isp1362_hcd *isp1362_hcd, struct isp1362_ep_queue *epq)
992{
993	struct isp1362_ep *ep;
994	struct isp1362_ep *tmp;
995
996	if (list_empty(&epq->active)) {
997		DBG(1, "%s: Nothing to do for %s queue\n", __func__, epq->name);
998		return;
999	}
1000
1001	DBG(1, "%s: Finishing %s transfers\n", __func__, epq->name);
1002
1003	atomic_inc(&epq->finishing);
1004	list_for_each_entry_safe(ep, tmp, &epq->active, active) {
1005		DBG(1, "%s: Checking PTD $%04x\n", __func__, ep->ptd_offset);
1006
1007		isp1362_read_ptd(isp1362_hcd, ep, epq);
1008		DBG(1, "%s: Postprocessing %s ep %p\n", __func__, epq->name, ep);
1009		postproc_ep(isp1362_hcd, ep);
1010	}
1011	WARN_ON(epq->blk_size != 0);
1012	atomic_dec(&epq->finishing);
1013}
1014
1015static irqreturn_t isp1362_irq(struct usb_hcd *hcd)
1016{
1017	int handled = 0;
1018	struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd);
1019	u16 irqstat;
1020	u16 svc_mask;
1021
1022	spin_lock(&isp1362_hcd->lock);
1023
1024	BUG_ON(isp1362_hcd->irq_active++);
1025
1026	isp1362_write_reg16(isp1362_hcd, HCuPINTENB, 0);
1027
1028	irqstat = isp1362_read_reg16(isp1362_hcd, HCuPINT);
1029	DBG(3, "%s: got IRQ %04x:%04x\n", __func__, irqstat, isp1362_hcd->irqenb);
1030
1031	/* only handle interrupts that are currently enabled */
1032	irqstat &= isp1362_hcd->irqenb;
1033	isp1362_write_reg16(isp1362_hcd, HCuPINT, irqstat);
1034	svc_mask = irqstat;
1035
1036	if (irqstat & HCuPINT_SOF) {
1037		isp1362_hcd->irqenb &= ~HCuPINT_SOF;
1038		isp1362_hcd->irq_stat[ISP1362_INT_SOF]++;
1039		handled = 1;
1040		svc_mask &= ~HCuPINT_SOF;
1041		DBG(3, "%s: SOF\n", __func__);
1042		isp1362_hcd->fmindex = isp1362_read_reg32(isp1362_hcd, HCFMNUM);
1043		if (!list_empty(&isp1362_hcd->remove_list))
1044			finish_unlinks(isp1362_hcd);
1045		if (!list_empty(&isp1362_hcd->async) && !(irqstat & HCuPINT_ATL)) {
1046			if (list_empty(&isp1362_hcd->atl_queue.active)) {
1047				start_atl_transfers(isp1362_hcd);
1048			} else {
1049				isp1362_enable_int(isp1362_hcd, HCuPINT_ATL);
1050				isp1362_write_reg32(isp1362_hcd, HCATLSKIP,
1051						    isp1362_hcd->atl_queue.skip_map);
1052				isp1362_set_mask16(isp1362_hcd, HCBUFSTAT, HCBUFSTAT_ATL_ACTIVE);
1053			}
1054		}
1055	}
1056
1057	if (irqstat & HCuPINT_ISTL0) {
1058		isp1362_hcd->irq_stat[ISP1362_INT_ISTL0]++;
1059		handled = 1;
1060		svc_mask &= ~HCuPINT_ISTL0;
1061		isp1362_clr_mask16(isp1362_hcd, HCBUFSTAT, HCBUFSTAT_ISTL0_FULL);
1062		DBG(1, "%s: ISTL0\n", __func__);
1063		WARN_ON((int)!!isp1362_hcd->istl_flip);
1064		WARN_ON(isp1362_read_reg16(isp1362_hcd, HCBUFSTAT) &
1065			HCBUFSTAT_ISTL0_ACTIVE);
1066		WARN_ON(!(isp1362_read_reg16(isp1362_hcd, HCBUFSTAT) &
1067			HCBUFSTAT_ISTL0_DONE));
1068		isp1362_hcd->irqenb &= ~HCuPINT_ISTL0;
1069	}
1070
1071	if (irqstat & HCuPINT_ISTL1) {
1072		isp1362_hcd->irq_stat[ISP1362_INT_ISTL1]++;
1073		handled = 1;
1074		svc_mask &= ~HCuPINT_ISTL1;
1075		isp1362_clr_mask16(isp1362_hcd, HCBUFSTAT, HCBUFSTAT_ISTL1_FULL);
1076		DBG(1, "%s: ISTL1\n", __func__);
1077		WARN_ON(!(int)isp1362_hcd->istl_flip);
1078		WARN_ON(isp1362_read_reg16(isp1362_hcd, HCBUFSTAT) &
1079			HCBUFSTAT_ISTL1_ACTIVE);
1080		WARN_ON(!(isp1362_read_reg16(isp1362_hcd, HCBUFSTAT) &
1081			HCBUFSTAT_ISTL1_DONE));
1082		isp1362_hcd->irqenb &= ~HCuPINT_ISTL1;
1083	}
1084
1085	if (irqstat & (HCuPINT_ISTL0 | HCuPINT_ISTL1)) {
1086		WARN_ON((irqstat & (HCuPINT_ISTL0 | HCuPINT_ISTL1)) ==
1087			(HCuPINT_ISTL0 | HCuPINT_ISTL1));
1088		finish_iso_transfers(isp1362_hcd,
1089				     &isp1362_hcd->istl_queue[isp1362_hcd->istl_flip]);
1090		start_iso_transfers(isp1362_hcd);
1091		isp1362_hcd->istl_flip = 1 - isp1362_hcd->istl_flip;
1092	}
1093
1094	if (irqstat & HCuPINT_INTL) {
1095		u32 done_map = isp1362_read_reg32(isp1362_hcd, HCINTLDONE);
1096		u32 skip_map = isp1362_read_reg32(isp1362_hcd, HCINTLSKIP);
1097		isp1362_hcd->irq_stat[ISP1362_INT_INTL]++;
1098
1099		DBG(2, "%s: INTL\n", __func__);
1100
1101		svc_mask &= ~HCuPINT_INTL;
1102
1103		isp1362_write_reg32(isp1362_hcd, HCINTLSKIP, skip_map | done_map);
1104		if (~(done_map | skip_map) == 0)
1105			/* All PTDs are finished, disable INTL processing entirely */
1106			isp1362_clr_mask16(isp1362_hcd, HCBUFSTAT, HCBUFSTAT_INTL_ACTIVE);
1107
1108		handled = 1;
1109		WARN_ON(!done_map);
1110		if (done_map) {
1111			DBG(3, "%s: INTL done_map %08x\n", __func__, done_map);
1112			finish_transfers(isp1362_hcd, done_map, &isp1362_hcd->intl_queue);
1113			start_intl_transfers(isp1362_hcd);
1114		}
1115	}
1116
1117	if (irqstat & HCuPINT_ATL) {
1118		u32 done_map = isp1362_read_reg32(isp1362_hcd, HCATLDONE);
1119		u32 skip_map = isp1362_read_reg32(isp1362_hcd, HCATLSKIP);
1120		isp1362_hcd->irq_stat[ISP1362_INT_ATL]++;
1121
1122		DBG(2, "%s: ATL\n", __func__);
1123
1124		svc_mask &= ~HCuPINT_ATL;
1125
1126		isp1362_write_reg32(isp1362_hcd, HCATLSKIP, skip_map | done_map);
1127		if (~(done_map | skip_map) == 0)
1128			isp1362_clr_mask16(isp1362_hcd, HCBUFSTAT, HCBUFSTAT_ATL_ACTIVE);
1129		if (done_map) {
1130			DBG(3, "%s: ATL done_map %08x\n", __func__, done_map);
1131			finish_transfers(isp1362_hcd, done_map, &isp1362_hcd->atl_queue);
1132			start_atl_transfers(isp1362_hcd);
1133		}
1134		handled = 1;
1135	}
1136
1137	if (irqstat & HCuPINT_OPR) {
1138		u32 intstat = isp1362_read_reg32(isp1362_hcd, HCINTSTAT);
1139		isp1362_hcd->irq_stat[ISP1362_INT_OPR]++;
1140
1141		svc_mask &= ~HCuPINT_OPR;
1142		DBG(2, "%s: OPR %08x:%08x\n", __func__, intstat, isp1362_hcd->intenb);
1143		intstat &= isp1362_hcd->intenb;
1144		if (intstat & OHCI_INTR_UE) {
1145			pr_err("Unrecoverable error\n");
1146		}
1147		if (intstat & OHCI_INTR_RHSC) {
1148			isp1362_hcd->rhstatus = isp1362_read_reg32(isp1362_hcd, HCRHSTATUS);
1149			isp1362_hcd->rhport[0] = isp1362_read_reg32(isp1362_hcd, HCRHPORT1);
1150			isp1362_hcd->rhport[1] = isp1362_read_reg32(isp1362_hcd, HCRHPORT2);
1151		}
1152		if (intstat & OHCI_INTR_RD) {
1153			pr_info("%s: RESUME DETECTED\n", __func__);
1154			isp1362_show_reg(isp1362_hcd, HCCONTROL);
1155			usb_hcd_resume_root_hub(hcd);
1156		}
1157		isp1362_write_reg32(isp1362_hcd, HCINTSTAT, intstat);
1158		irqstat &= ~HCuPINT_OPR;
1159		handled = 1;
1160	}
1161
1162	if (irqstat & HCuPINT_SUSP) {
1163		isp1362_hcd->irq_stat[ISP1362_INT_SUSP]++;
1164		handled = 1;
1165		svc_mask &= ~HCuPINT_SUSP;
1166
1167		pr_info("%s: SUSPEND IRQ\n", __func__);
1168	}
1169
1170	if (irqstat & HCuPINT_CLKRDY) {
1171		isp1362_hcd->irq_stat[ISP1362_INT_CLKRDY]++;
1172		handled = 1;
1173		isp1362_hcd->irqenb &= ~HCuPINT_CLKRDY;
1174		svc_mask &= ~HCuPINT_CLKRDY;
1175		pr_info("%s: CLKRDY IRQ\n", __func__);
1176	}
1177
1178	if (svc_mask)
1179		pr_err("%s: Unserviced interrupt(s) %04x\n", __func__, svc_mask);
1180
1181	isp1362_write_reg16(isp1362_hcd, HCuPINTENB, isp1362_hcd->irqenb);
1182	isp1362_hcd->irq_active--;
1183	spin_unlock(&isp1362_hcd->lock);
1184
1185	return IRQ_RETVAL(handled);
1186}
1187
1188/*-------------------------------------------------------------------------*/
1189
1190#define	MAX_PERIODIC_LOAD	900	/* out of 1000 usec */
1191static int balance(struct isp1362_hcd *isp1362_hcd, u16 interval, u16 load)
1192{
1193	int i, branch = -ENOSPC;
1194
1195	/* search for the least loaded schedule branch of that interval
1196	 * which has enough bandwidth left unreserved.
1197	 */
1198	for (i = 0; i < interval; i++) {
1199		if (branch < 0 || isp1362_hcd->load[branch] > isp1362_hcd->load[i]) {
1200			int j;
1201
1202			for (j = i; j < PERIODIC_SIZE; j += interval) {
1203				if ((isp1362_hcd->load[j] + load) > MAX_PERIODIC_LOAD) {
1204					pr_err("%s: new load %d load[%02x] %d max %d\n", __func__,
1205					    load, j, isp1362_hcd->load[j], MAX_PERIODIC_LOAD);
1206					break;
1207				}
1208			}
1209			if (j < PERIODIC_SIZE)
1210				continue;
1211			branch = i;
1212		}
1213	}
1214	return branch;
1215}
1216
1217/* NB! ALL the code above this point runs with isp1362_hcd->lock
1218   held, irqs off
1219*/
1220
1221/*-------------------------------------------------------------------------*/
1222
1223static int isp1362_urb_enqueue(struct usb_hcd *hcd,
1224			       struct urb *urb,
1225			       gfp_t mem_flags)
1226{
1227	struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd);
1228	struct usb_device *udev = urb->dev;
1229	unsigned int pipe = urb->pipe;
1230	int is_out = !usb_pipein(pipe);
1231	int type = usb_pipetype(pipe);
1232	int epnum = usb_pipeendpoint(pipe);
1233	struct usb_host_endpoint *hep = urb->ep;
1234	struct isp1362_ep *ep = NULL;
1235	unsigned long flags;
1236	int retval = 0;
1237
1238	DBG(3, "%s: urb %p\n", __func__, urb);
1239
1240	if (type == PIPE_ISOCHRONOUS) {
1241		pr_err("Isochronous transfers not supported\n");
1242		return -ENOSPC;
1243	}
1244
1245	URB_DBG("%s: FA %d ep%d%s %s: len %d %s%s\n", __func__,
1246		usb_pipedevice(pipe), epnum,
1247		is_out ? "out" : "in",
1248		usb_pipecontrol(pipe) ? "ctrl" :
1249			usb_pipeint(pipe) ? "int" :
1250			usb_pipebulk(pipe) ? "bulk" :
1251			"iso",
1252		urb->transfer_buffer_length,
1253		(urb->transfer_flags & URB_ZERO_PACKET) ? "ZERO_PACKET " : "",
1254		!(urb->transfer_flags & URB_SHORT_NOT_OK) ?
1255		"short_ok" : "");
1256
1257	/* avoid all allocations within spinlocks: request or endpoint */
1258	if (!hep->hcpriv) {
1259		ep = kzalloc(sizeof *ep, mem_flags);
1260		if (!ep)
1261			return -ENOMEM;
1262	}
1263	spin_lock_irqsave(&isp1362_hcd->lock, flags);
1264
1265	/* don't submit to a dead or disabled port */
1266	if (!((isp1362_hcd->rhport[0] | isp1362_hcd->rhport[1]) &
1267	      USB_PORT_STAT_ENABLE) ||
1268	    !HC_IS_RUNNING(hcd->state)) {
1269		kfree(ep);
1270		retval = -ENODEV;
1271		goto fail_not_linked;
1272	}
1273
1274	retval = usb_hcd_link_urb_to_ep(hcd, urb);
1275	if (retval) {
1276		kfree(ep);
1277		goto fail_not_linked;
1278	}
1279
1280	if (hep->hcpriv) {
1281		ep = hep->hcpriv;
1282	} else {
1283		INIT_LIST_HEAD(&ep->schedule);
1284		INIT_LIST_HEAD(&ep->active);
1285		INIT_LIST_HEAD(&ep->remove_list);
1286		ep->udev = usb_get_dev(udev);
1287		ep->hep = hep;
1288		ep->epnum = epnum;
1289		ep->maxpacket = usb_maxpacket(udev, urb->pipe, is_out);
1290		ep->ptd_offset = -EINVAL;
1291		ep->ptd_index = -EINVAL;
1292		usb_settoggle(udev, epnum, is_out, 0);
1293
1294		if (type == PIPE_CONTROL)
1295			ep->nextpid = USB_PID_SETUP;
1296		else if (is_out)
1297			ep->nextpid = USB_PID_OUT;
1298		else
1299			ep->nextpid = USB_PID_IN;
1300
1301		switch (type) {
1302		case PIPE_ISOCHRONOUS:
1303		case PIPE_INTERRUPT:
1304			if (urb->interval > PERIODIC_SIZE)
1305				urb->interval = PERIODIC_SIZE;
1306			ep->interval = urb->interval;
1307			ep->branch = PERIODIC_SIZE;
1308			ep->load = usb_calc_bus_time(udev->speed, !is_out,
1309						     (type == PIPE_ISOCHRONOUS),
1310						     usb_maxpacket(udev, pipe, is_out)) / 1000;
1311			break;
1312		}
1313		hep->hcpriv = ep;
1314	}
1315	ep->num_req = isp1362_hcd->req_serial++;
1316
1317	/* maybe put endpoint into schedule */
1318	switch (type) {
1319	case PIPE_CONTROL:
1320	case PIPE_BULK:
1321		if (list_empty(&ep->schedule)) {
1322			DBG(1, "%s: Adding ep %p req %d to async schedule\n",
1323				__func__, ep, ep->num_req);
1324			list_add_tail(&ep->schedule, &isp1362_hcd->async);
1325		}
1326		break;
1327	case PIPE_ISOCHRONOUS:
1328	case PIPE_INTERRUPT:
1329		urb->interval = ep->interval;
1330
1331		/* urb submitted for already existing EP */
1332		if (ep->branch < PERIODIC_SIZE)
1333			break;
1334
1335		retval = balance(isp1362_hcd, ep->interval, ep->load);
1336		if (retval < 0) {
1337			pr_err("%s: balance returned %d\n", __func__, retval);
1338			goto fail;
1339		}
1340		ep->branch = retval;
1341		retval = 0;
1342		isp1362_hcd->fmindex = isp1362_read_reg32(isp1362_hcd, HCFMNUM);
1343		DBG(1, "%s: Current frame %04x branch %02x start_frame %04x(%04x)\n",
1344		    __func__, isp1362_hcd->fmindex, ep->branch,
1345		    ((isp1362_hcd->fmindex + PERIODIC_SIZE - 1) &
1346		     ~(PERIODIC_SIZE - 1)) + ep->branch,
1347		    (isp1362_hcd->fmindex & (PERIODIC_SIZE - 1)) + ep->branch);
1348
1349		if (list_empty(&ep->schedule)) {
1350			if (type == PIPE_ISOCHRONOUS) {
1351				u16 frame = isp1362_hcd->fmindex;
1352
1353				frame += max_t(u16, 8, ep->interval);
1354				frame &= ~(ep->interval - 1);
1355				frame |= ep->branch;
1356				if (frame_before(frame, isp1362_hcd->fmindex))
1357					frame += ep->interval;
1358				urb->start_frame = frame;
1359
1360				DBG(1, "%s: Adding ep %p to isoc schedule\n", __func__, ep);
1361				list_add_tail(&ep->schedule, &isp1362_hcd->isoc);
1362			} else {
1363				DBG(1, "%s: Adding ep %p to periodic schedule\n", __func__, ep);
1364				list_add_tail(&ep->schedule, &isp1362_hcd->periodic);
1365			}
1366		} else
1367			DBG(1, "%s: ep %p already scheduled\n", __func__, ep);
1368
1369		DBG(2, "%s: load %d bandwidth %d -> %d\n", __func__,
1370		    ep->load / ep->interval, isp1362_hcd->load[ep->branch],
1371		    isp1362_hcd->load[ep->branch] + ep->load);
1372		isp1362_hcd->load[ep->branch] += ep->load;
1373	}
1374
1375	urb->hcpriv = hep;
1376	ALIGNSTAT(isp1362_hcd, urb->transfer_buffer);
1377
1378	switch (type) {
1379	case PIPE_CONTROL:
1380	case PIPE_BULK:
1381		start_atl_transfers(isp1362_hcd);
1382		break;
1383	case PIPE_INTERRUPT:
1384		start_intl_transfers(isp1362_hcd);
1385		break;
1386	case PIPE_ISOCHRONOUS:
1387		start_iso_transfers(isp1362_hcd);
1388		break;
1389	default:
1390		BUG();
1391	}
1392 fail:
1393	if (retval)
1394		usb_hcd_unlink_urb_from_ep(hcd, urb);
1395
1396
1397 fail_not_linked:
1398	spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
1399	if (retval)
1400		DBG(0, "%s: urb %p failed with %d\n", __func__, urb, retval);
1401	return retval;
1402}
1403
1404static int isp1362_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1405{
1406	struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd);
1407	struct usb_host_endpoint *hep;
1408	unsigned long flags;
1409	struct isp1362_ep *ep;
1410	int retval = 0;
1411
1412	DBG(3, "%s: urb %p\n", __func__, urb);
1413
1414	spin_lock_irqsave(&isp1362_hcd->lock, flags);
1415	retval = usb_hcd_check_unlink_urb(hcd, urb, status);
1416	if (retval)
1417		goto done;
1418
1419	hep = urb->hcpriv;
1420
1421	if (!hep) {
1422		spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
1423		return -EIDRM;
1424	}
1425
1426	ep = hep->hcpriv;
1427	if (ep) {
1428		/* In front of queue? */
1429		if (ep->hep->urb_list.next == &urb->urb_list) {
1430			if (!list_empty(&ep->active)) {
1431				DBG(1, "%s: urb %p ep %p req %d active PTD[%d] $%04x\n", __func__,
1432				    urb, ep, ep->num_req, ep->ptd_index, ep->ptd_offset);
1433				/* disable processing and queue PTD for removal */
1434				remove_ptd(isp1362_hcd, ep);
1435				urb = NULL;
1436			}
1437		}
1438		if (urb) {
1439			DBG(1, "%s: Finishing ep %p req %d\n", __func__, ep,
1440			    ep->num_req);
1441			finish_request(isp1362_hcd, ep, urb, status);
1442		} else
1443			DBG(1, "%s: urb %p active; wait4irq\n", __func__, urb);
1444	} else {
1445		pr_warning("%s: No EP in URB %p\n", __func__, urb);
1446		retval = -EINVAL;
1447	}
1448done:
1449	spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
1450
1451	DBG(3, "%s: exit\n", __func__);
1452
1453	return retval;
1454}
1455
1456static void isp1362_endpoint_disable(struct usb_hcd *hcd, struct usb_host_endpoint *hep)
1457{
1458	struct isp1362_ep *ep = hep->hcpriv;
1459	struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd);
1460	unsigned long flags;
1461
1462	DBG(1, "%s: ep %p\n", __func__, ep);
1463	if (!ep)
1464		return;
1465	spin_lock_irqsave(&isp1362_hcd->lock, flags);
1466	if (!list_empty(&hep->urb_list)) {
1467		if (!list_empty(&ep->active) && list_empty(&ep->remove_list)) {
1468			DBG(1, "%s: Removing ep %p req %d PTD[%d] $%04x\n", __func__,
1469			    ep, ep->num_req, ep->ptd_index, ep->ptd_offset);
1470			remove_ptd(isp1362_hcd, ep);
1471			pr_info("%s: Waiting for Interrupt to clean up\n", __func__);
1472		}
1473	}
1474	spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
1475	/* Wait for interrupt to clear out active list */
1476	while (!list_empty(&ep->active))
1477		msleep(1);
1478
1479	DBG(1, "%s: Freeing EP %p\n", __func__, ep);
1480
1481	usb_put_dev(ep->udev);
1482	kfree(ep);
1483	hep->hcpriv = NULL;
1484}
1485
1486static int isp1362_get_frame(struct usb_hcd *hcd)
1487{
1488	struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd);
1489	u32 fmnum;
1490	unsigned long flags;
1491
1492	spin_lock_irqsave(&isp1362_hcd->lock, flags);
1493	fmnum = isp1362_read_reg32(isp1362_hcd, HCFMNUM);
1494	spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
1495
1496	return (int)fmnum;
1497}
1498
1499/*-------------------------------------------------------------------------*/
1500
1501/* Adapted from ohci-hub.c */
1502static int isp1362_hub_status_data(struct usb_hcd *hcd, char *buf)
1503{
1504	struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd);
1505	int ports, i, changed = 0;
1506	unsigned long flags;
1507
1508	if (!HC_IS_RUNNING(hcd->state))
1509		return -ESHUTDOWN;
1510
1511	/* Report no status change now, if we are scheduled to be
1512	   called later */
1513	if (timer_pending(&hcd->rh_timer))
1514		return 0;
1515
1516	ports = isp1362_hcd->rhdesca & RH_A_NDP;
1517	BUG_ON(ports > 2);
1518
1519	spin_lock_irqsave(&isp1362_hcd->lock, flags);
1520	/* init status */
1521	if (isp1362_hcd->rhstatus & (RH_HS_LPSC | RH_HS_OCIC))
1522		buf[0] = changed = 1;
1523	else
1524		buf[0] = 0;
1525
1526	for (i = 0; i < ports; i++) {
1527		u32 status = isp1362_hcd->rhport[i];
1528
1529		if (status & (RH_PS_CSC | RH_PS_PESC | RH_PS_PSSC |
1530			      RH_PS_OCIC | RH_PS_PRSC)) {
1531			changed = 1;
1532			buf[0] |= 1 << (i + 1);
1533			continue;
1534		}
1535
1536		if (!(status & RH_PS_CCS))
1537			continue;
1538	}
1539	spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
1540	return changed;
1541}
1542
1543static void isp1362_hub_descriptor(struct isp1362_hcd *isp1362_hcd,
1544				   struct usb_hub_descriptor *desc)
1545{
1546	u32 reg = isp1362_hcd->rhdesca;
1547
1548	DBG(3, "%s: enter\n", __func__);
1549
1550	desc->bDescriptorType = 0x29;
1551	desc->bDescLength = 9;
1552	desc->bHubContrCurrent = 0;
1553	desc->bNbrPorts = reg & 0x3;
1554	/* Power switching, device type, overcurrent. */
1555	desc->wHubCharacteristics = cpu_to_le16((reg >> 8) & 0x1f);
1556	DBG(0, "%s: hubcharacteristics = %02x\n", __func__, cpu_to_le16((reg >> 8) & 0x1f));
1557	desc->bPwrOn2PwrGood = (reg >> 24) & 0xff;
1558	/* two bitmaps:  ports removable, and legacy PortPwrCtrlMask */
1559	desc->bitmap[0] = desc->bNbrPorts == 1 ? 1 << 1 : 3 << 1;
1560	desc->bitmap[1] = ~0;
1561
1562	DBG(3, "%s: exit\n", __func__);
1563}
1564
1565/* Adapted from ohci-hub.c */
1566static int isp1362_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
1567			       u16 wIndex, char *buf, u16 wLength)
1568{
1569	struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd);
1570	int retval = 0;
1571	unsigned long flags;
1572	unsigned long t1;
1573	int ports = isp1362_hcd->rhdesca & RH_A_NDP;
1574	u32 tmp = 0;
1575
1576	switch (typeReq) {
1577	case ClearHubFeature:
1578		DBG(0, "ClearHubFeature: ");
1579		switch (wValue) {
1580		case C_HUB_OVER_CURRENT:
1581			_DBG(0, "C_HUB_OVER_CURRENT\n");
1582			spin_lock_irqsave(&isp1362_hcd->lock, flags);
1583			isp1362_write_reg32(isp1362_hcd, HCRHSTATUS, RH_HS_OCIC);
1584			spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
1585		case C_HUB_LOCAL_POWER:
1586			_DBG(0, "C_HUB_LOCAL_POWER\n");
1587			break;
1588		default:
1589			goto error;
1590		}
1591		break;
1592	case SetHubFeature:
1593		DBG(0, "SetHubFeature: ");
1594		switch (wValue) {
1595		case C_HUB_OVER_CURRENT:
1596		case C_HUB_LOCAL_POWER:
1597			_DBG(0, "C_HUB_OVER_CURRENT or C_HUB_LOCAL_POWER\n");
1598			break;
1599		default:
1600			goto error;
1601		}
1602		break;
1603	case GetHubDescriptor:
1604		DBG(0, "GetHubDescriptor\n");
1605		isp1362_hub_descriptor(isp1362_hcd, (struct usb_hub_descriptor *)buf);
1606		break;
1607	case GetHubStatus:
1608		DBG(0, "GetHubStatus\n");
1609		put_unaligned(cpu_to_le32(0), (__le32 *) buf);
1610		break;
1611	case GetPortStatus:
1612#ifndef VERBOSE
1613		DBG(0, "GetPortStatus\n");
1614#endif
1615		if (!wIndex || wIndex > ports)
1616			goto error;
1617		tmp = isp1362_hcd->rhport[--wIndex];
1618		put_unaligned(cpu_to_le32(tmp), (__le32 *) buf);
1619		break;
1620	case ClearPortFeature:
1621		DBG(0, "ClearPortFeature: ");
1622		if (!wIndex || wIndex > ports)
1623			goto error;
1624		wIndex--;
1625
1626		switch (wValue) {
1627		case USB_PORT_FEAT_ENABLE:
1628			_DBG(0, "USB_PORT_FEAT_ENABLE\n");
1629			tmp = RH_PS_CCS;
1630			break;
1631		case USB_PORT_FEAT_C_ENABLE:
1632			_DBG(0, "USB_PORT_FEAT_C_ENABLE\n");
1633			tmp = RH_PS_PESC;
1634			break;
1635		case USB_PORT_FEAT_SUSPEND:
1636			_DBG(0, "USB_PORT_FEAT_SUSPEND\n");
1637			tmp = RH_PS_POCI;
1638			break;
1639		case USB_PORT_FEAT_C_SUSPEND:
1640			_DBG(0, "USB_PORT_FEAT_C_SUSPEND\n");
1641			tmp = RH_PS_PSSC;
1642			break;
1643		case USB_PORT_FEAT_POWER:
1644			_DBG(0, "USB_PORT_FEAT_POWER\n");
1645			tmp = RH_PS_LSDA;
1646
1647			break;
1648		case USB_PORT_FEAT_C_CONNECTION:
1649			_DBG(0, "USB_PORT_FEAT_C_CONNECTION\n");
1650			tmp = RH_PS_CSC;
1651			break;
1652		case USB_PORT_FEAT_C_OVER_CURRENT:
1653			_DBG(0, "USB_PORT_FEAT_C_OVER_CURRENT\n");
1654			tmp = RH_PS_OCIC;
1655			break;
1656		case USB_PORT_FEAT_C_RESET:
1657			_DBG(0, "USB_PORT_FEAT_C_RESET\n");
1658			tmp = RH_PS_PRSC;
1659			break;
1660		default:
1661			goto error;
1662		}
1663
1664		spin_lock_irqsave(&isp1362_hcd->lock, flags);
1665		isp1362_write_reg32(isp1362_hcd, HCRHPORT1 + wIndex, tmp);
1666		isp1362_hcd->rhport[wIndex] =
1667			isp1362_read_reg32(isp1362_hcd, HCRHPORT1 + wIndex);
1668		spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
1669		break;
1670	case SetPortFeature:
1671		DBG(0, "SetPortFeature: ");
1672		if (!wIndex || wIndex > ports)
1673			goto error;
1674		wIndex--;
1675		switch (wValue) {
1676		case USB_PORT_FEAT_SUSPEND:
1677			_DBG(0, "USB_PORT_FEAT_SUSPEND\n");
1678#ifdef	CONFIG_USB_OTG
1679			if (ohci->hcd.self.otg_port == (wIndex + 1) &&
1680			    ohci->hcd.self.b_hnp_enable) {
1681				start_hnp(ohci);
1682				break;
1683			}
1684#endif
1685			spin_lock_irqsave(&isp1362_hcd->lock, flags);
1686			isp1362_write_reg32(isp1362_hcd, HCRHPORT1 + wIndex, RH_PS_PSS);
1687			isp1362_hcd->rhport[wIndex] =
1688				isp1362_read_reg32(isp1362_hcd, HCRHPORT1 + wIndex);
1689			spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
1690			break;
1691		case USB_PORT_FEAT_POWER:
1692			_DBG(0, "USB_PORT_FEAT_POWER\n");
1693			spin_lock_irqsave(&isp1362_hcd->lock, flags);
1694			isp1362_write_reg32(isp1362_hcd, HCRHPORT1 + wIndex, RH_PS_PPS);
1695			isp1362_hcd->rhport[wIndex] =
1696				isp1362_read_reg32(isp1362_hcd, HCRHPORT1 + wIndex);
1697			spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
1698			break;
1699		case USB_PORT_FEAT_RESET:
1700			_DBG(0, "USB_PORT_FEAT_RESET\n");
1701			spin_lock_irqsave(&isp1362_hcd->lock, flags);
1702
1703			t1 = jiffies + msecs_to_jiffies(USB_RESET_WIDTH);
1704			while (time_before(jiffies, t1)) {
1705				/* spin until any current reset finishes */
1706				for (;;) {
1707					tmp = isp1362_read_reg32(isp1362_hcd, HCRHPORT1 + wIndex);
1708					if (!(tmp & RH_PS_PRS))
1709						break;
1710					udelay(500);
1711				}
1712				if (!(tmp & RH_PS_CCS))
1713					break;
1714				/* Reset lasts 10ms (claims datasheet) */
1715				isp1362_write_reg32(isp1362_hcd, HCRHPORT1 + wIndex, (RH_PS_PRS));
1716
1717				spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
1718				msleep(10);
1719				spin_lock_irqsave(&isp1362_hcd->lock, flags);
1720			}
1721
1722			isp1362_hcd->rhport[wIndex] = isp1362_read_reg32(isp1362_hcd,
1723									 HCRHPORT1 + wIndex);
1724			spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
1725			break;
1726		default:
1727			goto error;
1728		}
1729		break;
1730
1731	default:
1732 error:
1733		/* "protocol stall" on error */
1734		_DBG(0, "PROTOCOL STALL\n");
1735		retval = -EPIPE;
1736	}
1737
1738	return retval;
1739}
1740
1741#ifdef	CONFIG_PM
1742static int isp1362_bus_suspend(struct usb_hcd *hcd)
1743{
1744	int status = 0;
1745	struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd);
1746	unsigned long flags;
1747
1748	if (time_before(jiffies, isp1362_hcd->next_statechange))
1749		msleep(5);
1750
1751	spin_lock_irqsave(&isp1362_hcd->lock, flags);
1752
1753	isp1362_hcd->hc_control = isp1362_read_reg32(isp1362_hcd, HCCONTROL);
1754	switch (isp1362_hcd->hc_control & OHCI_CTRL_HCFS) {
1755	case OHCI_USB_RESUME:
1756		DBG(0, "%s: resume/suspend?\n", __func__);
1757		isp1362_hcd->hc_control &= ~OHCI_CTRL_HCFS;
1758		isp1362_hcd->hc_control |= OHCI_USB_RESET;
1759		isp1362_write_reg32(isp1362_hcd, HCCONTROL, isp1362_hcd->hc_control);
1760		/* FALL THROUGH */
1761	case OHCI_USB_RESET:
1762		status = -EBUSY;
1763		pr_warning("%s: needs reinit!\n", __func__);
1764		goto done;
1765	case OHCI_USB_SUSPEND:
1766		pr_warning("%s: already suspended?\n", __func__);
1767		goto done;
1768	}
1769	DBG(0, "%s: suspend root hub\n", __func__);
1770
1771	/* First stop any processing */
1772	hcd->state = HC_STATE_QUIESCING;
1773	if (!list_empty(&isp1362_hcd->atl_queue.active) ||
1774	    !list_empty(&isp1362_hcd->intl_queue.active) ||
1775	    !list_empty(&isp1362_hcd->istl_queue[0] .active) ||
1776	    !list_empty(&isp1362_hcd->istl_queue[1] .active)) {
1777		int limit;
1778
1779		isp1362_write_reg32(isp1362_hcd, HCATLSKIP, ~0);
1780		isp1362_write_reg32(isp1362_hcd, HCINTLSKIP, ~0);
1781		isp1362_write_reg16(isp1362_hcd, HCBUFSTAT, 0);
1782		isp1362_write_reg16(isp1362_hcd, HCuPINTENB, 0);
1783		isp1362_write_reg32(isp1362_hcd, HCINTSTAT, OHCI_INTR_SF);
1784
1785		DBG(0, "%s: stopping schedules ...\n", __func__);
1786		limit = 2000;
1787		while (limit > 0) {
1788			udelay(250);
1789			limit -= 250;
1790			if (isp1362_read_reg32(isp1362_hcd, HCINTSTAT) & OHCI_INTR_SF)
1791				break;
1792		}
1793		mdelay(7);
1794		if (isp1362_read_reg16(isp1362_hcd, HCuPINT) & HCuPINT_ATL) {
1795			u32 done_map = isp1362_read_reg32(isp1362_hcd, HCATLDONE);
1796			finish_transfers(isp1362_hcd, done_map, &isp1362_hcd->atl_queue);
1797		}
1798		if (isp1362_read_reg16(isp1362_hcd, HCuPINT) & HCuPINT_INTL) {
1799			u32 done_map = isp1362_read_reg32(isp1362_hcd, HCINTLDONE);
1800			finish_transfers(isp1362_hcd, done_map, &isp1362_hcd->intl_queue);
1801		}
1802		if (isp1362_read_reg16(isp1362_hcd, HCuPINT) & HCuPINT_ISTL0)
1803			finish_iso_transfers(isp1362_hcd, &isp1362_hcd->istl_queue[0]);
1804		if (isp1362_read_reg16(isp1362_hcd, HCuPINT) & HCuPINT_ISTL1)
1805			finish_iso_transfers(isp1362_hcd, &isp1362_hcd->istl_queue[1]);
1806	}
1807	DBG(0, "%s: HCINTSTAT: %08x\n", __func__,
1808		    isp1362_read_reg32(isp1362_hcd, HCINTSTAT));
1809	isp1362_write_reg32(isp1362_hcd, HCINTSTAT,
1810			    isp1362_read_reg32(isp1362_hcd, HCINTSTAT));
1811
1812	/* Suspend hub */
1813	isp1362_hcd->hc_control = OHCI_USB_SUSPEND;
1814	isp1362_show_reg(isp1362_hcd, HCCONTROL);
1815	isp1362_write_reg32(isp1362_hcd, HCCONTROL, isp1362_hcd->hc_control);
1816	isp1362_show_reg(isp1362_hcd, HCCONTROL);
1817
1818	isp1362_hcd->hc_control = isp1362_read_reg32(isp1362_hcd, HCCONTROL);
1819	if ((isp1362_hcd->hc_control & OHCI_CTRL_HCFS) != OHCI_USB_SUSPEND) {
1820		pr_err("%s: controller won't suspend %08x\n", __func__,
1821		    isp1362_hcd->hc_control);
1822		status = -EBUSY;
1823	} else
1824	{
1825		/* no resumes until devices finish suspending */
1826		isp1362_hcd->next_statechange = jiffies + msecs_to_jiffies(5);
1827	}
1828done:
1829	if (status == 0) {
1830		hcd->state = HC_STATE_SUSPENDED;
1831		DBG(0, "%s: HCD suspended: %08x\n", __func__,
1832		    isp1362_read_reg32(isp1362_hcd, HCCONTROL));
1833	}
1834	spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
1835	return status;
1836}
1837
1838static int isp1362_bus_resume(struct usb_hcd *hcd)
1839{
1840	struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd);
1841	u32 port;
1842	unsigned long flags;
1843	int status = -EINPROGRESS;
1844
1845	if (time_before(jiffies, isp1362_hcd->next_statechange))
1846		msleep(5);
1847
1848	spin_lock_irqsave(&isp1362_hcd->lock, flags);
1849	isp1362_hcd->hc_control = isp1362_read_reg32(isp1362_hcd, HCCONTROL);
1850	pr_info("%s: HCCONTROL: %08x\n", __func__, isp1362_hcd->hc_control);
1851	if (hcd->state == HC_STATE_RESUMING) {
1852		pr_warning("%s: duplicate resume\n", __func__);
1853		status = 0;
1854	} else
1855		switch (isp1362_hcd->hc_control & OHCI_CTRL_HCFS) {
1856		case OHCI_USB_SUSPEND:
1857			DBG(0, "%s: resume root hub\n", __func__);
1858			isp1362_hcd->hc_control &= ~OHCI_CTRL_HCFS;
1859			isp1362_hcd->hc_control |= OHCI_USB_RESUME;
1860			isp1362_write_reg32(isp1362_hcd, HCCONTROL, isp1362_hcd->hc_control);
1861			break;
1862		case OHCI_USB_RESUME:
1863			/* HCFS changes sometime after INTR_RD */
1864			DBG(0, "%s: remote wakeup\n", __func__);
1865			break;
1866		case OHCI_USB_OPER:
1867			DBG(0, "%s: odd resume\n", __func__);
1868			status = 0;
1869			hcd->self.root_hub->dev.power.power_state = PMSG_ON;
1870			break;
1871		default:		/* RESET, we lost power */
1872			DBG(0, "%s: root hub hardware reset\n", __func__);
1873			status = -EBUSY;
1874		}
1875	spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
1876	if (status == -EBUSY) {
1877		DBG(0, "%s: Restarting HC\n", __func__);
1878		isp1362_hc_stop(hcd);
1879		return isp1362_hc_start(hcd);
1880	}
1881	if (status != -EINPROGRESS)
1882		return status;
1883	spin_lock_irqsave(&isp1362_hcd->lock, flags);
1884	port = isp1362_read_reg32(isp1362_hcd, HCRHDESCA) & RH_A_NDP;
1885	while (port--) {
1886		u32 stat = isp1362_read_reg32(isp1362_hcd, HCRHPORT1 + port);
1887
1888		/* force global, not selective, resume */
1889		if (!(stat & RH_PS_PSS)) {
1890			DBG(0, "%s: Not Resuming RH port %d\n", __func__, port);
1891			continue;
1892		}
1893		DBG(0, "%s: Resuming RH port %d\n", __func__, port);
1894		isp1362_write_reg32(isp1362_hcd, HCRHPORT1 + port, RH_PS_POCI);
1895	}
1896	spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
1897
1898	/* Some controllers (lucent) need extra-long delays */
1899	hcd->state = HC_STATE_RESUMING;
1900	mdelay(20 /* usb 11.5.1.10 */ + 15);
1901
1902	isp1362_hcd->hc_control = OHCI_USB_OPER;
1903	spin_lock_irqsave(&isp1362_hcd->lock, flags);
1904	isp1362_show_reg(isp1362_hcd, HCCONTROL);
1905	isp1362_write_reg32(isp1362_hcd, HCCONTROL, isp1362_hcd->hc_control);
1906	spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
1907	/* TRSMRCY */
1908	msleep(10);
1909
1910	/* keep it alive for ~5x suspend + resume costs */
1911	isp1362_hcd->next_statechange = jiffies + msecs_to_jiffies(250);
1912
1913	hcd->self.root_hub->dev.power.power_state = PMSG_ON;
1914	hcd->state = HC_STATE_RUNNING;
1915	return 0;
1916}
1917#else
1918#define	isp1362_bus_suspend	NULL
1919#define	isp1362_bus_resume	NULL
1920#endif
1921
1922/*-------------------------------------------------------------------------*/
1923
1924#ifdef STUB_DEBUG_FILE
1925
1926static inline void create_debug_file(struct isp1362_hcd *isp1362_hcd)
1927{
1928}
1929static inline void remove_debug_file(struct isp1362_hcd *isp1362_hcd)
1930{
1931}
1932
1933#else
1934
1935#include <linux/proc_fs.h>
1936#include <linux/seq_file.h>
1937
1938static void dump_irq(struct seq_file *s, char *label, u16 mask)
1939{
1940	seq_printf(s, "%-15s %04x%s%s%s%s%s%s\n", label, mask,
1941		   mask & HCuPINT_CLKRDY ? " clkrdy" : "",
1942		   mask & HCuPINT_SUSP ? " susp" : "",
1943		   mask & HCuPINT_OPR ? " opr" : "",
1944		   mask & HCuPINT_EOT ? " eot" : "",
1945		   mask & HCuPINT_ATL ? " atl" : "",
1946		   mask & HCuPINT_SOF ? " sof" : "");
1947}
1948
1949static void dump_int(struct seq_file *s, char *label, u32 mask)
1950{
1951	seq_printf(s, "%-15s %08x%s%s%s%s%s%s%s\n", label, mask,
1952		   mask & OHCI_INTR_MIE ? " MIE" : "",
1953		   mask & OHCI_INTR_RHSC ? " rhsc" : "",
1954		   mask & OHCI_INTR_FNO ? " fno" : "",
1955		   mask & OHCI_INTR_UE ? " ue" : "",
1956		   mask & OHCI_INTR_RD ? " rd" : "",
1957		   mask & OHCI_INTR_SF ? " sof" : "",
1958		   mask & OHCI_INTR_SO ? " so" : "");
1959}
1960
1961static void dump_ctrl(struct seq_file *s, char *label, u32 mask)
1962{
1963	seq_printf(s, "%-15s %08x%s%s%s\n", label, mask,
1964		   mask & OHCI_CTRL_RWC ? " rwc" : "",
1965		   mask & OHCI_CTRL_RWE ? " rwe" : "",
1966		   ({
1967			   char *hcfs;
1968			   switch (mask & OHCI_CTRL_HCFS) {
1969			   case OHCI_USB_OPER:
1970				   hcfs = " oper";
1971				   break;
1972			   case OHCI_USB_RESET:
1973				   hcfs = " reset";
1974				   break;
1975			   case OHCI_USB_RESUME:
1976				   hcfs = " resume";
1977				   break;
1978			   case OHCI_USB_SUSPEND:
1979				   hcfs = " suspend";
1980				   break;
1981			   default:
1982				   hcfs = " ?";
1983			   }
1984			   hcfs;
1985		   }));
1986}
1987
1988static void dump_regs(struct seq_file *s, struct isp1362_hcd *isp1362_hcd)
1989{
1990	seq_printf(s, "HCREVISION [%02x] %08x\n", ISP1362_REG_NO(ISP1362_REG_HCREVISION),
1991		   isp1362_read_reg32(isp1362_hcd, HCREVISION));
1992	seq_printf(s, "HCCONTROL  [%02x] %08x\n", ISP1362_REG_NO(ISP1362_REG_HCCONTROL),
1993		   isp1362_read_reg32(isp1362_hcd, HCCONTROL));
1994	seq_printf(s, "HCCMDSTAT  [%02x] %08x\n", ISP1362_REG_NO(ISP1362_REG_HCCMDSTAT),
1995		   isp1362_read_reg32(isp1362_hcd, HCCMDSTAT));
1996	seq_printf(s, "HCINTSTAT  [%02x] %08x\n", ISP1362_REG_NO(ISP1362_REG_HCINTSTAT),
1997		   isp1362_read_reg32(isp1362_hcd, HCINTSTAT));
1998	seq_printf(s, "HCINTENB   [%02x] %08x\n", ISP1362_REG_NO(ISP1362_REG_HCINTENB),
1999		   isp1362_read_reg32(isp1362_hcd, HCINTENB));
2000	seq_printf(s, "HCFMINTVL  [%02x] %08x\n", ISP1362_REG_NO(ISP1362_REG_HCFMINTVL),
2001		   isp1362_read_reg32(isp1362_hcd, HCFMINTVL));
2002	seq_printf(s, "HCFMREM    [%02x] %08x\n", ISP1362_REG_NO(ISP1362_REG_HCFMREM),
2003		   isp1362_read_reg32(isp1362_hcd, HCFMREM));
2004	seq_printf(s, "HCFMNUM    [%02x] %08x\n", ISP1362_REG_NO(ISP1362_REG_HCFMNUM),
2005		   isp1362_read_reg32(isp1362_hcd, HCFMNUM));
2006	seq_printf(s, "HCLSTHRESH [%02x] %08x\n", ISP1362_REG_NO(ISP1362_REG_HCLSTHRESH),
2007		   isp1362_read_reg32(isp1362_hcd, HCLSTHRESH));
2008	seq_printf(s, "HCRHDESCA  [%02x] %08x\n", ISP1362_REG_NO(ISP1362_REG_HCRHDESCA),
2009		   isp1362_read_reg32(isp1362_hcd, HCRHDESCA));
2010	seq_printf(s, "HCRHDESCB  [%02x] %08x\n", ISP1362_REG_NO(ISP1362_REG_HCRHDESCB),
2011		   isp1362_read_reg32(isp1362_hcd, HCRHDESCB));
2012	seq_printf(s, "HCRHSTATUS [%02x] %08x\n", ISP1362_REG_NO(ISP1362_REG_HCRHSTATUS),
2013		   isp1362_read_reg32(isp1362_hcd, HCRHSTATUS));
2014	seq_printf(s, "HCRHPORT1  [%02x] %08x\n", ISP1362_REG_NO(ISP1362_REG_HCRHPORT1),
2015		   isp1362_read_reg32(isp1362_hcd, HCRHPORT1));
2016	seq_printf(s, "HCRHPORT2  [%02x] %08x\n", ISP1362_REG_NO(ISP1362_REG_HCRHPORT2),
2017		   isp1362_read_reg32(isp1362_hcd, HCRHPORT2));
2018	seq_printf(s, "\n");
2019	seq_printf(s, "HCHWCFG    [%02x]     %04x\n", ISP1362_REG_NO(ISP1362_REG_HCHWCFG),
2020		   isp1362_read_reg16(isp1362_hcd, HCHWCFG));
2021	seq_printf(s, "HCDMACFG   [%02x]     %04x\n", ISP1362_REG_NO(ISP1362_REG_HCDMACFG),
2022		   isp1362_read_reg16(isp1362_hcd, HCDMACFG));
2023	seq_printf(s, "HCXFERCTR  [%02x]     %04x\n", ISP1362_REG_NO(ISP1362_REG_HCXFERCTR),
2024		   isp1362_read_reg16(isp1362_hcd, HCXFERCTR));
2025	seq_printf(s, "HCuPINT    [%02x]     %04x\n", ISP1362_REG_NO(ISP1362_REG_HCuPINT),
2026		   isp1362_read_reg16(isp1362_hcd, HCuPINT));
2027	seq_printf(s, "HCuPINTENB [%02x]     %04x\n", ISP1362_REG_NO(ISP1362_REG_HCuPINTENB),
2028		   isp1362_read_reg16(isp1362_hcd, HCuPINTENB));
2029	seq_printf(s, "HCCHIPID   [%02x]     %04x\n", ISP1362_REG_NO(ISP1362_REG_HCCHIPID),
2030		   isp1362_read_reg16(isp1362_hcd, HCCHIPID));
2031	seq_printf(s, "HCSCRATCH  [%02x]     %04x\n", ISP1362_REG_NO(ISP1362_REG_HCSCRATCH),
2032		   isp1362_read_reg16(isp1362_hcd, HCSCRATCH));
2033	seq_printf(s, "HCBUFSTAT  [%02x]     %04x\n", ISP1362_REG_NO(ISP1362_REG_HCBUFSTAT),
2034		   isp1362_read_reg16(isp1362_hcd, HCBUFSTAT));
2035	seq_printf(s, "HCDIRADDR  [%02x] %08x\n", ISP1362_REG_NO(ISP1362_REG_HCDIRADDR),
2036		   isp1362_read_reg32(isp1362_hcd, HCDIRADDR));
2037	seq_printf(s, "HCISTLBUFSZ[%02x]     %04x\n", ISP1362_REG_NO(ISP1362_REG_HCISTLBUFSZ),
2038		   isp1362_read_reg16(isp1362_hcd, HCISTLBUFSZ));
2039	seq_printf(s, "HCISTLRATE [%02x]     %04x\n", ISP1362_REG_NO(ISP1362_REG_HCISTLRATE),
2040		   isp1362_read_reg16(isp1362_hcd, HCISTLRATE));
2041	seq_printf(s, "\n");
2042	seq_printf(s, "HCINTLBUFSZ[%02x]     %04x\n", ISP1362_REG_NO(ISP1362_REG_HCINTLBUFSZ),
2043		   isp1362_read_reg16(isp1362_hcd, HCINTLBUFSZ));
2044	seq_printf(s, "HCINTLBLKSZ[%02x]     %04x\n", ISP1362_REG_NO(ISP1362_REG_HCINTLBLKSZ),
2045		   isp1362_read_reg16(isp1362_hcd, HCINTLBLKSZ));
2046	seq_printf(s, "HCINTLDONE [%02x] %08x\n", ISP1362_REG_NO(ISP1362_REG_HCINTLDONE),
2047		   isp1362_read_reg32(isp1362_hcd, HCINTLDONE));
2048	seq_printf(s, "HCINTLSKIP [%02x] %08x\n", ISP1362_REG_NO(ISP1362_REG_HCINTLSKIP),
2049		   isp1362_read_reg32(isp1362_hcd, HCINTLSKIP));
2050	seq_printf(s, "HCINTLLAST [%02x] %08x\n", ISP1362_REG_NO(ISP1362_REG_HCINTLLAST),
2051		   isp1362_read_reg32(isp1362_hcd, HCINTLLAST));
2052	seq_printf(s, "HCINTLCURR [%02x]     %04x\n", ISP1362_REG_NO(ISP1362_REG_HCINTLCURR),
2053		   isp1362_read_reg16(isp1362_hcd, HCINTLCURR));
2054	seq_printf(s, "\n");
2055	seq_printf(s, "HCATLBUFSZ [%02x]     %04x\n", ISP1362_REG_NO(ISP1362_REG_HCATLBUFSZ),
2056		   isp1362_read_reg16(isp1362_hcd, HCATLBUFSZ));
2057	seq_printf(s, "HCATLBLKSZ [%02x]     %04x\n", ISP1362_REG_NO(ISP1362_REG_HCATLBLKSZ),
2058		   isp1362_read_reg16(isp1362_hcd, HCATLBLKSZ));
2059	seq_printf(s, "HCATLSKIP  [%02x] %08x\n", ISP1362_REG_NO(ISP1362_REG_HCATLSKIP),
2060		   isp1362_read_reg32(isp1362_hcd, HCATLSKIP));
2061	seq_printf(s, "HCATLLAST  [%02x] %08x\n", ISP1362_REG_NO(ISP1362_REG_HCATLLAST),
2062		   isp1362_read_reg32(isp1362_hcd, HCATLLAST));
2063	seq_printf(s, "HCATLCURR  [%02x]     %04x\n", ISP1362_REG_NO(ISP1362_REG_HCATLCURR),
2064		   isp1362_read_reg16(isp1362_hcd, HCATLCURR));
2065	seq_printf(s, "\n");
2066	seq_printf(s, "HCATLDTC   [%02x]     %04x\n", ISP1362_REG_NO(ISP1362_REG_HCATLDTC),
2067		   isp1362_read_reg16(isp1362_hcd, HCATLDTC));
2068	seq_printf(s, "HCATLDTCTO [%02x]     %04x\n", ISP1362_REG_NO(ISP1362_REG_HCATLDTCTO),
2069		   isp1362_read_reg16(isp1362_hcd, HCATLDTCTO));
2070}
2071
2072static int proc_isp1362_show(struct seq_file *s, void *unused)
2073{
2074	struct isp1362_hcd *isp1362_hcd = s->private;
2075	struct isp1362_ep *ep;
2076	int i;
2077
2078	seq_printf(s, "%s\n%s version %s\n",
2079		   isp1362_hcd_to_hcd(isp1362_hcd)->product_desc, hcd_name, DRIVER_VERSION);
2080
2081	/* collect statistics to help estimate potential win for
2082	 * DMA engines that care about alignment (PXA)
2083	 */
2084	seq_printf(s, "alignment:  16b/%ld 8b/%ld 4b/%ld 2b/%ld 1b/%ld\n",
2085		   isp1362_hcd->stat16, isp1362_hcd->stat8, isp1362_hcd->stat4,
2086		   isp1362_hcd->stat2, isp1362_hcd->stat1);
2087	seq_printf(s, "max # ptds in ATL  fifo: %d\n", isp1362_hcd->atl_queue.stat_maxptds);
2088	seq_printf(s, "max # ptds in INTL fifo: %d\n", isp1362_hcd->intl_queue.stat_maxptds);
2089	seq_printf(s, "max # ptds in ISTL fifo: %d\n",
2090		   max(isp1362_hcd->istl_queue[0] .stat_maxptds,
2091		       isp1362_hcd->istl_queue[1] .stat_maxptds));
2092
2093	spin_lock_irq(&isp1362_hcd->lock);
2094
2095	dump_irq(s, "hc_irq_enable", isp1362_read_reg16(isp1362_hcd, HCuPINTENB));
2096	dump_irq(s, "hc_irq_status", isp1362_read_reg16(isp1362_hcd, HCuPINT));
2097	dump_int(s, "ohci_int_enable", isp1362_read_reg32(isp1362_hcd, HCINTENB));
2098	dump_int(s, "ohci_int_status", isp1362_read_reg32(isp1362_hcd, HCINTSTAT));
2099	dump_ctrl(s, "ohci_control", isp1362_read_reg32(isp1362_hcd, HCCONTROL));
2100
2101	for (i = 0; i < NUM_ISP1362_IRQS; i++)
2102		if (isp1362_hcd->irq_stat[i])
2103			seq_printf(s, "%-15s: %d\n",
2104				   ISP1362_INT_NAME(i), isp1362_hcd->irq_stat[i]);
2105
2106	dump_regs(s, isp1362_hcd);
2107	list_for_each_entry(ep, &isp1362_hcd->async, schedule) {
2108		struct urb *urb;
2109
2110		seq_printf(s, "%p, ep%d%s, maxpacket %d:\n", ep, ep->epnum,
2111			   ({
2112				   char *s;
2113				   switch (ep->nextpid) {
2114				   case USB_PID_IN:
2115					   s = "in";
2116					   break;
2117				   case USB_PID_OUT:
2118					   s = "out";
2119					   break;
2120				   case USB_PID_SETUP:
2121					   s = "setup";
2122					   break;
2123				   case USB_PID_ACK:
2124					   s = "status";
2125					   break;
2126				   default:
2127					   s = "?";
2128					   break;
2129				   };
2130				   s;}), ep->maxpacket) ;
2131		list_for_each_entry(urb, &ep->hep->urb_list, urb_list) {
2132			seq_printf(s, "  urb%p, %d/%d\n", urb,
2133				   urb->actual_length,
2134				   urb->transfer_buffer_length);
2135		}
2136	}
2137	if (!list_empty(&isp1362_hcd->async))
2138		seq_printf(s, "\n");
2139	dump_ptd_queue(&isp1362_hcd->atl_queue);
2140
2141	seq_printf(s, "periodic size= %d\n", PERIODIC_SIZE);
2142
2143	list_for_each_entry(ep, &isp1362_hcd->periodic, schedule) {
2144		seq_printf(s, "branch:%2d load:%3d PTD[%d] $%04x:\n", ep->branch,
2145			   isp1362_hcd->load[ep->branch], ep->ptd_index, ep->ptd_offset);
2146
2147		seq_printf(s, "   %d/%p (%sdev%d ep%d%s max %d)\n",
2148			   ep->interval, ep,
2149			   (ep->udev->speed == USB_SPEED_FULL) ? "" : "ls ",
2150			   ep->udev->devnum, ep->epnum,
2151			   (ep->epnum == 0) ? "" :
2152			   ((ep->nextpid == USB_PID_IN) ?
2153			    "in" : "out"), ep->maxpacket);
2154	}
2155	dump_ptd_queue(&isp1362_hcd->intl_queue);
2156
2157	seq_printf(s, "ISO:\n");
2158
2159	list_for_each_entry(ep, &isp1362_hcd->isoc, schedule) {
2160		seq_printf(s, "   %d/%p (%sdev%d ep%d%s max %d)\n",
2161			   ep->interval, ep,
2162			   (ep->udev->speed == USB_SPEED_FULL) ? "" : "ls ",
2163			   ep->udev->devnum, ep->epnum,
2164			   (ep->epnum == 0) ? "" :
2165			   ((ep->nextpid == USB_PID_IN) ?
2166			    "in" : "out"), ep->maxpacket);
2167	}
2168
2169	spin_unlock_irq(&isp1362_hcd->lock);
2170	seq_printf(s, "\n");
2171
2172	return 0;
2173}
2174
2175static int proc_isp1362_open(struct inode *inode, struct file *file)
2176{
2177	return single_open(file, proc_isp1362_show, PDE(inode)->data);
2178}
2179
2180static const struct file_operations proc_ops = {
2181	.open = proc_isp1362_open,
2182	.read = seq_read,
2183	.llseek = seq_lseek,
2184	.release = single_release,
2185};
2186
2187/* expect just one isp1362_hcd per system */
2188static const char proc_filename[] = "driver/isp1362";
2189
2190static void create_debug_file(struct isp1362_hcd *isp1362_hcd)
2191{
2192	struct proc_dir_entry *pde;
2193
2194	pde = create_proc_entry(proc_filename, 0, NULL);
2195	if (pde == NULL) {
2196		pr_warning("%s: Failed to create debug file '%s'\n", __func__, proc_filename);
2197		return;
2198	}
2199
2200	pde->proc_fops = &proc_ops;
2201	pde->data = isp1362_hcd;
2202	isp1362_hcd->pde = pde;
2203}
2204
2205static void remove_debug_file(struct isp1362_hcd *isp1362_hcd)
2206{
2207	if (isp1362_hcd->pde)
2208		remove_proc_entry(proc_filename, NULL);
2209}
2210
2211#endif
2212
2213/*-------------------------------------------------------------------------*/
2214
2215static void __isp1362_sw_reset(struct isp1362_hcd *isp1362_hcd)
2216{
2217	int tmp = 20;
2218
2219	isp1362_write_reg16(isp1362_hcd, HCSWRES, HCSWRES_MAGIC);
2220	isp1362_write_reg32(isp1362_hcd, HCCMDSTAT, OHCI_HCR);
2221	while (--tmp) {
2222		mdelay(1);
2223		if (!(isp1362_read_reg32(isp1362_hcd, HCCMDSTAT) & OHCI_HCR))
2224			break;
2225	}
2226	if (!tmp)
2227		pr_err("Software reset timeout\n");
2228}
2229
2230static void isp1362_sw_reset(struct isp1362_hcd *isp1362_hcd)
2231{
2232	unsigned long flags;
2233
2234	spin_lock_irqsave(&isp1362_hcd->lock, flags);
2235	__isp1362_sw_reset(isp1362_hcd);
2236	spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
2237}
2238
2239static int isp1362_mem_config(struct usb_hcd *hcd)
2240{
2241	struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd);
2242	unsigned long flags;
2243	u32 total;
2244	u16 istl_size = ISP1362_ISTL_BUFSIZE;
2245	u16 intl_blksize = ISP1362_INTL_BLKSIZE + PTD_HEADER_SIZE;
2246	u16 intl_size = ISP1362_INTL_BUFFERS * intl_blksize;
2247	u16 atl_blksize = ISP1362_ATL_BLKSIZE + PTD_HEADER_SIZE;
2248	u16 atl_buffers = (ISP1362_BUF_SIZE - (istl_size + intl_size)) / atl_blksize;
2249	u16 atl_size;
2250	int i;
2251
2252	WARN_ON(istl_size & 3);
2253	WARN_ON(atl_blksize & 3);
2254	WARN_ON(intl_blksize & 3);
2255	WARN_ON(atl_blksize < PTD_HEADER_SIZE);
2256	WARN_ON(intl_blksize < PTD_HEADER_SIZE);
2257
2258	BUG_ON((unsigned)ISP1362_INTL_BUFFERS > 32);
2259	if (atl_buffers > 32)
2260		atl_buffers = 32;
2261	atl_size = atl_buffers * atl_blksize;
2262	total = atl_size + intl_size + istl_size;
2263	dev_info(hcd->self.controller, "ISP1362 Memory usage:\n");
2264	dev_info(hcd->self.controller, "  ISTL:    2 * %4d:     %4d @ $%04x:$%04x\n",
2265		 istl_size / 2, istl_size, 0, istl_size / 2);
2266	dev_info(hcd->self.controller, "  INTL: %4d * (%3zu+8):  %4d @ $%04x\n",
2267		 ISP1362_INTL_BUFFERS, intl_blksize - PTD_HEADER_SIZE,
2268		 intl_size, istl_size);
2269	dev_info(hcd->self.controller, "  ATL : %4d * (%3zu+8):  %4d @ $%04x\n",
2270		 atl_buffers, atl_blksize - PTD_HEADER_SIZE,
2271		 atl_size, istl_size + intl_size);
2272	dev_info(hcd->self.controller, "  USED/FREE:   %4d      %4d\n", total,
2273		 ISP1362_BUF_SIZE - total);
2274
2275	if (total > ISP1362_BUF_SIZE) {
2276		dev_err(hcd->self.controller, "%s: Memory requested: %d, available %d\n",
2277			__func__, total, ISP1362_BUF_SIZE);
2278		return -ENOMEM;
2279	}
2280
2281	total = istl_size + intl_size + atl_size;
2282	spin_lock_irqsave(&isp1362_hcd->lock, flags);
2283
2284	for (i = 0; i < 2; i++) {
2285		isp1362_hcd->istl_queue[i].buf_start = i * istl_size / 2,
2286		isp1362_hcd->istl_queue[i].buf_size = istl_size / 2;
2287		isp1362_hcd->istl_queue[i].blk_size = 4;
2288		INIT_LIST_HEAD(&isp1362_hcd->istl_queue[i].active);
2289		snprintf(isp1362_hcd->istl_queue[i].name,
2290			 sizeof(isp1362_hcd->istl_queue[i].name), "ISTL%d", i);
2291		DBG(3, "%s: %5s buf $%04x %d\n", __func__,
2292		     isp1362_hcd->istl_queue[i].name,
2293		     isp1362_hcd->istl_queue[i].buf_start,
2294		     isp1362_hcd->istl_queue[i].buf_size);
2295	}
2296	isp1362_write_reg16(isp1362_hcd, HCISTLBUFSZ, istl_size / 2);
2297
2298	isp1362_hcd->intl_queue.buf_start = istl_size;
2299	isp1362_hcd->intl_queue.buf_size = intl_size;
2300	isp1362_hcd->intl_queue.buf_count = ISP1362_INTL_BUFFERS;
2301	isp1362_hcd->intl_queue.blk_size = intl_blksize;
2302	isp1362_hcd->intl_queue.buf_avail = isp1362_hcd->intl_queue.buf_count;
2303	isp1362_hcd->intl_queue.skip_map = ~0;
2304	INIT_LIST_HEAD(&isp1362_hcd->intl_queue.active);
2305
2306	isp1362_write_reg16(isp1362_hcd, HCINTLBUFSZ,
2307			    isp1362_hcd->intl_queue.buf_size);
2308	isp1362_write_reg16(isp1362_hcd, HCINTLBLKSZ,
2309			    isp1362_hcd->intl_queue.blk_size - PTD_HEADER_SIZE);
2310	isp1362_write_reg32(isp1362_hcd, HCINTLSKIP, ~0);
2311	isp1362_write_reg32(isp1362_hcd, HCINTLLAST,
2312			    1 << (ISP1362_INTL_BUFFERS - 1));
2313
2314	isp1362_hcd->atl_queue.buf_start = istl_size + intl_size;
2315	isp1362_hcd->atl_queue.buf_size = atl_size;
2316	isp1362_hcd->atl_queue.buf_count = atl_buffers;
2317	isp1362_hcd->atl_queue.blk_size = atl_blksize;
2318	isp1362_hcd->atl_queue.buf_avail = isp1362_hcd->atl_queue.buf_count;
2319	isp1362_hcd->atl_queue.skip_map = ~0;
2320	INIT_LIST_HEAD(&isp1362_hcd->atl_queue.active);
2321
2322	isp1362_write_reg16(isp1362_hcd, HCATLBUFSZ,
2323			    isp1362_hcd->atl_queue.buf_size);
2324	isp1362_write_reg16(isp1362_hcd, HCATLBLKSZ,
2325			    isp1362_hcd->atl_queue.blk_size - PTD_HEADER_SIZE);
2326	isp1362_write_reg32(isp1362_hcd, HCATLSKIP, ~0);
2327	isp1362_write_reg32(isp1362_hcd, HCATLLAST,
2328			    1 << (atl_buffers - 1));
2329
2330	snprintf(isp1362_hcd->atl_queue.name,
2331		 sizeof(isp1362_hcd->atl_queue.name), "ATL");
2332	snprintf(isp1362_hcd->intl_queue.name,
2333		 sizeof(isp1362_hcd->intl_queue.name), "INTL");
2334	DBG(3, "%s: %5s buf $%04x %2d * %4d = %4d\n", __func__,
2335	     isp1362_hcd->intl_queue.name,
2336	     isp1362_hcd->intl_queue.buf_start,
2337	     ISP1362_INTL_BUFFERS, isp1362_hcd->intl_queue.blk_size,
2338	     isp1362_hcd->intl_queue.buf_size);
2339	DBG(3, "%s: %5s buf $%04x %2d * %4d = %4d\n", __func__,
2340	     isp1362_hcd->atl_queue.name,
2341	     isp1362_hcd->atl_queue.buf_start,
2342	     atl_buffers, isp1362_hcd->atl_queue.blk_size,
2343	     isp1362_hcd->atl_queue.buf_size);
2344
2345	spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
2346
2347	return 0;
2348}
2349
2350static int isp1362_hc_reset(struct usb_hcd *hcd)
2351{
2352	int ret = 0;
2353	struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd);
2354	unsigned long t;
2355	unsigned long timeout = 100;
2356	unsigned long flags;
2357	int clkrdy = 0;
2358
2359	pr_info("%s:\n", __func__);
2360
2361	if (isp1362_hcd->board && isp1362_hcd->board->reset) {
2362		isp1362_hcd->board->reset(hcd->self.controller, 1);
2363		msleep(20);
2364		if (isp1362_hcd->board->clock)
2365			isp1362_hcd->board->clock(hcd->self.controller, 1);
2366		isp1362_hcd->board->reset(hcd->self.controller, 0);
2367	} else
2368		isp1362_sw_reset(isp1362_hcd);
2369
2370	/* chip has been reset. First we need to see a clock */
2371	t = jiffies + msecs_to_jiffies(timeout);
2372	while (!clkrdy && time_before_eq(jiffies, t)) {
2373		spin_lock_irqsave(&isp1362_hcd->lock, flags);
2374		clkrdy = isp1362_read_reg16(isp1362_hcd, HCuPINT) & HCuPINT_CLKRDY;
2375		spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
2376		if (!clkrdy)
2377			msleep(4);
2378	}
2379
2380	spin_lock_irqsave(&isp1362_hcd->lock, flags);
2381	isp1362_write_reg16(isp1362_hcd, HCuPINT, HCuPINT_CLKRDY);
2382	spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
2383	if (!clkrdy) {
2384		pr_err("Clock not ready after %lums\n", timeout);
2385		ret = -ENODEV;
2386	}
2387	return ret;
2388}
2389
2390static void isp1362_hc_stop(struct usb_hcd *hcd)
2391{
2392	struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd);
2393	unsigned long flags;
2394	u32 tmp;
2395
2396	pr_info("%s:\n", __func__);
2397
2398	del_timer_sync(&hcd->rh_timer);
2399
2400	spin_lock_irqsave(&isp1362_hcd->lock, flags);
2401
2402	isp1362_write_reg16(isp1362_hcd, HCuPINTENB, 0);
2403
2404	/* Switch off power for all ports */
2405	tmp = isp1362_read_reg32(isp1362_hcd, HCRHDESCA);
2406	tmp &= ~(RH_A_NPS | RH_A_PSM);
2407	isp1362_write_reg32(isp1362_hcd, HCRHDESCA, tmp);
2408	isp1362_write_reg32(isp1362_hcd, HCRHSTATUS, RH_HS_LPS);
2409
2410	/* Reset the chip */
2411	if (isp1362_hcd->board && isp1362_hcd->board->reset)
2412		isp1362_hcd->board->reset(hcd->self.controller, 1);
2413	else
2414		__isp1362_sw_reset(isp1362_hcd);
2415
2416	if (isp1362_hcd->board && isp1362_hcd->board->clock)
2417		isp1362_hcd->board->clock(hcd->self.controller, 0);
2418
2419	spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
2420}
2421
2422#ifdef CHIP_BUFFER_TEST
2423static int isp1362_chip_test(struct isp1362_hcd *isp1362_hcd)
2424{
2425	int ret = 0;
2426	u16 *ref;
2427	unsigned long flags;
2428
2429	ref = kmalloc(2 * ISP1362_BUF_SIZE, GFP_KERNEL);
2430	if (ref) {
2431		int offset;
2432		u16 *tst = &ref[ISP1362_BUF_SIZE / 2];
2433
2434		for (offset = 0; offset < ISP1362_BUF_SIZE / 2; offset++) {
2435			ref[offset] = ~offset;
2436			tst[offset] = offset;
2437		}
2438
2439		for (offset = 0; offset < 4; offset++) {
2440			int j;
2441
2442			for (j = 0; j < 8; j++) {
2443				spin_lock_irqsave(&isp1362_hcd->lock, flags);
2444				isp1362_write_buffer(isp1362_hcd, (u8 *)ref + offset, 0, j);
2445				isp1362_read_buffer(isp1362_hcd, (u8 *)tst + offset, 0, j);
2446				spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
2447
2448				if (memcmp(ref, tst, j)) {
2449					ret = -ENODEV;
2450					pr_err("%s: memory check with %d byte offset %d failed\n",
2451					    __func__, j, offset);
2452					dump_data((u8 *)ref + offset, j);
2453					dump_data((u8 *)tst + offset, j);
2454				}
2455			}
2456		}
2457
2458		spin_lock_irqsave(&isp1362_hcd->lock, flags);
2459		isp1362_write_buffer(isp1362_hcd, ref, 0, ISP1362_BUF_SIZE);
2460		isp1362_read_buffer(isp1362_hcd, tst, 0, ISP1362_BUF_SIZE);
2461		spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
2462
2463		if (memcmp(ref, tst, ISP1362_BUF_SIZE)) {
2464			ret = -ENODEV;
2465			pr_err("%s: memory check failed\n", __func__);
2466			dump_data((u8 *)tst, ISP1362_BUF_SIZE / 2);
2467		}
2468
2469		for (offset = 0; offset < 256; offset++) {
2470			int test_size = 0;
2471
2472			yield();
2473
2474			memset(tst, 0, ISP1362_BUF_SIZE);
2475			spin_lock_irqsave(&isp1362_hcd->lock, flags);
2476			isp1362_write_buffer(isp1362_hcd, tst, 0, ISP1362_BUF_SIZE);
2477			isp1362_read_buffer(isp1362_hcd, tst, 0, ISP1362_BUF_SIZE);
2478			spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
2479			if (memcmp(tst, tst + (ISP1362_BUF_SIZE / (2 * sizeof(*tst))),
2480				   ISP1362_BUF_SIZE / 2)) {
2481				pr_err("%s: Failed to clear buffer\n", __func__);
2482				dump_data((u8 *)tst, ISP1362_BUF_SIZE);
2483				break;
2484			}
2485			spin_lock_irqsave(&isp1362_hcd->lock, flags);
2486			isp1362_write_buffer(isp1362_hcd, ref, offset * 2, PTD_HEADER_SIZE);
2487			isp1362_write_buffer(isp1362_hcd, ref + PTD_HEADER_SIZE / sizeof(*ref),
2488					     offset * 2 + PTD_HEADER_SIZE, test_size);
2489			isp1362_read_buffer(isp1362_hcd, tst, offset * 2,
2490					    PTD_HEADER_SIZE + test_size);
2491			spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
2492			if (memcmp(ref, tst, PTD_HEADER_SIZE + test_size)) {
2493				dump_data(((u8 *)ref) + offset, PTD_HEADER_SIZE + test_size);
2494				dump_data((u8 *)tst, PTD_HEADER_SIZE + test_size);
2495				spin_lock_irqsave(&isp1362_hcd->lock, flags);
2496				isp1362_read_buffer(isp1362_hcd, tst, offset * 2,
2497						    PTD_HEADER_SIZE + test_size);
2498				spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
2499				if (memcmp(ref, tst, PTD_HEADER_SIZE + test_size)) {
2500					ret = -ENODEV;
2501					pr_err("%s: memory check with offset %02x failed\n",
2502					    __func__, offset);
2503					break;
2504				}
2505				pr_warning("%s: memory check with offset %02x ok after second read\n",
2506				     __func__, offset);
2507			}
2508		}
2509		kfree(ref);
2510	}
2511	return ret;
2512}
2513#endif
2514
2515static int isp1362_hc_start(struct usb_hcd *hcd)
2516{
2517	int ret;
2518	struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd);
2519	struct isp1362_platform_data *board = isp1362_hcd->board;
2520	u16 hwcfg;
2521	u16 chipid;
2522	unsigned long flags;
2523
2524	pr_info("%s:\n", __func__);
2525
2526	spin_lock_irqsave(&isp1362_hcd->lock, flags);
2527	chipid = isp1362_read_reg16(isp1362_hcd, HCCHIPID);
2528	spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
2529
2530	if ((chipid & HCCHIPID_MASK) != HCCHIPID_MAGIC) {
2531		pr_err("%s: Invalid chip ID %04x\n", __func__, chipid);
2532		return -ENODEV;
2533	}
2534
2535#ifdef CHIP_BUFFER_TEST
2536	ret = isp1362_chip_test(isp1362_hcd);
2537	if (ret)
2538		return -ENODEV;
2539#endif
2540	spin_lock_irqsave(&isp1362_hcd->lock, flags);
2541	/* clear interrupt status and disable all interrupt sources */
2542	isp1362_write_reg16(isp1362_hcd, HCuPINT, 0xff);
2543	isp1362_write_reg16(isp1362_hcd, HCuPINTENB, 0);
2544
2545	/* HW conf */
2546	hwcfg = HCHWCFG_INT_ENABLE | HCHWCFG_DBWIDTH(1);
2547	if (board->sel15Kres)
2548		hwcfg |= HCHWCFG_PULLDOWN_DS2 |
2549			((MAX_ROOT_PORTS > 1) ? HCHWCFG_PULLDOWN_DS1 : 0);
2550	if (board->clknotstop)
2551		hwcfg |= HCHWCFG_CLKNOTSTOP;
2552	if (board->oc_enable)
2553		hwcfg |= HCHWCFG_ANALOG_OC;
2554	if (board->int_act_high)
2555		hwcfg |= HCHWCFG_INT_POL;
2556	if (board->int_edge_triggered)
2557		hwcfg |= HCHWCFG_INT_TRIGGER;
2558	if (board->dreq_act_high)
2559		hwcfg |= HCHWCFG_DREQ_POL;
2560	if (board->dack_act_high)
2561		hwcfg |= HCHWCFG_DACK_POL;
2562	isp1362_write_reg16(isp1362_hcd, HCHWCFG, hwcfg);
2563	isp1362_show_reg(isp1362_hcd, HCHWCFG);
2564	isp1362_write_reg16(isp1362_hcd, HCDMACFG, 0);
2565	spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
2566
2567	ret = isp1362_mem_config(hcd);
2568	if (ret)
2569		return ret;
2570
2571	spin_lock_irqsave(&isp1362_hcd->lock, flags);
2572
2573	/* Root hub conf */
2574	isp1362_hcd->rhdesca = 0;
2575	if (board->no_power_switching)
2576		isp1362_hcd->rhdesca |= RH_A_NPS;
2577	if (board->power_switching_mode)
2578		isp1362_hcd->rhdesca |= RH_A_PSM;
2579	if (board->potpg)
2580		isp1362_hcd->rhdesca |= (board->potpg << 24) & RH_A_POTPGT;
2581	else
2582		isp1362_hcd->rhdesca |= (25 << 24) & RH_A_POTPGT;
2583
2584	isp1362_write_reg32(isp1362_hcd, HCRHDESCA, isp1362_hcd->rhdesca & ~RH_A_OCPM);
2585	isp1362_write_reg32(isp1362_hcd, HCRHDESCA, isp1362_hcd->rhdesca | RH_A_OCPM);
2586	isp1362_hcd->rhdesca = isp1362_read_reg32(isp1362_hcd, HCRHDESCA);
2587
2588	isp1362_hcd->rhdescb = RH_B_PPCM;
2589	isp1362_write_reg32(isp1362_hcd, HCRHDESCB, isp1362_hcd->rhdescb);
2590	isp1362_hcd->rhdescb = isp1362_read_reg32(isp1362_hcd, HCRHDESCB);
2591
2592	isp1362_read_reg32(isp1362_hcd, HCFMINTVL);
2593	isp1362_write_reg32(isp1362_hcd, HCFMINTVL, (FSMP(FI) << 16) | FI);
2594	isp1362_write_reg32(isp1362_hcd, HCLSTHRESH, LSTHRESH);
2595
2596	spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
2597
2598	isp1362_hcd->hc_control = OHCI_USB_OPER;
2599	hcd->state = HC_STATE_RUNNING;
2600
2601	spin_lock_irqsave(&isp1362_hcd->lock, flags);
2602	/* Set up interrupts */
2603	isp1362_hcd->intenb = OHCI_INTR_MIE | OHCI_INTR_RHSC | OHCI_INTR_UE;
2604	isp1362_hcd->intenb |= OHCI_INTR_RD;
2605	isp1362_hcd->irqenb = HCuPINT_OPR | HCuPINT_SUSP;
2606	isp1362_write_reg32(isp1362_hcd, HCINTENB, isp1362_hcd->intenb);
2607	isp1362_write_reg16(isp1362_hcd, HCuPINTENB, isp1362_hcd->irqenb);
2608
2609	/* Go operational */
2610	isp1362_write_reg32(isp1362_hcd, HCCONTROL, isp1362_hcd->hc_control);
2611	/* enable global power */
2612	isp1362_write_reg32(isp1362_hcd, HCRHSTATUS, RH_HS_LPSC | RH_HS_DRWE);
2613
2614	spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
2615
2616	return 0;
2617}
2618
2619/*-------------------------------------------------------------------------*/
2620
2621static struct hc_driver isp1362_hc_driver = {
2622	.description =		hcd_name,
2623	.product_desc =		"ISP1362 Host Controller",
2624	.hcd_priv_size =	sizeof(struct isp1362_hcd),
2625
2626	.irq =			isp1362_irq,
2627	.flags =		HCD_USB11 | HCD_MEMORY,
2628
2629	.reset =		isp1362_hc_reset,
2630	.start =		isp1362_hc_start,
2631	.stop =			isp1362_hc_stop,
2632
2633	.urb_enqueue =		isp1362_urb_enqueue,
2634	.urb_dequeue =		isp1362_urb_dequeue,
2635	.endpoint_disable =	isp1362_endpoint_disable,
2636
2637	.get_frame_number =	isp1362_get_frame,
2638
2639	.hub_status_data =	isp1362_hub_status_data,
2640	.hub_control =		isp1362_hub_control,
2641	.bus_suspend =		isp1362_bus_suspend,
2642	.bus_resume =		isp1362_bus_resume,
2643};
2644
2645/*-------------------------------------------------------------------------*/
2646
2647#define resource_len(r) (((r)->end - (r)->start) + 1)
2648
2649static int __devexit isp1362_remove(struct platform_device *pdev)
2650{
2651	struct usb_hcd *hcd = platform_get_drvdata(pdev);
2652	struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd);
2653	struct resource *res;
2654
2655	remove_debug_file(isp1362_hcd);
2656	DBG(0, "%s: Removing HCD\n", __func__);
2657	usb_remove_hcd(hcd);
2658
2659	DBG(0, "%s: Unmapping data_reg @ %p\n", __func__,
2660	    isp1362_hcd->data_reg);
2661	iounmap(isp1362_hcd->data_reg);
2662
2663	DBG(0, "%s: Unmapping addr_reg @ %p\n", __func__,
2664	    isp1362_hcd->addr_reg);
2665	iounmap(isp1362_hcd->addr_reg);
2666
2667	res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
2668	DBG(0, "%s: release mem_region: %08lx\n", __func__, (long unsigned int)res->start);
2669	if (res)
2670		release_mem_region(res->start, resource_len(res));
2671
2672	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2673	DBG(0, "%s: release mem_region: %08lx\n", __func__, (long unsigned int)res->start);
2674	if (res)
2675		release_mem_region(res->start, resource_len(res));
2676
2677	DBG(0, "%s: put_hcd\n", __func__);
2678	usb_put_hcd(hcd);
2679	DBG(0, "%s: Done\n", __func__);
2680
2681	return 0;
2682}
2683
2684static int __init isp1362_probe(struct platform_device *pdev)
2685{
2686	struct usb_hcd *hcd;
2687	struct isp1362_hcd *isp1362_hcd;
2688	struct resource *addr, *data;
2689	void __iomem *addr_reg;
2690	void __iomem *data_reg;
2691	int irq;
2692	int retval = 0;
2693	struct resource *irq_res;
2694	unsigned int irq_flags = 0;
2695
2696	/* basic sanity checks first.  board-specific init logic should
2697	 * have initialized this the three resources and probably board
2698	 * specific platform_data.  we don't probe for IRQs, and do only
2699	 * minimal sanity checking.
2700	 */
2701	if (pdev->num_resources < 3) {
2702		retval = -ENODEV;
2703		goto err1;
2704	}
2705
2706	data = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2707	addr = platform_get_resource(pdev, IORESOURCE_MEM, 1);
2708	irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
2709	if (!addr || !data || !irq_res) {
2710		retval = -ENODEV;
2711		goto err1;
2712	}
2713	irq = irq_res->start;
2714
2715	if (pdev->dev.dma_mask) {
2716		DBG(1, "won't do DMA");
2717		retval = -ENODEV;
2718		goto err1;
2719	}
2720
2721	if (!request_mem_region(addr->start, resource_len(addr), hcd_name)) {
2722		retval = -EBUSY;
2723		goto err1;
2724	}
2725	addr_reg = ioremap(addr->start, resource_len(addr));
2726	if (addr_reg == NULL) {
2727		retval = -ENOMEM;
2728		goto err2;
2729	}
2730
2731	if (!request_mem_region(data->start, resource_len(data), hcd_name)) {
2732		retval = -EBUSY;
2733		goto err3;
2734	}
2735	data_reg = ioremap(data->start, resource_len(data));
2736	if (data_reg == NULL) {
2737		retval = -ENOMEM;
2738		goto err4;
2739	}
2740
2741	/* allocate and initialize hcd */
2742	hcd = usb_create_hcd(&isp1362_hc_driver, &pdev->dev, dev_name(&pdev->dev));
2743	if (!hcd) {
2744		retval = -ENOMEM;
2745		goto err5;
2746	}
2747	hcd->rsrc_start = data->start;
2748	isp1362_hcd = hcd_to_isp1362_hcd(hcd);
2749	isp1362_hcd->data_reg = data_reg;
2750	isp1362_hcd->addr_reg = addr_reg;
2751
2752	isp1362_hcd->next_statechange = jiffies;
2753	spin_lock_init(&isp1362_hcd->lock);
2754	INIT_LIST_HEAD(&isp1362_hcd->async);
2755	INIT_LIST_HEAD(&isp1362_hcd->periodic);
2756	INIT_LIST_HEAD(&isp1362_hcd->isoc);
2757	INIT_LIST_HEAD(&isp1362_hcd->remove_list);
2758	isp1362_hcd->board = pdev->dev.platform_data;
2759#if USE_PLATFORM_DELAY
2760	if (!isp1362_hcd->board->delay) {
2761		dev_err(hcd->self.controller, "No platform delay function given\n");
2762		retval = -ENODEV;
2763		goto err6;
2764	}
2765#endif
2766
2767	if (irq_res->flags & IORESOURCE_IRQ_HIGHEDGE)
2768		irq_flags |= IRQF_TRIGGER_RISING;
2769	if (irq_res->flags & IORESOURCE_IRQ_LOWEDGE)
2770		irq_flags |= IRQF_TRIGGER_FALLING;
2771	if (irq_res->flags & IORESOURCE_IRQ_HIGHLEVEL)
2772		irq_flags |= IRQF_TRIGGER_HIGH;
2773	if (irq_res->flags & IORESOURCE_IRQ_LOWLEVEL)
2774		irq_flags |= IRQF_TRIGGER_LOW;
2775
2776	retval = usb_add_hcd(hcd, irq, irq_flags | IRQF_DISABLED | IRQF_SHARED);
2777	if (retval != 0)
2778		goto err6;
2779	pr_info("%s, irq %d\n", hcd->product_desc, irq);
2780
2781	create_debug_file(isp1362_hcd);
2782
2783	return 0;
2784
2785 err6:
2786	DBG(0, "%s: Freeing dev %p\n", __func__, isp1362_hcd);
2787	usb_put_hcd(hcd);
2788 err5:
2789	DBG(0, "%s: Unmapping data_reg @ %p\n", __func__, data_reg);
2790	iounmap(data_reg);
2791 err4:
2792	DBG(0, "%s: Releasing mem region %08lx\n", __func__, (long unsigned int)data->start);
2793	release_mem_region(data->start, resource_len(data));
2794 err3:
2795	DBG(0, "%s: Unmapping addr_reg @ %p\n", __func__, addr_reg);
2796	iounmap(addr_reg);
2797 err2:
2798	DBG(0, "%s: Releasing mem region %08lx\n", __func__, (long unsigned int)addr->start);
2799	release_mem_region(addr->start, resource_len(addr));
2800 err1:
2801	pr_err("%s: init error, %d\n", __func__, retval);
2802
2803	return retval;
2804}
2805
2806#ifdef	CONFIG_PM
2807static int isp1362_suspend(struct platform_device *pdev, pm_message_t state)
2808{
2809	struct usb_hcd *hcd = platform_get_drvdata(pdev);
2810	struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd);
2811	unsigned long flags;
2812	int retval = 0;
2813
2814	DBG(0, "%s: Suspending device\n", __func__);
2815
2816	if (state.event == PM_EVENT_FREEZE) {
2817		DBG(0, "%s: Suspending root hub\n", __func__);
2818		retval = isp1362_bus_suspend(hcd);
2819	} else {
2820		DBG(0, "%s: Suspending RH ports\n", __func__);
2821		spin_lock_irqsave(&isp1362_hcd->lock, flags);
2822		isp1362_write_reg32(isp1362_hcd, HCRHSTATUS, RH_HS_LPS);
2823		spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
2824	}
2825	if (retval == 0)
2826		pdev->dev.power.power_state = state;
2827	return retval;
2828}
2829
2830static int isp1362_resume(struct platform_device *pdev)
2831{
2832	struct usb_hcd *hcd = platform_get_drvdata(pdev);
2833	struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd);
2834	unsigned long flags;
2835
2836	DBG(0, "%s: Resuming\n", __func__);
2837
2838	if (pdev->dev.power.power_state.event == PM_EVENT_SUSPEND) {
2839		DBG(0, "%s: Resume RH ports\n", __func__);
2840		spin_lock_irqsave(&isp1362_hcd->lock, flags);
2841		isp1362_write_reg32(isp1362_hcd, HCRHSTATUS, RH_HS_LPSC);
2842		spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
2843		return 0;
2844	}
2845
2846	pdev->dev.power.power_state = PMSG_ON;
2847
2848	return isp1362_bus_resume(isp1362_hcd_to_hcd(isp1362_hcd));
2849}
2850#else
2851#define	isp1362_suspend	NULL
2852#define	isp1362_resume	NULL
2853#endif
2854
2855static struct platform_driver isp1362_driver = {
2856	.probe = isp1362_probe,
2857	.remove = __devexit_p(isp1362_remove),
2858
2859	.suspend = isp1362_suspend,
2860	.resume = isp1362_resume,
2861	.driver = {
2862		.name = (char *)hcd_name,
2863		.owner = THIS_MODULE,
2864	},
2865};
2866
2867/*-------------------------------------------------------------------------*/
2868
2869static int __init isp1362_init(void)
2870{
2871	if (usb_disabled())
2872		return -ENODEV;
2873	pr_info("driver %s, %s\n", hcd_name, DRIVER_VERSION);
2874	return platform_driver_register(&isp1362_driver);
2875}
2876module_init(isp1362_init);
2877
2878static void __exit isp1362_cleanup(void)
2879{
2880	platform_driver_unregister(&isp1362_driver);
2881}
2882module_exit(isp1362_cleanup);
2883