1#include "sysdef.h" 2#include "wb35reg_f.h" 3 4#include <linux/usb.h> 5#include <linux/slab.h> 6 7extern void phy_calibration_winbond(struct hw_data *phw_data, u32 frequency); 8 9/* 10 * true : read command process successfully 11 * false : register not support 12 * RegisterNo : start base 13 * pRegisterData : data point 14 * NumberOfData : number of register data 15 * Flag : AUTO_INCREMENT - RegisterNo will auto increment 4 16 * NO_INCREMENT - Function will write data into the same register 17 */ 18unsigned char Wb35Reg_BurstWrite(struct hw_data *pHwData, u16 RegisterNo, u32 *pRegisterData, u8 NumberOfData, u8 Flag) 19{ 20 struct wb35_reg *reg = &pHwData->reg; 21 struct urb *urb = NULL; 22 struct wb35_reg_queue *reg_queue = NULL; 23 u16 UrbSize; 24 struct usb_ctrlrequest *dr; 25 u16 i, DataSize = NumberOfData * 4; 26 27 /* Module shutdown */ 28 if (pHwData->SurpriseRemove) 29 return false; 30 31 /* Trying to use burst write function if use new hardware */ 32 UrbSize = sizeof(struct wb35_reg_queue) + DataSize + sizeof(struct usb_ctrlrequest); 33 reg_queue = kzalloc(UrbSize, GFP_ATOMIC); 34 urb = usb_alloc_urb(0, GFP_ATOMIC); 35 if (urb && reg_queue) { 36 reg_queue->DIRECT = 2; /* burst write register */ 37 reg_queue->INDEX = RegisterNo; 38 reg_queue->pBuffer = (u32 *)((u8 *)reg_queue + sizeof(struct wb35_reg_queue)); 39 memcpy(reg_queue->pBuffer, pRegisterData, DataSize); 40 /* the function for reversing register data from little endian to big endian */ 41 for (i = 0; i < NumberOfData ; i++) 42 reg_queue->pBuffer[i] = cpu_to_le32(reg_queue->pBuffer[i]); 43 44 dr = (struct usb_ctrlrequest *)((u8 *)reg_queue + sizeof(struct wb35_reg_queue) + DataSize); 45 dr->bRequestType = USB_TYPE_VENDOR | USB_DIR_OUT | USB_RECIP_DEVICE; 46 dr->bRequest = 0x04; /* USB or vendor-defined request code, burst mode */ 47 dr->wValue = cpu_to_le16(Flag); /* 0: Register number auto-increment, 1: No auto increment */ 48 dr->wIndex = cpu_to_le16(RegisterNo); 49 dr->wLength = cpu_to_le16(DataSize); 50 reg_queue->Next = NULL; 51 reg_queue->pUsbReq = dr; 52 reg_queue->urb = urb; 53 54 spin_lock_irq(®->EP0VM_spin_lock); 55 if (reg->reg_first == NULL) 56 reg->reg_first = reg_queue; 57 else 58 reg->reg_last->Next = reg_queue; 59 reg->reg_last = reg_queue; 60 61 spin_unlock_irq(®->EP0VM_spin_lock); 62 63 /* Start EP0VM */ 64 Wb35Reg_EP0VM_start(pHwData); 65 66 return true; 67 } else { 68 if (urb) 69 usb_free_urb(urb); 70 if (reg_queue) 71 kfree(reg_queue); 72 return false; 73 } 74 return false; 75} 76 77void Wb35Reg_Update(struct hw_data *pHwData, u16 RegisterNo, u32 RegisterValue) 78{ 79 struct wb35_reg *reg = &pHwData->reg; 80 switch (RegisterNo) { 81 case 0x3b0: reg->U1B0 = RegisterValue; break; 82 case 0x3bc: reg->U1BC_LEDConfigure = RegisterValue; break; 83 case 0x400: reg->D00_DmaControl = RegisterValue; break; 84 case 0x800: reg->M00_MacControl = RegisterValue; break; 85 case 0x804: reg->M04_MulticastAddress1 = RegisterValue; break; 86 case 0x808: reg->M08_MulticastAddress2 = RegisterValue; break; 87 case 0x824: reg->M24_MacControl = RegisterValue; break; 88 case 0x828: reg->M28_MacControl = RegisterValue; break; 89 case 0x82c: reg->M2C_MacControl = RegisterValue; break; 90 case 0x838: reg->M38_MacControl = RegisterValue; break; 91 case 0x840: reg->M40_MacControl = RegisterValue; break; 92 case 0x844: reg->M44_MacControl = RegisterValue; break; 93 case 0x848: reg->M48_MacControl = RegisterValue; break; 94 case 0x84c: reg->M4C_MacStatus = RegisterValue; break; 95 case 0x860: reg->M60_MacControl = RegisterValue; break; 96 case 0x868: reg->M68_MacControl = RegisterValue; break; 97 case 0x870: reg->M70_MacControl = RegisterValue; break; 98 case 0x874: reg->M74_MacControl = RegisterValue; break; 99 case 0x878: reg->M78_ERPInformation = RegisterValue; break; 100 case 0x87C: reg->M7C_MacControl = RegisterValue; break; 101 case 0x880: reg->M80_MacControl = RegisterValue; break; 102 case 0x884: reg->M84_MacControl = RegisterValue; break; 103 case 0x888: reg->M88_MacControl = RegisterValue; break; 104 case 0x898: reg->M98_MacControl = RegisterValue; break; 105 case 0x100c: reg->BB0C = RegisterValue; break; 106 case 0x102c: reg->BB2C = RegisterValue; break; 107 case 0x1030: reg->BB30 = RegisterValue; break; 108 case 0x103c: reg->BB3C = RegisterValue; break; 109 case 0x1048: reg->BB48 = RegisterValue; break; 110 case 0x104c: reg->BB4C = RegisterValue; break; 111 case 0x1050: reg->BB50 = RegisterValue; break; 112 case 0x1054: reg->BB54 = RegisterValue; break; 113 case 0x1058: reg->BB58 = RegisterValue; break; 114 case 0x105c: reg->BB5C = RegisterValue; break; 115 case 0x1060: reg->BB60 = RegisterValue; break; 116 } 117} 118 119/* 120 * true : read command process successfully 121 * false : register not support 122 */ 123unsigned char Wb35Reg_WriteSync(struct hw_data *pHwData, u16 RegisterNo, u32 RegisterValue) 124{ 125 struct wb35_reg *reg = &pHwData->reg; 126 int ret = -1; 127 128 /* Module shutdown */ 129 if (pHwData->SurpriseRemove) 130 return false; 131 132 RegisterValue = cpu_to_le32(RegisterValue); 133 134 /* update the register by send usb message */ 135 reg->SyncIoPause = 1; 136 137 /* Wait until EP0VM stop */ 138 while (reg->EP0vm_state != VM_STOP) 139 msleep(10); 140 141 /* Sync IoCallDriver */ 142 reg->EP0vm_state = VM_RUNNING; 143 ret = usb_control_msg(pHwData->WbUsb.udev, 144 usb_sndctrlpipe(pHwData->WbUsb.udev, 0), 145 0x03, USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_OUT, 146 0x0, RegisterNo, &RegisterValue, 4, HZ * 100); 147 reg->EP0vm_state = VM_STOP; 148 reg->SyncIoPause = 0; 149 150 Wb35Reg_EP0VM_start(pHwData); 151 152 if (ret < 0) { 153#ifdef _PE_REG_DUMP_ 154 printk("EP0 Write register usb message sending error\n"); 155#endif 156 pHwData->SurpriseRemove = 1; 157 return false; 158 } 159 return true; 160} 161 162/* 163 * true : read command process successfully 164 * false : register not support 165 */ 166unsigned char Wb35Reg_Write(struct hw_data *pHwData, u16 RegisterNo, u32 RegisterValue) 167{ 168 struct wb35_reg *reg = &pHwData->reg; 169 struct usb_ctrlrequest *dr; 170 struct urb *urb = NULL; 171 struct wb35_reg_queue *reg_queue = NULL; 172 u16 UrbSize; 173 174 /* Module shutdown */ 175 if (pHwData->SurpriseRemove) 176 return false; 177 178 /* update the register by send urb request */ 179 UrbSize = sizeof(struct wb35_reg_queue) + sizeof(struct usb_ctrlrequest); 180 reg_queue = kzalloc(UrbSize, GFP_ATOMIC); 181 urb = usb_alloc_urb(0, GFP_ATOMIC); 182 if (urb && reg_queue) { 183 reg_queue->DIRECT = 1; /* burst write register */ 184 reg_queue->INDEX = RegisterNo; 185 reg_queue->VALUE = cpu_to_le32(RegisterValue); 186 reg_queue->RESERVED_VALID = false; 187 dr = (struct usb_ctrlrequest *)((u8 *)reg_queue + sizeof(struct wb35_reg_queue)); 188 dr->bRequestType = USB_TYPE_VENDOR | USB_DIR_OUT | USB_RECIP_DEVICE; 189 dr->bRequest = 0x03; /* USB or vendor-defined request code, burst mode */ 190 dr->wValue = cpu_to_le16(0x0); 191 dr->wIndex = cpu_to_le16(RegisterNo); 192 dr->wLength = cpu_to_le16(4); 193 194 /* Enter the sending queue */ 195 reg_queue->Next = NULL; 196 reg_queue->pUsbReq = dr; 197 reg_queue->urb = urb; 198 199 spin_lock_irq(®->EP0VM_spin_lock); 200 if (reg->reg_first == NULL) 201 reg->reg_first = reg_queue; 202 else 203 reg->reg_last->Next = reg_queue; 204 reg->reg_last = reg_queue; 205 206 spin_unlock_irq(®->EP0VM_spin_lock); 207 208 /* Start EP0VM */ 209 Wb35Reg_EP0VM_start(pHwData); 210 211 return true; 212 } else { 213 if (urb) 214 usb_free_urb(urb); 215 kfree(reg_queue); 216 return false; 217 } 218} 219 220/* 221 * This command will be executed with a user defined value. When it completes, 222 * this value is useful. For example, hal_set_current_channel will use it. 223 * true : read command process successfully 224 * false : register not support 225 */ 226unsigned char Wb35Reg_WriteWithCallbackValue(struct hw_data *pHwData, 227 u16 RegisterNo, 228 u32 RegisterValue, 229 s8 *pValue, 230 s8 Len) 231{ 232 struct wb35_reg *reg = &pHwData->reg; 233 struct usb_ctrlrequest *dr; 234 struct urb *urb = NULL; 235 struct wb35_reg_queue *reg_queue = NULL; 236 u16 UrbSize; 237 238 /* Module shutdown */ 239 if (pHwData->SurpriseRemove) 240 return false; 241 242 /* update the register by send urb request */ 243 UrbSize = sizeof(struct wb35_reg_queue) + sizeof(struct usb_ctrlrequest); 244 reg_queue = kzalloc(UrbSize, GFP_ATOMIC); 245 urb = usb_alloc_urb(0, GFP_ATOMIC); 246 if (urb && reg_queue) { 247 reg_queue->DIRECT = 1; /* burst write register */ 248 reg_queue->INDEX = RegisterNo; 249 reg_queue->VALUE = cpu_to_le32(RegisterValue); 250 /* NOTE : Users must guarantee the size of value will not exceed the buffer size. */ 251 memcpy(reg_queue->RESERVED, pValue, Len); 252 reg_queue->RESERVED_VALID = true; 253 dr = (struct usb_ctrlrequest *)((u8 *)reg_queue + sizeof(struct wb35_reg_queue)); 254 dr->bRequestType = USB_TYPE_VENDOR | USB_DIR_OUT | USB_RECIP_DEVICE; 255 dr->bRequest = 0x03; /* USB or vendor-defined request code, burst mode */ 256 dr->wValue = cpu_to_le16(0x0); 257 dr->wIndex = cpu_to_le16(RegisterNo); 258 dr->wLength = cpu_to_le16(4); 259 260 /* Enter the sending queue */ 261 reg_queue->Next = NULL; 262 reg_queue->pUsbReq = dr; 263 reg_queue->urb = urb; 264 spin_lock_irq(®->EP0VM_spin_lock); 265 if (reg->reg_first == NULL) 266 reg->reg_first = reg_queue; 267 else 268 reg->reg_last->Next = reg_queue; 269 reg->reg_last = reg_queue; 270 271 spin_unlock_irq(®->EP0VM_spin_lock); 272 273 /* Start EP0VM */ 274 Wb35Reg_EP0VM_start(pHwData); 275 return true; 276 } else { 277 if (urb) 278 usb_free_urb(urb); 279 kfree(reg_queue); 280 return false; 281 } 282} 283 284/* 285 * true : read command process successfully 286 * false : register not support 287 * pRegisterValue : It must be a resident buffer due to 288 * asynchronous read register. 289 */ 290unsigned char Wb35Reg_ReadSync(struct hw_data *pHwData, u16 RegisterNo, u32 *pRegisterValue) 291{ 292 struct wb35_reg *reg = &pHwData->reg; 293 u32 *pltmp = pRegisterValue; 294 int ret = -1; 295 296 /* Module shutdown */ 297 if (pHwData->SurpriseRemove) 298 return false; 299 300 /* Read the register by send usb message */ 301 reg->SyncIoPause = 1; 302 303 /* Wait until EP0VM stop */ 304 while (reg->EP0vm_state != VM_STOP) 305 msleep(10); 306 307 reg->EP0vm_state = VM_RUNNING; 308 ret = usb_control_msg(pHwData->WbUsb.udev, 309 usb_rcvctrlpipe(pHwData->WbUsb.udev, 0), 310 0x01, USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_IN, 311 0x0, RegisterNo, pltmp, 4, HZ * 100); 312 313 *pRegisterValue = cpu_to_le32(*pltmp); 314 315 reg->EP0vm_state = VM_STOP; 316 317 Wb35Reg_Update(pHwData, RegisterNo, *pRegisterValue); 318 reg->SyncIoPause = 0; 319 320 Wb35Reg_EP0VM_start(pHwData); 321 322 if (ret < 0) { 323#ifdef _PE_REG_DUMP_ 324 printk("EP0 Read register usb message sending error\n"); 325#endif 326 pHwData->SurpriseRemove = 1; 327 return false; 328 } 329 return true; 330} 331 332/* 333 * true : read command process successfully 334 * false : register not support 335 * pRegisterValue : It must be a resident buffer due to 336 * asynchronous read register. 337 */ 338unsigned char Wb35Reg_Read(struct hw_data *pHwData, u16 RegisterNo, u32 *pRegisterValue) 339{ 340 struct wb35_reg *reg = &pHwData->reg; 341 struct usb_ctrlrequest *dr; 342 struct urb *urb; 343 struct wb35_reg_queue *reg_queue; 344 u16 UrbSize; 345 346 /* Module shutdown */ 347 if (pHwData->SurpriseRemove) 348 return false; 349 350 /* update the variable by send Urb to read register */ 351 UrbSize = sizeof(struct wb35_reg_queue) + sizeof(struct usb_ctrlrequest); 352 reg_queue = kzalloc(UrbSize, GFP_ATOMIC); 353 urb = usb_alloc_urb(0, GFP_ATOMIC); 354 if (urb && reg_queue) { 355 reg_queue->DIRECT = 0; /* read register */ 356 reg_queue->INDEX = RegisterNo; 357 reg_queue->pBuffer = pRegisterValue; 358 dr = (struct usb_ctrlrequest *)((u8 *)reg_queue + sizeof(struct wb35_reg_queue)); 359 dr->bRequestType = USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_IN; 360 dr->bRequest = 0x01; /* USB or vendor-defined request code, burst mode */ 361 dr->wValue = cpu_to_le16(0x0); 362 dr->wIndex = cpu_to_le16(RegisterNo); 363 dr->wLength = cpu_to_le16(4); 364 365 /* Enter the sending queue */ 366 reg_queue->Next = NULL; 367 reg_queue->pUsbReq = dr; 368 reg_queue->urb = urb; 369 spin_lock_irq(®->EP0VM_spin_lock); 370 if (reg->reg_first == NULL) 371 reg->reg_first = reg_queue; 372 else 373 reg->reg_last->Next = reg_queue; 374 reg->reg_last = reg_queue; 375 376 spin_unlock_irq(®->EP0VM_spin_lock); 377 378 /* Start EP0VM */ 379 Wb35Reg_EP0VM_start(pHwData); 380 381 return true; 382 } else { 383 if (urb) 384 usb_free_urb(urb); 385 kfree(reg_queue); 386 return false; 387 } 388} 389 390 391void Wb35Reg_EP0VM_start(struct hw_data *pHwData) 392{ 393 struct wb35_reg *reg = &pHwData->reg; 394 395 if (atomic_inc_return(®->RegFireCount) == 1) { 396 reg->EP0vm_state = VM_RUNNING; 397 Wb35Reg_EP0VM(pHwData); 398 } else 399 atomic_dec(®->RegFireCount); 400} 401 402void Wb35Reg_EP0VM(struct hw_data *pHwData) 403{ 404 struct wb35_reg *reg = &pHwData->reg; 405 struct urb *urb; 406 struct usb_ctrlrequest *dr; 407 u32 *pBuffer; 408 int ret = -1; 409 struct wb35_reg_queue *reg_queue; 410 411 412 if (reg->SyncIoPause) 413 goto cleanup; 414 415 if (pHwData->SurpriseRemove) 416 goto cleanup; 417 418 /* Get the register data and send to USB through Irp */ 419 spin_lock_irq(®->EP0VM_spin_lock); 420 reg_queue = reg->reg_first; 421 spin_unlock_irq(®->EP0VM_spin_lock); 422 423 if (!reg_queue) 424 goto cleanup; 425 426 /* Get an Urb, send it */ 427 urb = (struct urb *)reg_queue->urb; 428 429 dr = reg_queue->pUsbReq; 430 urb = reg_queue->urb; 431 pBuffer = reg_queue->pBuffer; 432 if (reg_queue->DIRECT == 1) /* output */ 433 pBuffer = ®_queue->VALUE; 434 435 usb_fill_control_urb(urb, pHwData->WbUsb.udev, 436 REG_DIRECTION(pHwData->WbUsb.udev, reg_queue), 437 (u8 *)dr, pBuffer, cpu_to_le16(dr->wLength), 438 Wb35Reg_EP0VM_complete, (void *)pHwData); 439 440 reg->EP0vm_state = VM_RUNNING; 441 442 ret = usb_submit_urb(urb, GFP_ATOMIC); 443 444 if (ret < 0) { 445#ifdef _PE_REG_DUMP_ 446 printk("EP0 Irp sending error\n"); 447#endif 448 goto cleanup; 449 } 450 return; 451 452 cleanup: 453 reg->EP0vm_state = VM_STOP; 454 atomic_dec(®->RegFireCount); 455} 456 457 458void Wb35Reg_EP0VM_complete(struct urb *urb) 459{ 460 struct hw_data *pHwData = (struct hw_data *)urb->context; 461 struct wb35_reg *reg = &pHwData->reg; 462 struct wb35_reg_queue *reg_queue; 463 464 465 /* Variable setting */ 466 reg->EP0vm_state = VM_COMPLETED; 467 reg->EP0VM_status = urb->status; 468 469 if (pHwData->SurpriseRemove) { /* Let WbWlanHalt to handle surprise remove */ 470 reg->EP0vm_state = VM_STOP; 471 atomic_dec(®->RegFireCount); 472 } else { 473 /* Complete to send, remove the URB from the first */ 474 spin_lock_irq(®->EP0VM_spin_lock); 475 reg_queue = reg->reg_first; 476 if (reg_queue == reg->reg_last) 477 reg->reg_last = NULL; 478 reg->reg_first = reg->reg_first->Next; 479 spin_unlock_irq(®->EP0VM_spin_lock); 480 481 if (reg->EP0VM_status) { 482#ifdef _PE_REG_DUMP_ 483 printk("EP0 IoCompleteRoutine return error\n"); 484#endif 485 reg->EP0vm_state = VM_STOP; 486 pHwData->SurpriseRemove = 1; 487 } else { 488 /* Success. Update the result */ 489 490 /* Start the next send */ 491 Wb35Reg_EP0VM(pHwData); 492 } 493 494 kfree(reg_queue); 495 } 496 497 usb_free_urb(urb); 498} 499 500 501void Wb35Reg_destroy(struct hw_data *pHwData) 502{ 503 struct wb35_reg *reg = &pHwData->reg; 504 struct urb *urb; 505 struct wb35_reg_queue *reg_queue; 506 507 Uxx_power_off_procedure(pHwData); 508 509 /* Wait for Reg operation completed */ 510 do { 511 msleep(10); /* Delay for waiting function enter */ 512 } while (reg->EP0vm_state != VM_STOP); 513 msleep(10); /* Delay for waiting function enter */ 514 515 /* Release all the data in RegQueue */ 516 spin_lock_irq(®->EP0VM_spin_lock); 517 reg_queue = reg->reg_first; 518 while (reg_queue) { 519 if (reg_queue == reg->reg_last) 520 reg->reg_last = NULL; 521 reg->reg_first = reg->reg_first->Next; 522 523 urb = reg_queue->urb; 524 spin_unlock_irq(®->EP0VM_spin_lock); 525 if (urb) { 526 usb_free_urb(urb); 527 kfree(reg_queue); 528 } else { 529#ifdef _PE_REG_DUMP_ 530 printk("EP0 queue release error\n"); 531#endif 532 } 533 spin_lock_irq(®->EP0VM_spin_lock); 534 535 reg_queue = reg->reg_first; 536 } 537 spin_unlock_irq(®->EP0VM_spin_lock); 538} 539 540/* 541 * ======================================================================= 542 * The function can be run in passive-level only. 543 * ========================================================================= 544 */ 545unsigned char Wb35Reg_initial(struct hw_data *pHwData) 546{ 547 struct wb35_reg *reg = &pHwData->reg; 548 u32 ltmp; 549 u32 SoftwareSet, VCO_trim, TxVga, Region_ScanInterval; 550 551 /* Spin lock is acquired for read and write IRP command */ 552 spin_lock_init(®->EP0VM_spin_lock); 553 554 /* Getting RF module type from EEPROM */ 555 Wb35Reg_WriteSync(pHwData, 0x03b4, 0x080d0000); /* Start EEPROM access + Read + address(0x0d) */ 556 Wb35Reg_ReadSync(pHwData, 0x03b4, <mp); 557 558 /* Update RF module type and determine the PHY type by inf or EEPROM */ 559 reg->EEPROMPhyType = (u8)(ltmp & 0xff); 560 /* 561 * 0 V MAX2825, 1 V MAX2827, 2 V MAX2828, 3 V MAX2829 562 * 16V AL2230, 17 - AL7230, 18 - AL2230S 563 * 32 Reserved 564 * 33 - W89RF242(TxVGA 0~19), 34 - W89RF242(TxVGA 0~34) 565 */ 566 if (reg->EEPROMPhyType != RF_DECIDE_BY_INF) { 567 if ((reg->EEPROMPhyType == RF_MAXIM_2825) || 568 (reg->EEPROMPhyType == RF_MAXIM_2827) || 569 (reg->EEPROMPhyType == RF_MAXIM_2828) || 570 (reg->EEPROMPhyType == RF_MAXIM_2829) || 571 (reg->EEPROMPhyType == RF_MAXIM_V1) || 572 (reg->EEPROMPhyType == RF_AIROHA_2230) || 573 (reg->EEPROMPhyType == RF_AIROHA_2230S) || 574 (reg->EEPROMPhyType == RF_AIROHA_7230) || 575 (reg->EEPROMPhyType == RF_WB_242) || 576 (reg->EEPROMPhyType == RF_WB_242_1)) 577 pHwData->phy_type = reg->EEPROMPhyType; 578 } 579 580 /* Power On procedure running. The relative parameter will be set according to phy_type */ 581 Uxx_power_on_procedure(pHwData); 582 583 /* Reading MAC address */ 584 Uxx_ReadEthernetAddress(pHwData); 585 586 /* Read VCO trim for RF parameter */ 587 Wb35Reg_WriteSync(pHwData, 0x03b4, 0x08200000); 588 Wb35Reg_ReadSync(pHwData, 0x03b4, &VCO_trim); 589 590 /* Read Antenna On/Off of software flag */ 591 Wb35Reg_WriteSync(pHwData, 0x03b4, 0x08210000); 592 Wb35Reg_ReadSync(pHwData, 0x03b4, &SoftwareSet); 593 594 /* Read TXVGA */ 595 Wb35Reg_WriteSync(pHwData, 0x03b4, 0x08100000); 596 Wb35Reg_ReadSync(pHwData, 0x03b4, &TxVga); 597 598 /* Get Scan interval setting from EEPROM offset 0x1c */ 599 Wb35Reg_WriteSync(pHwData, 0x03b4, 0x081d0000); 600 Wb35Reg_ReadSync(pHwData, 0x03b4, &Region_ScanInterval); 601 602 /* Update Ethernet address */ 603 memcpy(pHwData->CurrentMacAddress, pHwData->PermanentMacAddress, ETH_ALEN); 604 605 /* Update software variable */ 606 pHwData->SoftwareSet = (u16)(SoftwareSet & 0xffff); 607 TxVga &= 0x000000ff; 608 pHwData->PowerIndexFromEEPROM = (u8)TxVga; 609 pHwData->VCO_trim = (u8)VCO_trim & 0xff; 610 if (pHwData->VCO_trim == 0xff) 611 pHwData->VCO_trim = 0x28; 612 613 reg->EEPROMRegion = (u8)(Region_ScanInterval >> 8); 614 if (reg->EEPROMRegion < 1 || reg->EEPROMRegion > 6) 615 reg->EEPROMRegion = REGION_AUTO; 616 617 /* For Get Tx VGA from EEPROM */ 618 GetTxVgaFromEEPROM(pHwData); 619 620 /* Set Scan Interval */ 621 pHwData->Scan_Interval = (u8)(Region_ScanInterval & 0xff) * 10; 622 if ((pHwData->Scan_Interval == 2550) || (pHwData->Scan_Interval < 10)) /* Is default setting 0xff * 10 */ 623 pHwData->Scan_Interval = SCAN_MAX_CHNL_TIME; 624 625 /* Initial register */ 626 RFSynthesizer_initial(pHwData); 627 628 BBProcessor_initial(pHwData); /* Async write, must wait until complete */ 629 630 Wb35Reg_phy_calibration(pHwData); 631 632 Mxx_initial(pHwData); 633 Dxx_initial(pHwData); 634 635 if (pHwData->SurpriseRemove) 636 return false; 637 else 638 return true; /* Initial fail */ 639} 640 641/* 642 * ================================================================ 643 * CardComputeCrc -- 644 * 645 * Description: 646 * Runs the AUTODIN II CRC algorithm on buffer Buffer of length, Length. 647 * 648 * Arguments: 649 * Buffer - the input buffer 650 * Length - the length of Buffer 651 * 652 * Return Value: 653 * The 32-bit CRC value. 654 * =================================================================== 655 */ 656u32 CardComputeCrc(u8 *Buffer, u32 Length) 657{ 658 u32 Crc, Carry; 659 u32 i, j; 660 u8 CurByte; 661 662 Crc = 0xffffffff; 663 664 for (i = 0; i < Length; i++) { 665 CurByte = Buffer[i]; 666 for (j = 0; j < 8; j++) { 667 Carry = ((Crc & 0x80000000) ? 1 : 0) ^ (CurByte & 0x01); 668 Crc <<= 1; 669 CurByte >>= 1; 670 if (Carry) 671 Crc = (Crc ^ 0x04c11db6) | Carry; 672 } 673 } 674 return Crc; 675} 676 677 678/* 679 * ================================================================== 680 * BitReverse -- 681 * Reverse the bits in the input argument, dwData, which is 682 * regarded as a string of bits with the length, DataLength. 683 * 684 * Arguments: 685 * dwData : 686 * DataLength : 687 * 688 * Return: 689 * The converted value. 690 * ================================================================== 691 */ 692u32 BitReverse(u32 dwData, u32 DataLength) 693{ 694 u32 HalfLength, i, j; 695 u32 BitA, BitB; 696 697 if (DataLength <= 0) 698 return 0; /* No conversion is done. */ 699 dwData = dwData & (0xffffffff >> (32 - DataLength)); 700 701 HalfLength = DataLength / 2; 702 for (i = 0, j = DataLength - 1; i < HalfLength; i++, j--) { 703 BitA = GetBit(dwData, i); 704 BitB = GetBit(dwData, j); 705 if (BitA && !BitB) { 706 dwData = ClearBit(dwData, i); 707 dwData = SetBit(dwData, j); 708 } else if (!BitA && BitB) { 709 dwData = SetBit(dwData, i); 710 dwData = ClearBit(dwData, j); 711 } else { 712 /* Do nothing since these two bits are of the save values. */ 713 } 714 } 715 return dwData; 716} 717 718void Wb35Reg_phy_calibration(struct hw_data *pHwData) 719{ 720 u32 BB3c, BB54; 721 722 if ((pHwData->phy_type == RF_WB_242) || 723 (pHwData->phy_type == RF_WB_242_1)) { 724 phy_calibration_winbond(pHwData, 2412); /* Sync operation */ 725 Wb35Reg_ReadSync(pHwData, 0x103c, &BB3c); 726 Wb35Reg_ReadSync(pHwData, 0x1054, &BB54); 727 728 pHwData->BB3c_cal = BB3c; 729 pHwData->BB54_cal = BB54; 730 731 RFSynthesizer_initial(pHwData); 732 BBProcessor_initial(pHwData); /* Async operation */ 733 734 Wb35Reg_WriteSync(pHwData, 0x103c, BB3c); 735 Wb35Reg_WriteSync(pHwData, 0x1054, BB54); 736 } 737} 738