1/* 2 ************************************************************************* 3 * Ralink Tech Inc. 4 * 5F., No.36, Taiyuan St., Jhubei City, 5 * Hsinchu County 302, 6 * Taiwan, R.O.C. 7 * 8 * (c) Copyright 2002-2007, Ralink Technology, Inc. 9 * 10 * This program is free software; you can redistribute it and/or modify * 11 * it under the terms of the GNU General Public License as published by * 12 * the Free Software Foundation; either version 2 of the License, or * 13 * (at your option) any later version. * 14 * * 15 * This program is distributed in the hope that it will be useful, * 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of * 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * 18 * GNU General Public License for more details. * 19 * * 20 * You should have received a copy of the GNU General Public License * 21 * along with this program; if not, write to the * 22 * Free Software Foundation, Inc., * 23 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * 24 * * 25 ************************************************************************* 26 27 Module Name: 28 rt3070.c 29 30 Abstract: 31 Specific funcitons and variables for RT3070 32 33 Revision History: 34 Who When What 35 -------- ---------- ---------------------------------------------- 36*/ 37 38#ifdef RT3070 39 40#include "../rt_config.h" 41 42#ifndef RTMP_RF_RW_SUPPORT 43#error "You Should Enable compile flag RTMP_RF_RW_SUPPORT for this chip" 44#endif /* RTMP_RF_RW_SUPPORT // */ 45 46void NICInitRT3070RFRegisters(struct rt_rtmp_adapter *pAd) 47{ 48 int i; 49 u8 RFValue; 50 51 /* Driver must read EEPROM to get RfIcType before initial RF registers */ 52 /* Initialize RF register to default value */ 53 if (IS_RT3070(pAd) || IS_RT3071(pAd)) { 54 /* Init RF calibration */ 55 /* Driver should toggle RF R30 bit7 before init RF registers */ 56 u32 RfReg = 0; 57 u32 data; 58 59 RT30xxReadRFRegister(pAd, RF_R30, (u8 *)&RfReg); 60 RfReg |= 0x80; 61 RT30xxWriteRFRegister(pAd, RF_R30, (u8)RfReg); 62 RTMPusecDelay(1000); 63 RfReg &= 0x7F; 64 RT30xxWriteRFRegister(pAd, RF_R30, (u8)RfReg); 65 66 /* Initialize RF register to default value */ 67 for (i = 0; i < NUM_RF_REG_PARMS; i++) { 68 RT30xxWriteRFRegister(pAd, 69 RT30xx_RFRegTable[i].Register, 70 RT30xx_RFRegTable[i].Value); 71 } 72 73 /* add by johnli */ 74 if (IS_RT3070(pAd)) { 75 /* */ 76 /* The DAC issue(LDO_CFG0) has been fixed in RT3070(F). */ 77 /* The voltage raising patch is no longer needed for RT3070(F) */ 78 /* */ 79 if ((pAd->MACVersion & 0xffff) < 0x0201) { 80 /* Update MAC 0x05D4 from 01xxxxxx to 0Dxxxxxx (voltage 1.2V to 1.35V) for RT3070 to improve yield rate */ 81 RTUSBReadMACRegister(pAd, LDO_CFG0, &data); 82 data = ((data & 0xF0FFFFFF) | 0x0D000000); 83 RTUSBWriteMACRegister(pAd, LDO_CFG0, data); 84 } 85 } else if (IS_RT3071(pAd)) { 86 /* Driver should set RF R6 bit6 on before init RF registers */ 87 RT30xxReadRFRegister(pAd, RF_R06, (u8 *)&RfReg); 88 RfReg |= 0x40; 89 RT30xxWriteRFRegister(pAd, RF_R06, (u8)RfReg); 90 91 /* init R31 */ 92 RT30xxWriteRFRegister(pAd, RF_R31, 0x14); 93 94 /* RT3071 version E has fixed this issue */ 95 if ((pAd->NicConfig2.field.DACTestBit == 1) 96 && ((pAd->MACVersion & 0xffff) < 0x0211)) { 97 /* patch tx EVM issue temporarily */ 98 RTUSBReadMACRegister(pAd, LDO_CFG0, &data); 99 data = ((data & 0xE0FFFFFF) | 0x0D000000); 100 RTUSBWriteMACRegister(pAd, LDO_CFG0, data); 101 } else { 102 RTMP_IO_READ32(pAd, LDO_CFG0, &data); 103 data = ((data & 0xE0FFFFFF) | 0x01000000); 104 RTMP_IO_WRITE32(pAd, LDO_CFG0, data); 105 } 106 107 /* patch LNA_PE_G1 failed issue */ 108 RTUSBReadMACRegister(pAd, GPIO_SWITCH, &data); 109 data &= ~(0x20); 110 RTUSBWriteMACRegister(pAd, GPIO_SWITCH, data); 111 } 112 /*For RF filter Calibration */ 113 RTMPFilterCalibration(pAd); 114 115 /* Initialize RF R27 register, set RF R27 must be behind RTMPFilterCalibration() */ 116 /* */ 117 /* TX to RX IQ glitch(RF_R27) has been fixed in RT3070(F). */ 118 /* Raising RF voltage is no longer needed for RT3070(F) */ 119 /* */ 120 if ((IS_RT3070(pAd)) && ((pAd->MACVersion & 0xffff) < 0x0201)) { 121 RT30xxWriteRFRegister(pAd, RF_R27, 0x3); 122 } else if ((IS_RT3071(pAd)) 123 && ((pAd->MACVersion & 0xffff) < 0x0211)) { 124 RT30xxWriteRFRegister(pAd, RF_R27, 0x3); 125 } 126 /* set led open drain enable */ 127 RTUSBReadMACRegister(pAd, OPT_14, &data); 128 data |= 0x01; 129 RTUSBWriteMACRegister(pAd, OPT_14, data); 130 131 /* move from RT30xxLoadRFNormalModeSetup because it's needed for both RT3070 and RT3071 */ 132 /* TX_LO1_en, RF R17 register Bit 3 to 0 */ 133 RT30xxReadRFRegister(pAd, RF_R17, &RFValue); 134 RFValue &= (~0x08); 135 /* to fix rx long range issue */ 136 if (pAd->NicConfig2.field.ExternalLNAForG == 0) { 137 if ((IS_RT3071(pAd) 138 && ((pAd->MACVersion & 0xffff) >= 0x0211)) 139 || IS_RT3070(pAd)) { 140 RFValue |= 0x20; 141 } 142 } 143 /* set RF_R17_bit[2:0] equal to EEPROM setting at 0x48h */ 144 if (pAd->TxMixerGain24G >= 1) { 145 RFValue &= (~0x7); /* clean bit [2:0] */ 146 RFValue |= pAd->TxMixerGain24G; 147 } 148 RT30xxWriteRFRegister(pAd, RF_R17, RFValue); 149 150 if (IS_RT3071(pAd)) { 151 /* add by johnli, RF power sequence setup, load RF normal operation-mode setup */ 152 RT30xxLoadRFNormalModeSetup(pAd); 153 } else if (IS_RT3070(pAd)) { 154 /* add by johnli, reset RF_R27 when interface down & up to fix throughput problem */ 155 /* LDORF_VC, RF R27 register Bit 2 to 0 */ 156 RT30xxReadRFRegister(pAd, RF_R27, &RFValue); 157 /* TX to RX IQ glitch(RF_R27) has been fixed in RT3070(F). */ 158 /* Raising RF voltage is no longer needed for RT3070(F) */ 159 if ((pAd->MACVersion & 0xffff) < 0x0201) 160 RFValue = (RFValue & (~0x77)) | 0x3; 161 else 162 RFValue = (RFValue & (~0x77)); 163 RT30xxWriteRFRegister(pAd, RF_R27, RFValue); 164 /* end johnli */ 165 } 166 } 167 168} 169#endif /* RT3070 // */ 170