1/* 2 * Agere Systems Inc. 3 * 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs 4 * 5 * Copyright �� 2005 Agere Systems Inc. 6 * All rights reserved. 7 * http://www.agere.com 8 * 9 *------------------------------------------------------------------------------ 10 * 11 * et1310_tx.h - Defines, structs, enums, prototypes, etc. pertaining to data 12 * transmission. 13 * 14 *------------------------------------------------------------------------------ 15 * 16 * SOFTWARE LICENSE 17 * 18 * This software is provided subject to the following terms and conditions, 19 * which you should read carefully before using the software. Using this 20 * software indicates your acceptance of these terms and conditions. If you do 21 * not agree with these terms and conditions, do not use the software. 22 * 23 * Copyright �� 2005 Agere Systems Inc. 24 * All rights reserved. 25 * 26 * Redistribution and use in source or binary forms, with or without 27 * modifications, are permitted provided that the following conditions are met: 28 * 29 * . Redistributions of source code must retain the above copyright notice, this 30 * list of conditions and the following Disclaimer as comments in the code as 31 * well as in the documentation and/or other materials provided with the 32 * distribution. 33 * 34 * . Redistributions in binary form must reproduce the above copyright notice, 35 * this list of conditions and the following Disclaimer in the documentation 36 * and/or other materials provided with the distribution. 37 * 38 * . Neither the name of Agere Systems Inc. nor the names of the contributors 39 * may be used to endorse or promote products derived from this software 40 * without specific prior written permission. 41 * 42 * Disclaimer 43 * 44 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, 45 * INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF 46 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY 47 * USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN 48 * RISK. IN NO EVENT SHALL AGERE SYSTEMS INC. OR CONTRIBUTORS BE LIABLE FOR ANY 49 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 50 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 51 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 52 * ON ANY THEORY OF LIABILITY, INCLUDING, BUT NOT LIMITED TO, CONTRACT, STRICT 53 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 54 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH 55 * DAMAGE. 56 * 57 */ 58 59#ifndef __ET1310_TX_H__ 60#define __ET1310_TX_H__ 61 62 63/* Typedefs for Tx Descriptor Ring */ 64 65/* 66 * word 2 of the control bits in the Tx Descriptor ring for the ET-1310 67 * 68 * 0-15: length of packet 69 * 16-27: VLAN tag 70 * 28: VLAN CFI 71 * 29-31: VLAN priority 72 * 73 * word 3 of the control bits in the Tx Descriptor ring for the ET-1310 74 * 75 * 0: last packet in the sequence 76 * 1: first packet in the sequence 77 * 2: interrupt the processor when this pkt sent 78 * 3: Control word - no packet data 79 * 4: Issue half-duplex backpressure : XON/XOFF 80 * 5: send pause frame 81 * 6: Tx frame has error 82 * 7: append CRC 83 * 8: MAC override 84 * 9: pad packet 85 * 10: Packet is a Huge packet 86 * 11: append VLAN tag 87 * 12: IP checksum assist 88 * 13: TCP checksum assist 89 * 14: UDP checksum assist 90 */ 91 92/* struct tx_desc represents each descriptor on the ring */ 93struct tx_desc { 94 u32 addr_hi; 95 u32 addr_lo; 96 u32 len_vlan; /* control words how to xmit the */ 97 u32 flags; /* data (detailed above) */ 98}; 99 100/* 101 * The status of the Tx DMA engine it sits in free memory, and is pointed to 102 * by 0x101c / 0x1020. This is a DMA10 type 103 */ 104 105/* TCB (Transmit Control Block: Host Side) */ 106struct tcb { 107 struct tcb *next; /* Next entry in ring */ 108 u32 flags; /* Our flags for the packet */ 109 u32 count; /* Used to spot stuck/lost packets */ 110 u32 stale; /* Used to spot stuck/lost packets */ 111 struct sk_buff *skb; /* Network skb we are tied to */ 112 u32 index; /* Ring indexes */ 113 u32 index_start; 114}; 115 116/* Structure representing our local reference(s) to the ring */ 117struct tx_ring { 118 /* TCB (Transmit Control Block) memory and lists */ 119 struct tcb *tcb_ring; 120 121 /* List of TCBs that are ready to be used */ 122 struct tcb *tcb_qhead; 123 struct tcb *tcb_qtail; 124 125 /* list of TCBs that are currently being sent. NOTE that access to all 126 * three of these (including used) are controlled via the 127 * TCBSendQLock. This lock should be secured prior to incementing / 128 * decrementing used, or any queue manipulation on send_head / 129 * tail 130 */ 131 struct tcb *send_head; 132 struct tcb *send_tail; 133 int used; 134 135 /* The actual descriptor ring */ 136 struct tx_desc *tx_desc_ring; 137 dma_addr_t tx_desc_ring_pa; 138 139 /* send_idx indicates where we last wrote to in the descriptor ring. */ 140 u32 send_idx; 141 142 /* The location of the write-back status block */ 143 u32 *tx_status; 144 dma_addr_t tx_status_pa; 145 146 /* Packets since the last IRQ: used for interrupt coalescing */ 147 int since_irq; 148}; 149 150#endif /* __ET1310_TX_H__ */ 151