1 2 3#undef DEBUG 4 5#include <linux/device.h> 6#include <linux/module.h> 7#include <linux/tty.h> 8#include <linux/serial.h> 9#include <linux/sysrq.h> 10#include <linux/console.h> 11#include <linux/delay.h> 12#include <linux/io.h> 13#include <linux/of.h> 14#include <linux/of_platform.h> 15#include <linux/clk.h> 16 17#include <asm/mpc52xx.h> 18#include <asm/mpc52xx_psc.h> 19 20#if defined(CONFIG_SERIAL_MPC52xx_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) 21#define SUPPORT_SYSRQ 22#endif 23 24#include <linux/serial_core.h> 25 26 27/* We've been assigned a range on the "Low-density serial ports" major */ 28#define SERIAL_PSC_MAJOR 204 29#define SERIAL_PSC_MINOR 148 30 31 32#define ISR_PASS_LIMIT 256 /* Max number of iteration in the interrupt */ 33 34 35static struct uart_port mpc52xx_uart_ports[MPC52xx_PSC_MAXNUM]; 36 /* Rem: - We use the read_status_mask as a shadow of 37 * psc->mpc52xx_psc_imr 38 * - It's important that is array is all zero on start as we 39 * use it to know if it's initialized or not ! If it's not sure 40 * it's cleared, then a memset(...,0,...) should be added to 41 * the console_init 42 */ 43 44/* lookup table for matching device nodes to index numbers */ 45static struct device_node *mpc52xx_uart_nodes[MPC52xx_PSC_MAXNUM]; 46 47static void mpc52xx_uart_of_enumerate(void); 48 49 50#define PSC(port) ((struct mpc52xx_psc __iomem *)((port)->membase)) 51 52 53/* Forward declaration of the interruption handling routine */ 54static irqreturn_t mpc52xx_uart_int(int irq, void *dev_id); 55static irqreturn_t mpc5xxx_uart_process_int(struct uart_port *port); 56 57 58/* Simple macro to test if a port is console or not. This one is taken 59 * for serial_core.c and maybe should be moved to serial_core.h ? */ 60#ifdef CONFIG_SERIAL_CORE_CONSOLE 61#define uart_console(port) \ 62 ((port)->cons && (port)->cons->index == (port)->line) 63#else 64#define uart_console(port) (0) 65#endif 66 67/* ======================================================================== */ 68/* PSC fifo operations for isolating differences between 52xx and 512x */ 69/* ======================================================================== */ 70 71struct psc_ops { 72 void (*fifo_init)(struct uart_port *port); 73 int (*raw_rx_rdy)(struct uart_port *port); 74 int (*raw_tx_rdy)(struct uart_port *port); 75 int (*rx_rdy)(struct uart_port *port); 76 int (*tx_rdy)(struct uart_port *port); 77 int (*tx_empty)(struct uart_port *port); 78 void (*stop_rx)(struct uart_port *port); 79 void (*start_tx)(struct uart_port *port); 80 void (*stop_tx)(struct uart_port *port); 81 void (*rx_clr_irq)(struct uart_port *port); 82 void (*tx_clr_irq)(struct uart_port *port); 83 void (*write_char)(struct uart_port *port, unsigned char c); 84 unsigned char (*read_char)(struct uart_port *port); 85 void (*cw_disable_ints)(struct uart_port *port); 86 void (*cw_restore_ints)(struct uart_port *port); 87 unsigned int (*set_baudrate)(struct uart_port *port, 88 struct ktermios *new, 89 struct ktermios *old); 90 int (*clock)(struct uart_port *port, int enable); 91 int (*fifoc_init)(void); 92 void (*fifoc_uninit)(void); 93 void (*get_irq)(struct uart_port *, struct device_node *); 94 irqreturn_t (*handle_irq)(struct uart_port *port); 95}; 96 97/* setting the prescaler and divisor reg is common for all chips */ 98static inline void mpc52xx_set_divisor(struct mpc52xx_psc __iomem *psc, 99 u16 prescaler, unsigned int divisor) 100{ 101 /* select prescaler */ 102 out_be16(&psc->mpc52xx_psc_clock_select, prescaler); 103 out_8(&psc->ctur, divisor >> 8); 104 out_8(&psc->ctlr, divisor & 0xff); 105} 106 107#ifdef CONFIG_PPC_MPC52xx 108#define FIFO_52xx(port) ((struct mpc52xx_psc_fifo __iomem *)(PSC(port)+1)) 109static void mpc52xx_psc_fifo_init(struct uart_port *port) 110{ 111 struct mpc52xx_psc __iomem *psc = PSC(port); 112 struct mpc52xx_psc_fifo __iomem *fifo = FIFO_52xx(port); 113 114 out_8(&fifo->rfcntl, 0x00); 115 out_be16(&fifo->rfalarm, 0x1ff); 116 out_8(&fifo->tfcntl, 0x07); 117 out_be16(&fifo->tfalarm, 0x80); 118 119 port->read_status_mask |= MPC52xx_PSC_IMR_RXRDY | MPC52xx_PSC_IMR_TXRDY; 120 out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask); 121} 122 123static int mpc52xx_psc_raw_rx_rdy(struct uart_port *port) 124{ 125 return in_be16(&PSC(port)->mpc52xx_psc_status) 126 & MPC52xx_PSC_SR_RXRDY; 127} 128 129static int mpc52xx_psc_raw_tx_rdy(struct uart_port *port) 130{ 131 return in_be16(&PSC(port)->mpc52xx_psc_status) 132 & MPC52xx_PSC_SR_TXRDY; 133} 134 135 136static int mpc52xx_psc_rx_rdy(struct uart_port *port) 137{ 138 return in_be16(&PSC(port)->mpc52xx_psc_isr) 139 & port->read_status_mask 140 & MPC52xx_PSC_IMR_RXRDY; 141} 142 143static int mpc52xx_psc_tx_rdy(struct uart_port *port) 144{ 145 return in_be16(&PSC(port)->mpc52xx_psc_isr) 146 & port->read_status_mask 147 & MPC52xx_PSC_IMR_TXRDY; 148} 149 150static int mpc52xx_psc_tx_empty(struct uart_port *port) 151{ 152 return in_be16(&PSC(port)->mpc52xx_psc_status) 153 & MPC52xx_PSC_SR_TXEMP; 154} 155 156static void mpc52xx_psc_start_tx(struct uart_port *port) 157{ 158 port->read_status_mask |= MPC52xx_PSC_IMR_TXRDY; 159 out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask); 160} 161 162static void mpc52xx_psc_stop_tx(struct uart_port *port) 163{ 164 port->read_status_mask &= ~MPC52xx_PSC_IMR_TXRDY; 165 out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask); 166} 167 168static void mpc52xx_psc_stop_rx(struct uart_port *port) 169{ 170 port->read_status_mask &= ~MPC52xx_PSC_IMR_RXRDY; 171 out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask); 172} 173 174static void mpc52xx_psc_rx_clr_irq(struct uart_port *port) 175{ 176} 177 178static void mpc52xx_psc_tx_clr_irq(struct uart_port *port) 179{ 180} 181 182static void mpc52xx_psc_write_char(struct uart_port *port, unsigned char c) 183{ 184 out_8(&PSC(port)->mpc52xx_psc_buffer_8, c); 185} 186 187static unsigned char mpc52xx_psc_read_char(struct uart_port *port) 188{ 189 return in_8(&PSC(port)->mpc52xx_psc_buffer_8); 190} 191 192static void mpc52xx_psc_cw_disable_ints(struct uart_port *port) 193{ 194 out_be16(&PSC(port)->mpc52xx_psc_imr, 0); 195} 196 197static void mpc52xx_psc_cw_restore_ints(struct uart_port *port) 198{ 199 out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask); 200} 201 202static unsigned int mpc5200_psc_set_baudrate(struct uart_port *port, 203 struct ktermios *new, 204 struct ktermios *old) 205{ 206 unsigned int baud; 207 unsigned int divisor; 208 209 /* The 5200 has a fixed /32 prescaler, uartclk contains the ipb freq */ 210 baud = uart_get_baud_rate(port, new, old, 211 port->uartclk / (32 * 0xffff) + 1, 212 port->uartclk / 32); 213 divisor = (port->uartclk + 16 * baud) / (32 * baud); 214 215 /* enable the /32 prescaler and set the divisor */ 216 mpc52xx_set_divisor(PSC(port), 0xdd00, divisor); 217 return baud; 218} 219 220static unsigned int mpc5200b_psc_set_baudrate(struct uart_port *port, 221 struct ktermios *new, 222 struct ktermios *old) 223{ 224 unsigned int baud; 225 unsigned int divisor; 226 u16 prescaler; 227 228 /* The 5200B has a selectable /4 or /32 prescaler, uartclk contains the 229 * ipb freq */ 230 baud = uart_get_baud_rate(port, new, old, 231 port->uartclk / (32 * 0xffff) + 1, 232 port->uartclk / 4); 233 divisor = (port->uartclk + 2 * baud) / (4 * baud); 234 235 /* select the proper prescaler and set the divisor */ 236 if (divisor > 0xffff) { 237 divisor = (divisor + 4) / 8; 238 prescaler = 0xdd00; /* /32 */ 239 } else 240 prescaler = 0xff00; /* /4 */ 241 mpc52xx_set_divisor(PSC(port), prescaler, divisor); 242 return baud; 243} 244 245static void mpc52xx_psc_get_irq(struct uart_port *port, struct device_node *np) 246{ 247 port->irqflags = IRQF_DISABLED; 248 port->irq = irq_of_parse_and_map(np, 0); 249} 250 251/* 52xx specific interrupt handler. The caller holds the port lock */ 252static irqreturn_t mpc52xx_psc_handle_irq(struct uart_port *port) 253{ 254 return mpc5xxx_uart_process_int(port); 255} 256 257static struct psc_ops mpc52xx_psc_ops = { 258 .fifo_init = mpc52xx_psc_fifo_init, 259 .raw_rx_rdy = mpc52xx_psc_raw_rx_rdy, 260 .raw_tx_rdy = mpc52xx_psc_raw_tx_rdy, 261 .rx_rdy = mpc52xx_psc_rx_rdy, 262 .tx_rdy = mpc52xx_psc_tx_rdy, 263 .tx_empty = mpc52xx_psc_tx_empty, 264 .stop_rx = mpc52xx_psc_stop_rx, 265 .start_tx = mpc52xx_psc_start_tx, 266 .stop_tx = mpc52xx_psc_stop_tx, 267 .rx_clr_irq = mpc52xx_psc_rx_clr_irq, 268 .tx_clr_irq = mpc52xx_psc_tx_clr_irq, 269 .write_char = mpc52xx_psc_write_char, 270 .read_char = mpc52xx_psc_read_char, 271 .cw_disable_ints = mpc52xx_psc_cw_disable_ints, 272 .cw_restore_ints = mpc52xx_psc_cw_restore_ints, 273 .set_baudrate = mpc5200_psc_set_baudrate, 274 .get_irq = mpc52xx_psc_get_irq, 275 .handle_irq = mpc52xx_psc_handle_irq, 276}; 277 278static struct psc_ops mpc5200b_psc_ops = { 279 .fifo_init = mpc52xx_psc_fifo_init, 280 .raw_rx_rdy = mpc52xx_psc_raw_rx_rdy, 281 .raw_tx_rdy = mpc52xx_psc_raw_tx_rdy, 282 .rx_rdy = mpc52xx_psc_rx_rdy, 283 .tx_rdy = mpc52xx_psc_tx_rdy, 284 .tx_empty = mpc52xx_psc_tx_empty, 285 .stop_rx = mpc52xx_psc_stop_rx, 286 .start_tx = mpc52xx_psc_start_tx, 287 .stop_tx = mpc52xx_psc_stop_tx, 288 .rx_clr_irq = mpc52xx_psc_rx_clr_irq, 289 .tx_clr_irq = mpc52xx_psc_tx_clr_irq, 290 .write_char = mpc52xx_psc_write_char, 291 .read_char = mpc52xx_psc_read_char, 292 .cw_disable_ints = mpc52xx_psc_cw_disable_ints, 293 .cw_restore_ints = mpc52xx_psc_cw_restore_ints, 294 .set_baudrate = mpc5200b_psc_set_baudrate, 295 .get_irq = mpc52xx_psc_get_irq, 296 .handle_irq = mpc52xx_psc_handle_irq, 297}; 298 299#endif /* CONFIG_MPC52xx */ 300 301#ifdef CONFIG_PPC_MPC512x 302#define FIFO_512x(port) ((struct mpc512x_psc_fifo __iomem *)(PSC(port)+1)) 303 304/* PSC FIFO Controller for mpc512x */ 305struct psc_fifoc { 306 u32 fifoc_cmd; 307 u32 fifoc_int; 308 u32 fifoc_dma; 309 u32 fifoc_axe; 310 u32 fifoc_debug; 311}; 312 313static struct psc_fifoc __iomem *psc_fifoc; 314static unsigned int psc_fifoc_irq; 315 316static void mpc512x_psc_fifo_init(struct uart_port *port) 317{ 318 /* /32 prescaler */ 319 out_be16(&PSC(port)->mpc52xx_psc_clock_select, 0xdd00); 320 321 out_be32(&FIFO_512x(port)->txcmd, MPC512x_PSC_FIFO_RESET_SLICE); 322 out_be32(&FIFO_512x(port)->txcmd, MPC512x_PSC_FIFO_ENABLE_SLICE); 323 out_be32(&FIFO_512x(port)->txalarm, 1); 324 out_be32(&FIFO_512x(port)->tximr, 0); 325 326 out_be32(&FIFO_512x(port)->rxcmd, MPC512x_PSC_FIFO_RESET_SLICE); 327 out_be32(&FIFO_512x(port)->rxcmd, MPC512x_PSC_FIFO_ENABLE_SLICE); 328 out_be32(&FIFO_512x(port)->rxalarm, 1); 329 out_be32(&FIFO_512x(port)->rximr, 0); 330 331 out_be32(&FIFO_512x(port)->tximr, MPC512x_PSC_FIFO_ALARM); 332 out_be32(&FIFO_512x(port)->rximr, MPC512x_PSC_FIFO_ALARM); 333} 334 335static int mpc512x_psc_raw_rx_rdy(struct uart_port *port) 336{ 337 return !(in_be32(&FIFO_512x(port)->rxsr) & MPC512x_PSC_FIFO_EMPTY); 338} 339 340static int mpc512x_psc_raw_tx_rdy(struct uart_port *port) 341{ 342 return !(in_be32(&FIFO_512x(port)->txsr) & MPC512x_PSC_FIFO_FULL); 343} 344 345static int mpc512x_psc_rx_rdy(struct uart_port *port) 346{ 347 return in_be32(&FIFO_512x(port)->rxsr) 348 & in_be32(&FIFO_512x(port)->rximr) 349 & MPC512x_PSC_FIFO_ALARM; 350} 351 352static int mpc512x_psc_tx_rdy(struct uart_port *port) 353{ 354 return in_be32(&FIFO_512x(port)->txsr) 355 & in_be32(&FIFO_512x(port)->tximr) 356 & MPC512x_PSC_FIFO_ALARM; 357} 358 359static int mpc512x_psc_tx_empty(struct uart_port *port) 360{ 361 return in_be32(&FIFO_512x(port)->txsr) 362 & MPC512x_PSC_FIFO_EMPTY; 363} 364 365static void mpc512x_psc_stop_rx(struct uart_port *port) 366{ 367 unsigned long rx_fifo_imr; 368 369 rx_fifo_imr = in_be32(&FIFO_512x(port)->rximr); 370 rx_fifo_imr &= ~MPC512x_PSC_FIFO_ALARM; 371 out_be32(&FIFO_512x(port)->rximr, rx_fifo_imr); 372} 373 374static void mpc512x_psc_start_tx(struct uart_port *port) 375{ 376 unsigned long tx_fifo_imr; 377 378 tx_fifo_imr = in_be32(&FIFO_512x(port)->tximr); 379 tx_fifo_imr |= MPC512x_PSC_FIFO_ALARM; 380 out_be32(&FIFO_512x(port)->tximr, tx_fifo_imr); 381} 382 383static void mpc512x_psc_stop_tx(struct uart_port *port) 384{ 385 unsigned long tx_fifo_imr; 386 387 tx_fifo_imr = in_be32(&FIFO_512x(port)->tximr); 388 tx_fifo_imr &= ~MPC512x_PSC_FIFO_ALARM; 389 out_be32(&FIFO_512x(port)->tximr, tx_fifo_imr); 390} 391 392static void mpc512x_psc_rx_clr_irq(struct uart_port *port) 393{ 394 out_be32(&FIFO_512x(port)->rxisr, in_be32(&FIFO_512x(port)->rxisr)); 395} 396 397static void mpc512x_psc_tx_clr_irq(struct uart_port *port) 398{ 399 out_be32(&FIFO_512x(port)->txisr, in_be32(&FIFO_512x(port)->txisr)); 400} 401 402static void mpc512x_psc_write_char(struct uart_port *port, unsigned char c) 403{ 404 out_8(&FIFO_512x(port)->txdata_8, c); 405} 406 407static unsigned char mpc512x_psc_read_char(struct uart_port *port) 408{ 409 return in_8(&FIFO_512x(port)->rxdata_8); 410} 411 412static void mpc512x_psc_cw_disable_ints(struct uart_port *port) 413{ 414 port->read_status_mask = 415 in_be32(&FIFO_512x(port)->tximr) << 16 | 416 in_be32(&FIFO_512x(port)->rximr); 417 out_be32(&FIFO_512x(port)->tximr, 0); 418 out_be32(&FIFO_512x(port)->rximr, 0); 419} 420 421static void mpc512x_psc_cw_restore_ints(struct uart_port *port) 422{ 423 out_be32(&FIFO_512x(port)->tximr, 424 (port->read_status_mask >> 16) & 0x7f); 425 out_be32(&FIFO_512x(port)->rximr, port->read_status_mask & 0x7f); 426} 427 428static unsigned int mpc512x_psc_set_baudrate(struct uart_port *port, 429 struct ktermios *new, 430 struct ktermios *old) 431{ 432 unsigned int baud; 433 unsigned int divisor; 434 435 /* 436 * The "MPC5121e Microcontroller Reference Manual, Rev. 3" says on 437 * pg. 30-10 that the chip supports a /32 and a /10 prescaler. 438 * Furthermore, it states that "After reset, the prescaler by 10 439 * for the UART mode is selected", but the reset register value is 440 * 0x0000 which means a /32 prescaler. This is wrong. 441 * 442 * In reality using /32 prescaler doesn't work, as it is not supported! 443 * Use /16 or /10 prescaler, see "MPC5121e Hardware Design Guide", 444 * Chapter 4.1 PSC in UART Mode. 445 * Calculate with a /16 prescaler here. 446 */ 447 448 /* uartclk contains the ips freq */ 449 baud = uart_get_baud_rate(port, new, old, 450 port->uartclk / (16 * 0xffff) + 1, 451 port->uartclk / 16); 452 divisor = (port->uartclk + 8 * baud) / (16 * baud); 453 454 /* enable the /16 prescaler and set the divisor */ 455 mpc52xx_set_divisor(PSC(port), 0xdd00, divisor); 456 return baud; 457} 458 459/* Init PSC FIFO Controller */ 460static int __init mpc512x_psc_fifoc_init(void) 461{ 462 struct device_node *np; 463 464 np = of_find_compatible_node(NULL, NULL, 465 "fsl,mpc5121-psc-fifo"); 466 if (!np) { 467 pr_err("%s: Can't find FIFOC node\n", __func__); 468 return -ENODEV; 469 } 470 471 psc_fifoc = of_iomap(np, 0); 472 if (!psc_fifoc) { 473 pr_err("%s: Can't map FIFOC\n", __func__); 474 of_node_put(np); 475 return -ENODEV; 476 } 477 478 psc_fifoc_irq = irq_of_parse_and_map(np, 0); 479 of_node_put(np); 480 if (psc_fifoc_irq == NO_IRQ) { 481 pr_err("%s: Can't get FIFOC irq\n", __func__); 482 iounmap(psc_fifoc); 483 return -ENODEV; 484 } 485 486 return 0; 487} 488 489static void __exit mpc512x_psc_fifoc_uninit(void) 490{ 491 iounmap(psc_fifoc); 492} 493 494/* 512x specific interrupt handler. The caller holds the port lock */ 495static irqreturn_t mpc512x_psc_handle_irq(struct uart_port *port) 496{ 497 unsigned long fifoc_int; 498 int psc_num; 499 500 /* Read pending PSC FIFOC interrupts */ 501 fifoc_int = in_be32(&psc_fifoc->fifoc_int); 502 503 /* Check if it is an interrupt for this port */ 504 psc_num = (port->mapbase & 0xf00) >> 8; 505 if (test_bit(psc_num, &fifoc_int) || 506 test_bit(psc_num + 16, &fifoc_int)) 507 return mpc5xxx_uart_process_int(port); 508 509 return IRQ_NONE; 510} 511 512static int mpc512x_psc_clock(struct uart_port *port, int enable) 513{ 514 struct clk *psc_clk; 515 int psc_num; 516 char clk_name[10]; 517 518 if (uart_console(port)) 519 return 0; 520 521 psc_num = (port->mapbase & 0xf00) >> 8; 522 snprintf(clk_name, sizeof(clk_name), "psc%d_clk", psc_num); 523 psc_clk = clk_get(port->dev, clk_name); 524 if (IS_ERR(psc_clk)) { 525 dev_err(port->dev, "Failed to get PSC clock entry!\n"); 526 return -ENODEV; 527 } 528 529 dev_dbg(port->dev, "%s %sable\n", clk_name, enable ? "en" : "dis"); 530 531 if (enable) 532 clk_enable(psc_clk); 533 else 534 clk_disable(psc_clk); 535 536 return 0; 537} 538 539static void mpc512x_psc_get_irq(struct uart_port *port, struct device_node *np) 540{ 541 port->irqflags = IRQF_SHARED; 542 port->irq = psc_fifoc_irq; 543} 544 545static struct psc_ops mpc512x_psc_ops = { 546 .fifo_init = mpc512x_psc_fifo_init, 547 .raw_rx_rdy = mpc512x_psc_raw_rx_rdy, 548 .raw_tx_rdy = mpc512x_psc_raw_tx_rdy, 549 .rx_rdy = mpc512x_psc_rx_rdy, 550 .tx_rdy = mpc512x_psc_tx_rdy, 551 .tx_empty = mpc512x_psc_tx_empty, 552 .stop_rx = mpc512x_psc_stop_rx, 553 .start_tx = mpc512x_psc_start_tx, 554 .stop_tx = mpc512x_psc_stop_tx, 555 .rx_clr_irq = mpc512x_psc_rx_clr_irq, 556 .tx_clr_irq = mpc512x_psc_tx_clr_irq, 557 .write_char = mpc512x_psc_write_char, 558 .read_char = mpc512x_psc_read_char, 559 .cw_disable_ints = mpc512x_psc_cw_disable_ints, 560 .cw_restore_ints = mpc512x_psc_cw_restore_ints, 561 .set_baudrate = mpc512x_psc_set_baudrate, 562 .clock = mpc512x_psc_clock, 563 .fifoc_init = mpc512x_psc_fifoc_init, 564 .fifoc_uninit = mpc512x_psc_fifoc_uninit, 565 .get_irq = mpc512x_psc_get_irq, 566 .handle_irq = mpc512x_psc_handle_irq, 567}; 568#endif 569 570static struct psc_ops *psc_ops; 571 572/* ======================================================================== */ 573/* UART operations */ 574/* ======================================================================== */ 575 576static unsigned int 577mpc52xx_uart_tx_empty(struct uart_port *port) 578{ 579 return psc_ops->tx_empty(port) ? TIOCSER_TEMT : 0; 580} 581 582static void 583mpc52xx_uart_set_mctrl(struct uart_port *port, unsigned int mctrl) 584{ 585 if (mctrl & TIOCM_RTS) 586 out_8(&PSC(port)->op1, MPC52xx_PSC_OP_RTS); 587 else 588 out_8(&PSC(port)->op0, MPC52xx_PSC_OP_RTS); 589} 590 591static unsigned int 592mpc52xx_uart_get_mctrl(struct uart_port *port) 593{ 594 unsigned int ret = TIOCM_DSR; 595 u8 status = in_8(&PSC(port)->mpc52xx_psc_ipcr); 596 597 if (!(status & MPC52xx_PSC_CTS)) 598 ret |= TIOCM_CTS; 599 if (!(status & MPC52xx_PSC_DCD)) 600 ret |= TIOCM_CAR; 601 602 return ret; 603} 604 605static void 606mpc52xx_uart_stop_tx(struct uart_port *port) 607{ 608 /* port->lock taken by caller */ 609 psc_ops->stop_tx(port); 610} 611 612static void 613mpc52xx_uart_start_tx(struct uart_port *port) 614{ 615 /* port->lock taken by caller */ 616 psc_ops->start_tx(port); 617} 618 619static void 620mpc52xx_uart_send_xchar(struct uart_port *port, char ch) 621{ 622 unsigned long flags; 623 spin_lock_irqsave(&port->lock, flags); 624 625 port->x_char = ch; 626 if (ch) { 627 /* Make sure tx interrupts are on */ 628 /* Truly necessary ??? They should be anyway */ 629 psc_ops->start_tx(port); 630 } 631 632 spin_unlock_irqrestore(&port->lock, flags); 633} 634 635static void 636mpc52xx_uart_stop_rx(struct uart_port *port) 637{ 638 /* port->lock taken by caller */ 639 psc_ops->stop_rx(port); 640} 641 642static void 643mpc52xx_uart_enable_ms(struct uart_port *port) 644{ 645 struct mpc52xx_psc __iomem *psc = PSC(port); 646 647 /* clear D_*-bits by reading them */ 648 in_8(&psc->mpc52xx_psc_ipcr); 649 /* enable CTS and DCD as IPC interrupts */ 650 out_8(&psc->mpc52xx_psc_acr, MPC52xx_PSC_IEC_CTS | MPC52xx_PSC_IEC_DCD); 651 652 port->read_status_mask |= MPC52xx_PSC_IMR_IPC; 653 out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask); 654} 655 656static void 657mpc52xx_uart_break_ctl(struct uart_port *port, int ctl) 658{ 659 unsigned long flags; 660 spin_lock_irqsave(&port->lock, flags); 661 662 if (ctl == -1) 663 out_8(&PSC(port)->command, MPC52xx_PSC_START_BRK); 664 else 665 out_8(&PSC(port)->command, MPC52xx_PSC_STOP_BRK); 666 667 spin_unlock_irqrestore(&port->lock, flags); 668} 669 670static int 671mpc52xx_uart_startup(struct uart_port *port) 672{ 673 struct mpc52xx_psc __iomem *psc = PSC(port); 674 int ret; 675 676 if (psc_ops->clock) { 677 ret = psc_ops->clock(port, 1); 678 if (ret) 679 return ret; 680 } 681 682 /* Request IRQ */ 683 ret = request_irq(port->irq, mpc52xx_uart_int, 684 port->irqflags, "mpc52xx_psc_uart", port); 685 if (ret) 686 return ret; 687 688 /* Reset/activate the port, clear and enable interrupts */ 689 out_8(&psc->command, MPC52xx_PSC_RST_RX); 690 out_8(&psc->command, MPC52xx_PSC_RST_TX); 691 692 out_be32(&psc->sicr, 0); /* UART mode DCD ignored */ 693 694 psc_ops->fifo_init(port); 695 696 out_8(&psc->command, MPC52xx_PSC_TX_ENABLE); 697 out_8(&psc->command, MPC52xx_PSC_RX_ENABLE); 698 699 return 0; 700} 701 702static void 703mpc52xx_uart_shutdown(struct uart_port *port) 704{ 705 struct mpc52xx_psc __iomem *psc = PSC(port); 706 707 /* Shut down the port. Leave TX active if on a console port */ 708 out_8(&psc->command, MPC52xx_PSC_RST_RX); 709 if (!uart_console(port)) 710 out_8(&psc->command, MPC52xx_PSC_RST_TX); 711 712 port->read_status_mask = 0; 713 out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask); 714 715 if (psc_ops->clock) 716 psc_ops->clock(port, 0); 717 718 /* Release interrupt */ 719 free_irq(port->irq, port); 720} 721 722static void 723mpc52xx_uart_set_termios(struct uart_port *port, struct ktermios *new, 724 struct ktermios *old) 725{ 726 struct mpc52xx_psc __iomem *psc = PSC(port); 727 unsigned long flags; 728 unsigned char mr1, mr2; 729 unsigned int j; 730 unsigned int baud; 731 732 /* Prepare what we're gonna write */ 733 mr1 = 0; 734 735 switch (new->c_cflag & CSIZE) { 736 case CS5: mr1 |= MPC52xx_PSC_MODE_5_BITS; 737 break; 738 case CS6: mr1 |= MPC52xx_PSC_MODE_6_BITS; 739 break; 740 case CS7: mr1 |= MPC52xx_PSC_MODE_7_BITS; 741 break; 742 case CS8: 743 default: mr1 |= MPC52xx_PSC_MODE_8_BITS; 744 } 745 746 if (new->c_cflag & PARENB) { 747 mr1 |= (new->c_cflag & PARODD) ? 748 MPC52xx_PSC_MODE_PARODD : MPC52xx_PSC_MODE_PAREVEN; 749 } else 750 mr1 |= MPC52xx_PSC_MODE_PARNONE; 751 752 753 mr2 = 0; 754 755 if (new->c_cflag & CSTOPB) 756 mr2 |= MPC52xx_PSC_MODE_TWO_STOP; 757 else 758 mr2 |= ((new->c_cflag & CSIZE) == CS5) ? 759 MPC52xx_PSC_MODE_ONE_STOP_5_BITS : 760 MPC52xx_PSC_MODE_ONE_STOP; 761 762 if (new->c_cflag & CRTSCTS) { 763 mr1 |= MPC52xx_PSC_MODE_RXRTS; 764 mr2 |= MPC52xx_PSC_MODE_TXCTS; 765 } 766 767 /* Get the lock */ 768 spin_lock_irqsave(&port->lock, flags); 769 770 /* Do our best to flush TX & RX, so we don't lose anything */ 771 /* But we don't wait indefinitely ! */ 772 j = 5000000; /* Maximum wait */ 773 /* while (j-- && mpc52xx_uart_int_rx_chars(port)); */ 774 while (!mpc52xx_uart_tx_empty(port) && --j) 775 udelay(1); 776 777 if (!j) 778 printk(KERN_ERR "mpc52xx_uart.c: " 779 "Unable to flush RX & TX fifos in-time in set_termios." 780 "Some chars may have been lost.\n"); 781 782 /* Reset the TX & RX */ 783 out_8(&psc->command, MPC52xx_PSC_RST_RX); 784 out_8(&psc->command, MPC52xx_PSC_RST_TX); 785 786 /* Send new mode settings */ 787 out_8(&psc->command, MPC52xx_PSC_SEL_MODE_REG_1); 788 out_8(&psc->mode, mr1); 789 out_8(&psc->mode, mr2); 790 baud = psc_ops->set_baudrate(port, new, old); 791 792 /* Update the per-port timeout */ 793 uart_update_timeout(port, new->c_cflag, baud); 794 795 if (UART_ENABLE_MS(port, new->c_cflag)) 796 mpc52xx_uart_enable_ms(port); 797 798 /* Reenable TX & RX */ 799 out_8(&psc->command, MPC52xx_PSC_TX_ENABLE); 800 out_8(&psc->command, MPC52xx_PSC_RX_ENABLE); 801 802 /* We're all set, release the lock */ 803 spin_unlock_irqrestore(&port->lock, flags); 804} 805 806static const char * 807mpc52xx_uart_type(struct uart_port *port) 808{ 809 return port->type == PORT_MPC52xx ? "MPC52xx PSC" : NULL; 810} 811 812static void 813mpc52xx_uart_release_port(struct uart_port *port) 814{ 815 /* remapped by us ? */ 816 if (port->flags & UPF_IOREMAP) { 817 iounmap(port->membase); 818 port->membase = NULL; 819 } 820 821 release_mem_region(port->mapbase, sizeof(struct mpc52xx_psc)); 822} 823 824static int 825mpc52xx_uart_request_port(struct uart_port *port) 826{ 827 int err; 828 829 if (port->flags & UPF_IOREMAP) /* Need to remap ? */ 830 port->membase = ioremap(port->mapbase, 831 sizeof(struct mpc52xx_psc)); 832 833 if (!port->membase) 834 return -EINVAL; 835 836 err = request_mem_region(port->mapbase, sizeof(struct mpc52xx_psc), 837 "mpc52xx_psc_uart") != NULL ? 0 : -EBUSY; 838 839 if (err && (port->flags & UPF_IOREMAP)) { 840 iounmap(port->membase); 841 port->membase = NULL; 842 } 843 844 return err; 845} 846 847static void 848mpc52xx_uart_config_port(struct uart_port *port, int flags) 849{ 850 if ((flags & UART_CONFIG_TYPE) 851 && (mpc52xx_uart_request_port(port) == 0)) 852 port->type = PORT_MPC52xx; 853} 854 855static int 856mpc52xx_uart_verify_port(struct uart_port *port, struct serial_struct *ser) 857{ 858 if (ser->type != PORT_UNKNOWN && ser->type != PORT_MPC52xx) 859 return -EINVAL; 860 861 if ((ser->irq != port->irq) || 862 (ser->io_type != UPIO_MEM) || 863 (ser->baud_base != port->uartclk) || 864 (ser->iomem_base != (void *)port->mapbase) || 865 (ser->hub6 != 0)) 866 return -EINVAL; 867 868 return 0; 869} 870 871 872static struct uart_ops mpc52xx_uart_ops = { 873 .tx_empty = mpc52xx_uart_tx_empty, 874 .set_mctrl = mpc52xx_uart_set_mctrl, 875 .get_mctrl = mpc52xx_uart_get_mctrl, 876 .stop_tx = mpc52xx_uart_stop_tx, 877 .start_tx = mpc52xx_uart_start_tx, 878 .send_xchar = mpc52xx_uart_send_xchar, 879 .stop_rx = mpc52xx_uart_stop_rx, 880 .enable_ms = mpc52xx_uart_enable_ms, 881 .break_ctl = mpc52xx_uart_break_ctl, 882 .startup = mpc52xx_uart_startup, 883 .shutdown = mpc52xx_uart_shutdown, 884 .set_termios = mpc52xx_uart_set_termios, 885/* .pm = mpc52xx_uart_pm, Not supported yet */ 886/* .set_wake = mpc52xx_uart_set_wake, Not supported yet */ 887 .type = mpc52xx_uart_type, 888 .release_port = mpc52xx_uart_release_port, 889 .request_port = mpc52xx_uart_request_port, 890 .config_port = mpc52xx_uart_config_port, 891 .verify_port = mpc52xx_uart_verify_port 892}; 893 894 895/* ======================================================================== */ 896/* Interrupt handling */ 897/* ======================================================================== */ 898 899static inline int 900mpc52xx_uart_int_rx_chars(struct uart_port *port) 901{ 902 struct tty_struct *tty = port->state->port.tty; 903 unsigned char ch, flag; 904 unsigned short status; 905 906 /* While we can read, do so ! */ 907 while (psc_ops->raw_rx_rdy(port)) { 908 /* Get the char */ 909 ch = psc_ops->read_char(port); 910 911 /* Handle sysreq char */ 912#ifdef SUPPORT_SYSRQ 913 if (uart_handle_sysrq_char(port, ch)) { 914 port->sysrq = 0; 915 continue; 916 } 917#endif 918 919 /* Store it */ 920 921 flag = TTY_NORMAL; 922 port->icount.rx++; 923 924 status = in_be16(&PSC(port)->mpc52xx_psc_status); 925 926 if (status & (MPC52xx_PSC_SR_PE | 927 MPC52xx_PSC_SR_FE | 928 MPC52xx_PSC_SR_RB)) { 929 930 if (status & MPC52xx_PSC_SR_RB) { 931 flag = TTY_BREAK; 932 uart_handle_break(port); 933 port->icount.brk++; 934 } else if (status & MPC52xx_PSC_SR_PE) { 935 flag = TTY_PARITY; 936 port->icount.parity++; 937 } 938 else if (status & MPC52xx_PSC_SR_FE) { 939 flag = TTY_FRAME; 940 port->icount.frame++; 941 } 942 943 /* Clear error condition */ 944 out_8(&PSC(port)->command, MPC52xx_PSC_RST_ERR_STAT); 945 946 } 947 tty_insert_flip_char(tty, ch, flag); 948 if (status & MPC52xx_PSC_SR_OE) { 949 /* 950 * Overrun is special, since it's 951 * reported immediately, and doesn't 952 * affect the current character 953 */ 954 tty_insert_flip_char(tty, 0, TTY_OVERRUN); 955 port->icount.overrun++; 956 } 957 } 958 959 spin_unlock(&port->lock); 960 tty_flip_buffer_push(tty); 961 spin_lock(&port->lock); 962 963 return psc_ops->raw_rx_rdy(port); 964} 965 966static inline int 967mpc52xx_uart_int_tx_chars(struct uart_port *port) 968{ 969 struct circ_buf *xmit = &port->state->xmit; 970 971 /* Process out of band chars */ 972 if (port->x_char) { 973 psc_ops->write_char(port, port->x_char); 974 port->icount.tx++; 975 port->x_char = 0; 976 return 1; 977 } 978 979 /* Nothing to do ? */ 980 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { 981 mpc52xx_uart_stop_tx(port); 982 return 0; 983 } 984 985 /* Send chars */ 986 while (psc_ops->raw_tx_rdy(port)) { 987 psc_ops->write_char(port, xmit->buf[xmit->tail]); 988 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); 989 port->icount.tx++; 990 if (uart_circ_empty(xmit)) 991 break; 992 } 993 994 /* Wake up */ 995 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 996 uart_write_wakeup(port); 997 998 /* Maybe we're done after all */ 999 if (uart_circ_empty(xmit)) { 1000 mpc52xx_uart_stop_tx(port); 1001 return 0; 1002 } 1003 1004 return 1; 1005} 1006 1007static irqreturn_t 1008mpc5xxx_uart_process_int(struct uart_port *port) 1009{ 1010 unsigned long pass = ISR_PASS_LIMIT; 1011 unsigned int keepgoing; 1012 u8 status; 1013 1014 /* While we have stuff to do, we continue */ 1015 do { 1016 /* If we don't find anything to do, we stop */ 1017 keepgoing = 0; 1018 1019 psc_ops->rx_clr_irq(port); 1020 if (psc_ops->rx_rdy(port)) 1021 keepgoing |= mpc52xx_uart_int_rx_chars(port); 1022 1023 psc_ops->tx_clr_irq(port); 1024 if (psc_ops->tx_rdy(port)) 1025 keepgoing |= mpc52xx_uart_int_tx_chars(port); 1026 1027 status = in_8(&PSC(port)->mpc52xx_psc_ipcr); 1028 if (status & MPC52xx_PSC_D_DCD) 1029 uart_handle_dcd_change(port, !(status & MPC52xx_PSC_DCD)); 1030 1031 if (status & MPC52xx_PSC_D_CTS) 1032 uart_handle_cts_change(port, !(status & MPC52xx_PSC_CTS)); 1033 1034 /* Limit number of iteration */ 1035 if (!(--pass)) 1036 keepgoing = 0; 1037 1038 } while (keepgoing); 1039 1040 return IRQ_HANDLED; 1041} 1042 1043static irqreturn_t 1044mpc52xx_uart_int(int irq, void *dev_id) 1045{ 1046 struct uart_port *port = dev_id; 1047 irqreturn_t ret; 1048 1049 spin_lock(&port->lock); 1050 1051 ret = psc_ops->handle_irq(port); 1052 1053 spin_unlock(&port->lock); 1054 1055 return ret; 1056} 1057 1058/* ======================================================================== */ 1059/* Console ( if applicable ) */ 1060/* ======================================================================== */ 1061 1062#ifdef CONFIG_SERIAL_MPC52xx_CONSOLE 1063 1064static void __init 1065mpc52xx_console_get_options(struct uart_port *port, 1066 int *baud, int *parity, int *bits, int *flow) 1067{ 1068 struct mpc52xx_psc __iomem *psc = PSC(port); 1069 unsigned char mr1; 1070 1071 pr_debug("mpc52xx_console_get_options(port=%p)\n", port); 1072 1073 /* Read the mode registers */ 1074 out_8(&psc->command, MPC52xx_PSC_SEL_MODE_REG_1); 1075 mr1 = in_8(&psc->mode); 1076 1077 /* CT{U,L}R are write-only ! */ 1078 *baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD; 1079 1080 /* Parse them */ 1081 switch (mr1 & MPC52xx_PSC_MODE_BITS_MASK) { 1082 case MPC52xx_PSC_MODE_5_BITS: 1083 *bits = 5; 1084 break; 1085 case MPC52xx_PSC_MODE_6_BITS: 1086 *bits = 6; 1087 break; 1088 case MPC52xx_PSC_MODE_7_BITS: 1089 *bits = 7; 1090 break; 1091 case MPC52xx_PSC_MODE_8_BITS: 1092 default: 1093 *bits = 8; 1094 } 1095 1096 if (mr1 & MPC52xx_PSC_MODE_PARNONE) 1097 *parity = 'n'; 1098 else 1099 *parity = mr1 & MPC52xx_PSC_MODE_PARODD ? 'o' : 'e'; 1100} 1101 1102static void 1103mpc52xx_console_write(struct console *co, const char *s, unsigned int count) 1104{ 1105 struct uart_port *port = &mpc52xx_uart_ports[co->index]; 1106 unsigned int i, j; 1107 1108 /* Disable interrupts */ 1109 psc_ops->cw_disable_ints(port); 1110 1111 /* Wait the TX buffer to be empty */ 1112 j = 5000000; /* Maximum wait */ 1113 while (!mpc52xx_uart_tx_empty(port) && --j) 1114 udelay(1); 1115 1116 /* Write all the chars */ 1117 for (i = 0; i < count; i++, s++) { 1118 /* Line return handling */ 1119 if (*s == '\n') 1120 psc_ops->write_char(port, '\r'); 1121 1122 /* Send the char */ 1123 psc_ops->write_char(port, *s); 1124 1125 /* Wait the TX buffer to be empty */ 1126 j = 20000; /* Maximum wait */ 1127 while (!mpc52xx_uart_tx_empty(port) && --j) 1128 udelay(1); 1129 } 1130 1131 /* Restore interrupt state */ 1132 psc_ops->cw_restore_ints(port); 1133} 1134 1135 1136static int __init 1137mpc52xx_console_setup(struct console *co, char *options) 1138{ 1139 struct uart_port *port = &mpc52xx_uart_ports[co->index]; 1140 struct device_node *np = mpc52xx_uart_nodes[co->index]; 1141 unsigned int uartclk; 1142 struct resource res; 1143 int ret; 1144 1145 int baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD; 1146 int bits = 8; 1147 int parity = 'n'; 1148 int flow = 'n'; 1149 1150 pr_debug("mpc52xx_console_setup co=%p, co->index=%i, options=%s\n", 1151 co, co->index, options); 1152 1153 if ((co->index < 0) || (co->index >= MPC52xx_PSC_MAXNUM)) { 1154 pr_debug("PSC%x out of range\n", co->index); 1155 return -EINVAL; 1156 } 1157 1158 if (!np) { 1159 pr_debug("PSC%x not found in device tree\n", co->index); 1160 return -EINVAL; 1161 } 1162 1163 pr_debug("Console on ttyPSC%x is %s\n", 1164 co->index, mpc52xx_uart_nodes[co->index]->full_name); 1165 1166 /* Fetch register locations */ 1167 ret = of_address_to_resource(np, 0, &res); 1168 if (ret) { 1169 pr_debug("Could not get resources for PSC%x\n", co->index); 1170 return ret; 1171 } 1172 1173 uartclk = mpc5xxx_get_bus_frequency(np); 1174 if (uartclk == 0) { 1175 pr_debug("Could not find uart clock frequency!\n"); 1176 return -EINVAL; 1177 } 1178 1179 /* Basic port init. Needed since we use some uart_??? func before 1180 * real init for early access */ 1181 spin_lock_init(&port->lock); 1182 port->uartclk = uartclk; 1183 port->ops = &mpc52xx_uart_ops; 1184 port->mapbase = res.start; 1185 port->membase = ioremap(res.start, sizeof(struct mpc52xx_psc)); 1186 port->irq = irq_of_parse_and_map(np, 0); 1187 1188 if (port->membase == NULL) 1189 return -EINVAL; 1190 1191 pr_debug("mpc52xx-psc uart at %p, mapped to %p, irq=%x, freq=%i\n", 1192 (void *)port->mapbase, port->membase, 1193 port->irq, port->uartclk); 1194 1195 /* Setup the port parameters accoding to options */ 1196 if (options) 1197 uart_parse_options(options, &baud, &parity, &bits, &flow); 1198 else 1199 mpc52xx_console_get_options(port, &baud, &parity, &bits, &flow); 1200 1201 pr_debug("Setting console parameters: %i %i%c1 flow=%c\n", 1202 baud, bits, parity, flow); 1203 1204 return uart_set_options(port, co, baud, parity, bits, flow); 1205} 1206 1207 1208static struct uart_driver mpc52xx_uart_driver; 1209 1210static struct console mpc52xx_console = { 1211 .name = "ttyPSC", 1212 .write = mpc52xx_console_write, 1213 .device = uart_console_device, 1214 .setup = mpc52xx_console_setup, 1215 .flags = CON_PRINTBUFFER, 1216 .index = -1, /* Specified on the cmdline (e.g. console=ttyPSC0) */ 1217 .data = &mpc52xx_uart_driver, 1218}; 1219 1220 1221static int __init 1222mpc52xx_console_init(void) 1223{ 1224 mpc52xx_uart_of_enumerate(); 1225 register_console(&mpc52xx_console); 1226 return 0; 1227} 1228 1229console_initcall(mpc52xx_console_init); 1230 1231#define MPC52xx_PSC_CONSOLE &mpc52xx_console 1232#else 1233#define MPC52xx_PSC_CONSOLE NULL 1234#endif 1235 1236 1237/* ======================================================================== */ 1238/* UART Driver */ 1239/* ======================================================================== */ 1240 1241static struct uart_driver mpc52xx_uart_driver = { 1242 .driver_name = "mpc52xx_psc_uart", 1243 .dev_name = "ttyPSC", 1244 .major = SERIAL_PSC_MAJOR, 1245 .minor = SERIAL_PSC_MINOR, 1246 .nr = MPC52xx_PSC_MAXNUM, 1247 .cons = MPC52xx_PSC_CONSOLE, 1248}; 1249 1250/* ======================================================================== */ 1251/* OF Platform Driver */ 1252/* ======================================================================== */ 1253 1254static struct of_device_id mpc52xx_uart_of_match[] = { 1255#ifdef CONFIG_PPC_MPC52xx 1256 { .compatible = "fsl,mpc5200b-psc-uart", .data = &mpc5200b_psc_ops, }, 1257 { .compatible = "fsl,mpc5200-psc-uart", .data = &mpc52xx_psc_ops, }, 1258 /* binding used by old lite5200 device trees: */ 1259 { .compatible = "mpc5200-psc-uart", .data = &mpc52xx_psc_ops, }, 1260 /* binding used by efika: */ 1261 { .compatible = "mpc5200-serial", .data = &mpc52xx_psc_ops, }, 1262#endif 1263#ifdef CONFIG_PPC_MPC512x 1264 { .compatible = "fsl,mpc5121-psc-uart", .data = &mpc512x_psc_ops, }, 1265#endif 1266 {}, 1267}; 1268 1269static int __devinit 1270mpc52xx_uart_of_probe(struct platform_device *op, const struct of_device_id *match) 1271{ 1272 int idx = -1; 1273 unsigned int uartclk; 1274 struct uart_port *port = NULL; 1275 struct resource res; 1276 int ret; 1277 1278 dev_dbg(&op->dev, "mpc52xx_uart_probe(op=%p, match=%p)\n", op, match); 1279 1280 /* Check validity & presence */ 1281 for (idx = 0; idx < MPC52xx_PSC_MAXNUM; idx++) 1282 if (mpc52xx_uart_nodes[idx] == op->dev.of_node) 1283 break; 1284 if (idx >= MPC52xx_PSC_MAXNUM) 1285 return -EINVAL; 1286 pr_debug("Found %s assigned to ttyPSC%x\n", 1287 mpc52xx_uart_nodes[idx]->full_name, idx); 1288 1289 /* set the uart clock to the input clock of the psc, the different 1290 * prescalers are taken into account in the set_baudrate() methods 1291 * of the respective chip */ 1292 uartclk = mpc5xxx_get_bus_frequency(op->dev.of_node); 1293 if (uartclk == 0) { 1294 dev_dbg(&op->dev, "Could not find uart clock frequency!\n"); 1295 return -EINVAL; 1296 } 1297 1298 /* Init the port structure */ 1299 port = &mpc52xx_uart_ports[idx]; 1300 1301 spin_lock_init(&port->lock); 1302 port->uartclk = uartclk; 1303 port->fifosize = 512; 1304 port->iotype = UPIO_MEM; 1305 port->flags = UPF_BOOT_AUTOCONF | 1306 (uart_console(port) ? 0 : UPF_IOREMAP); 1307 port->line = idx; 1308 port->ops = &mpc52xx_uart_ops; 1309 port->dev = &op->dev; 1310 1311 /* Search for IRQ and mapbase */ 1312 ret = of_address_to_resource(op->dev.of_node, 0, &res); 1313 if (ret) 1314 return ret; 1315 1316 port->mapbase = res.start; 1317 if (!port->mapbase) { 1318 dev_dbg(&op->dev, "Could not allocate resources for PSC\n"); 1319 return -EINVAL; 1320 } 1321 1322 psc_ops->get_irq(port, op->dev.of_node); 1323 if (port->irq == NO_IRQ) { 1324 dev_dbg(&op->dev, "Could not get irq\n"); 1325 return -EINVAL; 1326 } 1327 1328 dev_dbg(&op->dev, "mpc52xx-psc uart at %p, irq=%x, freq=%i\n", 1329 (void *)port->mapbase, port->irq, port->uartclk); 1330 1331 /* Add the port to the uart sub-system */ 1332 ret = uart_add_one_port(&mpc52xx_uart_driver, port); 1333 if (ret) 1334 return ret; 1335 1336 dev_set_drvdata(&op->dev, (void *)port); 1337 return 0; 1338} 1339 1340static int 1341mpc52xx_uart_of_remove(struct platform_device *op) 1342{ 1343 struct uart_port *port = dev_get_drvdata(&op->dev); 1344 dev_set_drvdata(&op->dev, NULL); 1345 1346 if (port) 1347 uart_remove_one_port(&mpc52xx_uart_driver, port); 1348 1349 return 0; 1350} 1351 1352#ifdef CONFIG_PM 1353static int 1354mpc52xx_uart_of_suspend(struct platform_device *op, pm_message_t state) 1355{ 1356 struct uart_port *port = (struct uart_port *) dev_get_drvdata(&op->dev); 1357 1358 if (port) 1359 uart_suspend_port(&mpc52xx_uart_driver, port); 1360 1361 return 0; 1362} 1363 1364static int 1365mpc52xx_uart_of_resume(struct platform_device *op) 1366{ 1367 struct uart_port *port = (struct uart_port *) dev_get_drvdata(&op->dev); 1368 1369 if (port) 1370 uart_resume_port(&mpc52xx_uart_driver, port); 1371 1372 return 0; 1373} 1374#endif 1375 1376static void 1377mpc52xx_uart_of_assign(struct device_node *np) 1378{ 1379 int i; 1380 1381 /* Find the first free PSC number */ 1382 for (i = 0; i < MPC52xx_PSC_MAXNUM; i++) { 1383 if (mpc52xx_uart_nodes[i] == NULL) { 1384 of_node_get(np); 1385 mpc52xx_uart_nodes[i] = np; 1386 return; 1387 } 1388 } 1389} 1390 1391static void 1392mpc52xx_uart_of_enumerate(void) 1393{ 1394 static int enum_done; 1395 struct device_node *np; 1396 const struct of_device_id *match; 1397 int i; 1398 1399 if (enum_done) 1400 return; 1401 1402 /* Assign index to each PSC in device tree */ 1403 for_each_matching_node(np, mpc52xx_uart_of_match) { 1404 match = of_match_node(mpc52xx_uart_of_match, np); 1405 psc_ops = match->data; 1406 mpc52xx_uart_of_assign(np); 1407 } 1408 1409 enum_done = 1; 1410 1411 for (i = 0; i < MPC52xx_PSC_MAXNUM; i++) { 1412 if (mpc52xx_uart_nodes[i]) 1413 pr_debug("%s assigned to ttyPSC%x\n", 1414 mpc52xx_uart_nodes[i]->full_name, i); 1415 } 1416} 1417 1418MODULE_DEVICE_TABLE(of, mpc52xx_uart_of_match); 1419 1420static struct of_platform_driver mpc52xx_uart_of_driver = { 1421 .probe = mpc52xx_uart_of_probe, 1422 .remove = mpc52xx_uart_of_remove, 1423#ifdef CONFIG_PM 1424 .suspend = mpc52xx_uart_of_suspend, 1425 .resume = mpc52xx_uart_of_resume, 1426#endif 1427 .driver = { 1428 .name = "mpc52xx-psc-uart", 1429 .owner = THIS_MODULE, 1430 .of_match_table = mpc52xx_uart_of_match, 1431 }, 1432}; 1433 1434 1435/* ======================================================================== */ 1436/* Module */ 1437/* ======================================================================== */ 1438 1439static int __init 1440mpc52xx_uart_init(void) 1441{ 1442 int ret; 1443 1444 printk(KERN_INFO "Serial: MPC52xx PSC UART driver\n"); 1445 1446 ret = uart_register_driver(&mpc52xx_uart_driver); 1447 if (ret) { 1448 printk(KERN_ERR "%s: uart_register_driver failed (%i)\n", 1449 __FILE__, ret); 1450 return ret; 1451 } 1452 1453 mpc52xx_uart_of_enumerate(); 1454 1455 /* 1456 * Map the PSC FIFO Controller and init if on MPC512x. 1457 */ 1458 if (psc_ops && psc_ops->fifoc_init) { 1459 ret = psc_ops->fifoc_init(); 1460 if (ret) 1461 return ret; 1462 } 1463 1464 ret = of_register_platform_driver(&mpc52xx_uart_of_driver); 1465 if (ret) { 1466 printk(KERN_ERR "%s: of_register_platform_driver failed (%i)\n", 1467 __FILE__, ret); 1468 uart_unregister_driver(&mpc52xx_uart_driver); 1469 return ret; 1470 } 1471 1472 return 0; 1473} 1474 1475static void __exit 1476mpc52xx_uart_exit(void) 1477{ 1478 if (psc_ops->fifoc_uninit) 1479 psc_ops->fifoc_uninit(); 1480 1481 of_unregister_platform_driver(&mpc52xx_uart_of_driver); 1482 uart_unregister_driver(&mpc52xx_uart_driver); 1483} 1484 1485 1486module_init(mpc52xx_uart_init); 1487module_exit(mpc52xx_uart_exit); 1488 1489MODULE_AUTHOR("Sylvain Munaut <tnt@246tNt.com>"); 1490MODULE_DESCRIPTION("Freescale MPC52xx PSC UART"); 1491MODULE_LICENSE("GPL"); 1492