1/****************************************************************************** 2** Device driver for the PCI-SCSI NCR538XX controller family. 3** 4** Copyright (C) 1994 Wolfgang Stanglmeier 5** 6** This program is free software; you can redistribute it and/or modify 7** it under the terms of the GNU General Public License as published by 8** the Free Software Foundation; either version 2 of the License, or 9** (at your option) any later version. 10** 11** This program is distributed in the hope that it will be useful, 12** but WITHOUT ANY WARRANTY; without even the implied warranty of 13** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14** GNU General Public License for more details. 15** 16** You should have received a copy of the GNU General Public License 17** along with this program; if not, write to the Free Software 18** Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 19** 20**----------------------------------------------------------------------------- 21** 22** This driver has been ported to Linux from the FreeBSD NCR53C8XX driver 23** and is currently maintained by 24** 25** Gerard Roudier <groudier@free.fr> 26** 27** Being given that this driver originates from the FreeBSD version, and 28** in order to keep synergy on both, any suggested enhancements and corrections 29** received on Linux are automatically a potential candidate for the FreeBSD 30** version. 31** 32** The original driver has been written for 386bsd and FreeBSD by 33** Wolfgang Stanglmeier <wolf@cologne.de> 34** Stefan Esser <se@mi.Uni-Koeln.de> 35** 36** And has been ported to NetBSD by 37** Charles M. Hannum <mycroft@gnu.ai.mit.edu> 38** 39**----------------------------------------------------------------------------- 40** 41** Brief history 42** 43** December 10 1995 by Gerard Roudier: 44** Initial port to Linux. 45** 46** June 23 1996 by Gerard Roudier: 47** Support for 64 bits architectures (Alpha). 48** 49** November 30 1996 by Gerard Roudier: 50** Support for Fast-20 scsi. 51** Support for large DMA fifo and 128 dwords bursting. 52** 53** February 27 1997 by Gerard Roudier: 54** Support for Fast-40 scsi. 55** Support for on-Board RAM. 56** 57** May 3 1997 by Gerard Roudier: 58** Full support for scsi scripts instructions pre-fetching. 59** 60** May 19 1997 by Richard Waltham <dormouse@farsrobt.demon.co.uk>: 61** Support for NvRAM detection and reading. 62** 63** August 18 1997 by Cort <cort@cs.nmt.edu>: 64** Support for Power/PC (Big Endian). 65** 66** June 20 1998 by Gerard Roudier 67** Support for up to 64 tags per lun. 68** O(1) everywhere (C and SCRIPTS) for normal cases. 69** Low PCI traffic for command handling when on-chip RAM is present. 70** Aggressive SCSI SCRIPTS optimizations. 71** 72** 2005 by Matthew Wilcox and James Bottomley 73** PCI-ectomy. This driver now supports only the 720 chip (see the 74** NCR_Q720 and zalon drivers for the bus probe logic). 75** 76******************************************************************************* 77*/ 78 79/* 80** Supported SCSI-II features: 81** Synchronous negotiation 82** Wide negotiation (depends on the NCR Chip) 83** Enable disconnection 84** Tagged command queuing 85** Parity checking 86** Etc... 87** 88** Supported NCR/SYMBIOS chips: 89** 53C720 (Wide, Fast SCSI-2, intfly problems) 90*/ 91 92/* Name and version of the driver */ 93#define SCSI_NCR_DRIVER_NAME "ncr53c8xx-3.4.3g" 94 95#define SCSI_NCR_DEBUG_FLAGS (0) 96 97#include <linux/blkdev.h> 98#include <linux/delay.h> 99#include <linux/dma-mapping.h> 100#include <linux/errno.h> 101#include <linux/gfp.h> 102#include <linux/init.h> 103#include <linux/interrupt.h> 104#include <linux/ioport.h> 105#include <linux/mm.h> 106#include <linux/module.h> 107#include <linux/sched.h> 108#include <linux/signal.h> 109#include <linux/spinlock.h> 110#include <linux/stat.h> 111#include <linux/string.h> 112#include <linux/time.h> 113#include <linux/timer.h> 114#include <linux/types.h> 115 116#include <asm/dma.h> 117#include <asm/io.h> 118#include <asm/system.h> 119 120#include <scsi/scsi.h> 121#include <scsi/scsi_cmnd.h> 122#include <scsi/scsi_dbg.h> 123#include <scsi/scsi_device.h> 124#include <scsi/scsi_tcq.h> 125#include <scsi/scsi_transport.h> 126#include <scsi/scsi_transport_spi.h> 127 128#include "ncr53c8xx.h" 129 130#define NAME53C8XX "ncr53c8xx" 131 132/*========================================================== 133** 134** Debugging tags 135** 136**========================================================== 137*/ 138 139#define DEBUG_ALLOC (0x0001) 140#define DEBUG_PHASE (0x0002) 141#define DEBUG_QUEUE (0x0008) 142#define DEBUG_RESULT (0x0010) 143#define DEBUG_POINTER (0x0020) 144#define DEBUG_SCRIPT (0x0040) 145#define DEBUG_TINY (0x0080) 146#define DEBUG_TIMING (0x0100) 147#define DEBUG_NEGO (0x0200) 148#define DEBUG_TAGS (0x0400) 149#define DEBUG_SCATTER (0x0800) 150#define DEBUG_IC (0x1000) 151 152/* 153** Enable/Disable debug messages. 154** Can be changed at runtime too. 155*/ 156 157#ifdef SCSI_NCR_DEBUG_INFO_SUPPORT 158static int ncr_debug = SCSI_NCR_DEBUG_FLAGS; 159 #define DEBUG_FLAGS ncr_debug 160#else 161 #define DEBUG_FLAGS SCSI_NCR_DEBUG_FLAGS 162#endif 163 164static inline struct list_head *ncr_list_pop(struct list_head *head) 165{ 166 if (!list_empty(head)) { 167 struct list_head *elem = head->next; 168 169 list_del(elem); 170 return elem; 171 } 172 173 return NULL; 174} 175 176/*========================================================== 177** 178** Simple power of two buddy-like allocator. 179** 180** This simple code is not intended to be fast, but to 181** provide power of 2 aligned memory allocations. 182** Since the SCRIPTS processor only supplies 8 bit 183** arithmetic, this allocator allows simple and fast 184** address calculations from the SCRIPTS code. 185** In addition, cache line alignment is guaranteed for 186** power of 2 cache line size. 187** Enhanced in linux-2.3.44 to provide a memory pool 188** per pcidev to support dynamic dma mapping. (I would 189** have preferred a real bus abstraction, btw). 190** 191**========================================================== 192*/ 193 194#define MEMO_SHIFT 4 /* 16 bytes minimum memory chunk */ 195#if PAGE_SIZE >= 8192 196#define MEMO_PAGE_ORDER 0 /* 1 PAGE maximum */ 197#else 198#define MEMO_PAGE_ORDER 1 /* 2 PAGES maximum */ 199#endif 200#define MEMO_FREE_UNUSED /* Free unused pages immediately */ 201#define MEMO_WARN 1 202#define MEMO_GFP_FLAGS GFP_ATOMIC 203#define MEMO_CLUSTER_SHIFT (PAGE_SHIFT+MEMO_PAGE_ORDER) 204#define MEMO_CLUSTER_SIZE (1UL << MEMO_CLUSTER_SHIFT) 205#define MEMO_CLUSTER_MASK (MEMO_CLUSTER_SIZE-1) 206 207typedef u_long m_addr_t; /* Enough bits to bit-hack addresses */ 208typedef struct device *m_bush_t; /* Something that addresses DMAable */ 209 210typedef struct m_link { /* Link between free memory chunks */ 211 struct m_link *next; 212} m_link_s; 213 214typedef struct m_vtob { /* Virtual to Bus address translation */ 215 struct m_vtob *next; 216 m_addr_t vaddr; 217 m_addr_t baddr; 218} m_vtob_s; 219#define VTOB_HASH_SHIFT 5 220#define VTOB_HASH_SIZE (1UL << VTOB_HASH_SHIFT) 221#define VTOB_HASH_MASK (VTOB_HASH_SIZE-1) 222#define VTOB_HASH_CODE(m) \ 223 ((((m_addr_t) (m)) >> MEMO_CLUSTER_SHIFT) & VTOB_HASH_MASK) 224 225typedef struct m_pool { /* Memory pool of a given kind */ 226 m_bush_t bush; 227 m_addr_t (*getp)(struct m_pool *); 228 void (*freep)(struct m_pool *, m_addr_t); 229 int nump; 230 m_vtob_s *(vtob[VTOB_HASH_SIZE]); 231 struct m_pool *next; 232 struct m_link h[PAGE_SHIFT-MEMO_SHIFT+MEMO_PAGE_ORDER+1]; 233} m_pool_s; 234 235static void *___m_alloc(m_pool_s *mp, int size) 236{ 237 int i = 0; 238 int s = (1 << MEMO_SHIFT); 239 int j; 240 m_addr_t a; 241 m_link_s *h = mp->h; 242 243 if (size > (PAGE_SIZE << MEMO_PAGE_ORDER)) 244 return NULL; 245 246 while (size > s) { 247 s <<= 1; 248 ++i; 249 } 250 251 j = i; 252 while (!h[j].next) { 253 if (s == (PAGE_SIZE << MEMO_PAGE_ORDER)) { 254 h[j].next = (m_link_s *)mp->getp(mp); 255 if (h[j].next) 256 h[j].next->next = NULL; 257 break; 258 } 259 ++j; 260 s <<= 1; 261 } 262 a = (m_addr_t) h[j].next; 263 if (a) { 264 h[j].next = h[j].next->next; 265 while (j > i) { 266 j -= 1; 267 s >>= 1; 268 h[j].next = (m_link_s *) (a+s); 269 h[j].next->next = NULL; 270 } 271 } 272#ifdef DEBUG 273 printk("___m_alloc(%d) = %p\n", size, (void *) a); 274#endif 275 return (void *) a; 276} 277 278static void ___m_free(m_pool_s *mp, void *ptr, int size) 279{ 280 int i = 0; 281 int s = (1 << MEMO_SHIFT); 282 m_link_s *q; 283 m_addr_t a, b; 284 m_link_s *h = mp->h; 285 286#ifdef DEBUG 287 printk("___m_free(%p, %d)\n", ptr, size); 288#endif 289 290 if (size > (PAGE_SIZE << MEMO_PAGE_ORDER)) 291 return; 292 293 while (size > s) { 294 s <<= 1; 295 ++i; 296 } 297 298 a = (m_addr_t) ptr; 299 300 while (1) { 301#ifdef MEMO_FREE_UNUSED 302 if (s == (PAGE_SIZE << MEMO_PAGE_ORDER)) { 303 mp->freep(mp, a); 304 break; 305 } 306#endif 307 b = a ^ s; 308 q = &h[i]; 309 while (q->next && q->next != (m_link_s *) b) { 310 q = q->next; 311 } 312 if (!q->next) { 313 ((m_link_s *) a)->next = h[i].next; 314 h[i].next = (m_link_s *) a; 315 break; 316 } 317 q->next = q->next->next; 318 a = a & b; 319 s <<= 1; 320 ++i; 321 } 322} 323 324static DEFINE_SPINLOCK(ncr53c8xx_lock); 325 326static void *__m_calloc2(m_pool_s *mp, int size, char *name, int uflags) 327{ 328 void *p; 329 330 p = ___m_alloc(mp, size); 331 332 if (DEBUG_FLAGS & DEBUG_ALLOC) 333 printk ("new %-10s[%4d] @%p.\n", name, size, p); 334 335 if (p) 336 memset(p, 0, size); 337 else if (uflags & MEMO_WARN) 338 printk (NAME53C8XX ": failed to allocate %s[%d]\n", name, size); 339 340 return p; 341} 342 343#define __m_calloc(mp, s, n) __m_calloc2(mp, s, n, MEMO_WARN) 344 345static void __m_free(m_pool_s *mp, void *ptr, int size, char *name) 346{ 347 if (DEBUG_FLAGS & DEBUG_ALLOC) 348 printk ("freeing %-10s[%4d] @%p.\n", name, size, ptr); 349 350 ___m_free(mp, ptr, size); 351 352} 353 354/* 355 * With pci bus iommu support, we use a default pool of unmapped memory 356 * for memory we donnot need to DMA from/to and one pool per pcidev for 357 * memory accessed by the PCI chip. `mp0' is the default not DMAable pool. 358 */ 359 360static m_addr_t ___mp0_getp(m_pool_s *mp) 361{ 362 m_addr_t m = __get_free_pages(MEMO_GFP_FLAGS, MEMO_PAGE_ORDER); 363 if (m) 364 ++mp->nump; 365 return m; 366} 367 368static void ___mp0_freep(m_pool_s *mp, m_addr_t m) 369{ 370 free_pages(m, MEMO_PAGE_ORDER); 371 --mp->nump; 372} 373 374static m_pool_s mp0 = {NULL, ___mp0_getp, ___mp0_freep}; 375 376/* 377 * DMAable pools. 378 */ 379 380/* 381 * With pci bus iommu support, we maintain one pool per pcidev and a 382 * hashed reverse table for virtual to bus physical address translations. 383 */ 384static m_addr_t ___dma_getp(m_pool_s *mp) 385{ 386 m_addr_t vp; 387 m_vtob_s *vbp; 388 389 vbp = __m_calloc(&mp0, sizeof(*vbp), "VTOB"); 390 if (vbp) { 391 dma_addr_t daddr; 392 vp = (m_addr_t) dma_alloc_coherent(mp->bush, 393 PAGE_SIZE<<MEMO_PAGE_ORDER, 394 &daddr, GFP_ATOMIC); 395 if (vp) { 396 int hc = VTOB_HASH_CODE(vp); 397 vbp->vaddr = vp; 398 vbp->baddr = daddr; 399 vbp->next = mp->vtob[hc]; 400 mp->vtob[hc] = vbp; 401 ++mp->nump; 402 return vp; 403 } 404 } 405 if (vbp) 406 __m_free(&mp0, vbp, sizeof(*vbp), "VTOB"); 407 return 0; 408} 409 410static void ___dma_freep(m_pool_s *mp, m_addr_t m) 411{ 412 m_vtob_s **vbpp, *vbp; 413 int hc = VTOB_HASH_CODE(m); 414 415 vbpp = &mp->vtob[hc]; 416 while (*vbpp && (*vbpp)->vaddr != m) 417 vbpp = &(*vbpp)->next; 418 if (*vbpp) { 419 vbp = *vbpp; 420 *vbpp = (*vbpp)->next; 421 dma_free_coherent(mp->bush, PAGE_SIZE<<MEMO_PAGE_ORDER, 422 (void *)vbp->vaddr, (dma_addr_t)vbp->baddr); 423 __m_free(&mp0, vbp, sizeof(*vbp), "VTOB"); 424 --mp->nump; 425 } 426} 427 428static inline m_pool_s *___get_dma_pool(m_bush_t bush) 429{ 430 m_pool_s *mp; 431 for (mp = mp0.next; mp && mp->bush != bush; mp = mp->next); 432 return mp; 433} 434 435static m_pool_s *___cre_dma_pool(m_bush_t bush) 436{ 437 m_pool_s *mp; 438 mp = __m_calloc(&mp0, sizeof(*mp), "MPOOL"); 439 if (mp) { 440 memset(mp, 0, sizeof(*mp)); 441 mp->bush = bush; 442 mp->getp = ___dma_getp; 443 mp->freep = ___dma_freep; 444 mp->next = mp0.next; 445 mp0.next = mp; 446 } 447 return mp; 448} 449 450static void ___del_dma_pool(m_pool_s *p) 451{ 452 struct m_pool **pp = &mp0.next; 453 454 while (*pp && *pp != p) 455 pp = &(*pp)->next; 456 if (*pp) { 457 *pp = (*pp)->next; 458 __m_free(&mp0, p, sizeof(*p), "MPOOL"); 459 } 460} 461 462static void *__m_calloc_dma(m_bush_t bush, int size, char *name) 463{ 464 u_long flags; 465 struct m_pool *mp; 466 void *m = NULL; 467 468 spin_lock_irqsave(&ncr53c8xx_lock, flags); 469 mp = ___get_dma_pool(bush); 470 if (!mp) 471 mp = ___cre_dma_pool(bush); 472 if (mp) 473 m = __m_calloc(mp, size, name); 474 if (mp && !mp->nump) 475 ___del_dma_pool(mp); 476 spin_unlock_irqrestore(&ncr53c8xx_lock, flags); 477 478 return m; 479} 480 481static void __m_free_dma(m_bush_t bush, void *m, int size, char *name) 482{ 483 u_long flags; 484 struct m_pool *mp; 485 486 spin_lock_irqsave(&ncr53c8xx_lock, flags); 487 mp = ___get_dma_pool(bush); 488 if (mp) 489 __m_free(mp, m, size, name); 490 if (mp && !mp->nump) 491 ___del_dma_pool(mp); 492 spin_unlock_irqrestore(&ncr53c8xx_lock, flags); 493} 494 495static m_addr_t __vtobus(m_bush_t bush, void *m) 496{ 497 u_long flags; 498 m_pool_s *mp; 499 int hc = VTOB_HASH_CODE(m); 500 m_vtob_s *vp = NULL; 501 m_addr_t a = ((m_addr_t) m) & ~MEMO_CLUSTER_MASK; 502 503 spin_lock_irqsave(&ncr53c8xx_lock, flags); 504 mp = ___get_dma_pool(bush); 505 if (mp) { 506 vp = mp->vtob[hc]; 507 while (vp && (m_addr_t) vp->vaddr != a) 508 vp = vp->next; 509 } 510 spin_unlock_irqrestore(&ncr53c8xx_lock, flags); 511 return vp ? vp->baddr + (((m_addr_t) m) - a) : 0; 512} 513 514#define _m_calloc_dma(np, s, n) __m_calloc_dma(np->dev, s, n) 515#define _m_free_dma(np, p, s, n) __m_free_dma(np->dev, p, s, n) 516#define m_calloc_dma(s, n) _m_calloc_dma(np, s, n) 517#define m_free_dma(p, s, n) _m_free_dma(np, p, s, n) 518#define _vtobus(np, p) __vtobus(np->dev, p) 519#define vtobus(p) _vtobus(np, p) 520 521/* 522 * Deal with DMA mapping/unmapping. 523 */ 524 525/* To keep track of the dma mapping (sg/single) that has been set */ 526#define __data_mapped SCp.phase 527#define __data_mapping SCp.have_data_in 528 529static void __unmap_scsi_data(struct device *dev, struct scsi_cmnd *cmd) 530{ 531 switch(cmd->__data_mapped) { 532 case 2: 533 scsi_dma_unmap(cmd); 534 break; 535 } 536 cmd->__data_mapped = 0; 537} 538 539static int __map_scsi_sg_data(struct device *dev, struct scsi_cmnd *cmd) 540{ 541 int use_sg; 542 543 use_sg = scsi_dma_map(cmd); 544 if (!use_sg) 545 return 0; 546 547 cmd->__data_mapped = 2; 548 cmd->__data_mapping = use_sg; 549 550 return use_sg; 551} 552 553#define unmap_scsi_data(np, cmd) __unmap_scsi_data(np->dev, cmd) 554#define map_scsi_sg_data(np, cmd) __map_scsi_sg_data(np->dev, cmd) 555 556/*========================================================== 557** 558** Driver setup. 559** 560** This structure is initialized from linux config 561** options. It can be overridden at boot-up by the boot 562** command line. 563** 564**========================================================== 565*/ 566static struct ncr_driver_setup 567 driver_setup = SCSI_NCR_DRIVER_SETUP; 568 569#ifndef MODULE 570#ifdef SCSI_NCR_BOOT_COMMAND_LINE_SUPPORT 571static struct ncr_driver_setup 572 driver_safe_setup __initdata = SCSI_NCR_DRIVER_SAFE_SETUP; 573#endif 574#endif /* !MODULE */ 575 576#define initverbose (driver_setup.verbose) 577#define bootverbose (np->verbose) 578 579 580/*=================================================================== 581** 582** Driver setup from the boot command line 583** 584**=================================================================== 585*/ 586 587#ifdef MODULE 588#define ARG_SEP ' ' 589#else 590#define ARG_SEP ',' 591#endif 592 593#define OPT_TAGS 1 594#define OPT_MASTER_PARITY 2 595#define OPT_SCSI_PARITY 3 596#define OPT_DISCONNECTION 4 597#define OPT_SPECIAL_FEATURES 5 598#define OPT_UNUSED_1 6 599#define OPT_FORCE_SYNC_NEGO 7 600#define OPT_REVERSE_PROBE 8 601#define OPT_DEFAULT_SYNC 9 602#define OPT_VERBOSE 10 603#define OPT_DEBUG 11 604#define OPT_BURST_MAX 12 605#define OPT_LED_PIN 13 606#define OPT_MAX_WIDE 14 607#define OPT_SETTLE_DELAY 15 608#define OPT_DIFF_SUPPORT 16 609#define OPT_IRQM 17 610#define OPT_PCI_FIX_UP 18 611#define OPT_BUS_CHECK 19 612#define OPT_OPTIMIZE 20 613#define OPT_RECOVERY 21 614#define OPT_SAFE_SETUP 22 615#define OPT_USE_NVRAM 23 616#define OPT_EXCLUDE 24 617#define OPT_HOST_ID 25 618 619#ifdef SCSI_NCR_IARB_SUPPORT 620#define OPT_IARB 26 621#endif 622 623#ifdef MODULE 624#define ARG_SEP ' ' 625#else 626#define ARG_SEP ',' 627#endif 628 629#ifndef MODULE 630static char setup_token[] __initdata = 631 "tags:" "mpar:" 632 "spar:" "disc:" 633 "specf:" "ultra:" 634 "fsn:" "revprob:" 635 "sync:" "verb:" 636 "debug:" "burst:" 637 "led:" "wide:" 638 "settle:" "diff:" 639 "irqm:" "pcifix:" 640 "buschk:" "optim:" 641 "recovery:" 642 "safe:" "nvram:" 643 "excl:" "hostid:" 644#ifdef SCSI_NCR_IARB_SUPPORT 645 "iarb:" 646#endif 647 ; /* DONNOT REMOVE THIS ';' */ 648 649static int __init get_setup_token(char *p) 650{ 651 char *cur = setup_token; 652 char *pc; 653 int i = 0; 654 655 while (cur != NULL && (pc = strchr(cur, ':')) != NULL) { 656 ++pc; 657 ++i; 658 if (!strncmp(p, cur, pc - cur)) 659 return i; 660 cur = pc; 661 } 662 return 0; 663} 664 665static int __init sym53c8xx__setup(char *str) 666{ 667#ifdef SCSI_NCR_BOOT_COMMAND_LINE_SUPPORT 668 char *cur = str; 669 char *pc, *pv; 670 int i, val, c; 671 int xi = 0; 672 673 while (cur != NULL && (pc = strchr(cur, ':')) != NULL) { 674 char *pe; 675 676 val = 0; 677 pv = pc; 678 c = *++pv; 679 680 if (c == 'n') 681 val = 0; 682 else if (c == 'y') 683 val = 1; 684 else 685 val = (int) simple_strtoul(pv, &pe, 0); 686 687 switch (get_setup_token(cur)) { 688 case OPT_TAGS: 689 driver_setup.default_tags = val; 690 if (pe && *pe == '/') { 691 i = 0; 692 while (*pe && *pe != ARG_SEP && 693 i < sizeof(driver_setup.tag_ctrl)-1) { 694 driver_setup.tag_ctrl[i++] = *pe++; 695 } 696 driver_setup.tag_ctrl[i] = '\0'; 697 } 698 break; 699 case OPT_MASTER_PARITY: 700 driver_setup.master_parity = val; 701 break; 702 case OPT_SCSI_PARITY: 703 driver_setup.scsi_parity = val; 704 break; 705 case OPT_DISCONNECTION: 706 driver_setup.disconnection = val; 707 break; 708 case OPT_SPECIAL_FEATURES: 709 driver_setup.special_features = val; 710 break; 711 case OPT_FORCE_SYNC_NEGO: 712 driver_setup.force_sync_nego = val; 713 break; 714 case OPT_REVERSE_PROBE: 715 driver_setup.reverse_probe = val; 716 break; 717 case OPT_DEFAULT_SYNC: 718 driver_setup.default_sync = val; 719 break; 720 case OPT_VERBOSE: 721 driver_setup.verbose = val; 722 break; 723 case OPT_DEBUG: 724 driver_setup.debug = val; 725 break; 726 case OPT_BURST_MAX: 727 driver_setup.burst_max = val; 728 break; 729 case OPT_LED_PIN: 730 driver_setup.led_pin = val; 731 break; 732 case OPT_MAX_WIDE: 733 driver_setup.max_wide = val? 1:0; 734 break; 735 case OPT_SETTLE_DELAY: 736 driver_setup.settle_delay = val; 737 break; 738 case OPT_DIFF_SUPPORT: 739 driver_setup.diff_support = val; 740 break; 741 case OPT_IRQM: 742 driver_setup.irqm = val; 743 break; 744 case OPT_PCI_FIX_UP: 745 driver_setup.pci_fix_up = val; 746 break; 747 case OPT_BUS_CHECK: 748 driver_setup.bus_check = val; 749 break; 750 case OPT_OPTIMIZE: 751 driver_setup.optimize = val; 752 break; 753 case OPT_RECOVERY: 754 driver_setup.recovery = val; 755 break; 756 case OPT_USE_NVRAM: 757 driver_setup.use_nvram = val; 758 break; 759 case OPT_SAFE_SETUP: 760 memcpy(&driver_setup, &driver_safe_setup, 761 sizeof(driver_setup)); 762 break; 763 case OPT_EXCLUDE: 764 if (xi < SCSI_NCR_MAX_EXCLUDES) 765 driver_setup.excludes[xi++] = val; 766 break; 767 case OPT_HOST_ID: 768 driver_setup.host_id = val; 769 break; 770#ifdef SCSI_NCR_IARB_SUPPORT 771 case OPT_IARB: 772 driver_setup.iarb = val; 773 break; 774#endif 775 default: 776 printk("sym53c8xx_setup: unexpected boot option '%.*s' ignored\n", (int)(pc-cur+1), cur); 777 break; 778 } 779 780 if ((cur = strchr(cur, ARG_SEP)) != NULL) 781 ++cur; 782 } 783#endif /* SCSI_NCR_BOOT_COMMAND_LINE_SUPPORT */ 784 return 1; 785} 786#endif /* !MODULE */ 787 788/*=================================================================== 789** 790** Get device queue depth from boot command line. 791** 792**=================================================================== 793*/ 794#define DEF_DEPTH (driver_setup.default_tags) 795#define ALL_TARGETS -2 796#define NO_TARGET -1 797#define ALL_LUNS -2 798#define NO_LUN -1 799 800static int device_queue_depth(int unit, int target, int lun) 801{ 802 int c, h, t, u, v; 803 char *p = driver_setup.tag_ctrl; 804 char *ep; 805 806 h = -1; 807 t = NO_TARGET; 808 u = NO_LUN; 809 while ((c = *p++) != 0) { 810 v = simple_strtoul(p, &ep, 0); 811 switch(c) { 812 case '/': 813 ++h; 814 t = ALL_TARGETS; 815 u = ALL_LUNS; 816 break; 817 case 't': 818 if (t != target) 819 t = (target == v) ? v : NO_TARGET; 820 u = ALL_LUNS; 821 break; 822 case 'u': 823 if (u != lun) 824 u = (lun == v) ? v : NO_LUN; 825 break; 826 case 'q': 827 if (h == unit && 828 (t == ALL_TARGETS || t == target) && 829 (u == ALL_LUNS || u == lun)) 830 return v; 831 break; 832 case '-': 833 t = ALL_TARGETS; 834 u = ALL_LUNS; 835 break; 836 default: 837 break; 838 } 839 p = ep; 840 } 841 return DEF_DEPTH; 842} 843 844 845/*========================================================== 846** 847** The CCB done queue uses an array of CCB virtual 848** addresses. Empty entries are flagged using the bogus 849** virtual address 0xffffffff. 850** 851** Since PCI ensures that only aligned DWORDs are accessed 852** atomically, 64 bit little-endian architecture requires 853** to test the high order DWORD of the entry to determine 854** if it is empty or valid. 855** 856** BTW, I will make things differently as soon as I will 857** have a better idea, but this is simple and should work. 858** 859**========================================================== 860*/ 861 862#define SCSI_NCR_CCB_DONE_SUPPORT 863#ifdef SCSI_NCR_CCB_DONE_SUPPORT 864 865#define MAX_DONE 24 866#define CCB_DONE_EMPTY 0xffffffffUL 867 868/* All 32 bit architectures */ 869#if BITS_PER_LONG == 32 870#define CCB_DONE_VALID(cp) (((u_long) cp) != CCB_DONE_EMPTY) 871 872/* All > 32 bit (64 bit) architectures regardless endian-ness */ 873#else 874#define CCB_DONE_VALID(cp) \ 875 ((((u_long) cp) & 0xffffffff00000000ul) && \ 876 (((u_long) cp) & 0xfffffffful) != CCB_DONE_EMPTY) 877#endif 878 879#endif /* SCSI_NCR_CCB_DONE_SUPPORT */ 880 881/*========================================================== 882** 883** Configuration and Debugging 884** 885**========================================================== 886*/ 887 888/* 889** SCSI address of this device. 890** The boot routines should have set it. 891** If not, use this. 892*/ 893 894#ifndef SCSI_NCR_MYADDR 895#define SCSI_NCR_MYADDR (7) 896#endif 897 898/* 899** The maximum number of tags per logic unit. 900** Used only for disk devices that support tags. 901*/ 902 903#ifndef SCSI_NCR_MAX_TAGS 904#define SCSI_NCR_MAX_TAGS (8) 905#endif 906 907/* 908** TAGS are actually limited to 64 tags/lun. 909** We need to deal with power of 2, for alignment constraints. 910*/ 911#if SCSI_NCR_MAX_TAGS > 64 912#define MAX_TAGS (64) 913#else 914#define MAX_TAGS SCSI_NCR_MAX_TAGS 915#endif 916 917#define NO_TAG (255) 918 919/* 920** Choose appropriate type for tag bitmap. 921*/ 922#if MAX_TAGS > 32 923typedef u64 tagmap_t; 924#else 925typedef u32 tagmap_t; 926#endif 927 928/* 929** Number of targets supported by the driver. 930** n permits target numbers 0..n-1. 931** Default is 16, meaning targets #0..#15. 932** #7 .. is myself. 933*/ 934 935#ifdef SCSI_NCR_MAX_TARGET 936#define MAX_TARGET (SCSI_NCR_MAX_TARGET) 937#else 938#define MAX_TARGET (16) 939#endif 940 941/* 942** Number of logic units supported by the driver. 943** n enables logic unit numbers 0..n-1. 944** The common SCSI devices require only 945** one lun, so take 1 as the default. 946*/ 947 948#ifdef SCSI_NCR_MAX_LUN 949#define MAX_LUN SCSI_NCR_MAX_LUN 950#else 951#define MAX_LUN (1) 952#endif 953 954/* 955** Asynchronous pre-scaler (ns). Shall be 40 956*/ 957 958#ifndef SCSI_NCR_MIN_ASYNC 959#define SCSI_NCR_MIN_ASYNC (40) 960#endif 961 962/* 963** The maximum number of jobs scheduled for starting. 964** There should be one slot per target, and one slot 965** for each tag of each target in use. 966** The calculation below is actually quite silly ... 967*/ 968 969#ifdef SCSI_NCR_CAN_QUEUE 970#define MAX_START (SCSI_NCR_CAN_QUEUE + 4) 971#else 972#define MAX_START (MAX_TARGET + 7 * MAX_TAGS) 973#endif 974 975/* 976** We limit the max number of pending IO to 250. 977** since we donnot want to allocate more than 1 978** PAGE for 'scripth'. 979*/ 980#if MAX_START > 250 981#undef MAX_START 982#define MAX_START 250 983#endif 984 985/* 986** The maximum number of segments a transfer is split into. 987** We support up to 127 segments for both read and write. 988** The data scripts are broken into 2 sub-scripts. 989** 80 (MAX_SCATTERL) segments are moved from a sub-script 990** in on-chip RAM. This makes data transfers shorter than 991** 80k (assuming 1k fs) as fast as possible. 992*/ 993 994#define MAX_SCATTER (SCSI_NCR_MAX_SCATTER) 995 996#if (MAX_SCATTER > 80) 997#define MAX_SCATTERL 80 998#define MAX_SCATTERH (MAX_SCATTER - MAX_SCATTERL) 999#else 1000#define MAX_SCATTERL (MAX_SCATTER-1) 1001#define MAX_SCATTERH 1 1002#endif 1003 1004/* 1005** other 1006*/ 1007 1008#define NCR_SNOOP_TIMEOUT (1000000) 1009 1010/* 1011** Other definitions 1012*/ 1013 1014#define ScsiResult(host_code, scsi_code) (((host_code) << 16) + ((scsi_code) & 0x7f)) 1015 1016#define initverbose (driver_setup.verbose) 1017#define bootverbose (np->verbose) 1018 1019/*========================================================== 1020** 1021** Command control block states. 1022** 1023**========================================================== 1024*/ 1025 1026#define HS_IDLE (0) 1027#define HS_BUSY (1) 1028#define HS_NEGOTIATE (2) /* sync/wide data transfer*/ 1029#define HS_DISCONNECT (3) /* Disconnected by target */ 1030 1031#define HS_DONEMASK (0x80) 1032#define HS_COMPLETE (4|HS_DONEMASK) 1033#define HS_SEL_TIMEOUT (5|HS_DONEMASK) /* Selection timeout */ 1034#define HS_RESET (6|HS_DONEMASK) /* SCSI reset */ 1035#define HS_ABORTED (7|HS_DONEMASK) /* Transfer aborted */ 1036#define HS_TIMEOUT (8|HS_DONEMASK) /* Software timeout */ 1037#define HS_FAIL (9|HS_DONEMASK) /* SCSI or PCI bus errors */ 1038#define HS_UNEXPECTED (10|HS_DONEMASK)/* Unexpected disconnect */ 1039 1040/* 1041** Invalid host status values used by the SCRIPTS processor 1042** when the nexus is not fully identified. 1043** Shall never appear in a CCB. 1044*/ 1045 1046#define HS_INVALMASK (0x40) 1047#define HS_SELECTING (0|HS_INVALMASK) 1048#define HS_IN_RESELECT (1|HS_INVALMASK) 1049#define HS_STARTING (2|HS_INVALMASK) 1050 1051/* 1052** Flags set by the SCRIPT processor for commands 1053** that have been skipped. 1054*/ 1055#define HS_SKIPMASK (0x20) 1056 1057/*========================================================== 1058** 1059** Software Interrupt Codes 1060** 1061**========================================================== 1062*/ 1063 1064#define SIR_BAD_STATUS (1) 1065#define SIR_XXXXXXXXXX (2) 1066#define SIR_NEGO_SYNC (3) 1067#define SIR_NEGO_WIDE (4) 1068#define SIR_NEGO_FAILED (5) 1069#define SIR_NEGO_PROTO (6) 1070#define SIR_REJECT_RECEIVED (7) 1071#define SIR_REJECT_SENT (8) 1072#define SIR_IGN_RESIDUE (9) 1073#define SIR_MISSING_SAVE (10) 1074#define SIR_RESEL_NO_MSG_IN (11) 1075#define SIR_RESEL_NO_IDENTIFY (12) 1076#define SIR_RESEL_BAD_LUN (13) 1077#define SIR_RESEL_BAD_TARGET (14) 1078#define SIR_RESEL_BAD_I_T_L (15) 1079#define SIR_RESEL_BAD_I_T_L_Q (16) 1080#define SIR_DONE_OVERFLOW (17) 1081#define SIR_INTFLY (18) 1082#define SIR_MAX (18) 1083 1084/*========================================================== 1085** 1086** Extended error codes. 1087** xerr_status field of struct ccb. 1088** 1089**========================================================== 1090*/ 1091 1092#define XE_OK (0) 1093#define XE_EXTRA_DATA (1) /* unexpected data phase */ 1094#define XE_BAD_PHASE (2) /* illegal phase (4/5) */ 1095 1096/*========================================================== 1097** 1098** Negotiation status. 1099** nego_status field of struct ccb. 1100** 1101**========================================================== 1102*/ 1103 1104#define NS_NOCHANGE (0) 1105#define NS_SYNC (1) 1106#define NS_WIDE (2) 1107#define NS_PPR (4) 1108 1109/*========================================================== 1110** 1111** Misc. 1112** 1113**========================================================== 1114*/ 1115 1116#define CCB_MAGIC (0xf2691ad2) 1117 1118/*========================================================== 1119** 1120** Declaration of structs. 1121** 1122**========================================================== 1123*/ 1124 1125static struct scsi_transport_template *ncr53c8xx_transport_template = NULL; 1126 1127struct tcb; 1128struct lcb; 1129struct ccb; 1130struct ncb; 1131struct script; 1132 1133struct link { 1134 ncrcmd l_cmd; 1135 ncrcmd l_paddr; 1136}; 1137 1138struct usrcmd { 1139 u_long target; 1140 u_long lun; 1141 u_long data; 1142 u_long cmd; 1143}; 1144 1145#define UC_SETSYNC 10 1146#define UC_SETTAGS 11 1147#define UC_SETDEBUG 12 1148#define UC_SETORDER 13 1149#define UC_SETWIDE 14 1150#define UC_SETFLAG 15 1151#define UC_SETVERBOSE 17 1152 1153#define UF_TRACE (0x01) 1154#define UF_NODISC (0x02) 1155#define UF_NOSCAN (0x04) 1156 1157/*======================================================================== 1158** 1159** Declaration of structs: target control block 1160** 1161**======================================================================== 1162*/ 1163struct tcb { 1164 /*---------------------------------------------------------------- 1165 ** During reselection the ncr jumps to this point with SFBR 1166 ** set to the encoded target number with bit 7 set. 1167 ** if it's not this target, jump to the next. 1168 ** 1169 ** JUMP IF (SFBR != #target#), @(next tcb) 1170 **---------------------------------------------------------------- 1171 */ 1172 struct link jump_tcb; 1173 1174 /*---------------------------------------------------------------- 1175 ** Load the actual values for the sxfer and the scntl3 1176 ** register (sync/wide mode). 1177 ** 1178 ** SCR_COPY (1), @(sval field of this tcb), @(sxfer register) 1179 ** SCR_COPY (1), @(wval field of this tcb), @(scntl3 register) 1180 **---------------------------------------------------------------- 1181 */ 1182 ncrcmd getscr[6]; 1183 1184 /*---------------------------------------------------------------- 1185 ** Get the IDENTIFY message and load the LUN to SFBR. 1186 ** 1187 ** CALL, <RESEL_LUN> 1188 **---------------------------------------------------------------- 1189 */ 1190 struct link call_lun; 1191 1192 /*---------------------------------------------------------------- 1193 ** Now look for the right lun. 1194 ** 1195 ** For i = 0 to 3 1196 ** SCR_JUMP ^ IFTRUE(MASK(i, 3)), @(first lcb mod. i) 1197 ** 1198 ** Recent chips will prefetch the 4 JUMPS using only 1 burst. 1199 ** It is kind of hashcoding. 1200 **---------------------------------------------------------------- 1201 */ 1202 struct link jump_lcb[4]; /* JUMPs for reselection */ 1203 struct lcb * lp[MAX_LUN]; /* The lcb's of this tcb */ 1204 1205 /*---------------------------------------------------------------- 1206 ** Pointer to the ccb used for negotiation. 1207 ** Prevent from starting a negotiation for all queued commands 1208 ** when tagged command queuing is enabled. 1209 **---------------------------------------------------------------- 1210 */ 1211 struct ccb * nego_cp; 1212 1213 /*---------------------------------------------------------------- 1214 ** statistical data 1215 **---------------------------------------------------------------- 1216 */ 1217 u_long transfers; 1218 u_long bytes; 1219 1220 /*---------------------------------------------------------------- 1221 ** negotiation of wide and synch transfer and device quirks. 1222 **---------------------------------------------------------------- 1223 */ 1224#ifdef SCSI_NCR_BIG_ENDIAN 1225/*0*/ u16 period; 1226/*2*/ u_char sval; 1227/*3*/ u_char minsync; 1228/*0*/ u_char wval; 1229/*1*/ u_char widedone; 1230/*2*/ u_char quirks; 1231/*3*/ u_char maxoffs; 1232#else 1233/*0*/ u_char minsync; 1234/*1*/ u_char sval; 1235/*2*/ u16 period; 1236/*0*/ u_char maxoffs; 1237/*1*/ u_char quirks; 1238/*2*/ u_char widedone; 1239/*3*/ u_char wval; 1240#endif 1241 1242 /* User settable limits and options. */ 1243 u_char usrsync; 1244 u_char usrwide; 1245 u_char usrtags; 1246 u_char usrflag; 1247 struct scsi_target *starget; 1248}; 1249 1250/*======================================================================== 1251** 1252** Declaration of structs: lun control block 1253** 1254**======================================================================== 1255*/ 1256struct lcb { 1257 /*---------------------------------------------------------------- 1258 ** During reselection the ncr jumps to this point 1259 ** with SFBR set to the "Identify" message. 1260 ** if it's not this lun, jump to the next. 1261 ** 1262 ** JUMP IF (SFBR != #lun#), @(next lcb of this target) 1263 ** 1264 ** It is this lun. Load TEMP with the nexus jumps table 1265 ** address and jump to RESEL_TAG (or RESEL_NOTAG). 1266 ** 1267 ** SCR_COPY (4), p_jump_ccb, TEMP, 1268 ** SCR_JUMP, <RESEL_TAG> 1269 **---------------------------------------------------------------- 1270 */ 1271 struct link jump_lcb; 1272 ncrcmd load_jump_ccb[3]; 1273 struct link jump_tag; 1274 ncrcmd p_jump_ccb; /* Jump table bus address */ 1275 1276 /*---------------------------------------------------------------- 1277 ** Jump table used by the script processor to directly jump 1278 ** to the CCB corresponding to the reselected nexus. 1279 ** Address is allocated on 256 bytes boundary in order to 1280 ** allow 8 bit calculation of the tag jump entry for up to 1281 ** 64 possible tags. 1282 **---------------------------------------------------------------- 1283 */ 1284 u32 jump_ccb_0; /* Default table if no tags */ 1285 u32 *jump_ccb; /* Virtual address */ 1286 1287 /*---------------------------------------------------------------- 1288 ** CCB queue management. 1289 **---------------------------------------------------------------- 1290 */ 1291 struct list_head free_ccbq; /* Queue of available CCBs */ 1292 struct list_head busy_ccbq; /* Queue of busy CCBs */ 1293 struct list_head wait_ccbq; /* Queue of waiting for IO CCBs */ 1294 struct list_head skip_ccbq; /* Queue of skipped CCBs */ 1295 u_char actccbs; /* Number of allocated CCBs */ 1296 u_char busyccbs; /* CCBs busy for this lun */ 1297 u_char queuedccbs; /* CCBs queued to the controller*/ 1298 u_char queuedepth; /* Queue depth for this lun */ 1299 u_char scdev_depth; /* SCSI device queue depth */ 1300 u_char maxnxs; /* Max possible nexuses */ 1301 1302 /*---------------------------------------------------------------- 1303 ** Control of tagged command queuing. 1304 ** Tags allocation is performed using a circular buffer. 1305 ** This avoids using a loop for tag allocation. 1306 **---------------------------------------------------------------- 1307 */ 1308 u_char ia_tag; /* Allocation index */ 1309 u_char if_tag; /* Freeing index */ 1310 u_char cb_tags[MAX_TAGS]; /* Circular tags buffer */ 1311 u_char usetags; /* Command queuing is active */ 1312 u_char maxtags; /* Max nr of tags asked by user */ 1313 u_char numtags; /* Current number of tags */ 1314 1315 /*---------------------------------------------------------------- 1316 ** QUEUE FULL control and ORDERED tag control. 1317 **---------------------------------------------------------------- 1318 */ 1319 /*---------------------------------------------------------------- 1320 ** QUEUE FULL and ORDERED tag control. 1321 **---------------------------------------------------------------- 1322 */ 1323 u16 num_good; /* Nr of GOOD since QUEUE FULL */ 1324 tagmap_t tags_umap; /* Used tags bitmap */ 1325 tagmap_t tags_smap; /* Tags in use at 'tag_stime' */ 1326 u_long tags_stime; /* Last time we set smap=umap */ 1327 struct ccb * held_ccb; /* CCB held for QUEUE FULL */ 1328}; 1329 1330/*======================================================================== 1331** 1332** Declaration of structs: the launch script. 1333** 1334**======================================================================== 1335** 1336** It is part of the CCB and is called by the scripts processor to 1337** start or restart the data structure (nexus). 1338** This 6 DWORDs mini script makes use of prefetching. 1339** 1340**------------------------------------------------------------------------ 1341*/ 1342struct launch { 1343 /*---------------------------------------------------------------- 1344 ** SCR_COPY(4), @(p_phys), @(dsa register) 1345 ** SCR_JUMP, @(scheduler_point) 1346 **---------------------------------------------------------------- 1347 */ 1348 ncrcmd setup_dsa[3]; /* Copy 'phys' address to dsa */ 1349 struct link schedule; /* Jump to scheduler point */ 1350 ncrcmd p_phys; /* 'phys' header bus address */ 1351}; 1352 1353/*======================================================================== 1354** 1355** Declaration of structs: global HEADER. 1356** 1357**======================================================================== 1358** 1359** This substructure is copied from the ccb to a global address after 1360** selection (or reselection) and copied back before disconnect. 1361** 1362** These fields are accessible to the script processor. 1363** 1364**------------------------------------------------------------------------ 1365*/ 1366 1367struct head { 1368 /*---------------------------------------------------------------- 1369 ** Saved data pointer. 1370 ** Points to the position in the script responsible for the 1371 ** actual transfer transfer of data. 1372 ** It's written after reception of a SAVE_DATA_POINTER message. 1373 ** The goalpointer points after the last transfer command. 1374 **---------------------------------------------------------------- 1375 */ 1376 u32 savep; 1377 u32 lastp; 1378 u32 goalp; 1379 1380 /*---------------------------------------------------------------- 1381 ** Alternate data pointer. 1382 ** They are copied back to savep/lastp/goalp by the SCRIPTS 1383 ** when the direction is unknown and the device claims data out. 1384 **---------------------------------------------------------------- 1385 */ 1386 u32 wlastp; 1387 u32 wgoalp; 1388 1389 /*---------------------------------------------------------------- 1390 ** The virtual address of the ccb containing this header. 1391 **---------------------------------------------------------------- 1392 */ 1393 struct ccb * cp; 1394 1395 /*---------------------------------------------------------------- 1396 ** Status fields. 1397 **---------------------------------------------------------------- 1398 */ 1399 u_char scr_st[4]; /* script status */ 1400 u_char status[4]; /* host status. must be the */ 1401 /* last DWORD of the header. */ 1402}; 1403 1404/* 1405** The status bytes are used by the host and the script processor. 1406** 1407** The byte corresponding to the host_status must be stored in the 1408** last DWORD of the CCB header since it is used for command 1409** completion (ncr_wakeup()). Doing so, we are sure that the header 1410** has been entirely copied back to the CCB when the host_status is 1411** seen complete by the CPU. 1412** 1413** The last four bytes (status[4]) are copied to the scratchb register 1414** (declared as scr0..scr3 in ncr_reg.h) just after the select/reselect, 1415** and copied back just after disconnecting. 1416** Inside the script the XX_REG are used. 1417** 1418** The first four bytes (scr_st[4]) are used inside the script by 1419** "COPY" commands. 1420** Because source and destination must have the same alignment 1421** in a DWORD, the fields HAVE to be at the chosen offsets. 1422** xerr_st 0 (0x34) scratcha 1423** sync_st 1 (0x05) sxfer 1424** wide_st 3 (0x03) scntl3 1425*/ 1426 1427/* 1428** Last four bytes (script) 1429*/ 1430#define QU_REG scr0 1431#define HS_REG scr1 1432#define HS_PRT nc_scr1 1433#define SS_REG scr2 1434#define SS_PRT nc_scr2 1435#define PS_REG scr3 1436 1437/* 1438** Last four bytes (host) 1439*/ 1440#ifdef SCSI_NCR_BIG_ENDIAN 1441#define actualquirks phys.header.status[3] 1442#define host_status phys.header.status[2] 1443#define scsi_status phys.header.status[1] 1444#define parity_status phys.header.status[0] 1445#else 1446#define actualquirks phys.header.status[0] 1447#define host_status phys.header.status[1] 1448#define scsi_status phys.header.status[2] 1449#define parity_status phys.header.status[3] 1450#endif 1451 1452/* 1453** First four bytes (script) 1454*/ 1455#define xerr_st header.scr_st[0] 1456#define sync_st header.scr_st[1] 1457#define nego_st header.scr_st[2] 1458#define wide_st header.scr_st[3] 1459 1460/* 1461** First four bytes (host) 1462*/ 1463#define xerr_status phys.xerr_st 1464#define nego_status phys.nego_st 1465 1466 1467/*========================================================== 1468** 1469** Declaration of structs: Data structure block 1470** 1471**========================================================== 1472** 1473** During execution of a ccb by the script processor, 1474** the DSA (data structure address) register points 1475** to this substructure of the ccb. 1476** This substructure contains the header with 1477** the script-processor-changeable data and 1478** data blocks for the indirect move commands. 1479** 1480**---------------------------------------------------------- 1481*/ 1482 1483struct dsb { 1484 1485 /* 1486 ** Header. 1487 */ 1488 1489 struct head header; 1490 1491 /* 1492 ** Table data for Script 1493 */ 1494 1495 struct scr_tblsel select; 1496 struct scr_tblmove smsg ; 1497 struct scr_tblmove cmd ; 1498 struct scr_tblmove sense ; 1499 struct scr_tblmove data[MAX_SCATTER]; 1500}; 1501 1502 1503/*======================================================================== 1504** 1505** Declaration of structs: Command control block. 1506** 1507**======================================================================== 1508*/ 1509struct ccb { 1510 /*---------------------------------------------------------------- 1511 ** This is the data structure which is pointed by the DSA 1512 ** register when it is executed by the script processor. 1513 ** It must be the first entry because it contains the header 1514 ** as first entry that must be cache line aligned. 1515 **---------------------------------------------------------------- 1516 */ 1517 struct dsb phys; 1518 1519 /*---------------------------------------------------------------- 1520 ** Mini-script used at CCB execution start-up. 1521 ** Load the DSA with the data structure address (phys) and 1522 ** jump to SELECT. Jump to CANCEL if CCB is to be canceled. 1523 **---------------------------------------------------------------- 1524 */ 1525 struct launch start; 1526 1527 /*---------------------------------------------------------------- 1528 ** Mini-script used at CCB relection to restart the nexus. 1529 ** Load the DSA with the data structure address (phys) and 1530 ** jump to RESEL_DSA. Jump to ABORT if CCB is to be aborted. 1531 **---------------------------------------------------------------- 1532 */ 1533 struct launch restart; 1534 1535 /*---------------------------------------------------------------- 1536 ** If a data transfer phase is terminated too early 1537 ** (after reception of a message (i.e. DISCONNECT)), 1538 ** we have to prepare a mini script to transfer 1539 ** the rest of the data. 1540 **---------------------------------------------------------------- 1541 */ 1542 ncrcmd patch[8]; 1543 1544 /*---------------------------------------------------------------- 1545 ** The general SCSI driver provides a 1546 ** pointer to a control block. 1547 **---------------------------------------------------------------- 1548 */ 1549 struct scsi_cmnd *cmd; /* SCSI command */ 1550 u_char cdb_buf[16]; /* Copy of CDB */ 1551 u_char sense_buf[64]; 1552 int data_len; /* Total data length */ 1553 1554 /*---------------------------------------------------------------- 1555 ** Message areas. 1556 ** We prepare a message to be sent after selection. 1557 ** We may use a second one if the command is rescheduled 1558 ** due to GETCC or QFULL. 1559 ** Contents are IDENTIFY and SIMPLE_TAG. 1560 ** While negotiating sync or wide transfer, 1561 ** a SDTR or WDTR message is appended. 1562 **---------------------------------------------------------------- 1563 */ 1564 u_char scsi_smsg [8]; 1565 u_char scsi_smsg2[8]; 1566 1567 /*---------------------------------------------------------------- 1568 ** Other fields. 1569 **---------------------------------------------------------------- 1570 */ 1571 u_long p_ccb; /* BUS address of this CCB */ 1572 u_char sensecmd[6]; /* Sense command */ 1573 u_char tag; /* Tag for this transfer */ 1574 /* 255 means no tag */ 1575 u_char target; 1576 u_char lun; 1577 u_char queued; 1578 u_char auto_sense; 1579 struct ccb * link_ccb; /* Host adapter CCB chain */ 1580 struct list_head link_ccbq; /* Link to unit CCB queue */ 1581 u32 startp; /* Initial data pointer */ 1582 u_long magic; /* Free / busy CCB flag */ 1583}; 1584 1585#define CCB_PHYS(cp,lbl) (cp->p_ccb + offsetof(struct ccb, lbl)) 1586 1587 1588/*======================================================================== 1589** 1590** Declaration of structs: NCR device descriptor 1591** 1592**======================================================================== 1593*/ 1594struct ncb { 1595 /*---------------------------------------------------------------- 1596 ** The global header. 1597 ** It is accessible to both the host and the script processor. 1598 ** Must be cache line size aligned (32 for x86) in order to 1599 ** allow cache line bursting when it is copied to/from CCB. 1600 **---------------------------------------------------------------- 1601 */ 1602 struct head header; 1603 1604 /*---------------------------------------------------------------- 1605 ** CCBs management queues. 1606 **---------------------------------------------------------------- 1607 */ 1608 struct scsi_cmnd *waiting_list; /* Commands waiting for a CCB */ 1609 /* when lcb is not allocated. */ 1610 struct scsi_cmnd *done_list; /* Commands waiting for done() */ 1611 /* callback to be invoked. */ 1612 spinlock_t smp_lock; /* Lock for SMP threading */ 1613 1614 /*---------------------------------------------------------------- 1615 ** Chip and controller indentification. 1616 **---------------------------------------------------------------- 1617 */ 1618 int unit; /* Unit number */ 1619 char inst_name[16]; /* ncb instance name */ 1620 1621 /*---------------------------------------------------------------- 1622 ** Initial value of some IO register bits. 1623 ** These values are assumed to have been set by BIOS, and may 1624 ** be used for probing adapter implementation differences. 1625 **---------------------------------------------------------------- 1626 */ 1627 u_char sv_scntl0, sv_scntl3, sv_dmode, sv_dcntl, sv_ctest0, sv_ctest3, 1628 sv_ctest4, sv_ctest5, sv_gpcntl, sv_stest2, sv_stest4; 1629 1630 /*---------------------------------------------------------------- 1631 ** Actual initial value of IO register bits used by the 1632 ** driver. They are loaded at initialisation according to 1633 ** features that are to be enabled. 1634 **---------------------------------------------------------------- 1635 */ 1636 u_char rv_scntl0, rv_scntl3, rv_dmode, rv_dcntl, rv_ctest0, rv_ctest3, 1637 rv_ctest4, rv_ctest5, rv_stest2; 1638 1639 /*---------------------------------------------------------------- 1640 ** Targets management. 1641 ** During reselection the ncr jumps to jump_tcb. 1642 ** The SFBR register is loaded with the encoded target id. 1643 ** For i = 0 to 3 1644 ** SCR_JUMP ^ IFTRUE(MASK(i, 3)), @(next tcb mod. i) 1645 ** 1646 ** Recent chips will prefetch the 4 JUMPS using only 1 burst. 1647 ** It is kind of hashcoding. 1648 **---------------------------------------------------------------- 1649 */ 1650 struct link jump_tcb[4]; /* JUMPs for reselection */ 1651 struct tcb target[MAX_TARGET]; /* Target data */ 1652 1653 /*---------------------------------------------------------------- 1654 ** Virtual and physical bus addresses of the chip. 1655 **---------------------------------------------------------------- 1656 */ 1657 void __iomem *vaddr; /* Virtual and bus address of */ 1658 unsigned long paddr; /* chip's IO registers. */ 1659 unsigned long paddr2; /* On-chip RAM bus address. */ 1660 volatile /* Pointer to volatile for */ 1661 struct ncr_reg __iomem *reg; /* memory mapped IO. */ 1662 1663 /*---------------------------------------------------------------- 1664 ** SCRIPTS virtual and physical bus addresses. 1665 ** 'script' is loaded in the on-chip RAM if present. 1666 ** 'scripth' stays in main memory. 1667 **---------------------------------------------------------------- 1668 */ 1669 struct script *script0; /* Copies of script and scripth */ 1670 struct scripth *scripth0; /* relocated for this ncb. */ 1671 struct scripth *scripth; /* Actual scripth virt. address */ 1672 u_long p_script; /* Actual script and scripth */ 1673 u_long p_scripth; /* bus addresses. */ 1674 1675 /*---------------------------------------------------------------- 1676 ** General controller parameters and configuration. 1677 **---------------------------------------------------------------- 1678 */ 1679 struct device *dev; 1680 u_char revision_id; /* PCI device revision id */ 1681 u32 irq; /* IRQ level */ 1682 u32 features; /* Chip features map */ 1683 u_char myaddr; /* SCSI id of the adapter */ 1684 u_char maxburst; /* log base 2 of dwords burst */ 1685 u_char maxwide; /* Maximum transfer width */ 1686 u_char minsync; /* Minimum sync period factor */ 1687 u_char maxsync; /* Maximum sync period factor */ 1688 u_char maxoffs; /* Max scsi offset */ 1689 u_char multiplier; /* Clock multiplier (1,2,4) */ 1690 u_char clock_divn; /* Number of clock divisors */ 1691 u_long clock_khz; /* SCSI clock frequency in KHz */ 1692 1693 /*---------------------------------------------------------------- 1694 ** Start queue management. 1695 ** It is filled up by the host processor and accessed by the 1696 ** SCRIPTS processor in order to start SCSI commands. 1697 **---------------------------------------------------------------- 1698 */ 1699 u16 squeueput; /* Next free slot of the queue */ 1700 u16 actccbs; /* Number of allocated CCBs */ 1701 u16 queuedccbs; /* Number of CCBs in start queue*/ 1702 u16 queuedepth; /* Start queue depth */ 1703 1704 /*---------------------------------------------------------------- 1705 ** Timeout handler. 1706 **---------------------------------------------------------------- 1707 */ 1708 struct timer_list timer; /* Timer handler link header */ 1709 u_long lasttime; 1710 u_long settle_time; /* Resetting the SCSI BUS */ 1711 1712 /*---------------------------------------------------------------- 1713 ** Debugging and profiling. 1714 **---------------------------------------------------------------- 1715 */ 1716 struct ncr_reg regdump; /* Register dump */ 1717 u_long regtime; /* Time it has been done */ 1718 1719 /*---------------------------------------------------------------- 1720 ** Miscellaneous buffers accessed by the scripts-processor. 1721 ** They shall be DWORD aligned, because they may be read or 1722 ** written with a SCR_COPY script command. 1723 **---------------------------------------------------------------- 1724 */ 1725 u_char msgout[8]; /* Buffer for MESSAGE OUT */ 1726 u_char msgin [8]; /* Buffer for MESSAGE IN */ 1727 u32 lastmsg; /* Last SCSI message sent */ 1728 u_char scratch; /* Scratch for SCSI receive */ 1729 1730 /*---------------------------------------------------------------- 1731 ** Miscellaneous configuration and status parameters. 1732 **---------------------------------------------------------------- 1733 */ 1734 u_char disc; /* Diconnection allowed */ 1735 u_char scsi_mode; /* Current SCSI BUS mode */ 1736 u_char order; /* Tag order to use */ 1737 u_char verbose; /* Verbosity for this controller*/ 1738 int ncr_cache; /* Used for cache test at init. */ 1739 u_long p_ncb; /* BUS address of this NCB */ 1740 1741 /*---------------------------------------------------------------- 1742 ** Command completion handling. 1743 **---------------------------------------------------------------- 1744 */ 1745#ifdef SCSI_NCR_CCB_DONE_SUPPORT 1746 struct ccb *(ccb_done[MAX_DONE]); 1747 int ccb_done_ic; 1748#endif 1749 /*---------------------------------------------------------------- 1750 ** Fields that should be removed or changed. 1751 **---------------------------------------------------------------- 1752 */ 1753 struct ccb *ccb; /* Global CCB */ 1754 struct usrcmd user; /* Command from user */ 1755 volatile u_char release_stage; /* Synchronisation stage on release */ 1756}; 1757 1758#define NCB_SCRIPT_PHYS(np,lbl) (np->p_script + offsetof (struct script, lbl)) 1759#define NCB_SCRIPTH_PHYS(np,lbl) (np->p_scripth + offsetof (struct scripth,lbl)) 1760 1761/*========================================================== 1762** 1763** 1764** Script for NCR-Processor. 1765** 1766** Use ncr_script_fill() to create the variable parts. 1767** Use ncr_script_copy_and_bind() to make a copy and 1768** bind to physical addresses. 1769** 1770** 1771**========================================================== 1772** 1773** We have to know the offsets of all labels before 1774** we reach them (for forward jumps). 1775** Therefore we declare a struct here. 1776** If you make changes inside the script, 1777** DONT FORGET TO CHANGE THE LENGTHS HERE! 1778** 1779**---------------------------------------------------------- 1780*/ 1781 1782/* 1783** For HP Zalon/53c720 systems, the Zalon interface 1784** between CPU and 53c720 does prefetches, which causes 1785** problems with self modifying scripts. The problem 1786** is overcome by calling a dummy subroutine after each 1787** modification, to force a refetch of the script on 1788** return from the subroutine. 1789*/ 1790 1791#ifdef CONFIG_NCR53C8XX_PREFETCH 1792#define PREFETCH_FLUSH_CNT 2 1793#define PREFETCH_FLUSH SCR_CALL, PADDRH (wait_dma), 1794#else 1795#define PREFETCH_FLUSH_CNT 0 1796#define PREFETCH_FLUSH 1797#endif 1798 1799/* 1800** Script fragments which are loaded into the on-chip RAM 1801** of 825A, 875 and 895 chips. 1802*/ 1803struct script { 1804 ncrcmd start [ 5]; 1805 ncrcmd startpos [ 1]; 1806 ncrcmd select [ 6]; 1807 ncrcmd select2 [ 9 + PREFETCH_FLUSH_CNT]; 1808 ncrcmd loadpos [ 4]; 1809 ncrcmd send_ident [ 9]; 1810 ncrcmd prepare [ 6]; 1811 ncrcmd prepare2 [ 7]; 1812 ncrcmd command [ 6]; 1813 ncrcmd dispatch [ 32]; 1814 ncrcmd clrack [ 4]; 1815 ncrcmd no_data [ 17]; 1816 ncrcmd status [ 8]; 1817 ncrcmd msg_in [ 2]; 1818 ncrcmd msg_in2 [ 16]; 1819 ncrcmd msg_bad [ 4]; 1820 ncrcmd setmsg [ 7]; 1821 ncrcmd cleanup [ 6]; 1822 ncrcmd complete [ 9]; 1823 ncrcmd cleanup_ok [ 8 + PREFETCH_FLUSH_CNT]; 1824 ncrcmd cleanup0 [ 1]; 1825#ifndef SCSI_NCR_CCB_DONE_SUPPORT 1826 ncrcmd signal [ 12]; 1827#else 1828 ncrcmd signal [ 9]; 1829 ncrcmd done_pos [ 1]; 1830 ncrcmd done_plug [ 2]; 1831 ncrcmd done_end [ 7]; 1832#endif 1833 ncrcmd save_dp [ 7]; 1834 ncrcmd restore_dp [ 5]; 1835 ncrcmd disconnect [ 10]; 1836 ncrcmd msg_out [ 9]; 1837 ncrcmd msg_out_done [ 7]; 1838 ncrcmd idle [ 2]; 1839 ncrcmd reselect [ 8]; 1840 ncrcmd reselected [ 8]; 1841 ncrcmd resel_dsa [ 6 + PREFETCH_FLUSH_CNT]; 1842 ncrcmd loadpos1 [ 4]; 1843 ncrcmd resel_lun [ 6]; 1844 ncrcmd resel_tag [ 6]; 1845 ncrcmd jump_to_nexus [ 4 + PREFETCH_FLUSH_CNT]; 1846 ncrcmd nexus_indirect [ 4]; 1847 ncrcmd resel_notag [ 4]; 1848 ncrcmd data_in [MAX_SCATTERL * 4]; 1849 ncrcmd data_in2 [ 4]; 1850 ncrcmd data_out [MAX_SCATTERL * 4]; 1851 ncrcmd data_out2 [ 4]; 1852}; 1853 1854/* 1855** Script fragments which stay in main memory for all chips. 1856*/ 1857struct scripth { 1858 ncrcmd tryloop [MAX_START*2]; 1859 ncrcmd tryloop2 [ 2]; 1860#ifdef SCSI_NCR_CCB_DONE_SUPPORT 1861 ncrcmd done_queue [MAX_DONE*5]; 1862 ncrcmd done_queue2 [ 2]; 1863#endif 1864 ncrcmd select_no_atn [ 8]; 1865 ncrcmd cancel [ 4]; 1866 ncrcmd skip [ 9 + PREFETCH_FLUSH_CNT]; 1867 ncrcmd skip2 [ 19]; 1868 ncrcmd par_err_data_in [ 6]; 1869 ncrcmd par_err_other [ 4]; 1870 ncrcmd msg_reject [ 8]; 1871 ncrcmd msg_ign_residue [ 24]; 1872 ncrcmd msg_extended [ 10]; 1873 ncrcmd msg_ext_2 [ 10]; 1874 ncrcmd msg_wdtr [ 14]; 1875 ncrcmd send_wdtr [ 7]; 1876 ncrcmd msg_ext_3 [ 10]; 1877 ncrcmd msg_sdtr [ 14]; 1878 ncrcmd send_sdtr [ 7]; 1879 ncrcmd nego_bad_phase [ 4]; 1880 ncrcmd msg_out_abort [ 10]; 1881 ncrcmd hdata_in [MAX_SCATTERH * 4]; 1882 ncrcmd hdata_in2 [ 2]; 1883 ncrcmd hdata_out [MAX_SCATTERH * 4]; 1884 ncrcmd hdata_out2 [ 2]; 1885 ncrcmd reset [ 4]; 1886 ncrcmd aborttag [ 4]; 1887 ncrcmd abort [ 2]; 1888 ncrcmd abort_resel [ 20]; 1889 ncrcmd resend_ident [ 4]; 1890 ncrcmd clratn_go_on [ 3]; 1891 ncrcmd nxtdsp_go_on [ 1]; 1892 ncrcmd sdata_in [ 8]; 1893 ncrcmd data_io [ 18]; 1894 ncrcmd bad_identify [ 12]; 1895 ncrcmd bad_i_t_l [ 4]; 1896 ncrcmd bad_i_t_l_q [ 4]; 1897 ncrcmd bad_target [ 8]; 1898 ncrcmd bad_status [ 8]; 1899 ncrcmd start_ram [ 4 + PREFETCH_FLUSH_CNT]; 1900 ncrcmd start_ram0 [ 4]; 1901 ncrcmd sto_restart [ 5]; 1902 ncrcmd wait_dma [ 2]; 1903 ncrcmd snooptest [ 9]; 1904 ncrcmd snoopend [ 2]; 1905}; 1906 1907/*========================================================== 1908** 1909** 1910** Function headers. 1911** 1912** 1913**========================================================== 1914*/ 1915 1916static void ncr_alloc_ccb (struct ncb *np, u_char tn, u_char ln); 1917static void ncr_complete (struct ncb *np, struct ccb *cp); 1918static void ncr_exception (struct ncb *np); 1919static void ncr_free_ccb (struct ncb *np, struct ccb *cp); 1920static void ncr_init_ccb (struct ncb *np, struct ccb *cp); 1921static void ncr_init_tcb (struct ncb *np, u_char tn); 1922static struct lcb * ncr_alloc_lcb (struct ncb *np, u_char tn, u_char ln); 1923static struct lcb * ncr_setup_lcb (struct ncb *np, struct scsi_device *sdev); 1924static void ncr_getclock (struct ncb *np, int mult); 1925static void ncr_selectclock (struct ncb *np, u_char scntl3); 1926static struct ccb *ncr_get_ccb (struct ncb *np, struct scsi_cmnd *cmd); 1927static void ncr_chip_reset (struct ncb *np, int delay); 1928static void ncr_init (struct ncb *np, int reset, char * msg, u_long code); 1929static int ncr_int_sbmc (struct ncb *np); 1930static int ncr_int_par (struct ncb *np); 1931static void ncr_int_ma (struct ncb *np); 1932static void ncr_int_sir (struct ncb *np); 1933static void ncr_int_sto (struct ncb *np); 1934static void ncr_negotiate (struct ncb* np, struct tcb* tp); 1935static int ncr_prepare_nego(struct ncb *np, struct ccb *cp, u_char *msgptr); 1936 1937static void ncr_script_copy_and_bind 1938 (struct ncb *np, ncrcmd *src, ncrcmd *dst, int len); 1939static void ncr_script_fill (struct script * scr, struct scripth * scripth); 1940static int ncr_scatter (struct ncb *np, struct ccb *cp, struct scsi_cmnd *cmd); 1941static void ncr_getsync (struct ncb *np, u_char sfac, u_char *fakp, u_char *scntl3p); 1942static void ncr_setsync (struct ncb *np, struct ccb *cp, u_char scntl3, u_char sxfer); 1943static void ncr_setup_tags (struct ncb *np, struct scsi_device *sdev); 1944static void ncr_setwide (struct ncb *np, struct ccb *cp, u_char wide, u_char ack); 1945static int ncr_snooptest (struct ncb *np); 1946static void ncr_timeout (struct ncb *np); 1947static void ncr_wakeup (struct ncb *np, u_long code); 1948static void ncr_wakeup_done (struct ncb *np); 1949static void ncr_start_next_ccb (struct ncb *np, struct lcb * lp, int maxn); 1950static void ncr_put_start_queue(struct ncb *np, struct ccb *cp); 1951 1952static void insert_into_waiting_list(struct ncb *np, struct scsi_cmnd *cmd); 1953static struct scsi_cmnd *retrieve_from_waiting_list(int to_remove, struct ncb *np, struct scsi_cmnd *cmd); 1954static void process_waiting_list(struct ncb *np, int sts); 1955 1956#define remove_from_waiting_list(np, cmd) \ 1957 retrieve_from_waiting_list(1, (np), (cmd)) 1958#define requeue_waiting_list(np) process_waiting_list((np), DID_OK) 1959#define reset_waiting_list(np) process_waiting_list((np), DID_RESET) 1960 1961static inline char *ncr_name (struct ncb *np) 1962{ 1963 return np->inst_name; 1964} 1965 1966 1967/*========================================================== 1968** 1969** 1970** Scripts for NCR-Processor. 1971** 1972** Use ncr_script_bind for binding to physical addresses. 1973** 1974** 1975**========================================================== 1976** 1977** NADDR generates a reference to a field of the controller data. 1978** PADDR generates a reference to another part of the script. 1979** RADDR generates a reference to a script processor register. 1980** FADDR generates a reference to a script processor register 1981** with offset. 1982** 1983**---------------------------------------------------------- 1984*/ 1985 1986#define RELOC_SOFTC 0x40000000 1987#define RELOC_LABEL 0x50000000 1988#define RELOC_REGISTER 0x60000000 1989#define RELOC_LABELH 0x80000000 1990#define RELOC_MASK 0xf0000000 1991 1992#define NADDR(label) (RELOC_SOFTC | offsetof(struct ncb, label)) 1993#define PADDR(label) (RELOC_LABEL | offsetof(struct script, label)) 1994#define PADDRH(label) (RELOC_LABELH | offsetof(struct scripth, label)) 1995#define RADDR(label) (RELOC_REGISTER | REG(label)) 1996#define FADDR(label,ofs)(RELOC_REGISTER | ((REG(label))+(ofs))) 1997 1998 1999static struct script script0 __initdata = { 2000/*--------------------------< START >-----------------------*/ { 2001 /* 2002 ** This NOP will be patched with LED ON 2003 ** SCR_REG_REG (gpreg, SCR_AND, 0xfe) 2004 */ 2005 SCR_NO_OP, 2006 0, 2007 /* 2008 ** Clear SIGP. 2009 */ 2010 SCR_FROM_REG (ctest2), 2011 0, 2012 /* 2013 ** Then jump to a certain point in tryloop. 2014 ** Due to the lack of indirect addressing the code 2015 ** is self modifying here. 2016 */ 2017 SCR_JUMP, 2018}/*-------------------------< STARTPOS >--------------------*/,{ 2019 PADDRH(tryloop), 2020 2021}/*-------------------------< SELECT >----------------------*/,{ 2022 /* 2023 ** DSA contains the address of a scheduled 2024 ** data structure. 2025 ** 2026 ** SCRATCHA contains the address of the script, 2027 ** which starts the next entry. 2028 ** 2029 ** Set Initiator mode. 2030 ** 2031 ** (Target mode is left as an exercise for the reader) 2032 */ 2033 2034 SCR_CLR (SCR_TRG), 2035 0, 2036 SCR_LOAD_REG (HS_REG, HS_SELECTING), 2037 0, 2038 2039 /* 2040 ** And try to select this target. 2041 */ 2042 SCR_SEL_TBL_ATN ^ offsetof (struct dsb, select), 2043 PADDR (reselect), 2044 2045}/*-------------------------< SELECT2 >----------------------*/,{ 2046 /* 2047 ** Now there are 4 possibilities: 2048 ** 2049 ** (1) The ncr loses arbitration. 2050 ** This is ok, because it will try again, 2051 ** when the bus becomes idle. 2052 ** (But beware of the timeout function!) 2053 ** 2054 ** (2) The ncr is reselected. 2055 ** Then the script processor takes the jump 2056 ** to the RESELECT label. 2057 ** 2058 ** (3) The ncr wins arbitration. 2059 ** Then it will execute SCRIPTS instruction until 2060 ** the next instruction that checks SCSI phase. 2061 ** Then will stop and wait for selection to be 2062 ** complete or selection time-out to occur. 2063 ** As a result the SCRIPTS instructions until 2064 ** LOADPOS + 2 should be executed in parallel with 2065 ** the SCSI core performing selection. 2066 */ 2067 2068 /* 2069 ** The MESSAGE_REJECT problem seems to be due to a selection 2070 ** timing problem. 2071 ** Wait immediately for the selection to complete. 2072 ** (2.5x behaves so) 2073 */ 2074 SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_OUT)), 2075 0, 2076 2077 /* 2078 ** Next time use the next slot. 2079 */ 2080 SCR_COPY (4), 2081 RADDR (temp), 2082 PADDR (startpos), 2083 /* 2084 ** The ncr doesn't have an indirect load 2085 ** or store command. So we have to 2086 ** copy part of the control block to a 2087 ** fixed place, where we can access it. 2088 ** 2089 ** We patch the address part of a 2090 ** COPY command with the DSA-register. 2091 */ 2092 SCR_COPY_F (4), 2093 RADDR (dsa), 2094 PADDR (loadpos), 2095 /* 2096 ** Flush script prefetch if required 2097 */ 2098 PREFETCH_FLUSH 2099 /* 2100 ** then we do the actual copy. 2101 */ 2102 SCR_COPY (sizeof (struct head)), 2103 /* 2104 ** continued after the next label ... 2105 */ 2106}/*-------------------------< LOADPOS >---------------------*/,{ 2107 0, 2108 NADDR (header), 2109 /* 2110 ** Wait for the next phase or the selection 2111 ** to complete or time-out. 2112 */ 2113 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_OUT)), 2114 PADDR (prepare), 2115 2116}/*-------------------------< SEND_IDENT >----------------------*/,{ 2117 /* 2118 ** Selection complete. 2119 ** Send the IDENTIFY and SIMPLE_TAG messages 2120 ** (and the EXTENDED_SDTR message) 2121 */ 2122 SCR_MOVE_TBL ^ SCR_MSG_OUT, 2123 offsetof (struct dsb, smsg), 2124 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_OUT)), 2125 PADDRH (resend_ident), 2126 SCR_LOAD_REG (scratcha, 0x80), 2127 0, 2128 SCR_COPY (1), 2129 RADDR (scratcha), 2130 NADDR (lastmsg), 2131}/*-------------------------< PREPARE >----------------------*/,{ 2132 /* 2133 ** load the savep (saved pointer) into 2134 ** the TEMP register (actual pointer) 2135 */ 2136 SCR_COPY (4), 2137 NADDR (header.savep), 2138 RADDR (temp), 2139 /* 2140 ** Initialize the status registers 2141 */ 2142 SCR_COPY (4), 2143 NADDR (header.status), 2144 RADDR (scr0), 2145}/*-------------------------< PREPARE2 >---------------------*/,{ 2146 /* 2147 ** Initialize the msgout buffer with a NOOP message. 2148 */ 2149 SCR_LOAD_REG (scratcha, NOP), 2150 0, 2151 SCR_COPY (1), 2152 RADDR (scratcha), 2153 NADDR (msgout), 2154 /* 2155 ** Anticipate the COMMAND phase. 2156 ** This is the normal case for initial selection. 2157 */ 2158 SCR_JUMP ^ IFFALSE (WHEN (SCR_COMMAND)), 2159 PADDR (dispatch), 2160 2161}/*-------------------------< COMMAND >--------------------*/,{ 2162 /* 2163 ** ... and send the command 2164 */ 2165 SCR_MOVE_TBL ^ SCR_COMMAND, 2166 offsetof (struct dsb, cmd), 2167 /* 2168 ** If status is still HS_NEGOTIATE, negotiation failed. 2169 ** We check this here, since we want to do that 2170 ** only once. 2171 */ 2172 SCR_FROM_REG (HS_REG), 2173 0, 2174 SCR_INT ^ IFTRUE (DATA (HS_NEGOTIATE)), 2175 SIR_NEGO_FAILED, 2176 2177}/*-----------------------< DISPATCH >----------------------*/,{ 2178 /* 2179 ** MSG_IN is the only phase that shall be 2180 ** entered at least once for each (re)selection. 2181 ** So we test it first. 2182 */ 2183 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_IN)), 2184 PADDR (msg_in), 2185 2186 SCR_RETURN ^ IFTRUE (IF (SCR_DATA_OUT)), 2187 0, 2188 SCR_JUMPR ^ IFFALSE (IF (SCR_DATA_IN)), 2189 20, 2190 SCR_COPY (4), 2191 RADDR (scratcha), 2192 RADDR (scratcha), 2193 SCR_RETURN, 2194 0, 2195 SCR_JUMP ^ IFTRUE (IF (SCR_STATUS)), 2196 PADDR (status), 2197 SCR_JUMP ^ IFTRUE (IF (SCR_COMMAND)), 2198 PADDR (command), 2199 SCR_JUMP ^ IFTRUE (IF (SCR_MSG_OUT)), 2200 PADDR (msg_out), 2201 /* 2202 ** Discard one illegal phase byte, if required. 2203 */ 2204 SCR_LOAD_REG (scratcha, XE_BAD_PHASE), 2205 0, 2206 SCR_COPY (1), 2207 RADDR (scratcha), 2208 NADDR (xerr_st), 2209 SCR_JUMPR ^ IFFALSE (IF (SCR_ILG_OUT)), 2210 8, 2211 SCR_MOVE_ABS (1) ^ SCR_ILG_OUT, 2212 NADDR (scratch), 2213 SCR_JUMPR ^ IFFALSE (IF (SCR_ILG_IN)), 2214 8, 2215 SCR_MOVE_ABS (1) ^ SCR_ILG_IN, 2216 NADDR (scratch), 2217 SCR_JUMP, 2218 PADDR (dispatch), 2219 2220}/*-------------------------< CLRACK >----------------------*/,{ 2221 /* 2222 ** Terminate possible pending message phase. 2223 */ 2224 SCR_CLR (SCR_ACK), 2225 0, 2226 SCR_JUMP, 2227 PADDR (dispatch), 2228 2229}/*-------------------------< NO_DATA >--------------------*/,{ 2230 /* 2231 ** The target wants to tranfer too much data 2232 ** or in the wrong direction. 2233 ** Remember that in extended error. 2234 */ 2235 SCR_LOAD_REG (scratcha, XE_EXTRA_DATA), 2236 0, 2237 SCR_COPY (1), 2238 RADDR (scratcha), 2239 NADDR (xerr_st), 2240 /* 2241 ** Discard one data byte, if required. 2242 */ 2243 SCR_JUMPR ^ IFFALSE (WHEN (SCR_DATA_OUT)), 2244 8, 2245 SCR_MOVE_ABS (1) ^ SCR_DATA_OUT, 2246 NADDR (scratch), 2247 SCR_JUMPR ^ IFFALSE (IF (SCR_DATA_IN)), 2248 8, 2249 SCR_MOVE_ABS (1) ^ SCR_DATA_IN, 2250 NADDR (scratch), 2251 /* 2252 ** .. and repeat as required. 2253 */ 2254 SCR_CALL, 2255 PADDR (dispatch), 2256 SCR_JUMP, 2257 PADDR (no_data), 2258 2259}/*-------------------------< STATUS >--------------------*/,{ 2260 /* 2261 ** get the status 2262 */ 2263 SCR_MOVE_ABS (1) ^ SCR_STATUS, 2264 NADDR (scratch), 2265 /* 2266 ** save status to scsi_status. 2267 ** mark as complete. 2268 */ 2269 SCR_TO_REG (SS_REG), 2270 0, 2271 SCR_LOAD_REG (HS_REG, HS_COMPLETE), 2272 0, 2273 SCR_JUMP, 2274 PADDR (dispatch), 2275}/*-------------------------< MSG_IN >--------------------*/,{ 2276 /* 2277 ** Get the first byte of the message 2278 ** and save it to SCRATCHA. 2279 ** 2280 ** The script processor doesn't negate the 2281 ** ACK signal after this transfer. 2282 */ 2283 SCR_MOVE_ABS (1) ^ SCR_MSG_IN, 2284 NADDR (msgin[0]), 2285}/*-------------------------< MSG_IN2 >--------------------*/,{ 2286 /* 2287 ** Handle this message. 2288 */ 2289 SCR_JUMP ^ IFTRUE (DATA (COMMAND_COMPLETE)), 2290 PADDR (complete), 2291 SCR_JUMP ^ IFTRUE (DATA (DISCONNECT)), 2292 PADDR (disconnect), 2293 SCR_JUMP ^ IFTRUE (DATA (SAVE_POINTERS)), 2294 PADDR (save_dp), 2295 SCR_JUMP ^ IFTRUE (DATA (RESTORE_POINTERS)), 2296 PADDR (restore_dp), 2297 SCR_JUMP ^ IFTRUE (DATA (EXTENDED_MESSAGE)), 2298 PADDRH (msg_extended), 2299 SCR_JUMP ^ IFTRUE (DATA (NOP)), 2300 PADDR (clrack), 2301 SCR_JUMP ^ IFTRUE (DATA (MESSAGE_REJECT)), 2302 PADDRH (msg_reject), 2303 SCR_JUMP ^ IFTRUE (DATA (IGNORE_WIDE_RESIDUE)), 2304 PADDRH (msg_ign_residue), 2305 /* 2306 ** Rest of the messages left as 2307 ** an exercise ... 2308 ** 2309 ** Unimplemented messages: 2310 ** fall through to MSG_BAD. 2311 */ 2312}/*-------------------------< MSG_BAD >------------------*/,{ 2313 /* 2314 ** unimplemented message - reject it. 2315 */ 2316 SCR_INT, 2317 SIR_REJECT_SENT, 2318 SCR_LOAD_REG (scratcha, MESSAGE_REJECT), 2319 0, 2320}/*-------------------------< SETMSG >----------------------*/,{ 2321 SCR_COPY (1), 2322 RADDR (scratcha), 2323 NADDR (msgout), 2324 SCR_SET (SCR_ATN), 2325 0, 2326 SCR_JUMP, 2327 PADDR (clrack), 2328}/*-------------------------< CLEANUP >-------------------*/,{ 2329 /* 2330 ** dsa: Pointer to ccb 2331 ** or xxxxxxFF (no ccb) 2332 ** 2333 ** HS_REG: Host-Status (<>0!) 2334 */ 2335 SCR_FROM_REG (dsa), 2336 0, 2337 SCR_JUMP ^ IFTRUE (DATA (0xff)), 2338 PADDR (start), 2339 /* 2340 ** dsa is valid. 2341 ** complete the cleanup. 2342 */ 2343 SCR_JUMP, 2344 PADDR (cleanup_ok), 2345 2346}/*-------------------------< COMPLETE >-----------------*/,{ 2347 /* 2348 ** Complete message. 2349 ** 2350 ** Copy TEMP register to LASTP in header. 2351 */ 2352 SCR_COPY (4), 2353 RADDR (temp), 2354 NADDR (header.lastp), 2355 /* 2356 ** When we terminate the cycle by clearing ACK, 2357 ** the target may disconnect immediately. 2358 ** 2359 ** We don't want to be told of an 2360 ** "unexpected disconnect", 2361 ** so we disable this feature. 2362 */ 2363 SCR_REG_REG (scntl2, SCR_AND, 0x7f), 2364 0, 2365 /* 2366 ** Terminate cycle ... 2367 */ 2368 SCR_CLR (SCR_ACK|SCR_ATN), 2369 0, 2370 /* 2371 ** ... and wait for the disconnect. 2372 */ 2373 SCR_WAIT_DISC, 2374 0, 2375}/*-------------------------< CLEANUP_OK >----------------*/,{ 2376 /* 2377 ** Save host status to header. 2378 */ 2379 SCR_COPY (4), 2380 RADDR (scr0), 2381 NADDR (header.status), 2382 /* 2383 ** and copy back the header to the ccb. 2384 */ 2385 SCR_COPY_F (4), 2386 RADDR (dsa), 2387 PADDR (cleanup0), 2388 /* 2389 ** Flush script prefetch if required 2390 */ 2391 PREFETCH_FLUSH 2392 SCR_COPY (sizeof (struct head)), 2393 NADDR (header), 2394}/*-------------------------< CLEANUP0 >--------------------*/,{ 2395 0, 2396}/*-------------------------< SIGNAL >----------------------*/,{ 2397 /* 2398 ** if job not completed ... 2399 */ 2400 SCR_FROM_REG (HS_REG), 2401 0, 2402 /* 2403 ** ... start the next command. 2404 */ 2405 SCR_JUMP ^ IFTRUE (MASK (0, (HS_DONEMASK|HS_SKIPMASK))), 2406 PADDR(start), 2407 /* 2408 ** If command resulted in not GOOD status, 2409 ** call the C code if needed. 2410 */ 2411 SCR_FROM_REG (SS_REG), 2412 0, 2413 SCR_CALL ^ IFFALSE (DATA (S_GOOD)), 2414 PADDRH (bad_status), 2415 2416#ifndef SCSI_NCR_CCB_DONE_SUPPORT 2417 2418 /* 2419 ** ... signal completion to the host 2420 */ 2421 SCR_INT, 2422 SIR_INTFLY, 2423 /* 2424 ** Auf zu neuen Schandtaten! 2425 */ 2426 SCR_JUMP, 2427 PADDR(start), 2428 2429#else /* defined SCSI_NCR_CCB_DONE_SUPPORT */ 2430 2431 /* 2432 ** ... signal completion to the host 2433 */ 2434 SCR_JUMP, 2435}/*------------------------< DONE_POS >---------------------*/,{ 2436 PADDRH (done_queue), 2437}/*------------------------< DONE_PLUG >--------------------*/,{ 2438 SCR_INT, 2439 SIR_DONE_OVERFLOW, 2440}/*------------------------< DONE_END >---------------------*/,{ 2441 SCR_INT, 2442 SIR_INTFLY, 2443 SCR_COPY (4), 2444 RADDR (temp), 2445 PADDR (done_pos), 2446 SCR_JUMP, 2447 PADDR (start), 2448 2449#endif /* SCSI_NCR_CCB_DONE_SUPPORT */ 2450 2451}/*-------------------------< SAVE_DP >------------------*/,{ 2452 /* 2453 ** SAVE_DP message: 2454 ** Copy TEMP register to SAVEP in header. 2455 */ 2456 SCR_COPY (4), 2457 RADDR (temp), 2458 NADDR (header.savep), 2459 SCR_CLR (SCR_ACK), 2460 0, 2461 SCR_JUMP, 2462 PADDR (dispatch), 2463}/*-------------------------< RESTORE_DP >---------------*/,{ 2464 /* 2465 ** RESTORE_DP message: 2466 ** Copy SAVEP in header to TEMP register. 2467 */ 2468 SCR_COPY (4), 2469 NADDR (header.savep), 2470 RADDR (temp), 2471 SCR_JUMP, 2472 PADDR (clrack), 2473 2474}/*-------------------------< DISCONNECT >---------------*/,{ 2475 /* 2476 ** DISCONNECTing ... 2477 ** 2478 ** disable the "unexpected disconnect" feature, 2479 ** and remove the ACK signal. 2480 */ 2481 SCR_REG_REG (scntl2, SCR_AND, 0x7f), 2482 0, 2483 SCR_CLR (SCR_ACK|SCR_ATN), 2484 0, 2485 /* 2486 ** Wait for the disconnect. 2487 */ 2488 SCR_WAIT_DISC, 2489 0, 2490 /* 2491 ** Status is: DISCONNECTED. 2492 */ 2493 SCR_LOAD_REG (HS_REG, HS_DISCONNECT), 2494 0, 2495 SCR_JUMP, 2496 PADDR (cleanup_ok), 2497 2498}/*-------------------------< MSG_OUT >-------------------*/,{ 2499 /* 2500 ** The target requests a message. 2501 */ 2502 SCR_MOVE_ABS (1) ^ SCR_MSG_OUT, 2503 NADDR (msgout), 2504 SCR_COPY (1), 2505 NADDR (msgout), 2506 NADDR (lastmsg), 2507 /* 2508 ** If it was no ABORT message ... 2509 */ 2510 SCR_JUMP ^ IFTRUE (DATA (ABORT_TASK_SET)), 2511 PADDRH (msg_out_abort), 2512 /* 2513 ** ... wait for the next phase 2514 ** if it's a message out, send it again, ... 2515 */ 2516 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_OUT)), 2517 PADDR (msg_out), 2518}/*-------------------------< MSG_OUT_DONE >--------------*/,{ 2519 /* 2520 ** ... else clear the message ... 2521 */ 2522 SCR_LOAD_REG (scratcha, NOP), 2523 0, 2524 SCR_COPY (4), 2525 RADDR (scratcha), 2526 NADDR (msgout), 2527 /* 2528 ** ... and process the next phase 2529 */ 2530 SCR_JUMP, 2531 PADDR (dispatch), 2532}/*-------------------------< IDLE >------------------------*/,{ 2533 /* 2534 ** Nothing to do? 2535 ** Wait for reselect. 2536 ** This NOP will be patched with LED OFF 2537 ** SCR_REG_REG (gpreg, SCR_OR, 0x01) 2538 */ 2539 SCR_NO_OP, 2540 0, 2541}/*-------------------------< RESELECT >--------------------*/,{ 2542 /* 2543 ** make the DSA invalid. 2544 */ 2545 SCR_LOAD_REG (dsa, 0xff), 2546 0, 2547 SCR_CLR (SCR_TRG), 2548 0, 2549 SCR_LOAD_REG (HS_REG, HS_IN_RESELECT), 2550 0, 2551 /* 2552 ** Sleep waiting for a reselection. 2553 ** If SIGP is set, special treatment. 2554 ** 2555 ** Zu allem bereit .. 2556 */ 2557 SCR_WAIT_RESEL, 2558 PADDR(start), 2559}/*-------------------------< RESELECTED >------------------*/,{ 2560 /* 2561 ** This NOP will be patched with LED ON 2562 ** SCR_REG_REG (gpreg, SCR_AND, 0xfe) 2563 */ 2564 SCR_NO_OP, 2565 0, 2566 /* 2567 ** ... zu nichts zu gebrauchen ? 2568 ** 2569 ** load the target id into the SFBR 2570 ** and jump to the control block. 2571 ** 2572 ** Look at the declarations of 2573 ** - struct ncb 2574 ** - struct tcb 2575 ** - struct lcb 2576 ** - struct ccb 2577 ** to understand what's going on. 2578 */ 2579 SCR_REG_SFBR (ssid, SCR_AND, 0x8F), 2580 0, 2581 SCR_TO_REG (sdid), 2582 0, 2583 SCR_JUMP, 2584 NADDR (jump_tcb), 2585 2586}/*-------------------------< RESEL_DSA >-------------------*/,{ 2587 /* 2588 ** Ack the IDENTIFY or TAG previously received. 2589 */ 2590 SCR_CLR (SCR_ACK), 2591 0, 2592 /* 2593 ** The ncr doesn't have an indirect load 2594 ** or store command. So we have to 2595 ** copy part of the control block to a 2596 ** fixed place, where we can access it. 2597 ** 2598 ** We patch the address part of a 2599 ** COPY command with the DSA-register. 2600 */ 2601 SCR_COPY_F (4), 2602 RADDR (dsa), 2603 PADDR (loadpos1), 2604 /* 2605 ** Flush script prefetch if required 2606 */ 2607 PREFETCH_FLUSH 2608 /* 2609 ** then we do the actual copy. 2610 */ 2611 SCR_COPY (sizeof (struct head)), 2612 /* 2613 ** continued after the next label ... 2614 */ 2615 2616}/*-------------------------< LOADPOS1 >-------------------*/,{ 2617 0, 2618 NADDR (header), 2619 /* 2620 ** The DSA contains the data structure address. 2621 */ 2622 SCR_JUMP, 2623 PADDR (prepare), 2624 2625}/*-------------------------< RESEL_LUN >-------------------*/,{ 2626 /* 2627 ** come back to this point 2628 ** to get an IDENTIFY message 2629 ** Wait for a msg_in phase. 2630 */ 2631 SCR_INT ^ IFFALSE (WHEN (SCR_MSG_IN)), 2632 SIR_RESEL_NO_MSG_IN, 2633 /* 2634 ** message phase. 2635 ** Read the data directly from the BUS DATA lines. 2636 ** This helps to support very old SCSI devices that 2637 ** may reselect without sending an IDENTIFY. 2638 */ 2639 SCR_FROM_REG (sbdl), 2640 0, 2641 /* 2642 ** It should be an Identify message. 2643 */ 2644 SCR_RETURN, 2645 0, 2646}/*-------------------------< RESEL_TAG >-------------------*/,{ 2647 /* 2648 ** Read IDENTIFY + SIMPLE + TAG using a single MOVE. 2649 ** Agressive optimization, is'nt it? 2650 ** No need to test the SIMPLE TAG message, since the 2651 ** driver only supports conformant devices for tags. ;-) 2652 */ 2653 SCR_MOVE_ABS (3) ^ SCR_MSG_IN, 2654 NADDR (msgin), 2655 /* 2656 ** Read the TAG from the SIDL. 2657 ** Still an aggressive optimization. ;-) 2658 ** Compute the CCB indirect jump address which 2659 ** is (#TAG*2 & 0xfc) due to tag numbering using 2660 ** 1,3,5..MAXTAGS*2+1 actual values. 2661 */ 2662 SCR_REG_SFBR (sidl, SCR_SHL, 0), 2663 0, 2664 SCR_SFBR_REG (temp, SCR_AND, 0xfc), 2665 0, 2666}/*-------------------------< JUMP_TO_NEXUS >-------------------*/,{ 2667 SCR_COPY_F (4), 2668 RADDR (temp), 2669 PADDR (nexus_indirect), 2670 /* 2671 ** Flush script prefetch if required 2672 */ 2673 PREFETCH_FLUSH 2674 SCR_COPY (4), 2675}/*-------------------------< NEXUS_INDIRECT >-------------------*/,{ 2676 0, 2677 RADDR (temp), 2678 SCR_RETURN, 2679 0, 2680}/*-------------------------< RESEL_NOTAG >-------------------*/,{ 2681 /* 2682 ** No tag expected. 2683 ** Read an throw away the IDENTIFY. 2684 */ 2685 SCR_MOVE_ABS (1) ^ SCR_MSG_IN, 2686 NADDR (msgin), 2687 SCR_JUMP, 2688 PADDR (jump_to_nexus), 2689}/*-------------------------< DATA_IN >--------------------*/,{ 2690/* 2691** Because the size depends on the 2692** #define MAX_SCATTERL parameter, 2693** it is filled in at runtime. 2694** 2695** ##===========< i=0; i<MAX_SCATTERL >========= 2696** || SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN)), 2697** || PADDR (dispatch), 2698** || SCR_MOVE_TBL ^ SCR_DATA_IN, 2699** || offsetof (struct dsb, data[ i]), 2700** ##========================================== 2701** 2702**--------------------------------------------------------- 2703*/ 27040 2705}/*-------------------------< DATA_IN2 >-------------------*/,{ 2706 SCR_CALL, 2707 PADDR (dispatch), 2708 SCR_JUMP, 2709 PADDR (no_data), 2710}/*-------------------------< DATA_OUT >--------------------*/,{ 2711/* 2712** Because the size depends on the 2713** #define MAX_SCATTERL parameter, 2714** it is filled in at runtime. 2715** 2716** ##===========< i=0; i<MAX_SCATTERL >========= 2717** || SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT)), 2718** || PADDR (dispatch), 2719** || SCR_MOVE_TBL ^ SCR_DATA_OUT, 2720** || offsetof (struct dsb, data[ i]), 2721** ##========================================== 2722** 2723**--------------------------------------------------------- 2724*/ 27250 2726}/*-------------------------< DATA_OUT2 >-------------------*/,{ 2727 SCR_CALL, 2728 PADDR (dispatch), 2729 SCR_JUMP, 2730 PADDR (no_data), 2731}/*--------------------------------------------------------*/ 2732}; 2733 2734static struct scripth scripth0 __initdata = { 2735/*-------------------------< TRYLOOP >---------------------*/{ 2736/* 2737** Start the next entry. 2738** Called addresses point to the launch script in the CCB. 2739** They are patched by the main processor. 2740** 2741** Because the size depends on the 2742** #define MAX_START parameter, it is filled 2743** in at runtime. 2744** 2745**----------------------------------------------------------- 2746** 2747** ##===========< I=0; i<MAX_START >=========== 2748** || SCR_CALL, 2749** || PADDR (idle), 2750** ##========================================== 2751** 2752**----------------------------------------------------------- 2753*/ 27540 2755}/*------------------------< TRYLOOP2 >---------------------*/,{ 2756 SCR_JUMP, 2757 PADDRH(tryloop), 2758 2759#ifdef SCSI_NCR_CCB_DONE_SUPPORT 2760 2761}/*------------------------< DONE_QUEUE >-------------------*/,{ 2762/* 2763** Copy the CCB address to the next done entry. 2764** Because the size depends on the 2765** #define MAX_DONE parameter, it is filled 2766** in at runtime. 2767** 2768**----------------------------------------------------------- 2769** 2770** ##===========< I=0; i<MAX_DONE >=========== 2771** || SCR_COPY (sizeof(struct ccb *), 2772** || NADDR (header.cp), 2773** || NADDR (ccb_done[i]), 2774** || SCR_CALL, 2775** || PADDR (done_end), 2776** ##========================================== 2777** 2778**----------------------------------------------------------- 2779*/ 27800 2781}/*------------------------< DONE_QUEUE2 >------------------*/,{ 2782 SCR_JUMP, 2783 PADDRH (done_queue), 2784 2785#endif /* SCSI_NCR_CCB_DONE_SUPPORT */ 2786}/*------------------------< SELECT_NO_ATN >-----------------*/,{ 2787 /* 2788 ** Set Initiator mode. 2789 ** And try to select this target without ATN. 2790 */ 2791 2792 SCR_CLR (SCR_TRG), 2793 0, 2794 SCR_LOAD_REG (HS_REG, HS_SELECTING), 2795 0, 2796 SCR_SEL_TBL ^ offsetof (struct dsb, select), 2797 PADDR (reselect), 2798 SCR_JUMP, 2799 PADDR (select2), 2800 2801}/*-------------------------< CANCEL >------------------------*/,{ 2802 2803 SCR_LOAD_REG (scratcha, HS_ABORTED), 2804 0, 2805 SCR_JUMPR, 2806 8, 2807}/*-------------------------< SKIP >------------------------*/,{ 2808 SCR_LOAD_REG (scratcha, 0), 2809 0, 2810 /* 2811 ** This entry has been canceled. 2812 ** Next time use the next slot. 2813 */ 2814 SCR_COPY (4), 2815 RADDR (temp), 2816 PADDR (startpos), 2817 /* 2818 ** The ncr doesn't have an indirect load 2819 ** or store command. So we have to 2820 ** copy part of the control block to a 2821 ** fixed place, where we can access it. 2822 ** 2823 ** We patch the address part of a 2824 ** COPY command with the DSA-register. 2825 */ 2826 SCR_COPY_F (4), 2827 RADDR (dsa), 2828 PADDRH (skip2), 2829 /* 2830 ** Flush script prefetch if required 2831 */ 2832 PREFETCH_FLUSH 2833 /* 2834 ** then we do the actual copy. 2835 */ 2836 SCR_COPY (sizeof (struct head)), 2837 /* 2838 ** continued after the next label ... 2839 */ 2840}/*-------------------------< SKIP2 >---------------------*/,{ 2841 0, 2842 NADDR (header), 2843 /* 2844 ** Initialize the status registers 2845 */ 2846 SCR_COPY (4), 2847 NADDR (header.status), 2848 RADDR (scr0), 2849 /* 2850 ** Force host status. 2851 */ 2852 SCR_FROM_REG (scratcha), 2853 0, 2854 SCR_JUMPR ^ IFFALSE (MASK (0, HS_DONEMASK)), 2855 16, 2856 SCR_REG_REG (HS_REG, SCR_OR, HS_SKIPMASK), 2857 0, 2858 SCR_JUMPR, 2859 8, 2860 SCR_TO_REG (HS_REG), 2861 0, 2862 SCR_LOAD_REG (SS_REG, S_GOOD), 2863 0, 2864 SCR_JUMP, 2865 PADDR (cleanup_ok), 2866 2867},/*-------------------------< PAR_ERR_DATA_IN >---------------*/{ 2868 /* 2869 ** Ignore all data in byte, until next phase 2870 */ 2871 SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_IN)), 2872 PADDRH (par_err_other), 2873 SCR_MOVE_ABS (1) ^ SCR_DATA_IN, 2874 NADDR (scratch), 2875 SCR_JUMPR, 2876 -24, 2877},/*-------------------------< PAR_ERR_OTHER >------------------*/{ 2878 /* 2879 ** count it. 2880 */ 2881 SCR_REG_REG (PS_REG, SCR_ADD, 0x01), 2882 0, 2883 /* 2884 ** jump to dispatcher. 2885 */ 2886 SCR_JUMP, 2887 PADDR (dispatch), 2888}/*-------------------------< MSG_REJECT >---------------*/,{ 2889 /* 2890 ** If a negotiation was in progress, 2891 ** negotiation failed. 2892 ** Otherwise, let the C code print 2893 ** some message. 2894 */ 2895 SCR_FROM_REG (HS_REG), 2896 0, 2897 SCR_INT ^ IFFALSE (DATA (HS_NEGOTIATE)), 2898 SIR_REJECT_RECEIVED, 2899 SCR_INT ^ IFTRUE (DATA (HS_NEGOTIATE)), 2900 SIR_NEGO_FAILED, 2901 SCR_JUMP, 2902 PADDR (clrack), 2903 2904}/*-------------------------< MSG_IGN_RESIDUE >----------*/,{ 2905 /* 2906 ** Terminate cycle 2907 */ 2908 SCR_CLR (SCR_ACK), 2909 0, 2910 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)), 2911 PADDR (dispatch), 2912 /* 2913 ** get residue size. 2914 */ 2915 SCR_MOVE_ABS (1) ^ SCR_MSG_IN, 2916 NADDR (msgin[1]), 2917 /* 2918 ** Size is 0 .. ignore message. 2919 */ 2920 SCR_JUMP ^ IFTRUE (DATA (0)), 2921 PADDR (clrack), 2922 /* 2923 ** Size is not 1 .. have to interrupt. 2924 */ 2925 SCR_JUMPR ^ IFFALSE (DATA (1)), 2926 40, 2927 /* 2928 ** Check for residue byte in swide register 2929 */ 2930 SCR_FROM_REG (scntl2), 2931 0, 2932 SCR_JUMPR ^ IFFALSE (MASK (WSR, WSR)), 2933 16, 2934 /* 2935 ** There IS data in the swide register. 2936 ** Discard it. 2937 */ 2938 SCR_REG_REG (scntl2, SCR_OR, WSR), 2939 0, 2940 SCR_JUMP, 2941 PADDR (clrack), 2942 /* 2943 ** Load again the size to the sfbr register. 2944 */ 2945 SCR_FROM_REG (scratcha), 2946 0, 2947 SCR_INT, 2948 SIR_IGN_RESIDUE, 2949 SCR_JUMP, 2950 PADDR (clrack), 2951 2952}/*-------------------------< MSG_EXTENDED >-------------*/,{ 2953 /* 2954 ** Terminate cycle 2955 */ 2956 SCR_CLR (SCR_ACK), 2957 0, 2958 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)), 2959 PADDR (dispatch), 2960 /* 2961 ** get length. 2962 */ 2963 SCR_MOVE_ABS (1) ^ SCR_MSG_IN, 2964 NADDR (msgin[1]), 2965 /* 2966 */ 2967 SCR_JUMP ^ IFTRUE (DATA (3)), 2968 PADDRH (msg_ext_3), 2969 SCR_JUMP ^ IFFALSE (DATA (2)), 2970 PADDR (msg_bad), 2971}/*-------------------------< MSG_EXT_2 >----------------*/,{ 2972 SCR_CLR (SCR_ACK), 2973 0, 2974 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)), 2975 PADDR (dispatch), 2976 /* 2977 ** get extended message code. 2978 */ 2979 SCR_MOVE_ABS (1) ^ SCR_MSG_IN, 2980 NADDR (msgin[2]), 2981 SCR_JUMP ^ IFTRUE (DATA (EXTENDED_WDTR)), 2982 PADDRH (msg_wdtr), 2983 /* 2984 ** unknown extended message 2985 */ 2986 SCR_JUMP, 2987 PADDR (msg_bad) 2988}/*-------------------------< MSG_WDTR >-----------------*/,{ 2989 SCR_CLR (SCR_ACK), 2990 0, 2991 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)), 2992 PADDR (dispatch), 2993 /* 2994 ** get data bus width 2995 */ 2996 SCR_MOVE_ABS (1) ^ SCR_MSG_IN, 2997 NADDR (msgin[3]), 2998 /* 2999 ** let the host do the real work. 3000 */ 3001 SCR_INT, 3002 SIR_NEGO_WIDE, 3003 /* 3004 ** let the target fetch our answer. 3005 */ 3006 SCR_SET (SCR_ATN), 3007 0, 3008 SCR_CLR (SCR_ACK), 3009 0, 3010 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_OUT)), 3011 PADDRH (nego_bad_phase), 3012 3013}/*-------------------------< SEND_WDTR >----------------*/,{ 3014 /* 3015 ** Send the EXTENDED_WDTR 3016 */ 3017 SCR_MOVE_ABS (4) ^ SCR_MSG_OUT, 3018 NADDR (msgout), 3019 SCR_COPY (1), 3020 NADDR (msgout), 3021 NADDR (lastmsg), 3022 SCR_JUMP, 3023 PADDR (msg_out_done), 3024 3025}/*-------------------------< MSG_EXT_3 >----------------*/,{ 3026 SCR_CLR (SCR_ACK), 3027 0, 3028 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)), 3029 PADDR (dispatch), 3030 /* 3031 ** get extended message code. 3032 */ 3033 SCR_MOVE_ABS (1) ^ SCR_MSG_IN, 3034 NADDR (msgin[2]), 3035 SCR_JUMP ^ IFTRUE (DATA (EXTENDED_SDTR)), 3036 PADDRH (msg_sdtr), 3037 /* 3038 ** unknown extended message 3039 */ 3040 SCR_JUMP, 3041 PADDR (msg_bad) 3042 3043}/*-------------------------< MSG_SDTR >-----------------*/,{ 3044 SCR_CLR (SCR_ACK), 3045 0, 3046 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)), 3047 PADDR (dispatch), 3048 /* 3049 ** get period and offset 3050 */ 3051 SCR_MOVE_ABS (2) ^ SCR_MSG_IN, 3052 NADDR (msgin[3]), 3053 /* 3054 ** let the host do the real work. 3055 */ 3056 SCR_INT, 3057 SIR_NEGO_SYNC, 3058 /* 3059 ** let the target fetch our answer. 3060 */ 3061 SCR_SET (SCR_ATN), 3062 0, 3063 SCR_CLR (SCR_ACK), 3064 0, 3065 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_OUT)), 3066 PADDRH (nego_bad_phase), 3067 3068}/*-------------------------< SEND_SDTR >-------------*/,{ 3069 /* 3070 ** Send the EXTENDED_SDTR 3071 */ 3072 SCR_MOVE_ABS (5) ^ SCR_MSG_OUT, 3073 NADDR (msgout), 3074 SCR_COPY (1), 3075 NADDR (msgout), 3076 NADDR (lastmsg), 3077 SCR_JUMP, 3078 PADDR (msg_out_done), 3079 3080}/*-------------------------< NEGO_BAD_PHASE >------------*/,{ 3081 SCR_INT, 3082 SIR_NEGO_PROTO, 3083 SCR_JUMP, 3084 PADDR (dispatch), 3085 3086}/*-------------------------< MSG_OUT_ABORT >-------------*/,{ 3087 /* 3088 ** After ABORT message, 3089 ** 3090 ** expect an immediate disconnect, ... 3091 */ 3092 SCR_REG_REG (scntl2, SCR_AND, 0x7f), 3093 0, 3094 SCR_CLR (SCR_ACK|SCR_ATN), 3095 0, 3096 SCR_WAIT_DISC, 3097 0, 3098 /* 3099 ** ... and set the status to "ABORTED" 3100 */ 3101 SCR_LOAD_REG (HS_REG, HS_ABORTED), 3102 0, 3103 SCR_JUMP, 3104 PADDR (cleanup), 3105 3106}/*-------------------------< HDATA_IN >-------------------*/,{ 3107/* 3108** Because the size depends on the 3109** #define MAX_SCATTERH parameter, 3110** it is filled in at runtime. 3111** 3112** ##==< i=MAX_SCATTERL; i<MAX_SCATTERL+MAX_SCATTERH >== 3113** || SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN)), 3114** || PADDR (dispatch), 3115** || SCR_MOVE_TBL ^ SCR_DATA_IN, 3116** || offsetof (struct dsb, data[ i]), 3117** ##=================================================== 3118** 3119**--------------------------------------------------------- 3120*/ 31210 3122}/*-------------------------< HDATA_IN2 >------------------*/,{ 3123 SCR_JUMP, 3124 PADDR (data_in), 3125 3126}/*-------------------------< HDATA_OUT >-------------------*/,{ 3127/* 3128** Because the size depends on the 3129** #define MAX_SCATTERH parameter, 3130** it is filled in at runtime. 3131** 3132** ##==< i=MAX_SCATTERL; i<MAX_SCATTERL+MAX_SCATTERH >== 3133** || SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT)), 3134** || PADDR (dispatch), 3135** || SCR_MOVE_TBL ^ SCR_DATA_OUT, 3136** || offsetof (struct dsb, data[ i]), 3137** ##=================================================== 3138** 3139**--------------------------------------------------------- 3140*/ 31410 3142}/*-------------------------< HDATA_OUT2 >------------------*/,{ 3143 SCR_JUMP, 3144 PADDR (data_out), 3145 3146}/*-------------------------< RESET >----------------------*/,{ 3147 /* 3148 ** Send a TARGET_RESET message if bad IDENTIFY 3149 ** received on reselection. 3150 */ 3151 SCR_LOAD_REG (scratcha, ABORT_TASK), 3152 0, 3153 SCR_JUMP, 3154 PADDRH (abort_resel), 3155}/*-------------------------< ABORTTAG >-------------------*/,{ 3156 /* 3157 ** Abort a wrong tag received on reselection. 3158 */ 3159 SCR_LOAD_REG (scratcha, ABORT_TASK), 3160 0, 3161 SCR_JUMP, 3162 PADDRH (abort_resel), 3163}/*-------------------------< ABORT >----------------------*/,{ 3164 /* 3165 ** Abort a reselection when no active CCB. 3166 */ 3167 SCR_LOAD_REG (scratcha, ABORT_TASK_SET), 3168 0, 3169}/*-------------------------< ABORT_RESEL >----------------*/,{ 3170 SCR_COPY (1), 3171 RADDR (scratcha), 3172 NADDR (msgout), 3173 SCR_SET (SCR_ATN), 3174 0, 3175 SCR_CLR (SCR_ACK), 3176 0, 3177 /* 3178 ** and send it. 3179 ** we expect an immediate disconnect 3180 */ 3181 SCR_REG_REG (scntl2, SCR_AND, 0x7f), 3182 0, 3183 SCR_MOVE_ABS (1) ^ SCR_MSG_OUT, 3184 NADDR (msgout), 3185 SCR_COPY (1), 3186 NADDR (msgout), 3187 NADDR (lastmsg), 3188 SCR_CLR (SCR_ACK|SCR_ATN), 3189 0, 3190 SCR_WAIT_DISC, 3191 0, 3192 SCR_JUMP, 3193 PADDR (start), 3194}/*-------------------------< RESEND_IDENT >-------------------*/,{ 3195 /* 3196 ** The target stays in MSG OUT phase after having acked 3197 ** Identify [+ Tag [+ Extended message ]]. Targets shall 3198 ** behave this way on parity error. 3199 ** We must send it again all the messages. 3200 */ 3201 SCR_SET (SCR_ATN), /* Shall be asserted 2 deskew delays before the */ 3202 0, /* 1rst ACK = 90 ns. Hope the NCR is'nt too fast */ 3203 SCR_JUMP, 3204 PADDR (send_ident), 3205}/*-------------------------< CLRATN_GO_ON >-------------------*/,{ 3206 SCR_CLR (SCR_ATN), 3207 0, 3208 SCR_JUMP, 3209}/*-------------------------< NXTDSP_GO_ON >-------------------*/,{ 3210 0, 3211}/*-------------------------< SDATA_IN >-------------------*/,{ 3212 SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN)), 3213 PADDR (dispatch), 3214 SCR_MOVE_TBL ^ SCR_DATA_IN, 3215 offsetof (struct dsb, sense), 3216 SCR_CALL, 3217 PADDR (dispatch), 3218 SCR_JUMP, 3219 PADDR (no_data), 3220}/*-------------------------< DATA_IO >--------------------*/,{ 3221 /* 3222 ** We jump here if the data direction was unknown at the 3223 ** time we had to queue the command to the scripts processor. 3224 ** Pointers had been set as follow in this situation: 3225 ** savep --> DATA_IO 3226 ** lastp --> start pointer when DATA_IN 3227 ** goalp --> goal pointer when DATA_IN 3228 ** wlastp --> start pointer when DATA_OUT 3229 ** wgoalp --> goal pointer when DATA_OUT 3230 ** This script sets savep/lastp/goalp according to the 3231 ** direction chosen by the target. 3232 */ 3233 SCR_JUMPR ^ IFTRUE (WHEN (SCR_DATA_OUT)), 3234 32, 3235 /* 3236 ** Direction is DATA IN. 3237 ** Warning: we jump here, even when phase is DATA OUT. 3238 */ 3239 SCR_COPY (4), 3240 NADDR (header.lastp), 3241 NADDR (header.savep), 3242 3243 /* 3244 ** Jump to the SCRIPTS according to actual direction. 3245 */ 3246 SCR_COPY (4), 3247 NADDR (header.savep), 3248 RADDR (temp), 3249 SCR_RETURN, 3250 0, 3251 /* 3252 ** Direction is DATA OUT. 3253 */ 3254 SCR_COPY (4), 3255 NADDR (header.wlastp), 3256 NADDR (header.lastp), 3257 SCR_COPY (4), 3258 NADDR (header.wgoalp), 3259 NADDR (header.goalp), 3260 SCR_JUMPR, 3261 -64, 3262}/*-------------------------< BAD_IDENTIFY >---------------*/,{ 3263 /* 3264 ** If message phase but not an IDENTIFY, 3265 ** get some help from the C code. 3266 ** Old SCSI device may behave so. 3267 */ 3268 SCR_JUMPR ^ IFTRUE (MASK (0x80, 0x80)), 3269 16, 3270 SCR_INT, 3271 SIR_RESEL_NO_IDENTIFY, 3272 SCR_JUMP, 3273 PADDRH (reset), 3274 /* 3275 ** Message is an IDENTIFY, but lun is unknown. 3276 ** Read the message, since we got it directly 3277 ** from the SCSI BUS data lines. 3278 ** Signal problem to C code for logging the event. 3279 ** Send an ABORT_TASK_SET to clear all pending tasks. 3280 */ 3281 SCR_INT, 3282 SIR_RESEL_BAD_LUN, 3283 SCR_MOVE_ABS (1) ^ SCR_MSG_IN, 3284 NADDR (msgin), 3285 SCR_JUMP, 3286 PADDRH (abort), 3287}/*-------------------------< BAD_I_T_L >------------------*/,{ 3288 /* 3289 ** We donnot have a task for that I_T_L. 3290 ** Signal problem to C code for logging the event. 3291 ** Send an ABORT_TASK_SET message. 3292 */ 3293 SCR_INT, 3294 SIR_RESEL_BAD_I_T_L, 3295 SCR_JUMP, 3296 PADDRH (abort), 3297}/*-------------------------< BAD_I_T_L_Q >----------------*/,{ 3298 /* 3299 ** We donnot have a task that matches the tag. 3300 ** Signal problem to C code for logging the event. 3301 ** Send an ABORT_TASK message. 3302 */ 3303 SCR_INT, 3304 SIR_RESEL_BAD_I_T_L_Q, 3305 SCR_JUMP, 3306 PADDRH (aborttag), 3307}/*-------------------------< BAD_TARGET >-----------------*/,{ 3308 /* 3309 ** We donnot know the target that reselected us. 3310 ** Grab the first message if any (IDENTIFY). 3311 ** Signal problem to C code for logging the event. 3312 ** TARGET_RESET message. 3313 */ 3314 SCR_INT, 3315 SIR_RESEL_BAD_TARGET, 3316 SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_IN)), 3317 8, 3318 SCR_MOVE_ABS (1) ^ SCR_MSG_IN, 3319 NADDR (msgin), 3320 SCR_JUMP, 3321 PADDRH (reset), 3322}/*-------------------------< BAD_STATUS >-----------------*/,{ 3323 /* 3324 ** If command resulted in either QUEUE FULL, 3325 ** CHECK CONDITION or COMMAND TERMINATED, 3326 ** call the C code. 3327 */ 3328 SCR_INT ^ IFTRUE (DATA (S_QUEUE_FULL)), 3329 SIR_BAD_STATUS, 3330 SCR_INT ^ IFTRUE (DATA (S_CHECK_COND)), 3331 SIR_BAD_STATUS, 3332 SCR_INT ^ IFTRUE (DATA (S_TERMINATED)), 3333 SIR_BAD_STATUS, 3334 SCR_RETURN, 3335 0, 3336}/*-------------------------< START_RAM >-------------------*/,{ 3337 /* 3338 ** Load the script into on-chip RAM, 3339 ** and jump to start point. 3340 */ 3341 SCR_COPY_F (4), 3342 RADDR (scratcha), 3343 PADDRH (start_ram0), 3344 /* 3345 ** Flush script prefetch if required 3346 */ 3347 PREFETCH_FLUSH 3348 SCR_COPY (sizeof (struct script)), 3349}/*-------------------------< START_RAM0 >--------------------*/,{ 3350 0, 3351 PADDR (start), 3352 SCR_JUMP, 3353 PADDR (start), 3354}/*-------------------------< STO_RESTART >-------------------*/,{ 3355 /* 3356 ** 3357 ** Repair start queue (e.g. next time use the next slot) 3358 ** and jump to start point. 3359 */ 3360 SCR_COPY (4), 3361 RADDR (temp), 3362 PADDR (startpos), 3363 SCR_JUMP, 3364 PADDR (start), 3365}/*-------------------------< WAIT_DMA >-------------------*/,{ 3366 /* 3367 ** For HP Zalon/53c720 systems, the Zalon interface 3368 ** between CPU and 53c720 does prefetches, which causes 3369 ** problems with self modifying scripts. The problem 3370 ** is overcome by calling a dummy subroutine after each 3371 ** modification, to force a refetch of the script on 3372 ** return from the subroutine. 3373 */ 3374 SCR_RETURN, 3375 0, 3376}/*-------------------------< SNOOPTEST >-------------------*/,{ 3377 /* 3378 ** Read the variable. 3379 */ 3380 SCR_COPY (4), 3381 NADDR(ncr_cache), 3382 RADDR (scratcha), 3383 /* 3384 ** Write the variable. 3385 */ 3386 SCR_COPY (4), 3387 RADDR (temp), 3388 NADDR(ncr_cache), 3389 /* 3390 ** Read back the variable. 3391 */ 3392 SCR_COPY (4), 3393 NADDR(ncr_cache), 3394 RADDR (temp), 3395}/*-------------------------< SNOOPEND >-------------------*/,{ 3396 /* 3397 ** And stop. 3398 */ 3399 SCR_INT, 3400 99, 3401}/*--------------------------------------------------------*/ 3402}; 3403 3404/*========================================================== 3405** 3406** 3407** Fill in #define dependent parts of the script 3408** 3409** 3410**========================================================== 3411*/ 3412 3413void __init ncr_script_fill (struct script * scr, struct scripth * scrh) 3414{ 3415 int i; 3416 ncrcmd *p; 3417 3418 p = scrh->tryloop; 3419 for (i=0; i<MAX_START; i++) { 3420 *p++ =SCR_CALL; 3421 *p++ =PADDR (idle); 3422 } 3423 3424 BUG_ON((u_long)p != (u_long)&scrh->tryloop + sizeof (scrh->tryloop)); 3425 3426#ifdef SCSI_NCR_CCB_DONE_SUPPORT 3427 3428 p = scrh->done_queue; 3429 for (i = 0; i<MAX_DONE; i++) { 3430 *p++ =SCR_COPY (sizeof(struct ccb *)); 3431 *p++ =NADDR (header.cp); 3432 *p++ =NADDR (ccb_done[i]); 3433 *p++ =SCR_CALL; 3434 *p++ =PADDR (done_end); 3435 } 3436 3437 BUG_ON((u_long)p != (u_long)&scrh->done_queue+sizeof(scrh->done_queue)); 3438 3439#endif /* SCSI_NCR_CCB_DONE_SUPPORT */ 3440 3441 p = scrh->hdata_in; 3442 for (i=0; i<MAX_SCATTERH; i++) { 3443 *p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN)); 3444 *p++ =PADDR (dispatch); 3445 *p++ =SCR_MOVE_TBL ^ SCR_DATA_IN; 3446 *p++ =offsetof (struct dsb, data[i]); 3447 } 3448 3449 BUG_ON((u_long)p != (u_long)&scrh->hdata_in + sizeof (scrh->hdata_in)); 3450 3451 p = scr->data_in; 3452 for (i=MAX_SCATTERH; i<MAX_SCATTERH+MAX_SCATTERL; i++) { 3453 *p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN)); 3454 *p++ =PADDR (dispatch); 3455 *p++ =SCR_MOVE_TBL ^ SCR_DATA_IN; 3456 *p++ =offsetof (struct dsb, data[i]); 3457 } 3458 3459 BUG_ON((u_long)p != (u_long)&scr->data_in + sizeof (scr->data_in)); 3460 3461 p = scrh->hdata_out; 3462 for (i=0; i<MAX_SCATTERH; i++) { 3463 *p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT)); 3464 *p++ =PADDR (dispatch); 3465 *p++ =SCR_MOVE_TBL ^ SCR_DATA_OUT; 3466 *p++ =offsetof (struct dsb, data[i]); 3467 } 3468 3469 BUG_ON((u_long)p != (u_long)&scrh->hdata_out + sizeof (scrh->hdata_out)); 3470 3471 p = scr->data_out; 3472 for (i=MAX_SCATTERH; i<MAX_SCATTERH+MAX_SCATTERL; i++) { 3473 *p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT)); 3474 *p++ =PADDR (dispatch); 3475 *p++ =SCR_MOVE_TBL ^ SCR_DATA_OUT; 3476 *p++ =offsetof (struct dsb, data[i]); 3477 } 3478 3479 BUG_ON((u_long) p != (u_long)&scr->data_out + sizeof (scr->data_out)); 3480} 3481 3482/*========================================================== 3483** 3484** 3485** Copy and rebind a script. 3486** 3487** 3488**========================================================== 3489*/ 3490 3491static void __init 3492ncr_script_copy_and_bind (struct ncb *np, ncrcmd *src, ncrcmd *dst, int len) 3493{ 3494 ncrcmd opcode, new, old, tmp1, tmp2; 3495 ncrcmd *start, *end; 3496 int relocs; 3497 int opchanged = 0; 3498 3499 start = src; 3500 end = src + len/4; 3501 3502 while (src < end) { 3503 3504 opcode = *src++; 3505 *dst++ = cpu_to_scr(opcode); 3506 3507 /* 3508 ** If we forget to change the length 3509 ** in struct script, a field will be 3510 ** padded with 0. This is an illegal 3511 ** command. 3512 */ 3513 3514 if (opcode == 0) { 3515 printk (KERN_ERR "%s: ERROR0 IN SCRIPT at %d.\n", 3516 ncr_name(np), (int) (src-start-1)); 3517 mdelay(1000); 3518 } 3519 3520 if (DEBUG_FLAGS & DEBUG_SCRIPT) 3521 printk (KERN_DEBUG "%p: <%x>\n", 3522 (src-1), (unsigned)opcode); 3523 3524 /* 3525 ** We don't have to decode ALL commands 3526 */ 3527 switch (opcode >> 28) { 3528 3529 case 0xc: 3530 /* 3531 ** COPY has TWO arguments. 3532 */ 3533 relocs = 2; 3534 tmp1 = src[0]; 3535#ifdef RELOC_KVAR 3536 if ((tmp1 & RELOC_MASK) == RELOC_KVAR) 3537 tmp1 = 0; 3538#endif 3539 tmp2 = src[1]; 3540#ifdef RELOC_KVAR 3541 if ((tmp2 & RELOC_MASK) == RELOC_KVAR) 3542 tmp2 = 0; 3543#endif 3544 if ((tmp1 ^ tmp2) & 3) { 3545 printk (KERN_ERR"%s: ERROR1 IN SCRIPT at %d.\n", 3546 ncr_name(np), (int) (src-start-1)); 3547 mdelay(1000); 3548 } 3549 /* 3550 ** If PREFETCH feature not enabled, remove 3551 ** the NO FLUSH bit if present. 3552 */ 3553 if ((opcode & SCR_NO_FLUSH) && !(np->features & FE_PFEN)) { 3554 dst[-1] = cpu_to_scr(opcode & ~SCR_NO_FLUSH); 3555 ++opchanged; 3556 } 3557 break; 3558 3559 case 0x0: 3560 /* 3561 ** MOVE (absolute address) 3562 */ 3563 relocs = 1; 3564 break; 3565 3566 case 0x8: 3567 /* 3568 ** JUMP / CALL 3569 ** don't relocate if relative :-) 3570 */ 3571 if (opcode & 0x00800000) 3572 relocs = 0; 3573 else 3574 relocs = 1; 3575 break; 3576 3577 case 0x4: 3578 case 0x5: 3579 case 0x6: 3580 case 0x7: 3581 relocs = 1; 3582 break; 3583 3584 default: 3585 relocs = 0; 3586 break; 3587 } 3588 3589 if (relocs) { 3590 while (relocs--) { 3591 old = *src++; 3592 3593 switch (old & RELOC_MASK) { 3594 case RELOC_REGISTER: 3595 new = (old & ~RELOC_MASK) + np->paddr; 3596 break; 3597 case RELOC_LABEL: 3598 new = (old & ~RELOC_MASK) + np->p_script; 3599 break; 3600 case RELOC_LABELH: 3601 new = (old & ~RELOC_MASK) + np->p_scripth; 3602 break; 3603 case RELOC_SOFTC: 3604 new = (old & ~RELOC_MASK) + np->p_ncb; 3605 break; 3606#ifdef RELOC_KVAR 3607 case RELOC_KVAR: 3608 if (((old & ~RELOC_MASK) < 3609 SCRIPT_KVAR_FIRST) || 3610 ((old & ~RELOC_MASK) > 3611 SCRIPT_KVAR_LAST)) 3612 panic("ncr KVAR out of range"); 3613 new = vtophys(script_kvars[old & 3614 ~RELOC_MASK]); 3615 break; 3616#endif 3617 case 0: 3618 /* Don't relocate a 0 address. */ 3619 if (old == 0) { 3620 new = old; 3621 break; 3622 } 3623 /* fall through */ 3624 default: 3625 panic("ncr_script_copy_and_bind: weird relocation %x\n", old); 3626 break; 3627 } 3628 3629 *dst++ = cpu_to_scr(new); 3630 } 3631 } else 3632 *dst++ = cpu_to_scr(*src++); 3633 3634 } 3635} 3636 3637/* 3638** Linux host data structure 3639*/ 3640 3641struct host_data { 3642 struct ncb *ncb; 3643}; 3644 3645#define PRINT_ADDR(cmd, arg...) dev_info(&cmd->device->sdev_gendev , ## arg) 3646 3647static void ncr_print_msg(struct ccb *cp, char *label, u_char *msg) 3648{ 3649 PRINT_ADDR(cp->cmd, "%s: ", label); 3650 3651 spi_print_msg(msg); 3652 printk("\n"); 3653} 3654 3655/*========================================================== 3656** 3657** NCR chip clock divisor table. 3658** Divisors are multiplied by 10,000,000 in order to make 3659** calculations more simple. 3660** 3661**========================================================== 3662*/ 3663 3664#define _5M 5000000 3665static u_long div_10M[] = 3666 {2*_5M, 3*_5M, 4*_5M, 6*_5M, 8*_5M, 12*_5M, 16*_5M}; 3667 3668 3669/*=============================================================== 3670** 3671** Prepare io register values used by ncr_init() according 3672** to selected and supported features. 3673** 3674** NCR chips allow burst lengths of 2, 4, 8, 16, 32, 64, 128 3675** transfers. 32,64,128 are only supported by 875 and 895 chips. 3676** We use log base 2 (burst length) as internal code, with 3677** value 0 meaning "burst disabled". 3678** 3679**=============================================================== 3680*/ 3681 3682/* 3683 * Burst length from burst code. 3684 */ 3685#define burst_length(bc) (!(bc))? 0 : 1 << (bc) 3686 3687/* 3688 * Burst code from io register bits. Burst enable is ctest0 for c720 3689 */ 3690#define burst_code(dmode, ctest0) \ 3691 (ctest0) & 0x80 ? 0 : (((dmode) & 0xc0) >> 6) + 1 3692 3693/* 3694 * Set initial io register bits from burst code. 3695 */ 3696static inline void ncr_init_burst(struct ncb *np, u_char bc) 3697{ 3698 u_char *be = &np->rv_ctest0; 3699 *be &= ~0x80; 3700 np->rv_dmode &= ~(0x3 << 6); 3701 np->rv_ctest5 &= ~0x4; 3702 3703 if (!bc) { 3704 *be |= 0x80; 3705 } else { 3706 --bc; 3707 np->rv_dmode |= ((bc & 0x3) << 6); 3708 np->rv_ctest5 |= (bc & 0x4); 3709 } 3710} 3711 3712static void __init ncr_prepare_setting(struct ncb *np) 3713{ 3714 u_char burst_max; 3715 u_long period; 3716 int i; 3717 3718 /* 3719 ** Save assumed BIOS setting 3720 */ 3721 3722 np->sv_scntl0 = INB(nc_scntl0) & 0x0a; 3723 np->sv_scntl3 = INB(nc_scntl3) & 0x07; 3724 np->sv_dmode = INB(nc_dmode) & 0xce; 3725 np->sv_dcntl = INB(nc_dcntl) & 0xa8; 3726 np->sv_ctest0 = INB(nc_ctest0) & 0x84; 3727 np->sv_ctest3 = INB(nc_ctest3) & 0x01; 3728 np->sv_ctest4 = INB(nc_ctest4) & 0x80; 3729 np->sv_ctest5 = INB(nc_ctest5) & 0x24; 3730 np->sv_gpcntl = INB(nc_gpcntl); 3731 np->sv_stest2 = INB(nc_stest2) & 0x20; 3732 np->sv_stest4 = INB(nc_stest4); 3733 3734 /* 3735 ** Wide ? 3736 */ 3737 3738 np->maxwide = (np->features & FE_WIDE)? 1 : 0; 3739 3740 /* 3741 * Guess the frequency of the chip's clock. 3742 */ 3743 if (np->features & FE_ULTRA) 3744 np->clock_khz = 80000; 3745 else 3746 np->clock_khz = 40000; 3747 3748 /* 3749 * Get the clock multiplier factor. 3750 */ 3751 if (np->features & FE_QUAD) 3752 np->multiplier = 4; 3753 else if (np->features & FE_DBLR) 3754 np->multiplier = 2; 3755 else 3756 np->multiplier = 1; 3757 3758 /* 3759 * Measure SCSI clock frequency for chips 3760 * it may vary from assumed one. 3761 */ 3762 if (np->features & FE_VARCLK) 3763 ncr_getclock(np, np->multiplier); 3764 3765 /* 3766 * Divisor to be used for async (timer pre-scaler). 3767 */ 3768 i = np->clock_divn - 1; 3769 while (--i >= 0) { 3770 if (10ul * SCSI_NCR_MIN_ASYNC * np->clock_khz > div_10M[i]) { 3771 ++i; 3772 break; 3773 } 3774 } 3775 np->rv_scntl3 = i+1; 3776 3777 /* 3778 * Minimum synchronous period factor supported by the chip. 3779 * Btw, 'period' is in tenths of nanoseconds. 3780 */ 3781 3782 period = (4 * div_10M[0] + np->clock_khz - 1) / np->clock_khz; 3783 if (period <= 250) np->minsync = 10; 3784 else if (period <= 303) np->minsync = 11; 3785 else if (period <= 500) np->minsync = 12; 3786 else np->minsync = (period + 40 - 1) / 40; 3787 3788 /* 3789 * Check against chip SCSI standard support (SCSI-2,ULTRA,ULTRA2). 3790 */ 3791 3792 if (np->minsync < 25 && !(np->features & FE_ULTRA)) 3793 np->minsync = 25; 3794 3795 /* 3796 * Maximum synchronous period factor supported by the chip. 3797 */ 3798 3799 period = (11 * div_10M[np->clock_divn - 1]) / (4 * np->clock_khz); 3800 np->maxsync = period > 2540 ? 254 : period / 10; 3801 3802 /* 3803 ** Prepare initial value of other IO registers 3804 */ 3805#if defined SCSI_NCR_TRUST_BIOS_SETTING 3806 np->rv_scntl0 = np->sv_scntl0; 3807 np->rv_dmode = np->sv_dmode; 3808 np->rv_dcntl = np->sv_dcntl; 3809 np->rv_ctest0 = np->sv_ctest0; 3810 np->rv_ctest3 = np->sv_ctest3; 3811 np->rv_ctest4 = np->sv_ctest4; 3812 np->rv_ctest5 = np->sv_ctest5; 3813 burst_max = burst_code(np->sv_dmode, np->sv_ctest0); 3814#else 3815 3816 /* 3817 ** Select burst length (dwords) 3818 */ 3819 burst_max = driver_setup.burst_max; 3820 if (burst_max == 255) 3821 burst_max = burst_code(np->sv_dmode, np->sv_ctest0); 3822 if (burst_max > 7) 3823 burst_max = 7; 3824 if (burst_max > np->maxburst) 3825 burst_max = np->maxburst; 3826 3827 /* 3828 ** Select all supported special features 3829 */ 3830 if (np->features & FE_ERL) 3831 np->rv_dmode |= ERL; /* Enable Read Line */ 3832 if (np->features & FE_BOF) 3833 np->rv_dmode |= BOF; /* Burst Opcode Fetch */ 3834 if (np->features & FE_ERMP) 3835 np->rv_dmode |= ERMP; /* Enable Read Multiple */ 3836 if (np->features & FE_PFEN) 3837 np->rv_dcntl |= PFEN; /* Prefetch Enable */ 3838 if (np->features & FE_CLSE) 3839 np->rv_dcntl |= CLSE; /* Cache Line Size Enable */ 3840 if (np->features & FE_WRIE) 3841 np->rv_ctest3 |= WRIE; /* Write and Invalidate */ 3842 if (np->features & FE_DFS) 3843 np->rv_ctest5 |= DFS; /* Dma Fifo Size */ 3844 if (np->features & FE_MUX) 3845 np->rv_ctest4 |= MUX; /* Host bus multiplex mode */ 3846 if (np->features & FE_EA) 3847 np->rv_dcntl |= EA; /* Enable ACK */ 3848 if (np->features & FE_EHP) 3849 np->rv_ctest0 |= EHP; /* Even host parity */ 3850 3851 /* 3852 ** Select some other 3853 */ 3854 if (driver_setup.master_parity) 3855 np->rv_ctest4 |= MPEE; /* Master parity checking */ 3856 if (driver_setup.scsi_parity) 3857 np->rv_scntl0 |= 0x0a; /* full arb., ena parity, par->ATN */ 3858 3859 /* 3860 ** Get SCSI addr of host adapter (set by bios?). 3861 */ 3862 if (np->myaddr == 255) { 3863 np->myaddr = INB(nc_scid) & 0x07; 3864 if (!np->myaddr) 3865 np->myaddr = SCSI_NCR_MYADDR; 3866 } 3867 3868#endif /* SCSI_NCR_TRUST_BIOS_SETTING */ 3869 3870 /* 3871 * Prepare initial io register bits for burst length 3872 */ 3873 ncr_init_burst(np, burst_max); 3874 3875 /* 3876 ** Set SCSI BUS mode. 3877 ** 3878 ** - ULTRA2 chips (895/895A/896) report the current 3879 ** BUS mode through the STEST4 IO register. 3880 ** - For previous generation chips (825/825A/875), 3881 ** user has to tell us how to check against HVD, 3882 ** since a 100% safe algorithm is not possible. 3883 */ 3884 np->scsi_mode = SMODE_SE; 3885 if (np->features & FE_DIFF) { 3886 switch(driver_setup.diff_support) { 3887 case 4: /* Trust previous settings if present, then GPIO3 */ 3888 if (np->sv_scntl3) { 3889 if (np->sv_stest2 & 0x20) 3890 np->scsi_mode = SMODE_HVD; 3891 break; 3892 } 3893 case 3: /* SYMBIOS controllers report HVD through GPIO3 */ 3894 if (INB(nc_gpreg) & 0x08) 3895 break; 3896 case 2: /* Set HVD unconditionally */ 3897 np->scsi_mode = SMODE_HVD; 3898 case 1: /* Trust previous settings for HVD */ 3899 if (np->sv_stest2 & 0x20) 3900 np->scsi_mode = SMODE_HVD; 3901 break; 3902 default:/* Don't care about HVD */ 3903 break; 3904 } 3905 } 3906 if (np->scsi_mode == SMODE_HVD) 3907 np->rv_stest2 |= 0x20; 3908 3909 /* 3910 ** Set LED support from SCRIPTS. 3911 ** Ignore this feature for boards known to use a 3912 ** specific GPIO wiring and for the 895A or 896 3913 ** that drive the LED directly. 3914 ** Also probe initial setting of GPIO0 as output. 3915 */ 3916 if ((driver_setup.led_pin) && 3917 !(np->features & FE_LEDC) && !(np->sv_gpcntl & 0x01)) 3918 np->features |= FE_LED0; 3919 3920 /* 3921 ** Set irq mode. 3922 */ 3923 switch(driver_setup.irqm & 3) { 3924 case 2: 3925 np->rv_dcntl |= IRQM; 3926 break; 3927 case 1: 3928 np->rv_dcntl |= (np->sv_dcntl & IRQM); 3929 break; 3930 default: 3931 break; 3932 } 3933 3934 /* 3935 ** Configure targets according to driver setup. 3936 ** Allow to override sync, wide and NOSCAN from 3937 ** boot command line. 3938 */ 3939 for (i = 0 ; i < MAX_TARGET ; i++) { 3940 struct tcb *tp = &np->target[i]; 3941 3942 tp->usrsync = driver_setup.default_sync; 3943 tp->usrwide = driver_setup.max_wide; 3944 tp->usrtags = MAX_TAGS; 3945 tp->period = 0xffff; 3946 if (!driver_setup.disconnection) 3947 np->target[i].usrflag = UF_NODISC; 3948 } 3949 3950 /* 3951 ** Announce all that stuff to user. 3952 */ 3953 3954 printk(KERN_INFO "%s: ID %d, Fast-%d%s%s\n", ncr_name(np), 3955 np->myaddr, 3956 np->minsync < 12 ? 40 : (np->minsync < 25 ? 20 : 10), 3957 (np->rv_scntl0 & 0xa) ? ", Parity Checking" : ", NO Parity", 3958 (np->rv_stest2 & 0x20) ? ", Differential" : ""); 3959 3960 if (bootverbose > 1) { 3961 printk (KERN_INFO "%s: initial SCNTL3/DMODE/DCNTL/CTEST3/4/5 = " 3962 "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n", 3963 ncr_name(np), np->sv_scntl3, np->sv_dmode, np->sv_dcntl, 3964 np->sv_ctest3, np->sv_ctest4, np->sv_ctest5); 3965 3966 printk (KERN_INFO "%s: final SCNTL3/DMODE/DCNTL/CTEST3/4/5 = " 3967 "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n", 3968 ncr_name(np), np->rv_scntl3, np->rv_dmode, np->rv_dcntl, 3969 np->rv_ctest3, np->rv_ctest4, np->rv_ctest5); 3970 } 3971 3972 if (bootverbose && np->paddr2) 3973 printk (KERN_INFO "%s: on-chip RAM at 0x%lx\n", 3974 ncr_name(np), np->paddr2); 3975} 3976 3977/*========================================================== 3978** 3979** 3980** Done SCSI commands list management. 3981** 3982** We donnot enter the scsi_done() callback immediately 3983** after a command has been seen as completed but we 3984** insert it into a list which is flushed outside any kind 3985** of driver critical section. 3986** This allows to do minimal stuff under interrupt and 3987** inside critical sections and to also avoid locking up 3988** on recursive calls to driver entry points under SMP. 3989** In fact, the only kernel point which is entered by the 3990** driver with a driver lock set is kmalloc(GFP_ATOMIC) 3991** that shall not reenter the driver under any circumstances, 3992** AFAIK. 3993** 3994**========================================================== 3995*/ 3996static inline void ncr_queue_done_cmd(struct ncb *np, struct scsi_cmnd *cmd) 3997{ 3998 unmap_scsi_data(np, cmd); 3999 cmd->host_scribble = (char *) np->done_list; 4000 np->done_list = cmd; 4001} 4002 4003static inline void ncr_flush_done_cmds(struct scsi_cmnd *lcmd) 4004{ 4005 struct scsi_cmnd *cmd; 4006 4007 while (lcmd) { 4008 cmd = lcmd; 4009 lcmd = (struct scsi_cmnd *) cmd->host_scribble; 4010 cmd->scsi_done(cmd); 4011 } 4012} 4013 4014/*========================================================== 4015** 4016** 4017** Prepare the next negotiation message if needed. 4018** 4019** Fill in the part of message buffer that contains the 4020** negotiation and the nego_status field of the CCB. 4021** Returns the size of the message in bytes. 4022** 4023** 4024**========================================================== 4025*/ 4026 4027 4028static int ncr_prepare_nego(struct ncb *np, struct ccb *cp, u_char *msgptr) 4029{ 4030 struct tcb *tp = &np->target[cp->target]; 4031 int msglen = 0; 4032 int nego = 0; 4033 struct scsi_target *starget = tp->starget; 4034 4035 /* negotiate wide transfers ? */ 4036 if (!tp->widedone) { 4037 if (spi_support_wide(starget)) { 4038 nego = NS_WIDE; 4039 } else 4040 tp->widedone=1; 4041 } 4042 4043 /* negotiate synchronous transfers? */ 4044 if (!nego && !tp->period) { 4045 if (spi_support_sync(starget)) { 4046 nego = NS_SYNC; 4047 } else { 4048 tp->period =0xffff; 4049 dev_info(&starget->dev, "target did not report SYNC.\n"); 4050 } 4051 } 4052 4053 switch (nego) { 4054 case NS_SYNC: 4055 msglen += spi_populate_sync_msg(msgptr + msglen, 4056 tp->maxoffs ? tp->minsync : 0, tp->maxoffs); 4057 break; 4058 case NS_WIDE: 4059 msglen += spi_populate_width_msg(msgptr + msglen, tp->usrwide); 4060 break; 4061 } 4062 4063 cp->nego_status = nego; 4064 4065 if (nego) { 4066 tp->nego_cp = cp; 4067 if (DEBUG_FLAGS & DEBUG_NEGO) { 4068 ncr_print_msg(cp, nego == NS_WIDE ? 4069 "wide msgout":"sync_msgout", msgptr); 4070 } 4071 } 4072 4073 return msglen; 4074} 4075 4076 4077 4078/*========================================================== 4079** 4080** 4081** Start execution of a SCSI command. 4082** This is called from the generic SCSI driver. 4083** 4084** 4085**========================================================== 4086*/ 4087static int ncr_queue_command (struct ncb *np, struct scsi_cmnd *cmd) 4088{ 4089 struct scsi_device *sdev = cmd->device; 4090 struct tcb *tp = &np->target[sdev->id]; 4091 struct lcb *lp = tp->lp[sdev->lun]; 4092 struct ccb *cp; 4093 4094 int segments; 4095 u_char idmsg, *msgptr; 4096 u32 msglen; 4097 int direction; 4098 u32 lastp, goalp; 4099 4100 /*--------------------------------------------- 4101 ** 4102 ** Some shortcuts ... 4103 ** 4104 **--------------------------------------------- 4105 */ 4106 if ((sdev->id == np->myaddr ) || 4107 (sdev->id >= MAX_TARGET) || 4108 (sdev->lun >= MAX_LUN )) { 4109 return(DID_BAD_TARGET); 4110 } 4111 4112 /*--------------------------------------------- 4113 ** 4114 ** Complete the 1st TEST UNIT READY command 4115 ** with error condition if the device is 4116 ** flagged NOSCAN, in order to speed up 4117 ** the boot. 4118 ** 4119 **--------------------------------------------- 4120 */ 4121 if ((cmd->cmnd[0] == 0 || cmd->cmnd[0] == 0x12) && 4122 (tp->usrflag & UF_NOSCAN)) { 4123 tp->usrflag &= ~UF_NOSCAN; 4124 return DID_BAD_TARGET; 4125 } 4126 4127 if (DEBUG_FLAGS & DEBUG_TINY) { 4128 PRINT_ADDR(cmd, "CMD=%x ", cmd->cmnd[0]); 4129 } 4130 4131 /*--------------------------------------------------- 4132 ** 4133 ** Assign a ccb / bind cmd. 4134 ** If resetting, shorten settle_time if necessary 4135 ** in order to avoid spurious timeouts. 4136 ** If resetting or no free ccb, 4137 ** insert cmd into the waiting list. 4138 ** 4139 **---------------------------------------------------- 4140 */ 4141 if (np->settle_time && cmd->request->timeout >= HZ) { 4142 u_long tlimit = jiffies + cmd->request->timeout - HZ; 4143 if (time_after(np->settle_time, tlimit)) 4144 np->settle_time = tlimit; 4145 } 4146 4147 if (np->settle_time || !(cp=ncr_get_ccb (np, cmd))) { 4148 insert_into_waiting_list(np, cmd); 4149 return(DID_OK); 4150 } 4151 cp->cmd = cmd; 4152 4153 /*---------------------------------------------------- 4154 ** 4155 ** Build the identify / tag / sdtr message 4156 ** 4157 **---------------------------------------------------- 4158 */ 4159 4160 idmsg = IDENTIFY(0, sdev->lun); 4161 4162 if (cp ->tag != NO_TAG || 4163 (cp != np->ccb && np->disc && !(tp->usrflag & UF_NODISC))) 4164 idmsg |= 0x40; 4165 4166 msgptr = cp->scsi_smsg; 4167 msglen = 0; 4168 msgptr[msglen++] = idmsg; 4169 4170 if (cp->tag != NO_TAG) { 4171 char order = np->order; 4172 4173 /* 4174 ** Force ordered tag if necessary to avoid timeouts 4175 ** and to preserve interactivity. 4176 */ 4177 if (lp && time_after(jiffies, lp->tags_stime)) { 4178 if (lp->tags_smap) { 4179 order = ORDERED_QUEUE_TAG; 4180 if ((DEBUG_FLAGS & DEBUG_TAGS)||bootverbose>2){ 4181 PRINT_ADDR(cmd, 4182 "ordered tag forced.\n"); 4183 } 4184 } 4185 lp->tags_stime = jiffies + 3*HZ; 4186 lp->tags_smap = lp->tags_umap; 4187 } 4188 4189 if (order == 0) { 4190 /* 4191 ** Ordered write ops, unordered read ops. 4192 */ 4193 switch (cmd->cmnd[0]) { 4194 case 0x08: /* READ_SMALL (6) */ 4195 case 0x28: /* READ_BIG (10) */ 4196 case 0xa8: /* READ_HUGE (12) */ 4197 order = SIMPLE_QUEUE_TAG; 4198 break; 4199 default: 4200 order = ORDERED_QUEUE_TAG; 4201 } 4202 } 4203 msgptr[msglen++] = order; 4204 /* 4205 ** Actual tags are numbered 1,3,5,..2*MAXTAGS+1, 4206 ** since we may have to deal with devices that have 4207 ** problems with #TAG 0 or too great #TAG numbers. 4208 */ 4209 msgptr[msglen++] = (cp->tag << 1) + 1; 4210 } 4211 4212 /*---------------------------------------------------- 4213 ** 4214 ** Build the data descriptors 4215 ** 4216 **---------------------------------------------------- 4217 */ 4218 4219 direction = cmd->sc_data_direction; 4220 if (direction != DMA_NONE) { 4221 segments = ncr_scatter(np, cp, cp->cmd); 4222 if (segments < 0) { 4223 ncr_free_ccb(np, cp); 4224 return(DID_ERROR); 4225 } 4226 } 4227 else { 4228 cp->data_len = 0; 4229 segments = 0; 4230 } 4231 4232 /*--------------------------------------------------- 4233 ** 4234 ** negotiation required? 4235 ** 4236 ** (nego_status is filled by ncr_prepare_nego()) 4237 ** 4238 **--------------------------------------------------- 4239 */ 4240 4241 cp->nego_status = 0; 4242 4243 if ((!tp->widedone || !tp->period) && !tp->nego_cp && lp) { 4244 msglen += ncr_prepare_nego (np, cp, msgptr + msglen); 4245 } 4246 4247 /*---------------------------------------------------- 4248 ** 4249 ** Determine xfer direction. 4250 ** 4251 **---------------------------------------------------- 4252 */ 4253 if (!cp->data_len) 4254 direction = DMA_NONE; 4255 4256 /* 4257 ** If data direction is BIDIRECTIONAL, speculate FROM_DEVICE 4258 ** but prepare alternate pointers for TO_DEVICE in case 4259 ** of our speculation will be just wrong. 4260 ** SCRIPTS will swap values if needed. 4261 */ 4262 switch(direction) { 4263 case DMA_BIDIRECTIONAL: 4264 case DMA_TO_DEVICE: 4265 goalp = NCB_SCRIPT_PHYS (np, data_out2) + 8; 4266 if (segments <= MAX_SCATTERL) 4267 lastp = goalp - 8 - (segments * 16); 4268 else { 4269 lastp = NCB_SCRIPTH_PHYS (np, hdata_out2); 4270 lastp -= (segments - MAX_SCATTERL) * 16; 4271 } 4272 if (direction != DMA_BIDIRECTIONAL) 4273 break; 4274 cp->phys.header.wgoalp = cpu_to_scr(goalp); 4275 cp->phys.header.wlastp = cpu_to_scr(lastp); 4276 /* fall through */ 4277 case DMA_FROM_DEVICE: 4278 goalp = NCB_SCRIPT_PHYS (np, data_in2) + 8; 4279 if (segments <= MAX_SCATTERL) 4280 lastp = goalp - 8 - (segments * 16); 4281 else { 4282 lastp = NCB_SCRIPTH_PHYS (np, hdata_in2); 4283 lastp -= (segments - MAX_SCATTERL) * 16; 4284 } 4285 break; 4286 default: 4287 case DMA_NONE: 4288 lastp = goalp = NCB_SCRIPT_PHYS (np, no_data); 4289 break; 4290 } 4291 4292 /* 4293 ** Set all pointers values needed by SCRIPTS. 4294 ** If direction is unknown, start at data_io. 4295 */ 4296 cp->phys.header.lastp = cpu_to_scr(lastp); 4297 cp->phys.header.goalp = cpu_to_scr(goalp); 4298 4299 if (direction == DMA_BIDIRECTIONAL) 4300 cp->phys.header.savep = 4301 cpu_to_scr(NCB_SCRIPTH_PHYS (np, data_io)); 4302 else 4303 cp->phys.header.savep= cpu_to_scr(lastp); 4304 4305 /* 4306 ** Save the initial data pointer in order to be able 4307 ** to redo the command. 4308 */ 4309 cp->startp = cp->phys.header.savep; 4310 4311 /*---------------------------------------------------- 4312 ** 4313 ** fill in ccb 4314 ** 4315 **---------------------------------------------------- 4316 ** 4317 ** 4318 ** physical -> virtual backlink 4319 ** Generic SCSI command 4320 */ 4321 4322 /* 4323 ** Startqueue 4324 */ 4325 cp->start.schedule.l_paddr = cpu_to_scr(NCB_SCRIPT_PHYS (np, select)); 4326 cp->restart.schedule.l_paddr = cpu_to_scr(NCB_SCRIPT_PHYS (np, resel_dsa)); 4327 /* 4328 ** select 4329 */ 4330 cp->phys.select.sel_id = sdev_id(sdev); 4331 cp->phys.select.sel_scntl3 = tp->wval; 4332 cp->phys.select.sel_sxfer = tp->sval; 4333 /* 4334 ** message 4335 */ 4336 cp->phys.smsg.addr = cpu_to_scr(CCB_PHYS (cp, scsi_smsg)); 4337 cp->phys.smsg.size = cpu_to_scr(msglen); 4338 4339 /* 4340 ** command 4341 */ 4342 memcpy(cp->cdb_buf, cmd->cmnd, min_t(int, cmd->cmd_len, sizeof(cp->cdb_buf))); 4343 cp->phys.cmd.addr = cpu_to_scr(CCB_PHYS (cp, cdb_buf[0])); 4344 cp->phys.cmd.size = cpu_to_scr(cmd->cmd_len); 4345 4346 /* 4347 ** status 4348 */ 4349 cp->actualquirks = 0; 4350 cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY; 4351 cp->scsi_status = S_ILLEGAL; 4352 cp->parity_status = 0; 4353 4354 cp->xerr_status = XE_OK; 4355 4356 /*---------------------------------------------------- 4357 ** 4358 ** Critical region: start this job. 4359 ** 4360 **---------------------------------------------------- 4361 */ 4362 4363 /* activate this job. */ 4364 cp->magic = CCB_MAGIC; 4365 4366 /* 4367 ** insert next CCBs into start queue. 4368 ** 2 max at a time is enough to flush the CCB wait queue. 4369 */ 4370 cp->auto_sense = 0; 4371 if (lp) 4372 ncr_start_next_ccb(np, lp, 2); 4373 else 4374 ncr_put_start_queue(np, cp); 4375 4376 /* Command is successfully queued. */ 4377 4378 return DID_OK; 4379} 4380 4381 4382/*========================================================== 4383** 4384** 4385** Insert a CCB into the start queue and wake up the 4386** SCRIPTS processor. 4387** 4388** 4389**========================================================== 4390*/ 4391 4392static void ncr_start_next_ccb(struct ncb *np, struct lcb *lp, int maxn) 4393{ 4394 struct list_head *qp; 4395 struct ccb *cp; 4396 4397 if (lp->held_ccb) 4398 return; 4399 4400 while (maxn-- && lp->queuedccbs < lp->queuedepth) { 4401 qp = ncr_list_pop(&lp->wait_ccbq); 4402 if (!qp) 4403 break; 4404 ++lp->queuedccbs; 4405 cp = list_entry(qp, struct ccb, link_ccbq); 4406 list_add_tail(qp, &lp->busy_ccbq); 4407 lp->jump_ccb[cp->tag == NO_TAG ? 0 : cp->tag] = 4408 cpu_to_scr(CCB_PHYS (cp, restart)); 4409 ncr_put_start_queue(np, cp); 4410 } 4411} 4412 4413static void ncr_put_start_queue(struct ncb *np, struct ccb *cp) 4414{ 4415 u16 qidx; 4416 4417 /* 4418 ** insert into start queue. 4419 */ 4420 if (!np->squeueput) np->squeueput = 1; 4421 qidx = np->squeueput + 2; 4422 if (qidx >= MAX_START + MAX_START) qidx = 1; 4423 4424 np->scripth->tryloop [qidx] = cpu_to_scr(NCB_SCRIPT_PHYS (np, idle)); 4425 MEMORY_BARRIER(); 4426 np->scripth->tryloop [np->squeueput] = cpu_to_scr(CCB_PHYS (cp, start)); 4427 4428 np->squeueput = qidx; 4429 ++np->queuedccbs; 4430 cp->queued = 1; 4431 4432 if (DEBUG_FLAGS & DEBUG_QUEUE) 4433 printk ("%s: queuepos=%d.\n", ncr_name (np), np->squeueput); 4434 4435 /* 4436 ** Script processor may be waiting for reselect. 4437 ** Wake it up. 4438 */ 4439 MEMORY_BARRIER(); 4440 OUTB (nc_istat, SIGP); 4441} 4442 4443 4444static int ncr_reset_scsi_bus(struct ncb *np, int enab_int, int settle_delay) 4445{ 4446 u32 term; 4447 int retv = 0; 4448 4449 np->settle_time = jiffies + settle_delay * HZ; 4450 4451 if (bootverbose > 1) 4452 printk("%s: resetting, " 4453 "command processing suspended for %d seconds\n", 4454 ncr_name(np), settle_delay); 4455 4456 ncr_chip_reset(np, 100); 4457 udelay(2000); /* The 895 needs time for the bus mode to settle */ 4458 if (enab_int) 4459 OUTW (nc_sien, RST); 4460 /* 4461 ** Enable Tolerant, reset IRQD if present and 4462 ** properly set IRQ mode, prior to resetting the bus. 4463 */ 4464 OUTB (nc_stest3, TE); 4465 OUTB (nc_scntl1, CRST); 4466 udelay(200); 4467 4468 if (!driver_setup.bus_check) 4469 goto out; 4470 /* 4471 ** Check for no terminators or SCSI bus shorts to ground. 4472 ** Read SCSI data bus, data parity bits and control signals. 4473 ** We are expecting RESET to be TRUE and other signals to be 4474 ** FALSE. 4475 */ 4476 4477 term = INB(nc_sstat0); 4478 term = ((term & 2) << 7) + ((term & 1) << 17); /* rst sdp0 */ 4479 term |= ((INB(nc_sstat2) & 0x01) << 26) | /* sdp1 */ 4480 ((INW(nc_sbdl) & 0xff) << 9) | /* d7-0 */ 4481 ((INW(nc_sbdl) & 0xff00) << 10) | /* d15-8 */ 4482 INB(nc_sbcl); /* req ack bsy sel atn msg cd io */ 4483 4484 if (!(np->features & FE_WIDE)) 4485 term &= 0x3ffff; 4486 4487 if (term != (2<<7)) { 4488 printk("%s: suspicious SCSI data while resetting the BUS.\n", 4489 ncr_name(np)); 4490 printk("%s: %sdp0,d7-0,rst,req,ack,bsy,sel,atn,msg,c/d,i/o = " 4491 "0x%lx, expecting 0x%lx\n", 4492 ncr_name(np), 4493 (np->features & FE_WIDE) ? "dp1,d15-8," : "", 4494 (u_long)term, (u_long)(2<<7)); 4495 if (driver_setup.bus_check == 1) 4496 retv = 1; 4497 } 4498out: 4499 OUTB (nc_scntl1, 0); 4500 return retv; 4501} 4502 4503/* 4504 * Start reset process. 4505 * If reset in progress do nothing. 4506 * The interrupt handler will reinitialize the chip. 4507 * The timeout handler will wait for settle_time before 4508 * clearing it and so resuming command processing. 4509 */ 4510static void ncr_start_reset(struct ncb *np) 4511{ 4512 if (!np->settle_time) { 4513 ncr_reset_scsi_bus(np, 1, driver_setup.settle_delay); 4514 } 4515} 4516 4517/*========================================================== 4518** 4519** 4520** Reset the SCSI BUS. 4521** This is called from the generic SCSI driver. 4522** 4523** 4524**========================================================== 4525*/ 4526static int ncr_reset_bus (struct ncb *np, struct scsi_cmnd *cmd, int sync_reset) 4527{ 4528/* struct scsi_device *device = cmd->device; */ 4529 struct ccb *cp; 4530 int found; 4531 4532/* 4533 * Return immediately if reset is in progress. 4534 */ 4535 if (np->settle_time) { 4536 return FAILED; 4537 } 4538/* 4539 * Start the reset process. 4540 * The script processor is then assumed to be stopped. 4541 * Commands will now be queued in the waiting list until a settle 4542 * delay of 2 seconds will be completed. 4543 */ 4544 ncr_start_reset(np); 4545/* 4546 * First, look in the wakeup list 4547 */ 4548 for (found=0, cp=np->ccb; cp; cp=cp->link_ccb) { 4549 /* 4550 ** look for the ccb of this command. 4551 */ 4552 if (cp->host_status == HS_IDLE) continue; 4553 if (cp->cmd == cmd) { 4554 found = 1; 4555 break; 4556 } 4557 } 4558/* 4559 * Then, look in the waiting list 4560 */ 4561 if (!found && retrieve_from_waiting_list(0, np, cmd)) 4562 found = 1; 4563/* 4564 * Wake-up all awaiting commands with DID_RESET. 4565 */ 4566 reset_waiting_list(np); 4567/* 4568 * Wake-up all pending commands with HS_RESET -> DID_RESET. 4569 */ 4570 ncr_wakeup(np, HS_RESET); 4571/* 4572 * If the involved command was not in a driver queue, and the 4573 * scsi driver told us reset is synchronous, and the command is not 4574 * currently in the waiting list, complete it with DID_RESET status, 4575 * in order to keep it alive. 4576 */ 4577 if (!found && sync_reset && !retrieve_from_waiting_list(0, np, cmd)) { 4578 cmd->result = ScsiResult(DID_RESET, 0); 4579 ncr_queue_done_cmd(np, cmd); 4580 } 4581 4582 return SUCCESS; 4583} 4584 4585 4586static void ncr_detach(struct ncb *np) 4587{ 4588 struct ccb *cp; 4589 struct tcb *tp; 4590 struct lcb *lp; 4591 int target, lun; 4592 int i; 4593 char inst_name[16]; 4594 4595 /* Local copy so we don't access np after freeing it! */ 4596 strlcpy(inst_name, ncr_name(np), sizeof(inst_name)); 4597 4598 printk("%s: releasing host resources\n", ncr_name(np)); 4599 4600/* 4601** Stop the ncr_timeout process 4602** Set release_stage to 1 and wait that ncr_timeout() set it to 2. 4603*/ 4604 4605#ifdef DEBUG_NCR53C8XX 4606 printk("%s: stopping the timer\n", ncr_name(np)); 4607#endif 4608 np->release_stage = 1; 4609 for (i = 50 ; i && np->release_stage != 2 ; i--) 4610 mdelay(100); 4611 if (np->release_stage != 2) 4612 printk("%s: the timer seems to be already stopped\n", ncr_name(np)); 4613 else np->release_stage = 2; 4614 4615/* 4616** Disable chip interrupts 4617*/ 4618 4619#ifdef DEBUG_NCR53C8XX 4620 printk("%s: disabling chip interrupts\n", ncr_name(np)); 4621#endif 4622 OUTW (nc_sien , 0); 4623 OUTB (nc_dien , 0); 4624 4625 /* 4626 ** Reset NCR chip 4627 ** Restore bios setting for automatic clock detection. 4628 */ 4629 4630 printk("%s: resetting chip\n", ncr_name(np)); 4631 ncr_chip_reset(np, 100); 4632 4633 OUTB(nc_dmode, np->sv_dmode); 4634 OUTB(nc_dcntl, np->sv_dcntl); 4635 OUTB(nc_ctest0, np->sv_ctest0); 4636 OUTB(nc_ctest3, np->sv_ctest3); 4637 OUTB(nc_ctest4, np->sv_ctest4); 4638 OUTB(nc_ctest5, np->sv_ctest5); 4639 OUTB(nc_gpcntl, np->sv_gpcntl); 4640 OUTB(nc_stest2, np->sv_stest2); 4641 4642 ncr_selectclock(np, np->sv_scntl3); 4643 4644 /* 4645 ** Free allocated ccb(s) 4646 */ 4647 4648 while ((cp=np->ccb->link_ccb) != NULL) { 4649 np->ccb->link_ccb = cp->link_ccb; 4650 if (cp->host_status) { 4651 printk("%s: shall free an active ccb (host_status=%d)\n", 4652 ncr_name(np), cp->host_status); 4653 } 4654#ifdef DEBUG_NCR53C8XX 4655 printk("%s: freeing ccb (%lx)\n", ncr_name(np), (u_long) cp); 4656#endif 4657 m_free_dma(cp, sizeof(*cp), "CCB"); 4658 } 4659 4660 /* Free allocated tp(s) */ 4661 4662 for (target = 0; target < MAX_TARGET ; target++) { 4663 tp=&np->target[target]; 4664 for (lun = 0 ; lun < MAX_LUN ; lun++) { 4665 lp = tp->lp[lun]; 4666 if (lp) { 4667#ifdef DEBUG_NCR53C8XX 4668 printk("%s: freeing lp (%lx)\n", ncr_name(np), (u_long) lp); 4669#endif 4670 if (lp->jump_ccb != &lp->jump_ccb_0) 4671 m_free_dma(lp->jump_ccb,256,"JUMP_CCB"); 4672 m_free_dma(lp, sizeof(*lp), "LCB"); 4673 } 4674 } 4675 } 4676 4677 if (np->scripth0) 4678 m_free_dma(np->scripth0, sizeof(struct scripth), "SCRIPTH"); 4679 if (np->script0) 4680 m_free_dma(np->script0, sizeof(struct script), "SCRIPT"); 4681 if (np->ccb) 4682 m_free_dma(np->ccb, sizeof(struct ccb), "CCB"); 4683 m_free_dma(np, sizeof(struct ncb), "NCB"); 4684 4685 printk("%s: host resources successfully released\n", inst_name); 4686} 4687 4688/*========================================================== 4689** 4690** 4691** Complete execution of a SCSI command. 4692** Signal completion to the generic SCSI driver. 4693** 4694** 4695**========================================================== 4696*/ 4697 4698void ncr_complete (struct ncb *np, struct ccb *cp) 4699{ 4700 struct scsi_cmnd *cmd; 4701 struct tcb *tp; 4702 struct lcb *lp; 4703 4704 /* 4705 ** Sanity check 4706 */ 4707 4708 if (!cp || cp->magic != CCB_MAGIC || !cp->cmd) 4709 return; 4710 4711 /* 4712 ** Print minimal debug information. 4713 */ 4714 4715 if (DEBUG_FLAGS & DEBUG_TINY) 4716 printk ("CCB=%lx STAT=%x/%x\n", (unsigned long)cp, 4717 cp->host_status,cp->scsi_status); 4718 4719 /* 4720 ** Get command, target and lun pointers. 4721 */ 4722 4723 cmd = cp->cmd; 4724 cp->cmd = NULL; 4725 tp = &np->target[cmd->device->id]; 4726 lp = tp->lp[cmd->device->lun]; 4727 4728 /* 4729 ** We donnot queue more than 1 ccb per target 4730 ** with negotiation at any time. If this ccb was 4731 ** used for negotiation, clear this info in the tcb. 4732 */ 4733 4734 if (cp == tp->nego_cp) 4735 tp->nego_cp = NULL; 4736 4737 /* 4738 ** If auto-sense performed, change scsi status. 4739 */ 4740 if (cp->auto_sense) { 4741 cp->scsi_status = cp->auto_sense; 4742 } 4743 4744 /* 4745 ** If we were recovering from queue full or performing 4746 ** auto-sense, requeue skipped CCBs to the wait queue. 4747 */ 4748 4749 if (lp && lp->held_ccb) { 4750 if (cp == lp->held_ccb) { 4751 list_splice_init(&lp->skip_ccbq, &lp->wait_ccbq); 4752 lp->held_ccb = NULL; 4753 } 4754 } 4755 4756 /* 4757 ** Check for parity errors. 4758 */ 4759 4760 if (cp->parity_status > 1) { 4761 PRINT_ADDR(cmd, "%d parity error(s).\n",cp->parity_status); 4762 } 4763 4764 /* 4765 ** Check for extended errors. 4766 */ 4767 4768 if (cp->xerr_status != XE_OK) { 4769 switch (cp->xerr_status) { 4770 case XE_EXTRA_DATA: 4771 PRINT_ADDR(cmd, "extraneous data discarded.\n"); 4772 break; 4773 case XE_BAD_PHASE: 4774 PRINT_ADDR(cmd, "invalid scsi phase (4/5).\n"); 4775 break; 4776 default: 4777 PRINT_ADDR(cmd, "extended error %d.\n", 4778 cp->xerr_status); 4779 break; 4780 } 4781 if (cp->host_status==HS_COMPLETE) 4782 cp->host_status = HS_FAIL; 4783 } 4784 4785 /* 4786 ** Print out any error for debugging purpose. 4787 */ 4788 if (DEBUG_FLAGS & (DEBUG_RESULT|DEBUG_TINY)) { 4789 if (cp->host_status!=HS_COMPLETE || cp->scsi_status!=S_GOOD) { 4790 PRINT_ADDR(cmd, "ERROR: cmd=%x host_status=%x " 4791 "scsi_status=%x\n", cmd->cmnd[0], 4792 cp->host_status, cp->scsi_status); 4793 } 4794 } 4795 4796 /* 4797 ** Check the status. 4798 */ 4799 if ( (cp->host_status == HS_COMPLETE) 4800 && (cp->scsi_status == S_GOOD || 4801 cp->scsi_status == S_COND_MET)) { 4802 /* 4803 * All went well (GOOD status). 4804 * CONDITION MET status is returned on 4805 * `Pre-Fetch' or `Search data' success. 4806 */ 4807 cmd->result = ScsiResult(DID_OK, cp->scsi_status); 4808 4809 /* 4810 ** @RESID@ 4811 ** Could dig out the correct value for resid, 4812 ** but it would be quite complicated. 4813 */ 4814 /* if (cp->phys.header.lastp != cp->phys.header.goalp) */ 4815 4816 /* 4817 ** Allocate the lcb if not yet. 4818 */ 4819 if (!lp) 4820 ncr_alloc_lcb (np, cmd->device->id, cmd->device->lun); 4821 4822 tp->bytes += cp->data_len; 4823 tp->transfers ++; 4824 4825 /* 4826 ** If tags was reduced due to queue full, 4827 ** increase tags if 1000 good status received. 4828 */ 4829 if (lp && lp->usetags && lp->numtags < lp->maxtags) { 4830 ++lp->num_good; 4831 if (lp->num_good >= 1000) { 4832 lp->num_good = 0; 4833 ++lp->numtags; 4834 ncr_setup_tags (np, cmd->device); 4835 } 4836 } 4837 } else if ((cp->host_status == HS_COMPLETE) 4838 && (cp->scsi_status == S_CHECK_COND)) { 4839 /* 4840 ** Check condition code 4841 */ 4842 cmd->result = ScsiResult(DID_OK, S_CHECK_COND); 4843 4844 /* 4845 ** Copy back sense data to caller's buffer. 4846 */ 4847 memcpy(cmd->sense_buffer, cp->sense_buf, 4848 min_t(size_t, SCSI_SENSE_BUFFERSIZE, 4849 sizeof(cp->sense_buf))); 4850 4851 if (DEBUG_FLAGS & (DEBUG_RESULT|DEBUG_TINY)) { 4852 u_char *p = cmd->sense_buffer; 4853 int i; 4854 PRINT_ADDR(cmd, "sense data:"); 4855 for (i=0; i<14; i++) printk (" %x", *p++); 4856 printk (".\n"); 4857 } 4858 } else if ((cp->host_status == HS_COMPLETE) 4859 && (cp->scsi_status == S_CONFLICT)) { 4860 /* 4861 ** Reservation Conflict condition code 4862 */ 4863 cmd->result = ScsiResult(DID_OK, S_CONFLICT); 4864 4865 } else if ((cp->host_status == HS_COMPLETE) 4866 && (cp->scsi_status == S_BUSY || 4867 cp->scsi_status == S_QUEUE_FULL)) { 4868 4869 /* 4870 ** Target is busy. 4871 */ 4872 cmd->result = ScsiResult(DID_OK, cp->scsi_status); 4873 4874 } else if ((cp->host_status == HS_SEL_TIMEOUT) 4875 || (cp->host_status == HS_TIMEOUT)) { 4876 4877 /* 4878 ** No response 4879 */ 4880 cmd->result = ScsiResult(DID_TIME_OUT, cp->scsi_status); 4881 4882 } else if (cp->host_status == HS_RESET) { 4883 4884 /* 4885 ** SCSI bus reset 4886 */ 4887 cmd->result = ScsiResult(DID_RESET, cp->scsi_status); 4888 4889 } else if (cp->host_status == HS_ABORTED) { 4890 4891 /* 4892 ** Transfer aborted 4893 */ 4894 cmd->result = ScsiResult(DID_ABORT, cp->scsi_status); 4895 4896 } else { 4897 4898 /* 4899 ** Other protocol messes 4900 */ 4901 PRINT_ADDR(cmd, "COMMAND FAILED (%x %x) @%p.\n", 4902 cp->host_status, cp->scsi_status, cp); 4903 4904 cmd->result = ScsiResult(DID_ERROR, cp->scsi_status); 4905 } 4906 4907 /* 4908 ** trace output 4909 */ 4910 4911 if (tp->usrflag & UF_TRACE) { 4912 u_char * p; 4913 int i; 4914 PRINT_ADDR(cmd, " CMD:"); 4915 p = (u_char*) &cmd->cmnd[0]; 4916 for (i=0; i<cmd->cmd_len; i++) printk (" %x", *p++); 4917 4918 if (cp->host_status==HS_COMPLETE) { 4919 switch (cp->scsi_status) { 4920 case S_GOOD: 4921 printk (" GOOD"); 4922 break; 4923 case S_CHECK_COND: 4924 printk (" SENSE:"); 4925 p = (u_char*) &cmd->sense_buffer; 4926 for (i=0; i<14; i++) 4927 printk (" %x", *p++); 4928 break; 4929 default: 4930 printk (" STAT: %x\n", cp->scsi_status); 4931 break; 4932 } 4933 } else printk (" HOSTERROR: %x", cp->host_status); 4934 printk ("\n"); 4935 } 4936 4937 /* 4938 ** Free this ccb 4939 */ 4940 ncr_free_ccb (np, cp); 4941 4942 /* 4943 ** requeue awaiting scsi commands for this lun. 4944 */ 4945 if (lp && lp->queuedccbs < lp->queuedepth && 4946 !list_empty(&lp->wait_ccbq)) 4947 ncr_start_next_ccb(np, lp, 2); 4948 4949 /* 4950 ** requeue awaiting scsi commands for this controller. 4951 */ 4952 if (np->waiting_list) 4953 requeue_waiting_list(np); 4954 4955 /* 4956 ** signal completion to generic driver. 4957 */ 4958 ncr_queue_done_cmd(np, cmd); 4959} 4960 4961/*========================================================== 4962** 4963** 4964** Signal all (or one) control block done. 4965** 4966** 4967**========================================================== 4968*/ 4969 4970/* 4971** This CCB has been skipped by the NCR. 4972** Queue it in the corresponding unit queue. 4973*/ 4974static void ncr_ccb_skipped(struct ncb *np, struct ccb *cp) 4975{ 4976 struct tcb *tp = &np->target[cp->target]; 4977 struct lcb *lp = tp->lp[cp->lun]; 4978 4979 if (lp && cp != np->ccb) { 4980 cp->host_status &= ~HS_SKIPMASK; 4981 cp->start.schedule.l_paddr = 4982 cpu_to_scr(NCB_SCRIPT_PHYS (np, select)); 4983 list_move_tail(&cp->link_ccbq, &lp->skip_ccbq); 4984 if (cp->queued) { 4985 --lp->queuedccbs; 4986 } 4987 } 4988 if (cp->queued) { 4989 --np->queuedccbs; 4990 cp->queued = 0; 4991 } 4992} 4993 4994/* 4995** The NCR has completed CCBs. 4996** Look at the DONE QUEUE if enabled, otherwise scan all CCBs 4997*/ 4998void ncr_wakeup_done (struct ncb *np) 4999{ 5000 struct ccb *cp; 5001#ifdef SCSI_NCR_CCB_DONE_SUPPORT 5002 int i, j; 5003 5004 i = np->ccb_done_ic; 5005 while (1) { 5006 j = i+1; 5007 if (j >= MAX_DONE) 5008 j = 0; 5009 5010 cp = np->ccb_done[j]; 5011 if (!CCB_DONE_VALID(cp)) 5012 break; 5013 5014 np->ccb_done[j] = (struct ccb *)CCB_DONE_EMPTY; 5015 np->scripth->done_queue[5*j + 4] = 5016 cpu_to_scr(NCB_SCRIPT_PHYS (np, done_plug)); 5017 MEMORY_BARRIER(); 5018 np->scripth->done_queue[5*i + 4] = 5019 cpu_to_scr(NCB_SCRIPT_PHYS (np, done_end)); 5020 5021 if (cp->host_status & HS_DONEMASK) 5022 ncr_complete (np, cp); 5023 else if (cp->host_status & HS_SKIPMASK) 5024 ncr_ccb_skipped (np, cp); 5025 5026 i = j; 5027 } 5028 np->ccb_done_ic = i; 5029#else 5030 cp = np->ccb; 5031 while (cp) { 5032 if (cp->host_status & HS_DONEMASK) 5033 ncr_complete (np, cp); 5034 else if (cp->host_status & HS_SKIPMASK) 5035 ncr_ccb_skipped (np, cp); 5036 cp = cp->link_ccb; 5037 } 5038#endif 5039} 5040 5041/* 5042** Complete all active CCBs. 5043*/ 5044void ncr_wakeup (struct ncb *np, u_long code) 5045{ 5046 struct ccb *cp = np->ccb; 5047 5048 while (cp) { 5049 if (cp->host_status != HS_IDLE) { 5050 cp->host_status = code; 5051 ncr_complete (np, cp); 5052 } 5053 cp = cp->link_ccb; 5054 } 5055} 5056 5057/* 5058** Reset ncr chip. 5059*/ 5060 5061/* Some initialisation must be done immediately following reset, for 53c720, 5062 * at least. EA (dcntl bit 5) isn't set here as it is set once only in 5063 * the _detect function. 5064 */ 5065static void ncr_chip_reset(struct ncb *np, int delay) 5066{ 5067 OUTB (nc_istat, SRST); 5068 udelay(delay); 5069 OUTB (nc_istat, 0 ); 5070 5071 if (np->features & FE_EHP) 5072 OUTB (nc_ctest0, EHP); 5073 if (np->features & FE_MUX) 5074 OUTB (nc_ctest4, MUX); 5075} 5076 5077 5078/*========================================================== 5079** 5080** 5081** Start NCR chip. 5082** 5083** 5084**========================================================== 5085*/ 5086 5087void ncr_init (struct ncb *np, int reset, char * msg, u_long code) 5088{ 5089 int i; 5090 5091 /* 5092 ** Reset chip if asked, otherwise just clear fifos. 5093 */ 5094 5095 if (reset) { 5096 OUTB (nc_istat, SRST); 5097 udelay(100); 5098 } 5099 else { 5100 OUTB (nc_stest3, TE|CSF); 5101 OUTONB (nc_ctest3, CLF); 5102 } 5103 5104 /* 5105 ** Message. 5106 */ 5107 5108 if (msg) printk (KERN_INFO "%s: restart (%s).\n", ncr_name (np), msg); 5109 5110 /* 5111 ** Clear Start Queue 5112 */ 5113 np->queuedepth = MAX_START - 1; /* 1 entry needed as end marker */ 5114 for (i = 1; i < MAX_START + MAX_START; i += 2) 5115 np->scripth0->tryloop[i] = 5116 cpu_to_scr(NCB_SCRIPT_PHYS (np, idle)); 5117 5118 /* 5119 ** Start at first entry. 5120 */ 5121 np->squeueput = 0; 5122 np->script0->startpos[0] = cpu_to_scr(NCB_SCRIPTH_PHYS (np, tryloop)); 5123 5124#ifdef SCSI_NCR_CCB_DONE_SUPPORT 5125 /* 5126 ** Clear Done Queue 5127 */ 5128 for (i = 0; i < MAX_DONE; i++) { 5129 np->ccb_done[i] = (struct ccb *)CCB_DONE_EMPTY; 5130 np->scripth0->done_queue[5*i + 4] = 5131 cpu_to_scr(NCB_SCRIPT_PHYS (np, done_end)); 5132 } 5133#endif 5134 5135 /* 5136 ** Start at first entry. 5137 */ 5138 np->script0->done_pos[0] = cpu_to_scr(NCB_SCRIPTH_PHYS (np,done_queue)); 5139 np->ccb_done_ic = MAX_DONE-1; 5140 np->scripth0->done_queue[5*(MAX_DONE-1) + 4] = 5141 cpu_to_scr(NCB_SCRIPT_PHYS (np, done_plug)); 5142 5143 /* 5144 ** Wakeup all pending jobs. 5145 */ 5146 ncr_wakeup (np, code); 5147 5148 /* 5149 ** Init chip. 5150 */ 5151 5152 /* 5153 ** Remove reset; big delay because the 895 needs time for the 5154 ** bus mode to settle 5155 */ 5156 ncr_chip_reset(np, 2000); 5157 5158 OUTB (nc_scntl0, np->rv_scntl0 | 0xc0); 5159 /* full arb., ena parity, par->ATN */ 5160 OUTB (nc_scntl1, 0x00); /* odd parity, and remove CRST!! */ 5161 5162 ncr_selectclock(np, np->rv_scntl3); /* Select SCSI clock */ 5163 5164 OUTB (nc_scid , RRE|np->myaddr); /* Adapter SCSI address */ 5165 OUTW (nc_respid, 1ul<<np->myaddr); /* Id to respond to */ 5166 OUTB (nc_istat , SIGP ); /* Signal Process */ 5167 OUTB (nc_dmode , np->rv_dmode); /* Burst length, dma mode */ 5168 OUTB (nc_ctest5, np->rv_ctest5); /* Large fifo + large burst */ 5169 5170 OUTB (nc_dcntl , NOCOM|np->rv_dcntl); /* Protect SFBR */ 5171 OUTB (nc_ctest0, np->rv_ctest0); /* 720: CDIS and EHP */ 5172 OUTB (nc_ctest3, np->rv_ctest3); /* Write and invalidate */ 5173 OUTB (nc_ctest4, np->rv_ctest4); /* Master parity checking */ 5174 5175 OUTB (nc_stest2, EXT|np->rv_stest2); /* Extended Sreq/Sack filtering */ 5176 OUTB (nc_stest3, TE); /* TolerANT enable */ 5177 OUTB (nc_stime0, 0x0c ); /* HTH disabled STO 0.25 sec */ 5178 5179 /* 5180 ** Disable disconnects. 5181 */ 5182 5183 np->disc = 0; 5184 5185 /* 5186 ** Enable GPIO0 pin for writing if LED support. 5187 */ 5188 5189 if (np->features & FE_LED0) { 5190 OUTOFFB (nc_gpcntl, 0x01); 5191 } 5192 5193 /* 5194 ** enable ints 5195 */ 5196 5197 OUTW (nc_sien , STO|HTH|MA|SGE|UDC|RST|PAR); 5198 OUTB (nc_dien , MDPE|BF|ABRT|SSI|SIR|IID); 5199 5200 /* 5201 ** Fill in target structure. 5202 ** Reinitialize usrsync. 5203 ** Reinitialize usrwide. 5204 ** Prepare sync negotiation according to actual SCSI bus mode. 5205 */ 5206 5207 for (i=0;i<MAX_TARGET;i++) { 5208 struct tcb *tp = &np->target[i]; 5209 5210 tp->sval = 0; 5211 tp->wval = np->rv_scntl3; 5212 5213 if (tp->usrsync != 255) { 5214 if (tp->usrsync <= np->maxsync) { 5215 if (tp->usrsync < np->minsync) { 5216 tp->usrsync = np->minsync; 5217 } 5218 } 5219 else 5220 tp->usrsync = 255; 5221 } 5222 5223 if (tp->usrwide > np->maxwide) 5224 tp->usrwide = np->maxwide; 5225 5226 } 5227 5228 /* 5229 ** Start script processor. 5230 */ 5231 if (np->paddr2) { 5232 if (bootverbose) 5233 printk ("%s: Downloading SCSI SCRIPTS.\n", 5234 ncr_name(np)); 5235 OUTL (nc_scratcha, vtobus(np->script0)); 5236 OUTL_DSP (NCB_SCRIPTH_PHYS (np, start_ram)); 5237 } 5238 else 5239 OUTL_DSP (NCB_SCRIPT_PHYS (np, start)); 5240} 5241 5242/*========================================================== 5243** 5244** Prepare the negotiation values for wide and 5245** synchronous transfers. 5246** 5247**========================================================== 5248*/ 5249 5250static void ncr_negotiate (struct ncb* np, struct tcb* tp) 5251{ 5252 /* 5253 ** minsync unit is 4ns ! 5254 */ 5255 5256 u_long minsync = tp->usrsync; 5257 5258 /* 5259 ** SCSI bus mode limit 5260 */ 5261 5262 if (np->scsi_mode && np->scsi_mode == SMODE_SE) { 5263 if (minsync < 12) minsync = 12; 5264 } 5265 5266 /* 5267 ** our limit .. 5268 */ 5269 5270 if (minsync < np->minsync) 5271 minsync = np->minsync; 5272 5273 /* 5274 ** divider limit 5275 */ 5276 5277 if (minsync > np->maxsync) 5278 minsync = 255; 5279 5280 if (tp->maxoffs > np->maxoffs) 5281 tp->maxoffs = np->maxoffs; 5282 5283 tp->minsync = minsync; 5284 tp->maxoffs = (minsync<255 ? tp->maxoffs : 0); 5285 5286 /* 5287 ** period=0: has to negotiate sync transfer 5288 */ 5289 5290 tp->period=0; 5291 5292 /* 5293 ** widedone=0: has to negotiate wide transfer 5294 */ 5295 tp->widedone=0; 5296} 5297 5298/*========================================================== 5299** 5300** Get clock factor and sync divisor for a given 5301** synchronous factor period. 5302** Returns the clock factor (in sxfer) and scntl3 5303** synchronous divisor field. 5304** 5305**========================================================== 5306*/ 5307 5308static void ncr_getsync(struct ncb *np, u_char sfac, u_char *fakp, u_char *scntl3p) 5309{ 5310 u_long clk = np->clock_khz; /* SCSI clock frequency in kHz */ 5311 int div = np->clock_divn; /* Number of divisors supported */ 5312 u_long fak; /* Sync factor in sxfer */ 5313 u_long per; /* Period in tenths of ns */ 5314 u_long kpc; /* (per * clk) */ 5315 5316 /* 5317 ** Compute the synchronous period in tenths of nano-seconds 5318 */ 5319 if (sfac <= 10) per = 250; 5320 else if (sfac == 11) per = 303; 5321 else if (sfac == 12) per = 500; 5322 else per = 40 * sfac; 5323 5324 /* 5325 ** Look for the greatest clock divisor that allows an 5326 ** input speed faster than the period. 5327 */ 5328 kpc = per * clk; 5329 while (--div > 0) 5330 if (kpc >= (div_10M[div] << 2)) break; 5331 5332 /* 5333 ** Calculate the lowest clock factor that allows an output 5334 ** speed not faster than the period. 5335 */ 5336 fak = (kpc - 1) / div_10M[div] + 1; 5337 5338 5339 if (fak < 4) fak = 4; /* Should never happen, too bad ... */ 5340 5341 /* 5342 ** Compute and return sync parameters for the ncr 5343 */ 5344 *fakp = fak - 4; 5345 *scntl3p = ((div+1) << 4) + (sfac < 25 ? 0x80 : 0); 5346} 5347 5348 5349/*========================================================== 5350** 5351** Set actual values, sync status and patch all ccbs of 5352** a target according to new sync/wide agreement. 5353** 5354**========================================================== 5355*/ 5356 5357static void ncr_set_sync_wide_status (struct ncb *np, u_char target) 5358{ 5359 struct ccb *cp; 5360 struct tcb *tp = &np->target[target]; 5361 5362 /* 5363 ** set actual value and sync_status 5364 */ 5365 OUTB (nc_sxfer, tp->sval); 5366 np->sync_st = tp->sval; 5367 OUTB (nc_scntl3, tp->wval); 5368 np->wide_st = tp->wval; 5369 5370 /* 5371 ** patch ALL ccbs of this target. 5372 */ 5373 for (cp = np->ccb; cp; cp = cp->link_ccb) { 5374 if (!cp->cmd) continue; 5375 if (scmd_id(cp->cmd) != target) continue; 5376 cp->phys.select.sel_scntl3 = tp->wval; 5377 cp->phys.select.sel_sxfer = tp->sval; 5378 } 5379} 5380 5381/*========================================================== 5382** 5383** Switch sync mode for current job and it's target 5384** 5385**========================================================== 5386*/ 5387 5388static void ncr_setsync (struct ncb *np, struct ccb *cp, u_char scntl3, u_char sxfer) 5389{ 5390 struct scsi_cmnd *cmd = cp->cmd; 5391 struct tcb *tp; 5392 u_char target = INB (nc_sdid) & 0x0f; 5393 u_char idiv; 5394 5395 BUG_ON(target != (scmd_id(cmd) & 0xf)); 5396 5397 tp = &np->target[target]; 5398 5399 if (!scntl3 || !(sxfer & 0x1f)) 5400 scntl3 = np->rv_scntl3; 5401 scntl3 = (scntl3 & 0xf0) | (tp->wval & EWS) | (np->rv_scntl3 & 0x07); 5402 5403 /* 5404 ** Deduce the value of controller sync period from scntl3. 5405 ** period is in tenths of nano-seconds. 5406 */ 5407 5408 idiv = ((scntl3 >> 4) & 0x7); 5409 if ((sxfer & 0x1f) && idiv) 5410 tp->period = (((sxfer>>5)+4)*div_10M[idiv-1])/np->clock_khz; 5411 else 5412 tp->period = 0xffff; 5413 5414 /* Stop there if sync parameters are unchanged */ 5415 if (tp->sval == sxfer && tp->wval == scntl3) 5416 return; 5417 tp->sval = sxfer; 5418 tp->wval = scntl3; 5419 5420 if (sxfer & 0x01f) { 5421 /* Disable extended Sreq/Sack filtering */ 5422 if (tp->period <= 2000) 5423 OUTOFFB(nc_stest2, EXT); 5424 } 5425 5426 spi_display_xfer_agreement(tp->starget); 5427 5428 /* 5429 ** set actual value and sync_status 5430 ** patch ALL ccbs of this target. 5431 */ 5432 ncr_set_sync_wide_status(np, target); 5433} 5434 5435/*========================================================== 5436** 5437** Switch wide mode for current job and it's target 5438** SCSI specs say: a SCSI device that accepts a WDTR 5439** message shall reset the synchronous agreement to 5440** asynchronous mode. 5441** 5442**========================================================== 5443*/ 5444 5445static void ncr_setwide (struct ncb *np, struct ccb *cp, u_char wide, u_char ack) 5446{ 5447 struct scsi_cmnd *cmd = cp->cmd; 5448 u16 target = INB (nc_sdid) & 0x0f; 5449 struct tcb *tp; 5450 u_char scntl3; 5451 u_char sxfer; 5452 5453 BUG_ON(target != (scmd_id(cmd) & 0xf)); 5454 5455 tp = &np->target[target]; 5456 tp->widedone = wide+1; 5457 scntl3 = (tp->wval & (~EWS)) | (wide ? EWS : 0); 5458 5459 sxfer = ack ? 0 : tp->sval; 5460 5461 /* 5462 ** Stop there if sync/wide parameters are unchanged 5463 */ 5464 if (tp->sval == sxfer && tp->wval == scntl3) return; 5465 tp->sval = sxfer; 5466 tp->wval = scntl3; 5467 5468 /* 5469 ** Bells and whistles ;-) 5470 */ 5471 if (bootverbose >= 2) { 5472 dev_info(&cmd->device->sdev_target->dev, "WIDE SCSI %sabled.\n", 5473 (scntl3 & EWS) ? "en" : "dis"); 5474 } 5475 5476 /* 5477 ** set actual value and sync_status 5478 ** patch ALL ccbs of this target. 5479 */ 5480 ncr_set_sync_wide_status(np, target); 5481} 5482 5483/*========================================================== 5484** 5485** Switch tagged mode for a target. 5486** 5487**========================================================== 5488*/ 5489 5490static void ncr_setup_tags (struct ncb *np, struct scsi_device *sdev) 5491{ 5492 unsigned char tn = sdev->id, ln = sdev->lun; 5493 struct tcb *tp = &np->target[tn]; 5494 struct lcb *lp = tp->lp[ln]; 5495 u_char reqtags, maxdepth; 5496 5497 /* 5498 ** Just in case ... 5499 */ 5500 if ((!tp) || (!lp) || !sdev) 5501 return; 5502 5503 /* 5504 ** If SCSI device queue depth is not yet set, leave here. 5505 */ 5506 if (!lp->scdev_depth) 5507 return; 5508 5509 /* 5510 ** Donnot allow more tags than the SCSI driver can queue 5511 ** for this device. 5512 ** Donnot allow more tags than we can handle. 5513 */ 5514 maxdepth = lp->scdev_depth; 5515 if (maxdepth > lp->maxnxs) maxdepth = lp->maxnxs; 5516 if (lp->maxtags > maxdepth) lp->maxtags = maxdepth; 5517 if (lp->numtags > maxdepth) lp->numtags = maxdepth; 5518 5519 /* 5520 ** only devices conformant to ANSI Version >= 2 5521 ** only devices capable of tagged commands 5522 ** only if enabled by user .. 5523 */ 5524 if (sdev->tagged_supported && lp->numtags > 1) { 5525 reqtags = lp->numtags; 5526 } else { 5527 reqtags = 1; 5528 } 5529 5530 /* 5531 ** Update max number of tags 5532 */ 5533 lp->numtags = reqtags; 5534 if (lp->numtags > lp->maxtags) 5535 lp->maxtags = lp->numtags; 5536 5537 /* 5538 ** If we want to switch tag mode, we must wait 5539 ** for no CCB to be active. 5540 */ 5541 if (reqtags > 1 && lp->usetags) { /* Stay in tagged mode */ 5542 if (lp->queuedepth == reqtags) /* Already announced */ 5543 return; 5544 lp->queuedepth = reqtags; 5545 } 5546 else if (reqtags <= 1 && !lp->usetags) { /* Stay in untagged mode */ 5547 lp->queuedepth = reqtags; 5548 return; 5549 } 5550 else { /* Want to switch tag mode */ 5551 if (lp->busyccbs) /* If not yet safe, return */ 5552 return; 5553 lp->queuedepth = reqtags; 5554 lp->usetags = reqtags > 1 ? 1 : 0; 5555 } 5556 5557 /* 5558 ** Patch the lun mini-script, according to tag mode. 5559 */ 5560 lp->jump_tag.l_paddr = lp->usetags? 5561 cpu_to_scr(NCB_SCRIPT_PHYS(np, resel_tag)) : 5562 cpu_to_scr(NCB_SCRIPT_PHYS(np, resel_notag)); 5563 5564 /* 5565 ** Announce change to user. 5566 */ 5567 if (bootverbose) { 5568 if (lp->usetags) { 5569 dev_info(&sdev->sdev_gendev, 5570 "tagged command queue depth set to %d\n", 5571 reqtags); 5572 } else { 5573 dev_info(&sdev->sdev_gendev, 5574 "tagged command queueing disabled\n"); 5575 } 5576 } 5577} 5578 5579/*========================================================== 5580** 5581** 5582** ncr timeout handler. 5583** 5584** 5585**========================================================== 5586** 5587** Misused to keep the driver running when 5588** interrupts are not configured correctly. 5589** 5590**---------------------------------------------------------- 5591*/ 5592 5593static void ncr_timeout (struct ncb *np) 5594{ 5595 u_long thistime = jiffies; 5596 5597 /* 5598 ** If release process in progress, let's go 5599 ** Set the release stage from 1 to 2 to synchronize 5600 ** with the release process. 5601 */ 5602 5603 if (np->release_stage) { 5604 if (np->release_stage == 1) np->release_stage = 2; 5605 return; 5606 } 5607 5608 np->timer.expires = jiffies + SCSI_NCR_TIMER_INTERVAL; 5609 add_timer(&np->timer); 5610 5611 /* 5612 ** If we are resetting the ncr, wait for settle_time before 5613 ** clearing it. Then command processing will be resumed. 5614 */ 5615 if (np->settle_time) { 5616 if (np->settle_time <= thistime) { 5617 if (bootverbose > 1) 5618 printk("%s: command processing resumed\n", ncr_name(np)); 5619 np->settle_time = 0; 5620 np->disc = 1; 5621 requeue_waiting_list(np); 5622 } 5623 return; 5624 } 5625 5626 /* 5627 ** Since the generic scsi driver only allows us 0.5 second 5628 ** to perform abort of a command, we must look at ccbs about 5629 ** every 0.25 second. 5630 */ 5631 if (np->lasttime + 4*HZ < thistime) { 5632 /* 5633 ** block ncr interrupts 5634 */ 5635 np->lasttime = thistime; 5636 } 5637 5638#ifdef SCSI_NCR_BROKEN_INTR 5639 if (INB(nc_istat) & (INTF|SIP|DIP)) { 5640 5641 /* 5642 ** Process pending interrupts. 5643 */ 5644 if (DEBUG_FLAGS & DEBUG_TINY) printk ("{"); 5645 ncr_exception (np); 5646 if (DEBUG_FLAGS & DEBUG_TINY) printk ("}"); 5647 } 5648#endif /* SCSI_NCR_BROKEN_INTR */ 5649} 5650 5651/*========================================================== 5652** 5653** log message for real hard errors 5654** 5655** "ncr0 targ 0?: ERROR (ds:si) (so-si-sd) (sxfer/scntl3) @ name (dsp:dbc)." 5656** " reg: r0 r1 r2 r3 r4 r5 r6 ..... rf." 5657** 5658** exception register: 5659** ds: dstat 5660** si: sist 5661** 5662** SCSI bus lines: 5663** so: control lines as driver by NCR. 5664** si: control lines as seen by NCR. 5665** sd: scsi data lines as seen by NCR. 5666** 5667** wide/fastmode: 5668** sxfer: (see the manual) 5669** scntl3: (see the manual) 5670** 5671** current script command: 5672** dsp: script address (relative to start of script). 5673** dbc: first word of script command. 5674** 5675** First 16 register of the chip: 5676** r0..rf 5677** 5678**========================================================== 5679*/ 5680 5681static void ncr_log_hard_error(struct ncb *np, u16 sist, u_char dstat) 5682{ 5683 u32 dsp; 5684 int script_ofs; 5685 int script_size; 5686 char *script_name; 5687 u_char *script_base; 5688 int i; 5689 5690 dsp = INL (nc_dsp); 5691 5692 if (dsp > np->p_script && dsp <= np->p_script + sizeof(struct script)) { 5693 script_ofs = dsp - np->p_script; 5694 script_size = sizeof(struct script); 5695 script_base = (u_char *) np->script0; 5696 script_name = "script"; 5697 } 5698 else if (np->p_scripth < dsp && 5699 dsp <= np->p_scripth + sizeof(struct scripth)) { 5700 script_ofs = dsp - np->p_scripth; 5701 script_size = sizeof(struct scripth); 5702 script_base = (u_char *) np->scripth0; 5703 script_name = "scripth"; 5704 } else { 5705 script_ofs = dsp; 5706 script_size = 0; 5707 script_base = NULL; 5708 script_name = "mem"; 5709 } 5710 5711 printk ("%s:%d: ERROR (%x:%x) (%x-%x-%x) (%x/%x) @ (%s %x:%08x).\n", 5712 ncr_name (np), (unsigned)INB (nc_sdid)&0x0f, dstat, sist, 5713 (unsigned)INB (nc_socl), (unsigned)INB (nc_sbcl), (unsigned)INB (nc_sbdl), 5714 (unsigned)INB (nc_sxfer),(unsigned)INB (nc_scntl3), script_name, script_ofs, 5715 (unsigned)INL (nc_dbc)); 5716 5717 if (((script_ofs & 3) == 0) && 5718 (unsigned)script_ofs < script_size) { 5719 printk ("%s: script cmd = %08x\n", ncr_name(np), 5720 scr_to_cpu((int) *(ncrcmd *)(script_base + script_ofs))); 5721 } 5722 5723 printk ("%s: regdump:", ncr_name(np)); 5724 for (i=0; i<16;i++) 5725 printk (" %02x", (unsigned)INB_OFF(i)); 5726 printk (".\n"); 5727} 5728 5729/*============================================================ 5730** 5731** ncr chip exception handler. 5732** 5733**============================================================ 5734** 5735** In normal cases, interrupt conditions occur one at a 5736** time. The ncr is able to stack in some extra registers 5737** other interrupts that will occur after the first one. 5738** But, several interrupts may occur at the same time. 5739** 5740** We probably should only try to deal with the normal 5741** case, but it seems that multiple interrupts occur in 5742** some cases that are not abnormal at all. 5743** 5744** The most frequent interrupt condition is Phase Mismatch. 5745** We should want to service this interrupt quickly. 5746** A SCSI parity error may be delivered at the same time. 5747** The SIR interrupt is not very frequent in this driver, 5748** since the INTFLY is likely used for command completion 5749** signaling. 5750** The Selection Timeout interrupt may be triggered with 5751** IID and/or UDC. 5752** The SBMC interrupt (SCSI Bus Mode Change) may probably 5753** occur at any time. 5754** 5755** This handler try to deal as cleverly as possible with all 5756** the above. 5757** 5758**============================================================ 5759*/ 5760 5761void ncr_exception (struct ncb *np) 5762{ 5763 u_char istat, dstat; 5764 u16 sist; 5765 int i; 5766 5767 /* 5768 ** interrupt on the fly ? 5769 ** Since the global header may be copied back to a CCB 5770 ** using a posted PCI memory write, the last operation on 5771 ** the istat register is a READ in order to flush posted 5772 ** PCI write commands. 5773 */ 5774 istat = INB (nc_istat); 5775 if (istat & INTF) { 5776 OUTB (nc_istat, (istat & SIGP) | INTF); 5777 istat = INB (nc_istat); 5778 if (DEBUG_FLAGS & DEBUG_TINY) printk ("F "); 5779 ncr_wakeup_done (np); 5780 } 5781 5782 if (!(istat & (SIP|DIP))) 5783 return; 5784 5785 if (istat & CABRT) 5786 OUTB (nc_istat, CABRT); 5787 5788 /* 5789 ** Steinbach's Guideline for Systems Programming: 5790 ** Never test for an error condition you don't know how to handle. 5791 */ 5792 5793 sist = (istat & SIP) ? INW (nc_sist) : 0; 5794 dstat = (istat & DIP) ? INB (nc_dstat) : 0; 5795 5796 if (DEBUG_FLAGS & DEBUG_TINY) 5797 printk ("<%d|%x:%x|%x:%x>", 5798 (int)INB(nc_scr0), 5799 dstat,sist, 5800 (unsigned)INL(nc_dsp), 5801 (unsigned)INL(nc_dbc)); 5802 5803 /*======================================================== 5804 ** First, interrupts we want to service cleanly. 5805 ** 5806 ** Phase mismatch is the most frequent interrupt, and 5807 ** so we have to service it as quickly and as cleanly 5808 ** as possible. 5809 ** Programmed interrupts are rarely used in this driver, 5810 ** but we must handle them cleanly anyway. 5811 ** We try to deal with PAR and SBMC combined with 5812 ** some other interrupt(s). 5813 **========================================================= 5814 */ 5815 5816 if (!(sist & (STO|GEN|HTH|SGE|UDC|RST)) && 5817 !(dstat & (MDPE|BF|ABRT|IID))) { 5818 if ((sist & SBMC) && ncr_int_sbmc (np)) 5819 return; 5820 if ((sist & PAR) && ncr_int_par (np)) 5821 return; 5822 if (sist & MA) { 5823 ncr_int_ma (np); 5824 return; 5825 } 5826 if (dstat & SIR) { 5827 ncr_int_sir (np); 5828 return; 5829 } 5830 /* 5831 ** DEL 397 - 53C875 Rev 3 - Part Number 609-0392410 - ITEM 2. 5832 */ 5833 if (!(sist & (SBMC|PAR)) && !(dstat & SSI)) { 5834 printk( "%s: unknown interrupt(s) ignored, " 5835 "ISTAT=%x DSTAT=%x SIST=%x\n", 5836 ncr_name(np), istat, dstat, sist); 5837 return; 5838 } 5839 OUTONB_STD (); 5840 return; 5841 } 5842 5843 /*======================================================== 5844 ** Now, interrupts that need some fixing up. 5845 ** Order and multiple interrupts is so less important. 5846 ** 5847 ** If SRST has been asserted, we just reset the chip. 5848 ** 5849 ** Selection is intirely handled by the chip. If the 5850 ** chip says STO, we trust it. Seems some other 5851 ** interrupts may occur at the same time (UDC, IID), so 5852 ** we ignore them. In any case we do enough fix-up 5853 ** in the service routine. 5854 ** We just exclude some fatal dma errors. 5855 **========================================================= 5856 */ 5857 5858 if (sist & RST) { 5859 ncr_init (np, 1, bootverbose ? "scsi reset" : NULL, HS_RESET); 5860 return; 5861 } 5862 5863 if ((sist & STO) && 5864 !(dstat & (MDPE|BF|ABRT))) { 5865 /* 5866 ** DEL 397 - 53C875 Rev 3 - Part Number 609-0392410 - ITEM 1. 5867 */ 5868 OUTONB (nc_ctest3, CLF); 5869 5870 ncr_int_sto (np); 5871 return; 5872 } 5873 5874 /*========================================================= 5875 ** Now, interrupts we are not able to recover cleanly. 5876 ** (At least for the moment). 5877 ** 5878 ** Do the register dump. 5879 ** Log message for real hard errors. 5880 ** Clear all fifos. 5881 ** For MDPE, BF, ABORT, IID, SGE and HTH we reset the 5882 ** BUS and the chip. 5883 ** We are more soft for UDC. 5884 **========================================================= 5885 */ 5886 5887 if (time_after(jiffies, np->regtime)) { 5888 np->regtime = jiffies + 10*HZ; 5889 for (i = 0; i<sizeof(np->regdump); i++) 5890 ((char*)&np->regdump)[i] = INB_OFF(i); 5891 np->regdump.nc_dstat = dstat; 5892 np->regdump.nc_sist = sist; 5893 } 5894 5895 ncr_log_hard_error(np, sist, dstat); 5896 5897 printk ("%s: have to clear fifos.\n", ncr_name (np)); 5898 OUTB (nc_stest3, TE|CSF); 5899 OUTONB (nc_ctest3, CLF); 5900 5901 if ((sist & (SGE)) || 5902 (dstat & (MDPE|BF|ABRT|IID))) { 5903 ncr_start_reset(np); 5904 return; 5905 } 5906 5907 if (sist & HTH) { 5908 printk ("%s: handshake timeout\n", ncr_name(np)); 5909 ncr_start_reset(np); 5910 return; 5911 } 5912 5913 if (sist & UDC) { 5914 printk ("%s: unexpected disconnect\n", ncr_name(np)); 5915 OUTB (HS_PRT, HS_UNEXPECTED); 5916 OUTL_DSP (NCB_SCRIPT_PHYS (np, cleanup)); 5917 return; 5918 } 5919 5920 /*========================================================= 5921 ** We just miss the cause of the interrupt. :( 5922 ** Print a message. The timeout will do the real work. 5923 **========================================================= 5924 */ 5925 printk ("%s: unknown interrupt\n", ncr_name(np)); 5926} 5927 5928/*========================================================== 5929** 5930** ncr chip exception handler for selection timeout 5931** 5932**========================================================== 5933** 5934** There seems to be a bug in the 53c810. 5935** Although a STO-Interrupt is pending, 5936** it continues executing script commands. 5937** But it will fail and interrupt (IID) on 5938** the next instruction where it's looking 5939** for a valid phase. 5940** 5941**---------------------------------------------------------- 5942*/ 5943 5944void ncr_int_sto (struct ncb *np) 5945{ 5946 u_long dsa; 5947 struct ccb *cp; 5948 if (DEBUG_FLAGS & DEBUG_TINY) printk ("T"); 5949 5950 /* 5951 ** look for ccb and set the status. 5952 */ 5953 5954 dsa = INL (nc_dsa); 5955 cp = np->ccb; 5956 while (cp && (CCB_PHYS (cp, phys) != dsa)) 5957 cp = cp->link_ccb; 5958 5959 if (cp) { 5960 cp-> host_status = HS_SEL_TIMEOUT; 5961 ncr_complete (np, cp); 5962 } 5963 5964 /* 5965 ** repair start queue and jump to start point. 5966 */ 5967 5968 OUTL_DSP (NCB_SCRIPTH_PHYS (np, sto_restart)); 5969 return; 5970} 5971 5972/*========================================================== 5973** 5974** ncr chip exception handler for SCSI bus mode change 5975** 5976**========================================================== 5977** 5978** spi2-r12 11.2.3 says a transceiver mode change must 5979** generate a reset event and a device that detects a reset 5980** event shall initiate a hard reset. It says also that a 5981** device that detects a mode change shall set data transfer 5982** mode to eight bit asynchronous, etc... 5983** So, just resetting should be enough. 5984** 5985** 5986**---------------------------------------------------------- 5987*/ 5988 5989static int ncr_int_sbmc (struct ncb *np) 5990{ 5991 u_char scsi_mode = INB (nc_stest4) & SMODE; 5992 5993 if (scsi_mode != np->scsi_mode) { 5994 printk("%s: SCSI bus mode change from %x to %x.\n", 5995 ncr_name(np), np->scsi_mode, scsi_mode); 5996 5997 np->scsi_mode = scsi_mode; 5998 5999 6000 /* 6001 ** Suspend command processing for 1 second and 6002 ** reinitialize all except the chip. 6003 */ 6004 np->settle_time = jiffies + HZ; 6005 ncr_init (np, 0, bootverbose ? "scsi mode change" : NULL, HS_RESET); 6006 return 1; 6007 } 6008 return 0; 6009} 6010 6011/*========================================================== 6012** 6013** ncr chip exception handler for SCSI parity error. 6014** 6015**========================================================== 6016** 6017** 6018**---------------------------------------------------------- 6019*/ 6020 6021static int ncr_int_par (struct ncb *np) 6022{ 6023 u_char hsts = INB (HS_PRT); 6024 u32 dbc = INL (nc_dbc); 6025 u_char sstat1 = INB (nc_sstat1); 6026 int phase = -1; 6027 int msg = -1; 6028 u32 jmp; 6029 6030 printk("%s: SCSI parity error detected: SCR1=%d DBC=%x SSTAT1=%x\n", 6031 ncr_name(np), hsts, dbc, sstat1); 6032 6033 /* 6034 * Ignore the interrupt if the NCR is not connected 6035 * to the SCSI bus, since the right work should have 6036 * been done on unexpected disconnection handling. 6037 */ 6038 if (!(INB (nc_scntl1) & ISCON)) 6039 return 0; 6040 6041 /* 6042 * If the nexus is not clearly identified, reset the bus. 6043 * We will try to do better later. 6044 */ 6045 if (hsts & HS_INVALMASK) 6046 goto reset_all; 6047 6048 /* 6049 * If the SCSI parity error occurs in MSG IN phase, prepare a 6050 * MSG PARITY message. Otherwise, prepare a INITIATOR DETECTED 6051 * ERROR message and let the device decide to retry the command 6052 * or to terminate with check condition. If we were in MSG IN 6053 * phase waiting for the response of a negotiation, we will 6054 * get SIR_NEGO_FAILED at dispatch. 6055 */ 6056 if (!(dbc & 0xc0000000)) 6057 phase = (dbc >> 24) & 7; 6058 if (phase == 7) 6059 msg = MSG_PARITY_ERROR; 6060 else 6061 msg = INITIATOR_ERROR; 6062 6063 6064 /* 6065 * If the NCR stopped on a MOVE ^ DATA_IN, we jump to a 6066 * script that will ignore all data in bytes until phase 6067 * change, since we are not sure the chip will wait the phase 6068 * change prior to delivering the interrupt. 6069 */ 6070 if (phase == 1) 6071 jmp = NCB_SCRIPTH_PHYS (np, par_err_data_in); 6072 else 6073 jmp = NCB_SCRIPTH_PHYS (np, par_err_other); 6074 6075 OUTONB (nc_ctest3, CLF ); /* clear dma fifo */ 6076 OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */ 6077 6078 np->msgout[0] = msg; 6079 OUTL_DSP (jmp); 6080 return 1; 6081 6082reset_all: 6083 ncr_start_reset(np); 6084 return 1; 6085} 6086 6087/*========================================================== 6088** 6089** 6090** ncr chip exception handler for phase errors. 6091** 6092** 6093**========================================================== 6094** 6095** We have to construct a new transfer descriptor, 6096** to transfer the rest of the current block. 6097** 6098**---------------------------------------------------------- 6099*/ 6100 6101static void ncr_int_ma (struct ncb *np) 6102{ 6103 u32 dbc; 6104 u32 rest; 6105 u32 dsp; 6106 u32 dsa; 6107 u32 nxtdsp; 6108 u32 newtmp; 6109 u32 *vdsp; 6110 u32 oadr, olen; 6111 u32 *tblp; 6112 ncrcmd *newcmd; 6113 u_char cmd, sbcl; 6114 struct ccb *cp; 6115 6116 dsp = INL (nc_dsp); 6117 dbc = INL (nc_dbc); 6118 sbcl = INB (nc_sbcl); 6119 6120 cmd = dbc >> 24; 6121 rest = dbc & 0xffffff; 6122 6123 /* 6124 ** Take into account dma fifo and various buffers and latches, 6125 ** only if the interrupted phase is an OUTPUT phase. 6126 */ 6127 6128 if ((cmd & 1) == 0) { 6129 u_char ctest5, ss0, ss2; 6130 u16 delta; 6131 6132 ctest5 = (np->rv_ctest5 & DFS) ? INB (nc_ctest5) : 0; 6133 if (ctest5 & DFS) 6134 delta=(((ctest5 << 8) | (INB (nc_dfifo) & 0xff)) - rest) & 0x3ff; 6135 else 6136 delta=(INB (nc_dfifo) - rest) & 0x7f; 6137 6138 /* 6139 ** The data in the dma fifo has not been transferred to 6140 ** the target -> add the amount to the rest 6141 ** and clear the data. 6142 ** Check the sstat2 register in case of wide transfer. 6143 */ 6144 6145 rest += delta; 6146 ss0 = INB (nc_sstat0); 6147 if (ss0 & OLF) rest++; 6148 if (ss0 & ORF) rest++; 6149 if (INB(nc_scntl3) & EWS) { 6150 ss2 = INB (nc_sstat2); 6151 if (ss2 & OLF1) rest++; 6152 if (ss2 & ORF1) rest++; 6153 } 6154 6155 if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_PHASE)) 6156 printk ("P%x%x RL=%d D=%d SS0=%x ", cmd&7, sbcl&7, 6157 (unsigned) rest, (unsigned) delta, ss0); 6158 6159 } else { 6160 if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_PHASE)) 6161 printk ("P%x%x RL=%d ", cmd&7, sbcl&7, rest); 6162 } 6163 6164 /* 6165 ** Clear fifos. 6166 */ 6167 OUTONB (nc_ctest3, CLF ); /* clear dma fifo */ 6168 OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */ 6169 6170 /* 6171 ** locate matching cp. 6172 ** if the interrupted phase is DATA IN or DATA OUT, 6173 ** trust the global header. 6174 */ 6175 dsa = INL (nc_dsa); 6176 if (!(cmd & 6)) { 6177 cp = np->header.cp; 6178 if (CCB_PHYS(cp, phys) != dsa) 6179 cp = NULL; 6180 } else { 6181 cp = np->ccb; 6182 while (cp && (CCB_PHYS (cp, phys) != dsa)) 6183 cp = cp->link_ccb; 6184 } 6185 6186 /* 6187 ** try to find the interrupted script command, 6188 ** and the address at which to continue. 6189 */ 6190 vdsp = NULL; 6191 nxtdsp = 0; 6192 if (dsp > np->p_script && 6193 dsp <= np->p_script + sizeof(struct script)) { 6194 vdsp = (u32 *)((char*)np->script0 + (dsp-np->p_script-8)); 6195 nxtdsp = dsp; 6196 } 6197 else if (dsp > np->p_scripth && 6198 dsp <= np->p_scripth + sizeof(struct scripth)) { 6199 vdsp = (u32 *)((char*)np->scripth0 + (dsp-np->p_scripth-8)); 6200 nxtdsp = dsp; 6201 } 6202 else if (cp) { 6203 if (dsp == CCB_PHYS (cp, patch[2])) { 6204 vdsp = &cp->patch[0]; 6205 nxtdsp = scr_to_cpu(vdsp[3]); 6206 } 6207 else if (dsp == CCB_PHYS (cp, patch[6])) { 6208 vdsp = &cp->patch[4]; 6209 nxtdsp = scr_to_cpu(vdsp[3]); 6210 } 6211 } 6212 6213 /* 6214 ** log the information 6215 */ 6216 6217 if (DEBUG_FLAGS & DEBUG_PHASE) { 6218 printk ("\nCP=%p CP2=%p DSP=%x NXT=%x VDSP=%p CMD=%x ", 6219 cp, np->header.cp, 6220 (unsigned)dsp, 6221 (unsigned)nxtdsp, vdsp, cmd); 6222 } 6223 6224 /* 6225 ** cp=0 means that the DSA does not point to a valid control 6226 ** block. This should not happen since we donnot use multi-byte 6227 ** move while we are being reselected ot after command complete. 6228 ** We are not able to recover from such a phase error. 6229 */ 6230 if (!cp) { 6231 printk ("%s: SCSI phase error fixup: " 6232 "CCB already dequeued (0x%08lx)\n", 6233 ncr_name (np), (u_long) np->header.cp); 6234 goto reset_all; 6235 } 6236 6237 /* 6238 ** get old startaddress and old length. 6239 */ 6240 6241 oadr = scr_to_cpu(vdsp[1]); 6242 6243 if (cmd & 0x10) { /* Table indirect */ 6244 tblp = (u32 *) ((char*) &cp->phys + oadr); 6245 olen = scr_to_cpu(tblp[0]); 6246 oadr = scr_to_cpu(tblp[1]); 6247 } else { 6248 tblp = (u32 *) 0; 6249 olen = scr_to_cpu(vdsp[0]) & 0xffffff; 6250 } 6251 6252 if (DEBUG_FLAGS & DEBUG_PHASE) { 6253 printk ("OCMD=%x\nTBLP=%p OLEN=%x OADR=%x\n", 6254 (unsigned) (scr_to_cpu(vdsp[0]) >> 24), 6255 tblp, 6256 (unsigned) olen, 6257 (unsigned) oadr); 6258 } 6259 6260 /* 6261 ** check cmd against assumed interrupted script command. 6262 */ 6263 6264 if (cmd != (scr_to_cpu(vdsp[0]) >> 24)) { 6265 PRINT_ADDR(cp->cmd, "internal error: cmd=%02x != %02x=(vdsp[0] " 6266 ">> 24)\n", cmd, scr_to_cpu(vdsp[0]) >> 24); 6267 6268 goto reset_all; 6269 } 6270 6271 /* 6272 ** cp != np->header.cp means that the header of the CCB 6273 ** currently being processed has not yet been copied to 6274 ** the global header area. That may happen if the device did 6275 ** not accept all our messages after having been selected. 6276 */ 6277 if (cp != np->header.cp) { 6278 printk ("%s: SCSI phase error fixup: " 6279 "CCB address mismatch (0x%08lx != 0x%08lx)\n", 6280 ncr_name (np), (u_long) cp, (u_long) np->header.cp); 6281 } 6282 6283 /* 6284 ** if old phase not dataphase, leave here. 6285 */ 6286 6287 if (cmd & 0x06) { 6288 PRINT_ADDR(cp->cmd, "phase change %x-%x %d@%08x resid=%d.\n", 6289 cmd&7, sbcl&7, (unsigned)olen, 6290 (unsigned)oadr, (unsigned)rest); 6291 goto unexpected_phase; 6292 } 6293 6294 /* 6295 ** choose the correct patch area. 6296 ** if savep points to one, choose the other. 6297 */ 6298 6299 newcmd = cp->patch; 6300 newtmp = CCB_PHYS (cp, patch); 6301 if (newtmp == scr_to_cpu(cp->phys.header.savep)) { 6302 newcmd = &cp->patch[4]; 6303 newtmp = CCB_PHYS (cp, patch[4]); 6304 } 6305 6306 /* 6307 ** fillin the commands 6308 */ 6309 6310 newcmd[0] = cpu_to_scr(((cmd & 0x0f) << 24) | rest); 6311 newcmd[1] = cpu_to_scr(oadr + olen - rest); 6312 newcmd[2] = cpu_to_scr(SCR_JUMP); 6313 newcmd[3] = cpu_to_scr(nxtdsp); 6314 6315 if (DEBUG_FLAGS & DEBUG_PHASE) { 6316 PRINT_ADDR(cp->cmd, "newcmd[%d] %x %x %x %x.\n", 6317 (int) (newcmd - cp->patch), 6318 (unsigned)scr_to_cpu(newcmd[0]), 6319 (unsigned)scr_to_cpu(newcmd[1]), 6320 (unsigned)scr_to_cpu(newcmd[2]), 6321 (unsigned)scr_to_cpu(newcmd[3])); 6322 } 6323 /* 6324 ** fake the return address (to the patch). 6325 ** and restart script processor at dispatcher. 6326 */ 6327 OUTL (nc_temp, newtmp); 6328 OUTL_DSP (NCB_SCRIPT_PHYS (np, dispatch)); 6329 return; 6330 6331 /* 6332 ** Unexpected phase changes that occurs when the current phase 6333 ** is not a DATA IN or DATA OUT phase are due to error conditions. 6334 ** Such event may only happen when the SCRIPTS is using a 6335 ** multibyte SCSI MOVE. 6336 ** 6337 ** Phase change Some possible cause 6338 ** 6339 ** COMMAND --> MSG IN SCSI parity error detected by target. 6340 ** COMMAND --> STATUS Bad command or refused by target. 6341 ** MSG OUT --> MSG IN Message rejected by target. 6342 ** MSG OUT --> COMMAND Bogus target that discards extended 6343 ** negotiation messages. 6344 ** 6345 ** The code below does not care of the new phase and so 6346 ** trusts the target. Why to annoy it ? 6347 ** If the interrupted phase is COMMAND phase, we restart at 6348 ** dispatcher. 6349 ** If a target does not get all the messages after selection, 6350 ** the code assumes blindly that the target discards extended 6351 ** messages and clears the negotiation status. 6352 ** If the target does not want all our response to negotiation, 6353 ** we force a SIR_NEGO_PROTO interrupt (it is a hack that avoids 6354 ** bloat for such a should_not_happen situation). 6355 ** In all other situation, we reset the BUS. 6356 ** Are these assumptions reasonable ? (Wait and see ...) 6357 */ 6358unexpected_phase: 6359 dsp -= 8; 6360 nxtdsp = 0; 6361 6362 switch (cmd & 7) { 6363 case 2: /* COMMAND phase */ 6364 nxtdsp = NCB_SCRIPT_PHYS (np, dispatch); 6365 break; 6366 case 6: /* MSG OUT phase */ 6367 np->scripth->nxtdsp_go_on[0] = cpu_to_scr(dsp + 8); 6368 if (dsp == NCB_SCRIPT_PHYS (np, send_ident)) { 6369 cp->host_status = HS_BUSY; 6370 nxtdsp = NCB_SCRIPTH_PHYS (np, clratn_go_on); 6371 } 6372 else if (dsp == NCB_SCRIPTH_PHYS (np, send_wdtr) || 6373 dsp == NCB_SCRIPTH_PHYS (np, send_sdtr)) { 6374 nxtdsp = NCB_SCRIPTH_PHYS (np, nego_bad_phase); 6375 } 6376 break; 6377 } 6378 6379 if (nxtdsp) { 6380 OUTL_DSP (nxtdsp); 6381 return; 6382 } 6383 6384reset_all: 6385 ncr_start_reset(np); 6386} 6387 6388 6389static void ncr_sir_to_redo(struct ncb *np, int num, struct ccb *cp) 6390{ 6391 struct scsi_cmnd *cmd = cp->cmd; 6392 struct tcb *tp = &np->target[cmd->device->id]; 6393 struct lcb *lp = tp->lp[cmd->device->lun]; 6394 struct list_head *qp; 6395 struct ccb * cp2; 6396 int disc_cnt = 0; 6397 int busy_cnt = 0; 6398 u32 startp; 6399 u_char s_status = INB (SS_PRT); 6400 6401 /* 6402 ** Let the SCRIPTS processor skip all not yet started CCBs, 6403 ** and count disconnected CCBs. Since the busy queue is in 6404 ** the same order as the chip start queue, disconnected CCBs 6405 ** are before cp and busy ones after. 6406 */ 6407 if (lp) { 6408 qp = lp->busy_ccbq.prev; 6409 while (qp != &lp->busy_ccbq) { 6410 cp2 = list_entry(qp, struct ccb, link_ccbq); 6411 qp = qp->prev; 6412 ++busy_cnt; 6413 if (cp2 == cp) 6414 break; 6415 cp2->start.schedule.l_paddr = 6416 cpu_to_scr(NCB_SCRIPTH_PHYS (np, skip)); 6417 } 6418 lp->held_ccb = cp; /* Requeue when this one completes */ 6419 disc_cnt = lp->queuedccbs - busy_cnt; 6420 } 6421 6422 switch(s_status) { 6423 default: /* Just for safety, should never happen */ 6424 case S_QUEUE_FULL: 6425 /* 6426 ** Decrease number of tags to the number of 6427 ** disconnected commands. 6428 */ 6429 if (!lp) 6430 goto out; 6431 if (bootverbose >= 1) { 6432 PRINT_ADDR(cmd, "QUEUE FULL! %d busy, %d disconnected " 6433 "CCBs\n", busy_cnt, disc_cnt); 6434 } 6435 if (disc_cnt < lp->numtags) { 6436 lp->numtags = disc_cnt > 2 ? disc_cnt : 2; 6437 lp->num_good = 0; 6438 ncr_setup_tags (np, cmd->device); 6439 } 6440 /* 6441 ** Requeue the command to the start queue. 6442 ** If any disconnected commands, 6443 ** Clear SIGP. 6444 ** Jump to reselect. 6445 */ 6446 cp->phys.header.savep = cp->startp; 6447 cp->host_status = HS_BUSY; 6448 cp->scsi_status = S_ILLEGAL; 6449 6450 ncr_put_start_queue(np, cp); 6451 if (disc_cnt) 6452 INB (nc_ctest2); /* Clear SIGP */ 6453 OUTL_DSP (NCB_SCRIPT_PHYS (np, reselect)); 6454 return; 6455 case S_TERMINATED: 6456 case S_CHECK_COND: 6457 /* 6458 ** If we were requesting sense, give up. 6459 */ 6460 if (cp->auto_sense) 6461 goto out; 6462 6463 /* 6464 ** Device returned CHECK CONDITION status. 6465 ** Prepare all needed data strutures for getting 6466 ** sense data. 6467 ** 6468 ** identify message 6469 */ 6470 cp->scsi_smsg2[0] = IDENTIFY(0, cmd->device->lun); 6471 cp->phys.smsg.addr = cpu_to_scr(CCB_PHYS (cp, scsi_smsg2)); 6472 cp->phys.smsg.size = cpu_to_scr(1); 6473 6474 /* 6475 ** sense command 6476 */ 6477 cp->phys.cmd.addr = cpu_to_scr(CCB_PHYS (cp, sensecmd)); 6478 cp->phys.cmd.size = cpu_to_scr(6); 6479 6480 /* 6481 ** patch requested size into sense command 6482 */ 6483 cp->sensecmd[0] = 0x03; 6484 cp->sensecmd[1] = cmd->device->lun << 5; 6485 cp->sensecmd[4] = sizeof(cp->sense_buf); 6486 6487 /* 6488 ** sense data 6489 */ 6490 memset(cp->sense_buf, 0, sizeof(cp->sense_buf)); 6491 cp->phys.sense.addr = cpu_to_scr(CCB_PHYS(cp,sense_buf[0])); 6492 cp->phys.sense.size = cpu_to_scr(sizeof(cp->sense_buf)); 6493 6494 /* 6495 ** requeue the command. 6496 */ 6497 startp = cpu_to_scr(NCB_SCRIPTH_PHYS (np, sdata_in)); 6498 6499 cp->phys.header.savep = startp; 6500 cp->phys.header.goalp = startp + 24; 6501 cp->phys.header.lastp = startp; 6502 cp->phys.header.wgoalp = startp + 24; 6503 cp->phys.header.wlastp = startp; 6504 6505 cp->host_status = HS_BUSY; 6506 cp->scsi_status = S_ILLEGAL; 6507 cp->auto_sense = s_status; 6508 6509 cp->start.schedule.l_paddr = 6510 cpu_to_scr(NCB_SCRIPT_PHYS (np, select)); 6511 6512 /* 6513 ** Select without ATN for quirky devices. 6514 */ 6515 if (cmd->device->select_no_atn) 6516 cp->start.schedule.l_paddr = 6517 cpu_to_scr(NCB_SCRIPTH_PHYS (np, select_no_atn)); 6518 6519 ncr_put_start_queue(np, cp); 6520 6521 OUTL_DSP (NCB_SCRIPT_PHYS (np, start)); 6522 return; 6523 } 6524 6525out: 6526 OUTONB_STD (); 6527 return; 6528} 6529 6530 6531/*========================================================== 6532** 6533** 6534** ncr chip exception handler for programmed interrupts. 6535** 6536** 6537**========================================================== 6538*/ 6539 6540void ncr_int_sir (struct ncb *np) 6541{ 6542 u_char scntl3; 6543 u_char chg, ofs, per, fak, wide; 6544 u_char num = INB (nc_dsps); 6545 struct ccb *cp=NULL; 6546 u_long dsa = INL (nc_dsa); 6547 u_char target = INB (nc_sdid) & 0x0f; 6548 struct tcb *tp = &np->target[target]; 6549 struct scsi_target *starget = tp->starget; 6550 6551 if (DEBUG_FLAGS & DEBUG_TINY) printk ("I#%d", num); 6552 6553 switch (num) { 6554 case SIR_INTFLY: 6555 /* 6556 ** This is used for HP Zalon/53c720 where INTFLY 6557 ** operation is currently broken. 6558 */ 6559 ncr_wakeup_done(np); 6560#ifdef SCSI_NCR_CCB_DONE_SUPPORT 6561 OUTL(nc_dsp, NCB_SCRIPT_PHYS (np, done_end) + 8); 6562#else 6563 OUTL(nc_dsp, NCB_SCRIPT_PHYS (np, start)); 6564#endif 6565 return; 6566 case SIR_RESEL_NO_MSG_IN: 6567 case SIR_RESEL_NO_IDENTIFY: 6568 /* 6569 ** If devices reselecting without sending an IDENTIFY 6570 ** message still exist, this should help. 6571 ** We just assume lun=0, 1 CCB, no tag. 6572 */ 6573 if (tp->lp[0]) { 6574 OUTL_DSP (scr_to_cpu(tp->lp[0]->jump_ccb[0])); 6575 return; 6576 } 6577 case SIR_RESEL_BAD_TARGET: /* Will send a TARGET RESET message */ 6578 case SIR_RESEL_BAD_LUN: /* Will send a TARGET RESET message */ 6579 case SIR_RESEL_BAD_I_T_L_Q: /* Will send an ABORT TAG message */ 6580 case SIR_RESEL_BAD_I_T_L: /* Will send an ABORT message */ 6581 printk ("%s:%d: SIR %d, " 6582 "incorrect nexus identification on reselection\n", 6583 ncr_name (np), target, num); 6584 goto out; 6585 case SIR_DONE_OVERFLOW: 6586 printk ("%s:%d: SIR %d, " 6587 "CCB done queue overflow\n", 6588 ncr_name (np), target, num); 6589 goto out; 6590 case SIR_BAD_STATUS: 6591 cp = np->header.cp; 6592 if (!cp || CCB_PHYS (cp, phys) != dsa) 6593 goto out; 6594 ncr_sir_to_redo(np, num, cp); 6595 return; 6596 default: 6597 /* 6598 ** lookup the ccb 6599 */ 6600 cp = np->ccb; 6601 while (cp && (CCB_PHYS (cp, phys) != dsa)) 6602 cp = cp->link_ccb; 6603 6604 BUG_ON(!cp); 6605 BUG_ON(cp != np->header.cp); 6606 6607 if (!cp || cp != np->header.cp) 6608 goto out; 6609 } 6610 6611 switch (num) { 6612/*----------------------------------------------------------------------------- 6613** 6614** Was Sie schon immer ueber transfermode negotiation wissen wollten ... 6615** ("Everything you've always wanted to know about transfer mode 6616** negotiation") 6617** 6618** We try to negotiate sync and wide transfer only after 6619** a successful inquire command. We look at byte 7 of the 6620** inquire data to determine the capabilities of the target. 6621** 6622** When we try to negotiate, we append the negotiation message 6623** to the identify and (maybe) simple tag message. 6624** The host status field is set to HS_NEGOTIATE to mark this 6625** situation. 6626** 6627** If the target doesn't answer this message immediately 6628** (as required by the standard), the SIR_NEGO_FAIL interrupt 6629** will be raised eventually. 6630** The handler removes the HS_NEGOTIATE status, and sets the 6631** negotiated value to the default (async / nowide). 6632** 6633** If we receive a matching answer immediately, we check it 6634** for validity, and set the values. 6635** 6636** If we receive a Reject message immediately, we assume the 6637** negotiation has failed, and fall back to standard values. 6638** 6639** If we receive a negotiation message while not in HS_NEGOTIATE 6640** state, it's a target initiated negotiation. We prepare a 6641** (hopefully) valid answer, set our parameters, and send back 6642** this answer to the target. 6643** 6644** If the target doesn't fetch the answer (no message out phase), 6645** we assume the negotiation has failed, and fall back to default 6646** settings. 6647** 6648** When we set the values, we adjust them in all ccbs belonging 6649** to this target, in the controller's register, and in the "phys" 6650** field of the controller's struct ncb. 6651** 6652** Possible cases: hs sir msg_in value send goto 6653** We try to negotiate: 6654** -> target doesn't msgin NEG FAIL noop defa. - dispatch 6655** -> target rejected our msg NEG FAIL reject defa. - dispatch 6656** -> target answered (ok) NEG SYNC sdtr set - clrack 6657** -> target answered (!ok) NEG SYNC sdtr defa. REJ--->msg_bad 6658** -> target answered (ok) NEG WIDE wdtr set - clrack 6659** -> target answered (!ok) NEG WIDE wdtr defa. REJ--->msg_bad 6660** -> any other msgin NEG FAIL noop defa. - dispatch 6661** 6662** Target tries to negotiate: 6663** -> incoming message --- SYNC sdtr set SDTR - 6664** -> incoming message --- WIDE wdtr set WDTR - 6665** We sent our answer: 6666** -> target doesn't msgout --- PROTO ? defa. - dispatch 6667** 6668**----------------------------------------------------------------------------- 6669*/ 6670 6671 case SIR_NEGO_FAILED: 6672 /*------------------------------------------------------- 6673 ** 6674 ** Negotiation failed. 6675 ** Target doesn't send an answer message, 6676 ** or target rejected our message. 6677 ** 6678 ** Remove negotiation request. 6679 ** 6680 **------------------------------------------------------- 6681 */ 6682 OUTB (HS_PRT, HS_BUSY); 6683 6684 /* fall through */ 6685 6686 case SIR_NEGO_PROTO: 6687 /*------------------------------------------------------- 6688 ** 6689 ** Negotiation failed. 6690 ** Target doesn't fetch the answer message. 6691 ** 6692 **------------------------------------------------------- 6693 */ 6694 6695 if (DEBUG_FLAGS & DEBUG_NEGO) { 6696 PRINT_ADDR(cp->cmd, "negotiation failed sir=%x " 6697 "status=%x.\n", num, cp->nego_status); 6698 } 6699 6700 /* 6701 ** any error in negotiation: 6702 ** fall back to default mode. 6703 */ 6704 switch (cp->nego_status) { 6705 6706 case NS_SYNC: 6707 spi_period(starget) = 0; 6708 spi_offset(starget) = 0; 6709 ncr_setsync (np, cp, 0, 0xe0); 6710 break; 6711 6712 case NS_WIDE: 6713 spi_width(starget) = 0; 6714 ncr_setwide (np, cp, 0, 0); 6715 break; 6716 6717 } 6718 np->msgin [0] = NOP; 6719 np->msgout[0] = NOP; 6720 cp->nego_status = 0; 6721 break; 6722 6723 case SIR_NEGO_SYNC: 6724 if (DEBUG_FLAGS & DEBUG_NEGO) { 6725 ncr_print_msg(cp, "sync msgin", np->msgin); 6726 } 6727 6728 chg = 0; 6729 per = np->msgin[3]; 6730 ofs = np->msgin[4]; 6731 if (ofs==0) per=255; 6732 6733 /* 6734 ** if target sends SDTR message, 6735 ** it CAN transfer synch. 6736 */ 6737 6738 if (ofs && starget) 6739 spi_support_sync(starget) = 1; 6740 6741 /* 6742 ** check values against driver limits. 6743 */ 6744 6745 if (per < np->minsync) 6746 {chg = 1; per = np->minsync;} 6747 if (per < tp->minsync) 6748 {chg = 1; per = tp->minsync;} 6749 if (ofs > tp->maxoffs) 6750 {chg = 1; ofs = tp->maxoffs;} 6751 6752 /* 6753 ** Check against controller limits. 6754 */ 6755 fak = 7; 6756 scntl3 = 0; 6757 if (ofs != 0) { 6758 ncr_getsync(np, per, &fak, &scntl3); 6759 if (fak > 7) { 6760 chg = 1; 6761 ofs = 0; 6762 } 6763 } 6764 if (ofs == 0) { 6765 fak = 7; 6766 per = 0; 6767 scntl3 = 0; 6768 tp->minsync = 0; 6769 } 6770 6771 if (DEBUG_FLAGS & DEBUG_NEGO) { 6772 PRINT_ADDR(cp->cmd, "sync: per=%d scntl3=0x%x ofs=%d " 6773 "fak=%d chg=%d.\n", per, scntl3, ofs, fak, chg); 6774 } 6775 6776 if (INB (HS_PRT) == HS_NEGOTIATE) { 6777 OUTB (HS_PRT, HS_BUSY); 6778 switch (cp->nego_status) { 6779 6780 case NS_SYNC: 6781 /* This was an answer message */ 6782 if (chg) { 6783 /* Answer wasn't acceptable. */ 6784 spi_period(starget) = 0; 6785 spi_offset(starget) = 0; 6786 ncr_setsync(np, cp, 0, 0xe0); 6787 OUTL_DSP(NCB_SCRIPT_PHYS (np, msg_bad)); 6788 } else { 6789 /* Answer is ok. */ 6790 spi_period(starget) = per; 6791 spi_offset(starget) = ofs; 6792 ncr_setsync(np, cp, scntl3, (fak<<5)|ofs); 6793 OUTL_DSP(NCB_SCRIPT_PHYS (np, clrack)); 6794 } 6795 return; 6796 6797 case NS_WIDE: 6798 spi_width(starget) = 0; 6799 ncr_setwide(np, cp, 0, 0); 6800 break; 6801 } 6802 } 6803 6804 /* 6805 ** It was a request. Set value and 6806 ** prepare an answer message 6807 */ 6808 6809 spi_period(starget) = per; 6810 spi_offset(starget) = ofs; 6811 ncr_setsync(np, cp, scntl3, (fak<<5)|ofs); 6812 6813 spi_populate_sync_msg(np->msgout, per, ofs); 6814 cp->nego_status = NS_SYNC; 6815 6816 if (DEBUG_FLAGS & DEBUG_NEGO) { 6817 ncr_print_msg(cp, "sync msgout", np->msgout); 6818 } 6819 6820 if (!ofs) { 6821 OUTL_DSP (NCB_SCRIPT_PHYS (np, msg_bad)); 6822 return; 6823 } 6824 np->msgin [0] = NOP; 6825 6826 break; 6827 6828 case SIR_NEGO_WIDE: 6829 /* 6830 ** Wide request message received. 6831 */ 6832 if (DEBUG_FLAGS & DEBUG_NEGO) { 6833 ncr_print_msg(cp, "wide msgin", np->msgin); 6834 } 6835 6836 /* 6837 ** get requested values. 6838 */ 6839 6840 chg = 0; 6841 wide = np->msgin[3]; 6842 6843 /* 6844 ** if target sends WDTR message, 6845 ** it CAN transfer wide. 6846 */ 6847 6848 if (wide && starget) 6849 spi_support_wide(starget) = 1; 6850 6851 /* 6852 ** check values against driver limits. 6853 */ 6854 6855 if (wide > tp->usrwide) 6856 {chg = 1; wide = tp->usrwide;} 6857 6858 if (DEBUG_FLAGS & DEBUG_NEGO) { 6859 PRINT_ADDR(cp->cmd, "wide: wide=%d chg=%d.\n", wide, 6860 chg); 6861 } 6862 6863 if (INB (HS_PRT) == HS_NEGOTIATE) { 6864 OUTB (HS_PRT, HS_BUSY); 6865 switch (cp->nego_status) { 6866 6867 case NS_WIDE: 6868 /* 6869 ** This was an answer message 6870 */ 6871 if (chg) { 6872 /* Answer wasn't acceptable. */ 6873 spi_width(starget) = 0; 6874 ncr_setwide(np, cp, 0, 1); 6875 OUTL_DSP (NCB_SCRIPT_PHYS (np, msg_bad)); 6876 } else { 6877 /* Answer is ok. */ 6878 spi_width(starget) = wide; 6879 ncr_setwide(np, cp, wide, 1); 6880 OUTL_DSP (NCB_SCRIPT_PHYS (np, clrack)); 6881 } 6882 return; 6883 6884 case NS_SYNC: 6885 spi_period(starget) = 0; 6886 spi_offset(starget) = 0; 6887 ncr_setsync(np, cp, 0, 0xe0); 6888 break; 6889 } 6890 } 6891 6892 /* 6893 ** It was a request, set value and 6894 ** prepare an answer message 6895 */ 6896 6897 spi_width(starget) = wide; 6898 ncr_setwide(np, cp, wide, 1); 6899 spi_populate_width_msg(np->msgout, wide); 6900 6901 np->msgin [0] = NOP; 6902 6903 cp->nego_status = NS_WIDE; 6904 6905 if (DEBUG_FLAGS & DEBUG_NEGO) { 6906 ncr_print_msg(cp, "wide msgout", np->msgin); 6907 } 6908 break; 6909 6910/*-------------------------------------------------------------------- 6911** 6912** Processing of special messages 6913** 6914**-------------------------------------------------------------------- 6915*/ 6916 6917 case SIR_REJECT_RECEIVED: 6918 /*----------------------------------------------- 6919 ** 6920 ** We received a MESSAGE_REJECT. 6921 ** 6922 **----------------------------------------------- 6923 */ 6924 6925 PRINT_ADDR(cp->cmd, "MESSAGE_REJECT received (%x:%x).\n", 6926 (unsigned)scr_to_cpu(np->lastmsg), np->msgout[0]); 6927 break; 6928 6929 case SIR_REJECT_SENT: 6930 /*----------------------------------------------- 6931 ** 6932 ** We received an unknown message 6933 ** 6934 **----------------------------------------------- 6935 */ 6936 6937 ncr_print_msg(cp, "MESSAGE_REJECT sent for", np->msgin); 6938 break; 6939 6940/*-------------------------------------------------------------------- 6941** 6942** Processing of special messages 6943** 6944**-------------------------------------------------------------------- 6945*/ 6946 6947 case SIR_IGN_RESIDUE: 6948 /*----------------------------------------------- 6949 ** 6950 ** We received an IGNORE RESIDUE message, 6951 ** which couldn't be handled by the script. 6952 ** 6953 **----------------------------------------------- 6954 */ 6955 6956 PRINT_ADDR(cp->cmd, "IGNORE_WIDE_RESIDUE received, but not yet " 6957 "implemented.\n"); 6958 break; 6959 } 6960 6961out: 6962 OUTONB_STD (); 6963} 6964 6965/*========================================================== 6966** 6967** 6968** Acquire a control block 6969** 6970** 6971**========================================================== 6972*/ 6973 6974static struct ccb *ncr_get_ccb(struct ncb *np, struct scsi_cmnd *cmd) 6975{ 6976 u_char tn = cmd->device->id; 6977 u_char ln = cmd->device->lun; 6978 struct tcb *tp = &np->target[tn]; 6979 struct lcb *lp = tp->lp[ln]; 6980 u_char tag = NO_TAG; 6981 struct ccb *cp = NULL; 6982 6983 /* 6984 ** Lun structure available ? 6985 */ 6986 if (lp) { 6987 struct list_head *qp; 6988 /* 6989 ** Keep from using more tags than we can handle. 6990 */ 6991 if (lp->usetags && lp->busyccbs >= lp->maxnxs) 6992 return NULL; 6993 6994 /* 6995 ** Allocate a new CCB if needed. 6996 */ 6997 if (list_empty(&lp->free_ccbq)) 6998 ncr_alloc_ccb(np, tn, ln); 6999 7000 /* 7001 ** Look for free CCB 7002 */ 7003 qp = ncr_list_pop(&lp->free_ccbq); 7004 if (qp) { 7005 cp = list_entry(qp, struct ccb, link_ccbq); 7006 if (cp->magic) { 7007 PRINT_ADDR(cmd, "ccb free list corrupted " 7008 "(@%p)\n", cp); 7009 cp = NULL; 7010 } else { 7011 list_add_tail(qp, &lp->wait_ccbq); 7012 ++lp->busyccbs; 7013 } 7014 } 7015 7016 /* 7017 ** If a CCB is available, 7018 ** Get a tag for this nexus if required. 7019 */ 7020 if (cp) { 7021 if (lp->usetags) 7022 tag = lp->cb_tags[lp->ia_tag]; 7023 } 7024 else if (lp->actccbs > 0) 7025 return NULL; 7026 } 7027 7028 /* 7029 ** if nothing available, take the default. 7030 */ 7031 if (!cp) 7032 cp = np->ccb; 7033 7034 /* 7035 ** Wait until available. 7036 */ 7037 7038 if (cp->magic) 7039 return NULL; 7040 7041 cp->magic = 1; 7042 7043 /* 7044 ** Move to next available tag if tag used. 7045 */ 7046 if (lp) { 7047 if (tag != NO_TAG) { 7048 ++lp->ia_tag; 7049 if (lp->ia_tag == MAX_TAGS) 7050 lp->ia_tag = 0; 7051 lp->tags_umap |= (((tagmap_t) 1) << tag); 7052 } 7053 } 7054 7055 /* 7056 ** Remember all informations needed to free this CCB. 7057 */ 7058 cp->tag = tag; 7059 cp->target = tn; 7060 cp->lun = ln; 7061 7062 if (DEBUG_FLAGS & DEBUG_TAGS) { 7063 PRINT_ADDR(cmd, "ccb @%p using tag %d.\n", cp, tag); 7064 } 7065 7066 return cp; 7067} 7068 7069/*========================================================== 7070** 7071** 7072** Release one control block 7073** 7074** 7075**========================================================== 7076*/ 7077 7078static void ncr_free_ccb (struct ncb *np, struct ccb *cp) 7079{ 7080 struct tcb *tp = &np->target[cp->target]; 7081 struct lcb *lp = tp->lp[cp->lun]; 7082 7083 if (DEBUG_FLAGS & DEBUG_TAGS) { 7084 PRINT_ADDR(cp->cmd, "ccb @%p freeing tag %d.\n", cp, cp->tag); 7085 } 7086 7087 /* 7088 ** If lun control block available, 7089 ** decrement active commands and increment credit, 7090 ** free the tag if any and remove the JUMP for reselect. 7091 */ 7092 if (lp) { 7093 if (cp->tag != NO_TAG) { 7094 lp->cb_tags[lp->if_tag++] = cp->tag; 7095 if (lp->if_tag == MAX_TAGS) 7096 lp->if_tag = 0; 7097 lp->tags_umap &= ~(((tagmap_t) 1) << cp->tag); 7098 lp->tags_smap &= lp->tags_umap; 7099 lp->jump_ccb[cp->tag] = 7100 cpu_to_scr(NCB_SCRIPTH_PHYS(np, bad_i_t_l_q)); 7101 } else { 7102 lp->jump_ccb[0] = 7103 cpu_to_scr(NCB_SCRIPTH_PHYS(np, bad_i_t_l)); 7104 } 7105 } 7106 7107 /* 7108 ** Make this CCB available. 7109 */ 7110 7111 if (lp) { 7112 if (cp != np->ccb) 7113 list_move(&cp->link_ccbq, &lp->free_ccbq); 7114 --lp->busyccbs; 7115 if (cp->queued) { 7116 --lp->queuedccbs; 7117 } 7118 } 7119 cp -> host_status = HS_IDLE; 7120 cp -> magic = 0; 7121 if (cp->queued) { 7122 --np->queuedccbs; 7123 cp->queued = 0; 7124 } 7125 7126} 7127 7128 7129#define ncr_reg_bus_addr(r) (np->paddr + offsetof (struct ncr_reg, r)) 7130 7131/*------------------------------------------------------------------------ 7132** Initialize the fixed part of a CCB structure. 7133**------------------------------------------------------------------------ 7134**------------------------------------------------------------------------ 7135*/ 7136static void ncr_init_ccb(struct ncb *np, struct ccb *cp) 7137{ 7138 ncrcmd copy_4 = np->features & FE_PFEN ? SCR_COPY(4) : SCR_COPY_F(4); 7139 7140 /* 7141 ** Remember virtual and bus address of this ccb. 7142 */ 7143 cp->p_ccb = vtobus(cp); 7144 cp->phys.header.cp = cp; 7145 7146 /* 7147 ** This allows list_del to work for the default ccb. 7148 */ 7149 INIT_LIST_HEAD(&cp->link_ccbq); 7150 7151 /* 7152 ** Initialyze the start and restart launch script. 7153 ** 7154 ** COPY(4) @(...p_phys), @(dsa) 7155 ** JUMP @(sched_point) 7156 */ 7157 cp->start.setup_dsa[0] = cpu_to_scr(copy_4); 7158 cp->start.setup_dsa[1] = cpu_to_scr(CCB_PHYS(cp, start.p_phys)); 7159 cp->start.setup_dsa[2] = cpu_to_scr(ncr_reg_bus_addr(nc_dsa)); 7160 cp->start.schedule.l_cmd = cpu_to_scr(SCR_JUMP); 7161 cp->start.p_phys = cpu_to_scr(CCB_PHYS(cp, phys)); 7162 7163 memcpy(&cp->restart, &cp->start, sizeof(cp->restart)); 7164 7165 cp->start.schedule.l_paddr = cpu_to_scr(NCB_SCRIPT_PHYS (np, idle)); 7166 cp->restart.schedule.l_paddr = cpu_to_scr(NCB_SCRIPTH_PHYS (np, abort)); 7167} 7168 7169 7170/*------------------------------------------------------------------------ 7171** Allocate a CCB and initialize its fixed part. 7172**------------------------------------------------------------------------ 7173**------------------------------------------------------------------------ 7174*/ 7175static void ncr_alloc_ccb(struct ncb *np, u_char tn, u_char ln) 7176{ 7177 struct tcb *tp = &np->target[tn]; 7178 struct lcb *lp = tp->lp[ln]; 7179 struct ccb *cp = NULL; 7180 7181 /* 7182 ** Allocate memory for this CCB. 7183 */ 7184 cp = m_calloc_dma(sizeof(struct ccb), "CCB"); 7185 if (!cp) 7186 return; 7187 7188 /* 7189 ** Count it and initialyze it. 7190 */ 7191 lp->actccbs++; 7192 np->actccbs++; 7193 memset(cp, 0, sizeof (*cp)); 7194 ncr_init_ccb(np, cp); 7195 7196 /* 7197 ** Chain into wakeup list and free ccb queue and take it 7198 ** into account for tagged commands. 7199 */ 7200 cp->link_ccb = np->ccb->link_ccb; 7201 np->ccb->link_ccb = cp; 7202 7203 list_add(&cp->link_ccbq, &lp->free_ccbq); 7204} 7205 7206/*========================================================== 7207** 7208** 7209** Allocation of resources for Targets/Luns/Tags. 7210** 7211** 7212**========================================================== 7213*/ 7214 7215 7216/*------------------------------------------------------------------------ 7217** Target control block initialisation. 7218**------------------------------------------------------------------------ 7219** This data structure is fully initialized after a SCSI command 7220** has been successfully completed for this target. 7221** It contains a SCRIPT that is called on target reselection. 7222**------------------------------------------------------------------------ 7223*/ 7224static void ncr_init_tcb (struct ncb *np, u_char tn) 7225{ 7226 struct tcb *tp = &np->target[tn]; 7227 ncrcmd copy_1 = np->features & FE_PFEN ? SCR_COPY(1) : SCR_COPY_F(1); 7228 int th = tn & 3; 7229 int i; 7230 7231 /* 7232 ** Jump to next tcb if SFBR does not match this target. 7233 ** JUMP IF (SFBR != #target#), @(next tcb) 7234 */ 7235 tp->jump_tcb.l_cmd = 7236 cpu_to_scr((SCR_JUMP ^ IFFALSE (DATA (0x80 + tn)))); 7237 tp->jump_tcb.l_paddr = np->jump_tcb[th].l_paddr; 7238 7239 /* 7240 ** Load the synchronous transfer register. 7241 ** COPY @(tp->sval), @(sxfer) 7242 */ 7243 tp->getscr[0] = cpu_to_scr(copy_1); 7244 tp->getscr[1] = cpu_to_scr(vtobus (&tp->sval)); 7245#ifdef SCSI_NCR_BIG_ENDIAN 7246 tp->getscr[2] = cpu_to_scr(ncr_reg_bus_addr(nc_sxfer) ^ 3); 7247#else 7248 tp->getscr[2] = cpu_to_scr(ncr_reg_bus_addr(nc_sxfer)); 7249#endif 7250 7251 /* 7252 ** Load the timing register. 7253 ** COPY @(tp->wval), @(scntl3) 7254 */ 7255 tp->getscr[3] = cpu_to_scr(copy_1); 7256 tp->getscr[4] = cpu_to_scr(vtobus (&tp->wval)); 7257#ifdef SCSI_NCR_BIG_ENDIAN 7258 tp->getscr[5] = cpu_to_scr(ncr_reg_bus_addr(nc_scntl3) ^ 3); 7259#else 7260 tp->getscr[5] = cpu_to_scr(ncr_reg_bus_addr(nc_scntl3)); 7261#endif 7262 7263 /* 7264 ** Get the IDENTIFY message and the lun. 7265 ** CALL @script(resel_lun) 7266 */ 7267 tp->call_lun.l_cmd = cpu_to_scr(SCR_CALL); 7268 tp->call_lun.l_paddr = cpu_to_scr(NCB_SCRIPT_PHYS (np, resel_lun)); 7269 7270 /* 7271 ** Look for the lun control block of this nexus. 7272 ** For i = 0 to 3 7273 ** JUMP ^ IFTRUE (MASK (i, 3)), @(next_lcb) 7274 */ 7275 for (i = 0 ; i < 4 ; i++) { 7276 tp->jump_lcb[i].l_cmd = 7277 cpu_to_scr((SCR_JUMP ^ IFTRUE (MASK (i, 3)))); 7278 tp->jump_lcb[i].l_paddr = 7279 cpu_to_scr(NCB_SCRIPTH_PHYS (np, bad_identify)); 7280 } 7281 7282 /* 7283 ** Link this target control block to the JUMP chain. 7284 */ 7285 np->jump_tcb[th].l_paddr = cpu_to_scr(vtobus (&tp->jump_tcb)); 7286 7287 /* 7288 ** These assert's should be moved at driver initialisations. 7289 */ 7290#ifdef SCSI_NCR_BIG_ENDIAN 7291 BUG_ON(((offsetof(struct ncr_reg, nc_sxfer) ^ 7292 offsetof(struct tcb , sval )) &3) != 3); 7293 BUG_ON(((offsetof(struct ncr_reg, nc_scntl3) ^ 7294 offsetof(struct tcb , wval )) &3) != 3); 7295#else 7296 BUG_ON(((offsetof(struct ncr_reg, nc_sxfer) ^ 7297 offsetof(struct tcb , sval )) &3) != 0); 7298 BUG_ON(((offsetof(struct ncr_reg, nc_scntl3) ^ 7299 offsetof(struct tcb , wval )) &3) != 0); 7300#endif 7301} 7302 7303 7304/*------------------------------------------------------------------------ 7305** Lun control block allocation and initialization. 7306**------------------------------------------------------------------------ 7307** This data structure is allocated and initialized after a SCSI 7308** command has been successfully completed for this target/lun. 7309**------------------------------------------------------------------------ 7310*/ 7311static struct lcb *ncr_alloc_lcb (struct ncb *np, u_char tn, u_char ln) 7312{ 7313 struct tcb *tp = &np->target[tn]; 7314 struct lcb *lp = tp->lp[ln]; 7315 ncrcmd copy_4 = np->features & FE_PFEN ? SCR_COPY(4) : SCR_COPY_F(4); 7316 int lh = ln & 3; 7317 7318 /* 7319 ** Already done, return. 7320 */ 7321 if (lp) 7322 return lp; 7323 7324 /* 7325 ** Allocate the lcb. 7326 */ 7327 lp = m_calloc_dma(sizeof(struct lcb), "LCB"); 7328 if (!lp) 7329 goto fail; 7330 memset(lp, 0, sizeof(*lp)); 7331 tp->lp[ln] = lp; 7332 7333 /* 7334 ** Initialize the target control block if not yet. 7335 */ 7336 if (!tp->jump_tcb.l_cmd) 7337 ncr_init_tcb(np, tn); 7338 7339 /* 7340 ** Initialize the CCB queue headers. 7341 */ 7342 INIT_LIST_HEAD(&lp->free_ccbq); 7343 INIT_LIST_HEAD(&lp->busy_ccbq); 7344 INIT_LIST_HEAD(&lp->wait_ccbq); 7345 INIT_LIST_HEAD(&lp->skip_ccbq); 7346 7347 /* 7348 ** Set max CCBs to 1 and use the default 1 entry 7349 ** jump table by default. 7350 */ 7351 lp->maxnxs = 1; 7352 lp->jump_ccb = &lp->jump_ccb_0; 7353 lp->p_jump_ccb = cpu_to_scr(vtobus(lp->jump_ccb)); 7354 7355 /* 7356 ** Initilialyze the reselect script: 7357 ** 7358 ** Jump to next lcb if SFBR does not match this lun. 7359 ** Load TEMP with the CCB direct jump table bus address. 7360 ** Get the SIMPLE TAG message and the tag. 7361 ** 7362 ** JUMP IF (SFBR != #lun#), @(next lcb) 7363 ** COPY @(lp->p_jump_ccb), @(temp) 7364 ** JUMP @script(resel_notag) 7365 */ 7366 lp->jump_lcb.l_cmd = 7367 cpu_to_scr((SCR_JUMP ^ IFFALSE (MASK (0x80+ln, 0xff)))); 7368 lp->jump_lcb.l_paddr = tp->jump_lcb[lh].l_paddr; 7369 7370 lp->load_jump_ccb[0] = cpu_to_scr(copy_4); 7371 lp->load_jump_ccb[1] = cpu_to_scr(vtobus (&lp->p_jump_ccb)); 7372 lp->load_jump_ccb[2] = cpu_to_scr(ncr_reg_bus_addr(nc_temp)); 7373 7374 lp->jump_tag.l_cmd = cpu_to_scr(SCR_JUMP); 7375 lp->jump_tag.l_paddr = cpu_to_scr(NCB_SCRIPT_PHYS (np, resel_notag)); 7376 7377 /* 7378 ** Link this lun control block to the JUMP chain. 7379 */ 7380 tp->jump_lcb[lh].l_paddr = cpu_to_scr(vtobus (&lp->jump_lcb)); 7381 7382 /* 7383 ** Initialize command queuing control. 7384 */ 7385 lp->busyccbs = 1; 7386 lp->queuedccbs = 1; 7387 lp->queuedepth = 1; 7388fail: 7389 return lp; 7390} 7391 7392 7393/*------------------------------------------------------------------------ 7394** Lun control block setup on INQUIRY data received. 7395**------------------------------------------------------------------------ 7396** We only support WIDE, SYNC for targets and CMDQ for logical units. 7397** This setup is done on each INQUIRY since we are expecting user 7398** will play with CHANGE DEFINITION commands. :-) 7399**------------------------------------------------------------------------ 7400*/ 7401static struct lcb *ncr_setup_lcb (struct ncb *np, struct scsi_device *sdev) 7402{ 7403 unsigned char tn = sdev->id, ln = sdev->lun; 7404 struct tcb *tp = &np->target[tn]; 7405 struct lcb *lp = tp->lp[ln]; 7406 7407 /* If no lcb, try to allocate it. */ 7408 if (!lp && !(lp = ncr_alloc_lcb(np, tn, ln))) 7409 goto fail; 7410 7411 /* 7412 ** If unit supports tagged commands, allocate the 7413 ** CCB JUMP table if not yet. 7414 */ 7415 if (sdev->tagged_supported && lp->jump_ccb == &lp->jump_ccb_0) { 7416 int i; 7417 lp->jump_ccb = m_calloc_dma(256, "JUMP_CCB"); 7418 if (!lp->jump_ccb) { 7419 lp->jump_ccb = &lp->jump_ccb_0; 7420 goto fail; 7421 } 7422 lp->p_jump_ccb = cpu_to_scr(vtobus(lp->jump_ccb)); 7423 for (i = 0 ; i < 64 ; i++) 7424 lp->jump_ccb[i] = 7425 cpu_to_scr(NCB_SCRIPTH_PHYS (np, bad_i_t_l_q)); 7426 for (i = 0 ; i < MAX_TAGS ; i++) 7427 lp->cb_tags[i] = i; 7428 lp->maxnxs = MAX_TAGS; 7429 lp->tags_stime = jiffies + 3*HZ; 7430 ncr_setup_tags (np, sdev); 7431 } 7432 7433 7434fail: 7435 return lp; 7436} 7437 7438/*========================================================== 7439** 7440** 7441** Build Scatter Gather Block 7442** 7443** 7444**========================================================== 7445** 7446** The transfer area may be scattered among 7447** several non adjacent physical pages. 7448** 7449** We may use MAX_SCATTER blocks. 7450** 7451**---------------------------------------------------------- 7452*/ 7453 7454/* 7455** We try to reduce the number of interrupts caused 7456** by unexpected phase changes due to disconnects. 7457** A typical harddisk may disconnect before ANY block. 7458** If we wanted to avoid unexpected phase changes at all 7459** we had to use a break point every 512 bytes. 7460** Of course the number of scatter/gather blocks is 7461** limited. 7462** Under Linux, the scatter/gatter blocks are provided by 7463** the generic driver. We just have to copy addresses and 7464** sizes to the data segment array. 7465*/ 7466 7467static int ncr_scatter(struct ncb *np, struct ccb *cp, struct scsi_cmnd *cmd) 7468{ 7469 int segment = 0; 7470 int use_sg = scsi_sg_count(cmd); 7471 7472 cp->data_len = 0; 7473 7474 use_sg = map_scsi_sg_data(np, cmd); 7475 if (use_sg > 0) { 7476 struct scatterlist *sg; 7477 struct scr_tblmove *data; 7478 7479 if (use_sg > MAX_SCATTER) { 7480 unmap_scsi_data(np, cmd); 7481 return -1; 7482 } 7483 7484 data = &cp->phys.data[MAX_SCATTER - use_sg]; 7485 7486 scsi_for_each_sg(cmd, sg, use_sg, segment) { 7487 dma_addr_t baddr = sg_dma_address(sg); 7488 unsigned int len = sg_dma_len(sg); 7489 7490 ncr_build_sge(np, &data[segment], baddr, len); 7491 cp->data_len += len; 7492 } 7493 } else 7494 segment = -2; 7495 7496 return segment; 7497} 7498 7499/*========================================================== 7500** 7501** 7502** Test the bus snoop logic :-( 7503** 7504** Has to be called with interrupts disabled. 7505** 7506** 7507**========================================================== 7508*/ 7509 7510static int __init ncr_regtest (struct ncb* np) 7511{ 7512 register volatile u32 data; 7513 /* 7514 ** ncr registers may NOT be cached. 7515 ** write 0xffffffff to a read only register area, 7516 ** and try to read it back. 7517 */ 7518 data = 0xffffffff; 7519 OUTL_OFF(offsetof(struct ncr_reg, nc_dstat), data); 7520 data = INL_OFF(offsetof(struct ncr_reg, nc_dstat)); 7521 if (data == 0xffffffff) { 7522 printk ("CACHE TEST FAILED: reg dstat-sstat2 readback %x.\n", 7523 (unsigned) data); 7524 return (0x10); 7525 } 7526 return (0); 7527} 7528 7529static int __init ncr_snooptest (struct ncb* np) 7530{ 7531 u32 ncr_rd, ncr_wr, ncr_bk, host_rd, host_wr, pc; 7532 int i, err=0; 7533 if (np->reg) { 7534 err |= ncr_regtest (np); 7535 if (err) 7536 return (err); 7537 } 7538 7539 /* init */ 7540 pc = NCB_SCRIPTH_PHYS (np, snooptest); 7541 host_wr = 1; 7542 ncr_wr = 2; 7543 /* 7544 ** Set memory and register. 7545 */ 7546 np->ncr_cache = cpu_to_scr(host_wr); 7547 OUTL (nc_temp, ncr_wr); 7548 /* 7549 ** Start script (exchange values) 7550 */ 7551 OUTL_DSP (pc); 7552 /* 7553 ** Wait 'til done (with timeout) 7554 */ 7555 for (i=0; i<NCR_SNOOP_TIMEOUT; i++) 7556 if (INB(nc_istat) & (INTF|SIP|DIP)) 7557 break; 7558 /* 7559 ** Save termination position. 7560 */ 7561 pc = INL (nc_dsp); 7562 /* 7563 ** Read memory and register. 7564 */ 7565 host_rd = scr_to_cpu(np->ncr_cache); 7566 ncr_rd = INL (nc_scratcha); 7567 ncr_bk = INL (nc_temp); 7568 /* 7569 ** Reset ncr chip 7570 */ 7571 ncr_chip_reset(np, 100); 7572 /* 7573 ** check for timeout 7574 */ 7575 if (i>=NCR_SNOOP_TIMEOUT) { 7576 printk ("CACHE TEST FAILED: timeout.\n"); 7577 return (0x20); 7578 } 7579 /* 7580 ** Check termination position. 7581 */ 7582 if (pc != NCB_SCRIPTH_PHYS (np, snoopend)+8) { 7583 printk ("CACHE TEST FAILED: script execution failed.\n"); 7584 printk ("start=%08lx, pc=%08lx, end=%08lx\n", 7585 (u_long) NCB_SCRIPTH_PHYS (np, snooptest), (u_long) pc, 7586 (u_long) NCB_SCRIPTH_PHYS (np, snoopend) +8); 7587 return (0x40); 7588 } 7589 /* 7590 ** Show results. 7591 */ 7592 if (host_wr != ncr_rd) { 7593 printk ("CACHE TEST FAILED: host wrote %d, ncr read %d.\n", 7594 (int) host_wr, (int) ncr_rd); 7595 err |= 1; 7596 } 7597 if (host_rd != ncr_wr) { 7598 printk ("CACHE TEST FAILED: ncr wrote %d, host read %d.\n", 7599 (int) ncr_wr, (int) host_rd); 7600 err |= 2; 7601 } 7602 if (ncr_bk != ncr_wr) { 7603 printk ("CACHE TEST FAILED: ncr wrote %d, read back %d.\n", 7604 (int) ncr_wr, (int) ncr_bk); 7605 err |= 4; 7606 } 7607 return (err); 7608} 7609 7610/*========================================================== 7611** 7612** Determine the ncr's clock frequency. 7613** This is essential for the negotiation 7614** of the synchronous transfer rate. 7615** 7616**========================================================== 7617** 7618** Note: we have to return the correct value. 7619** THERE IS NO SAFE DEFAULT VALUE. 7620** 7621** Most NCR/SYMBIOS boards are delivered with a 40 Mhz clock. 7622** 53C860 and 53C875 rev. 1 support fast20 transfers but 7623** do not have a clock doubler and so are provided with a 7624** 80 MHz clock. All other fast20 boards incorporate a doubler 7625** and so should be delivered with a 40 MHz clock. 7626** The future fast40 chips (895/895) use a 40 Mhz base clock 7627** and provide a clock quadrupler (160 Mhz). The code below 7628** tries to deal as cleverly as possible with all this stuff. 7629** 7630**---------------------------------------------------------- 7631*/ 7632 7633/* 7634 * Select NCR SCSI clock frequency 7635 */ 7636static void ncr_selectclock(struct ncb *np, u_char scntl3) 7637{ 7638 if (np->multiplier < 2) { 7639 OUTB(nc_scntl3, scntl3); 7640 return; 7641 } 7642 7643 if (bootverbose >= 2) 7644 printk ("%s: enabling clock multiplier\n", ncr_name(np)); 7645 7646 OUTB(nc_stest1, DBLEN); /* Enable clock multiplier */ 7647 if (np->multiplier > 2) { /* Poll bit 5 of stest4 for quadrupler */ 7648 int i = 20; 7649 while (!(INB(nc_stest4) & LCKFRQ) && --i > 0) 7650 udelay(20); 7651 if (!i) 7652 printk("%s: the chip cannot lock the frequency\n", ncr_name(np)); 7653 } else /* Wait 20 micro-seconds for doubler */ 7654 udelay(20); 7655 OUTB(nc_stest3, HSC); /* Halt the scsi clock */ 7656 OUTB(nc_scntl3, scntl3); 7657 OUTB(nc_stest1, (DBLEN|DBLSEL));/* Select clock multiplier */ 7658 OUTB(nc_stest3, 0x00); /* Restart scsi clock */ 7659} 7660 7661 7662/* 7663 * calculate NCR SCSI clock frequency (in KHz) 7664 */ 7665static unsigned __init ncrgetfreq (struct ncb *np, int gen) 7666{ 7667 unsigned ms = 0; 7668 char count = 0; 7669 7670 /* 7671 * Measure GEN timer delay in order 7672 * to calculate SCSI clock frequency 7673 * 7674 * This code will never execute too 7675 * many loop iterations (if DELAY is 7676 * reasonably correct). It could get 7677 * too low a delay (too high a freq.) 7678 * if the CPU is slow executing the 7679 * loop for some reason (an NMI, for 7680 * example). For this reason we will 7681 * if multiple measurements are to be 7682 * performed trust the higher delay 7683 * (lower frequency returned). 7684 */ 7685 OUTB (nc_stest1, 0); /* make sure clock doubler is OFF */ 7686 OUTW (nc_sien , 0); /* mask all scsi interrupts */ 7687 (void) INW (nc_sist); /* clear pending scsi interrupt */ 7688 OUTB (nc_dien , 0); /* mask all dma interrupts */ 7689 (void) INW (nc_sist); /* another one, just to be sure :) */ 7690 OUTB (nc_scntl3, 4); /* set pre-scaler to divide by 3 */ 7691 OUTB (nc_stime1, 0); /* disable general purpose timer */ 7692 OUTB (nc_stime1, gen); /* set to nominal delay of 1<<gen * 125us */ 7693 while (!(INW(nc_sist) & GEN) && ms++ < 100000) { 7694 for (count = 0; count < 10; count ++) 7695 udelay(100); /* count ms */ 7696 } 7697 OUTB (nc_stime1, 0); /* disable general purpose timer */ 7698 /* 7699 * set prescaler to divide by whatever 0 means 7700 * 0 ought to choose divide by 2, but appears 7701 * to set divide by 3.5 mode in my 53c810 ... 7702 */ 7703 OUTB (nc_scntl3, 0); 7704 7705 if (bootverbose >= 2) 7706 printk ("%s: Delay (GEN=%d): %u msec\n", ncr_name(np), gen, ms); 7707 /* 7708 * adjust for prescaler, and convert into KHz 7709 */ 7710 return ms ? ((1 << gen) * 4340) / ms : 0; 7711} 7712 7713/* 7714 * Get/probe NCR SCSI clock frequency 7715 */ 7716static void __init ncr_getclock (struct ncb *np, int mult) 7717{ 7718 unsigned char scntl3 = INB(nc_scntl3); 7719 unsigned char stest1 = INB(nc_stest1); 7720 unsigned f1; 7721 7722 np->multiplier = 1; 7723 f1 = 40000; 7724 7725 /* 7726 ** True with 875 or 895 with clock multiplier selected 7727 */ 7728 if (mult > 1 && (stest1 & (DBLEN+DBLSEL)) == DBLEN+DBLSEL) { 7729 if (bootverbose >= 2) 7730 printk ("%s: clock multiplier found\n", ncr_name(np)); 7731 np->multiplier = mult; 7732 } 7733 7734 /* 7735 ** If multiplier not found or scntl3 not 7,5,3, 7736 ** reset chip and get frequency from general purpose timer. 7737 ** Otherwise trust scntl3 BIOS setting. 7738 */ 7739 if (np->multiplier != mult || (scntl3 & 7) < 3 || !(scntl3 & 1)) { 7740 unsigned f2; 7741 7742 ncr_chip_reset(np, 5); 7743 7744 (void) ncrgetfreq (np, 11); /* throw away first result */ 7745 f1 = ncrgetfreq (np, 11); 7746 f2 = ncrgetfreq (np, 11); 7747 7748 if(bootverbose) 7749 printk ("%s: NCR clock is %uKHz, %uKHz\n", ncr_name(np), f1, f2); 7750 7751 if (f1 > f2) f1 = f2; /* trust lower result */ 7752 7753 if (f1 < 45000) f1 = 40000; 7754 else if (f1 < 55000) f1 = 50000; 7755 else f1 = 80000; 7756 7757 if (f1 < 80000 && mult > 1) { 7758 if (bootverbose >= 2) 7759 printk ("%s: clock multiplier assumed\n", ncr_name(np)); 7760 np->multiplier = mult; 7761 } 7762 } else { 7763 if ((scntl3 & 7) == 3) f1 = 40000; 7764 else if ((scntl3 & 7) == 5) f1 = 80000; 7765 else f1 = 160000; 7766 7767 f1 /= np->multiplier; 7768 } 7769 7770 /* 7771 ** Compute controller synchronous parameters. 7772 */ 7773 f1 *= np->multiplier; 7774 np->clock_khz = f1; 7775} 7776 7777/*===================== LINUX ENTRY POINTS SECTION ==========================*/ 7778 7779static int ncr53c8xx_slave_alloc(struct scsi_device *device) 7780{ 7781 struct Scsi_Host *host = device->host; 7782 struct ncb *np = ((struct host_data *) host->hostdata)->ncb; 7783 struct tcb *tp = &np->target[device->id]; 7784 tp->starget = device->sdev_target; 7785 7786 return 0; 7787} 7788 7789static int ncr53c8xx_slave_configure(struct scsi_device *device) 7790{ 7791 struct Scsi_Host *host = device->host; 7792 struct ncb *np = ((struct host_data *) host->hostdata)->ncb; 7793 struct tcb *tp = &np->target[device->id]; 7794 struct lcb *lp = tp->lp[device->lun]; 7795 int numtags, depth_to_use; 7796 7797 ncr_setup_lcb(np, device); 7798 7799 /* 7800 ** Select queue depth from driver setup. 7801 ** Donnot use more than configured by user. 7802 ** Use at least 2. 7803 ** Donnot use more than our maximum. 7804 */ 7805 numtags = device_queue_depth(np->unit, device->id, device->lun); 7806 if (numtags > tp->usrtags) 7807 numtags = tp->usrtags; 7808 if (!device->tagged_supported) 7809 numtags = 1; 7810 depth_to_use = numtags; 7811 if (depth_to_use < 2) 7812 depth_to_use = 2; 7813 if (depth_to_use > MAX_TAGS) 7814 depth_to_use = MAX_TAGS; 7815 7816 scsi_adjust_queue_depth(device, 7817 (device->tagged_supported ? 7818 MSG_SIMPLE_TAG : 0), 7819 depth_to_use); 7820 7821 if (lp) { 7822 lp->numtags = lp->maxtags = numtags; 7823 lp->scdev_depth = depth_to_use; 7824 } 7825 ncr_setup_tags (np, device); 7826 7827#ifdef DEBUG_NCR53C8XX 7828 printk("ncr53c8xx_select_queue_depth: host=%d, id=%d, lun=%d, depth=%d\n", 7829 np->unit, device->id, device->lun, depth_to_use); 7830#endif 7831 7832 if (spi_support_sync(device->sdev_target) && 7833 !spi_initial_dv(device->sdev_target)) 7834 spi_dv_device(device); 7835 return 0; 7836} 7837 7838static int ncr53c8xx_queue_command (struct scsi_cmnd *cmd, void (* done)(struct scsi_cmnd *)) 7839{ 7840 struct ncb *np = ((struct host_data *) cmd->device->host->hostdata)->ncb; 7841 unsigned long flags; 7842 int sts; 7843 7844#ifdef DEBUG_NCR53C8XX 7845printk("ncr53c8xx_queue_command\n"); 7846#endif 7847 7848 cmd->scsi_done = done; 7849 cmd->host_scribble = NULL; 7850 cmd->__data_mapped = 0; 7851 cmd->__data_mapping = 0; 7852 7853 spin_lock_irqsave(&np->smp_lock, flags); 7854 7855 if ((sts = ncr_queue_command(np, cmd)) != DID_OK) { 7856 cmd->result = ScsiResult(sts, 0); 7857#ifdef DEBUG_NCR53C8XX 7858printk("ncr53c8xx : command not queued - result=%d\n", sts); 7859#endif 7860 } 7861#ifdef DEBUG_NCR53C8XX 7862 else 7863printk("ncr53c8xx : command successfully queued\n"); 7864#endif 7865 7866 spin_unlock_irqrestore(&np->smp_lock, flags); 7867 7868 if (sts != DID_OK) { 7869 unmap_scsi_data(np, cmd); 7870 done(cmd); 7871 sts = 0; 7872 } 7873 7874 return sts; 7875} 7876 7877irqreturn_t ncr53c8xx_intr(int irq, void *dev_id) 7878{ 7879 unsigned long flags; 7880 struct Scsi_Host *shost = (struct Scsi_Host *)dev_id; 7881 struct host_data *host_data = (struct host_data *)shost->hostdata; 7882 struct ncb *np = host_data->ncb; 7883 struct scsi_cmnd *done_list; 7884 7885#ifdef DEBUG_NCR53C8XX 7886 printk("ncr53c8xx : interrupt received\n"); 7887#endif 7888 7889 if (DEBUG_FLAGS & DEBUG_TINY) printk ("["); 7890 7891 spin_lock_irqsave(&np->smp_lock, flags); 7892 ncr_exception(np); 7893 done_list = np->done_list; 7894 np->done_list = NULL; 7895 spin_unlock_irqrestore(&np->smp_lock, flags); 7896 7897 if (DEBUG_FLAGS & DEBUG_TINY) printk ("]\n"); 7898 7899 if (done_list) 7900 ncr_flush_done_cmds(done_list); 7901 return IRQ_HANDLED; 7902} 7903 7904static void ncr53c8xx_timeout(unsigned long npref) 7905{ 7906 struct ncb *np = (struct ncb *) npref; 7907 unsigned long flags; 7908 struct scsi_cmnd *done_list; 7909 7910 spin_lock_irqsave(&np->smp_lock, flags); 7911 ncr_timeout(np); 7912 done_list = np->done_list; 7913 np->done_list = NULL; 7914 spin_unlock_irqrestore(&np->smp_lock, flags); 7915 7916 if (done_list) 7917 ncr_flush_done_cmds(done_list); 7918} 7919 7920static int ncr53c8xx_bus_reset(struct scsi_cmnd *cmd) 7921{ 7922 struct ncb *np = ((struct host_data *) cmd->device->host->hostdata)->ncb; 7923 int sts; 7924 unsigned long flags; 7925 struct scsi_cmnd *done_list; 7926 7927 /* 7928 * If the mid-level driver told us reset is synchronous, it seems 7929 * that we must call the done() callback for the involved command, 7930 * even if this command was not queued to the low-level driver, 7931 * before returning SUCCESS. 7932 */ 7933 7934 spin_lock_irqsave(&np->smp_lock, flags); 7935 sts = ncr_reset_bus(np, cmd, 1); 7936 7937 done_list = np->done_list; 7938 np->done_list = NULL; 7939 spin_unlock_irqrestore(&np->smp_lock, flags); 7940 7941 ncr_flush_done_cmds(done_list); 7942 7943 return sts; 7944} 7945 7946 7947 7948/* 7949** Scsi command waiting list management. 7950** 7951** It may happen that we cannot insert a scsi command into the start queue, 7952** in the following circumstances. 7953** Too few preallocated ccb(s), 7954** maxtags < cmd_per_lun of the Linux host control block, 7955** etc... 7956** Such scsi commands are inserted into a waiting list. 7957** When a scsi command complete, we try to requeue the commands of the 7958** waiting list. 7959*/ 7960 7961#define next_wcmd host_scribble 7962 7963static void insert_into_waiting_list(struct ncb *np, struct scsi_cmnd *cmd) 7964{ 7965 struct scsi_cmnd *wcmd; 7966 7967#ifdef DEBUG_WAITING_LIST 7968 printk("%s: cmd %lx inserted into waiting list\n", ncr_name(np), (u_long) cmd); 7969#endif 7970 cmd->next_wcmd = NULL; 7971 if (!(wcmd = np->waiting_list)) np->waiting_list = cmd; 7972 else { 7973 while (wcmd->next_wcmd) 7974 wcmd = (struct scsi_cmnd *) wcmd->next_wcmd; 7975 wcmd->next_wcmd = (char *) cmd; 7976 } 7977} 7978 7979static struct scsi_cmnd *retrieve_from_waiting_list(int to_remove, struct ncb *np, struct scsi_cmnd *cmd) 7980{ 7981 struct scsi_cmnd **pcmd = &np->waiting_list; 7982 7983 while (*pcmd) { 7984 if (cmd == *pcmd) { 7985 if (to_remove) { 7986 *pcmd = (struct scsi_cmnd *) cmd->next_wcmd; 7987 cmd->next_wcmd = NULL; 7988 } 7989#ifdef DEBUG_WAITING_LIST 7990 printk("%s: cmd %lx retrieved from waiting list\n", ncr_name(np), (u_long) cmd); 7991#endif 7992 return cmd; 7993 } 7994 pcmd = (struct scsi_cmnd **) &(*pcmd)->next_wcmd; 7995 } 7996 return NULL; 7997} 7998 7999static void process_waiting_list(struct ncb *np, int sts) 8000{ 8001 struct scsi_cmnd *waiting_list, *wcmd; 8002 8003 waiting_list = np->waiting_list; 8004 np->waiting_list = NULL; 8005 8006#ifdef DEBUG_WAITING_LIST 8007 if (waiting_list) printk("%s: waiting_list=%lx processing sts=%d\n", ncr_name(np), (u_long) waiting_list, sts); 8008#endif 8009 while ((wcmd = waiting_list) != NULL) { 8010 waiting_list = (struct scsi_cmnd *) wcmd->next_wcmd; 8011 wcmd->next_wcmd = NULL; 8012 if (sts == DID_OK) { 8013#ifdef DEBUG_WAITING_LIST 8014 printk("%s: cmd %lx trying to requeue\n", ncr_name(np), (u_long) wcmd); 8015#endif 8016 sts = ncr_queue_command(np, wcmd); 8017 } 8018 if (sts != DID_OK) { 8019#ifdef DEBUG_WAITING_LIST 8020 printk("%s: cmd %lx done forced sts=%d\n", ncr_name(np), (u_long) wcmd, sts); 8021#endif 8022 wcmd->result = ScsiResult(sts, 0); 8023 ncr_queue_done_cmd(np, wcmd); 8024 } 8025 } 8026} 8027 8028#undef next_wcmd 8029 8030static ssize_t show_ncr53c8xx_revision(struct device *dev, 8031 struct device_attribute *attr, char *buf) 8032{ 8033 struct Scsi_Host *host = class_to_shost(dev); 8034 struct host_data *host_data = (struct host_data *)host->hostdata; 8035 8036 return snprintf(buf, 20, "0x%x\n", host_data->ncb->revision_id); 8037} 8038 8039static struct device_attribute ncr53c8xx_revision_attr = { 8040 .attr = { .name = "revision", .mode = S_IRUGO, }, 8041 .show = show_ncr53c8xx_revision, 8042}; 8043 8044static struct device_attribute *ncr53c8xx_host_attrs[] = { 8045 &ncr53c8xx_revision_attr, 8046 NULL 8047}; 8048 8049/*========================================================== 8050** 8051** Boot command line. 8052** 8053**========================================================== 8054*/ 8055#ifdef MODULE 8056char *ncr53c8xx; /* command line passed by insmod */ 8057module_param(ncr53c8xx, charp, 0); 8058#endif 8059 8060#ifndef MODULE 8061static int __init ncr53c8xx_setup(char *str) 8062{ 8063 return sym53c8xx__setup(str); 8064} 8065 8066__setup("ncr53c8xx=", ncr53c8xx_setup); 8067#endif 8068 8069 8070/* 8071 * Host attach and initialisations. 8072 * 8073 * Allocate host data and ncb structure. 8074 * Request IO region and remap MMIO region. 8075 * Do chip initialization. 8076 * If all is OK, install interrupt handling and 8077 * start the timer daemon. 8078 */ 8079struct Scsi_Host * __init ncr_attach(struct scsi_host_template *tpnt, 8080 int unit, struct ncr_device *device) 8081{ 8082 struct host_data *host_data; 8083 struct ncb *np = NULL; 8084 struct Scsi_Host *instance = NULL; 8085 u_long flags = 0; 8086 int i; 8087 8088 if (!tpnt->name) 8089 tpnt->name = SCSI_NCR_DRIVER_NAME; 8090 if (!tpnt->shost_attrs) 8091 tpnt->shost_attrs = ncr53c8xx_host_attrs; 8092 8093 tpnt->queuecommand = ncr53c8xx_queue_command; 8094 tpnt->slave_configure = ncr53c8xx_slave_configure; 8095 tpnt->slave_alloc = ncr53c8xx_slave_alloc; 8096 tpnt->eh_bus_reset_handler = ncr53c8xx_bus_reset; 8097 tpnt->can_queue = SCSI_NCR_CAN_QUEUE; 8098 tpnt->this_id = 7; 8099 tpnt->sg_tablesize = SCSI_NCR_SG_TABLESIZE; 8100 tpnt->cmd_per_lun = SCSI_NCR_CMD_PER_LUN; 8101 tpnt->use_clustering = ENABLE_CLUSTERING; 8102 8103 if (device->differential) 8104 driver_setup.diff_support = device->differential; 8105 8106 printk(KERN_INFO "ncr53c720-%d: rev 0x%x irq %d\n", 8107 unit, device->chip.revision_id, device->slot.irq); 8108 8109 instance = scsi_host_alloc(tpnt, sizeof(*host_data)); 8110 if (!instance) 8111 goto attach_error; 8112 host_data = (struct host_data *) instance->hostdata; 8113 8114 np = __m_calloc_dma(device->dev, sizeof(struct ncb), "NCB"); 8115 if (!np) 8116 goto attach_error; 8117 spin_lock_init(&np->smp_lock); 8118 np->dev = device->dev; 8119 np->p_ncb = vtobus(np); 8120 host_data->ncb = np; 8121 8122 np->ccb = m_calloc_dma(sizeof(struct ccb), "CCB"); 8123 if (!np->ccb) 8124 goto attach_error; 8125 8126 /* Store input information in the host data structure. */ 8127 np->unit = unit; 8128 np->verbose = driver_setup.verbose; 8129 sprintf(np->inst_name, "ncr53c720-%d", np->unit); 8130 np->revision_id = device->chip.revision_id; 8131 np->features = device->chip.features; 8132 np->clock_divn = device->chip.nr_divisor; 8133 np->maxoffs = device->chip.offset_max; 8134 np->maxburst = device->chip.burst_max; 8135 np->myaddr = device->host_id; 8136 8137 /* Allocate SCRIPTS areas. */ 8138 np->script0 = m_calloc_dma(sizeof(struct script), "SCRIPT"); 8139 if (!np->script0) 8140 goto attach_error; 8141 np->scripth0 = m_calloc_dma(sizeof(struct scripth), "SCRIPTH"); 8142 if (!np->scripth0) 8143 goto attach_error; 8144 8145 init_timer(&np->timer); 8146 np->timer.data = (unsigned long) np; 8147 np->timer.function = ncr53c8xx_timeout; 8148 8149 /* Try to map the controller chip to virtual and physical memory. */ 8150 8151 np->paddr = device->slot.base; 8152 np->paddr2 = (np->features & FE_RAM) ? device->slot.base_2 : 0; 8153 8154 if (device->slot.base_v) 8155 np->vaddr = device->slot.base_v; 8156 else 8157 np->vaddr = ioremap(device->slot.base_c, 128); 8158 8159 if (!np->vaddr) { 8160 printk(KERN_ERR 8161 "%s: can't map memory mapped IO region\n",ncr_name(np)); 8162 goto attach_error; 8163 } else { 8164 if (bootverbose > 1) 8165 printk(KERN_INFO 8166 "%s: using memory mapped IO at virtual address 0x%lx\n", ncr_name(np), (u_long) np->vaddr); 8167 } 8168 8169 /* Make the controller's registers available. Now the INB INW INL 8170 * OUTB OUTW OUTL macros can be used safely. 8171 */ 8172 8173 np->reg = (struct ncr_reg __iomem *)np->vaddr; 8174 8175 /* Do chip dependent initialization. */ 8176 ncr_prepare_setting(np); 8177 8178 if (np->paddr2 && sizeof(struct script) > 4096) { 8179 np->paddr2 = 0; 8180 printk(KERN_WARNING "%s: script too large, NOT using on chip RAM.\n", 8181 ncr_name(np)); 8182 } 8183 8184 instance->max_channel = 0; 8185 instance->this_id = np->myaddr; 8186 instance->max_id = np->maxwide ? 16 : 8; 8187 instance->max_lun = SCSI_NCR_MAX_LUN; 8188 instance->base = (unsigned long) np->reg; 8189 instance->irq = device->slot.irq; 8190 instance->unique_id = device->slot.base; 8191 instance->dma_channel = 0; 8192 instance->cmd_per_lun = MAX_TAGS; 8193 instance->can_queue = (MAX_START-4); 8194 /* This can happen if you forget to call ncr53c8xx_init from 8195 * your module_init */ 8196 BUG_ON(!ncr53c8xx_transport_template); 8197 instance->transportt = ncr53c8xx_transport_template; 8198 8199 /* Patch script to physical addresses */ 8200 ncr_script_fill(&script0, &scripth0); 8201 8202 np->scripth = np->scripth0; 8203 np->p_scripth = vtobus(np->scripth); 8204 np->p_script = (np->paddr2) ? np->paddr2 : vtobus(np->script0); 8205 8206 ncr_script_copy_and_bind(np, (ncrcmd *) &script0, 8207 (ncrcmd *) np->script0, sizeof(struct script)); 8208 ncr_script_copy_and_bind(np, (ncrcmd *) &scripth0, 8209 (ncrcmd *) np->scripth0, sizeof(struct scripth)); 8210 np->ccb->p_ccb = vtobus (np->ccb); 8211 8212 /* Patch the script for LED support. */ 8213 8214 if (np->features & FE_LED0) { 8215 np->script0->idle[0] = 8216 cpu_to_scr(SCR_REG_REG(gpreg, SCR_OR, 0x01)); 8217 np->script0->reselected[0] = 8218 cpu_to_scr(SCR_REG_REG(gpreg, SCR_AND, 0xfe)); 8219 np->script0->start[0] = 8220 cpu_to_scr(SCR_REG_REG(gpreg, SCR_AND, 0xfe)); 8221 } 8222 8223 /* 8224 * Look for the target control block of this nexus. 8225 * For i = 0 to 3 8226 * JUMP ^ IFTRUE (MASK (i, 3)), @(next_lcb) 8227 */ 8228 for (i = 0 ; i < 4 ; i++) { 8229 np->jump_tcb[i].l_cmd = 8230 cpu_to_scr((SCR_JUMP ^ IFTRUE (MASK (i, 3)))); 8231 np->jump_tcb[i].l_paddr = 8232 cpu_to_scr(NCB_SCRIPTH_PHYS (np, bad_target)); 8233 } 8234 8235 ncr_chip_reset(np, 100); 8236 8237 /* Now check the cache handling of the chipset. */ 8238 8239 if (ncr_snooptest(np)) { 8240 printk(KERN_ERR "CACHE INCORRECTLY CONFIGURED.\n"); 8241 goto attach_error; 8242 } 8243 8244 /* Install the interrupt handler. */ 8245 np->irq = device->slot.irq; 8246 8247 /* Initialize the fixed part of the default ccb. */ 8248 ncr_init_ccb(np, np->ccb); 8249 8250 /* 8251 * After SCSI devices have been opened, we cannot reset the bus 8252 * safely, so we do it here. Interrupt handler does the real work. 8253 * Process the reset exception if interrupts are not enabled yet. 8254 * Then enable disconnects. 8255 */ 8256 spin_lock_irqsave(&np->smp_lock, flags); 8257 if (ncr_reset_scsi_bus(np, 0, driver_setup.settle_delay) != 0) { 8258 printk(KERN_ERR "%s: FATAL ERROR: CHECK SCSI BUS - CABLES, TERMINATION, DEVICE POWER etc.!\n", ncr_name(np)); 8259 8260 spin_unlock_irqrestore(&np->smp_lock, flags); 8261 goto attach_error; 8262 } 8263 ncr_exception(np); 8264 8265 np->disc = 1; 8266 8267 /* 8268 * The middle-level SCSI driver does not wait for devices to settle. 8269 * Wait synchronously if more than 2 seconds. 8270 */ 8271 if (driver_setup.settle_delay > 2) { 8272 printk(KERN_INFO "%s: waiting %d seconds for scsi devices to settle...\n", 8273 ncr_name(np), driver_setup.settle_delay); 8274 mdelay(1000 * driver_setup.settle_delay); 8275 } 8276 8277 /* start the timeout daemon */ 8278 np->lasttime=0; 8279 ncr_timeout (np); 8280 8281 /* use SIMPLE TAG messages by default */ 8282#ifdef SCSI_NCR_ALWAYS_SIMPLE_TAG 8283 np->order = SIMPLE_QUEUE_TAG; 8284#endif 8285 8286 spin_unlock_irqrestore(&np->smp_lock, flags); 8287 8288 return instance; 8289 8290 attach_error: 8291 if (!instance) 8292 return NULL; 8293 printk(KERN_INFO "%s: detaching...\n", ncr_name(np)); 8294 if (!np) 8295 goto unregister; 8296 if (np->scripth0) 8297 m_free_dma(np->scripth0, sizeof(struct scripth), "SCRIPTH"); 8298 if (np->script0) 8299 m_free_dma(np->script0, sizeof(struct script), "SCRIPT"); 8300 if (np->ccb) 8301 m_free_dma(np->ccb, sizeof(struct ccb), "CCB"); 8302 m_free_dma(np, sizeof(struct ncb), "NCB"); 8303 host_data->ncb = NULL; 8304 8305 unregister: 8306 scsi_host_put(instance); 8307 8308 return NULL; 8309} 8310 8311 8312void ncr53c8xx_release(struct Scsi_Host *host) 8313{ 8314 struct host_data *host_data = shost_priv(host); 8315#ifdef DEBUG_NCR53C8XX 8316 printk("ncr53c8xx: release\n"); 8317#endif 8318 if (host_data->ncb) 8319 ncr_detach(host_data->ncb); 8320 scsi_host_put(host); 8321} 8322 8323static void ncr53c8xx_set_period(struct scsi_target *starget, int period) 8324{ 8325 struct Scsi_Host *shost = dev_to_shost(starget->dev.parent); 8326 struct ncb *np = ((struct host_data *)shost->hostdata)->ncb; 8327 struct tcb *tp = &np->target[starget->id]; 8328 8329 if (period > np->maxsync) 8330 period = np->maxsync; 8331 else if (period < np->minsync) 8332 period = np->minsync; 8333 8334 tp->usrsync = period; 8335 8336 ncr_negotiate(np, tp); 8337} 8338 8339static void ncr53c8xx_set_offset(struct scsi_target *starget, int offset) 8340{ 8341 struct Scsi_Host *shost = dev_to_shost(starget->dev.parent); 8342 struct ncb *np = ((struct host_data *)shost->hostdata)->ncb; 8343 struct tcb *tp = &np->target[starget->id]; 8344 8345 if (offset > np->maxoffs) 8346 offset = np->maxoffs; 8347 else if (offset < 0) 8348 offset = 0; 8349 8350 tp->maxoffs = offset; 8351 8352 ncr_negotiate(np, tp); 8353} 8354 8355static void ncr53c8xx_set_width(struct scsi_target *starget, int width) 8356{ 8357 struct Scsi_Host *shost = dev_to_shost(starget->dev.parent); 8358 struct ncb *np = ((struct host_data *)shost->hostdata)->ncb; 8359 struct tcb *tp = &np->target[starget->id]; 8360 8361 if (width > np->maxwide) 8362 width = np->maxwide; 8363 else if (width < 0) 8364 width = 0; 8365 8366 tp->usrwide = width; 8367 8368 ncr_negotiate(np, tp); 8369} 8370 8371static void ncr53c8xx_get_signalling(struct Scsi_Host *shost) 8372{ 8373 struct ncb *np = ((struct host_data *)shost->hostdata)->ncb; 8374 enum spi_signal_type type; 8375 8376 switch (np->scsi_mode) { 8377 case SMODE_SE: 8378 type = SPI_SIGNAL_SE; 8379 break; 8380 case SMODE_HVD: 8381 type = SPI_SIGNAL_HVD; 8382 break; 8383 default: 8384 type = SPI_SIGNAL_UNKNOWN; 8385 break; 8386 } 8387 spi_signalling(shost) = type; 8388} 8389 8390static struct spi_function_template ncr53c8xx_transport_functions = { 8391 .set_period = ncr53c8xx_set_period, 8392 .show_period = 1, 8393 .set_offset = ncr53c8xx_set_offset, 8394 .show_offset = 1, 8395 .set_width = ncr53c8xx_set_width, 8396 .show_width = 1, 8397 .get_signalling = ncr53c8xx_get_signalling, 8398}; 8399 8400int __init ncr53c8xx_init(void) 8401{ 8402 ncr53c8xx_transport_template = spi_attach_transport(&ncr53c8xx_transport_functions); 8403 if (!ncr53c8xx_transport_template) 8404 return -ENODEV; 8405 return 0; 8406} 8407 8408void ncr53c8xx_exit(void) 8409{ 8410 spi_release_transport(ncr53c8xx_transport_template); 8411} 8412