1/* 2 * TI OMAP1 Real Time Clock interface for Linux 3 * 4 * Copyright (C) 2003 MontaVista Software, Inc. 5 * Author: George G. Davis <gdavis@mvista.com> or <source@mvista.com> 6 * 7 * Copyright (C) 2006 David Brownell (new RTC framework) 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License 11 * as published by the Free Software Foundation; either version 12 * 2 of the License, or (at your option) any later version. 13 */ 14 15#include <linux/kernel.h> 16#include <linux/init.h> 17#include <linux/module.h> 18#include <linux/ioport.h> 19#include <linux/delay.h> 20#include <linux/rtc.h> 21#include <linux/bcd.h> 22#include <linux/platform_device.h> 23 24#include <asm/io.h> 25 26 27/* The OMAP1 RTC is a year/month/day/hours/minutes/seconds BCD clock 28 * with century-range alarm matching, driven by the 32kHz clock. 29 * 30 * The main user-visible ways it differs from PC RTCs are by omitting 31 * "don't care" alarm fields and sub-second periodic IRQs, and having 32 * an autoadjust mechanism to calibrate to the true oscillator rate. 33 * 34 * Board-specific wiring options include using split power mode with 35 * RTC_OFF_NOFF used as the reset signal (so the RTC won't be reset), 36 * and wiring RTC_WAKE_INT (so the RTC alarm can wake the system from 37 * low power modes). See the BOARD-SPECIFIC CUSTOMIZATION comment. 38 */ 39 40#define OMAP_RTC_BASE 0xfffb4800 41 42/* RTC registers */ 43#define OMAP_RTC_SECONDS_REG 0x00 44#define OMAP_RTC_MINUTES_REG 0x04 45#define OMAP_RTC_HOURS_REG 0x08 46#define OMAP_RTC_DAYS_REG 0x0C 47#define OMAP_RTC_MONTHS_REG 0x10 48#define OMAP_RTC_YEARS_REG 0x14 49#define OMAP_RTC_WEEKS_REG 0x18 50 51#define OMAP_RTC_ALARM_SECONDS_REG 0x20 52#define OMAP_RTC_ALARM_MINUTES_REG 0x24 53#define OMAP_RTC_ALARM_HOURS_REG 0x28 54#define OMAP_RTC_ALARM_DAYS_REG 0x2c 55#define OMAP_RTC_ALARM_MONTHS_REG 0x30 56#define OMAP_RTC_ALARM_YEARS_REG 0x34 57 58#define OMAP_RTC_CTRL_REG 0x40 59#define OMAP_RTC_STATUS_REG 0x44 60#define OMAP_RTC_INTERRUPTS_REG 0x48 61 62#define OMAP_RTC_COMP_LSB_REG 0x4c 63#define OMAP_RTC_COMP_MSB_REG 0x50 64#define OMAP_RTC_OSC_REG 0x54 65 66/* OMAP_RTC_CTRL_REG bit fields: */ 67#define OMAP_RTC_CTRL_SPLIT (1<<7) 68#define OMAP_RTC_CTRL_DISABLE (1<<6) 69#define OMAP_RTC_CTRL_SET_32_COUNTER (1<<5) 70#define OMAP_RTC_CTRL_TEST (1<<4) 71#define OMAP_RTC_CTRL_MODE_12_24 (1<<3) 72#define OMAP_RTC_CTRL_AUTO_COMP (1<<2) 73#define OMAP_RTC_CTRL_ROUND_30S (1<<1) 74#define OMAP_RTC_CTRL_STOP (1<<0) 75 76/* OMAP_RTC_STATUS_REG bit fields: */ 77#define OMAP_RTC_STATUS_POWER_UP (1<<7) 78#define OMAP_RTC_STATUS_ALARM (1<<6) 79#define OMAP_RTC_STATUS_1D_EVENT (1<<5) 80#define OMAP_RTC_STATUS_1H_EVENT (1<<4) 81#define OMAP_RTC_STATUS_1M_EVENT (1<<3) 82#define OMAP_RTC_STATUS_1S_EVENT (1<<2) 83#define OMAP_RTC_STATUS_RUN (1<<1) 84#define OMAP_RTC_STATUS_BUSY (1<<0) 85 86/* OMAP_RTC_INTERRUPTS_REG bit fields: */ 87#define OMAP_RTC_INTERRUPTS_IT_ALARM (1<<3) 88#define OMAP_RTC_INTERRUPTS_IT_TIMER (1<<2) 89 90static void __iomem *rtc_base; 91 92#define rtc_read(addr) __raw_readb(rtc_base + (addr)) 93#define rtc_write(val, addr) __raw_writeb(val, rtc_base + (addr)) 94 95 96/* we rely on the rtc framework to handle locking (rtc->ops_lock), 97 * so the only other requirement is that register accesses which 98 * require BUSY to be clear are made with IRQs locally disabled 99 */ 100static void rtc_wait_not_busy(void) 101{ 102 int count = 0; 103 u8 status; 104 105 /* BUSY may stay active for 1/32768 second (~30 usec) */ 106 for (count = 0; count < 50; count++) { 107 status = rtc_read(OMAP_RTC_STATUS_REG); 108 if ((status & (u8)OMAP_RTC_STATUS_BUSY) == 0) 109 break; 110 udelay(1); 111 } 112 /* now we have ~15 usec to read/write various registers */ 113} 114 115static irqreturn_t rtc_irq(int irq, void *rtc) 116{ 117 unsigned long events = 0; 118 u8 irq_data; 119 120 irq_data = rtc_read(OMAP_RTC_STATUS_REG); 121 122 /* alarm irq? */ 123 if (irq_data & OMAP_RTC_STATUS_ALARM) { 124 rtc_write(OMAP_RTC_STATUS_ALARM, OMAP_RTC_STATUS_REG); 125 events |= RTC_IRQF | RTC_AF; 126 } 127 128 /* 1/sec periodic/update irq? */ 129 if (irq_data & OMAP_RTC_STATUS_1S_EVENT) 130 events |= RTC_IRQF | RTC_UF; 131 132 rtc_update_irq(rtc, 1, events); 133 134 return IRQ_HANDLED; 135} 136 137#ifdef CONFIG_RTC_INTF_DEV 138 139static int 140omap_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) 141{ 142 u8 reg; 143 144 switch (cmd) { 145 case RTC_AIE_OFF: 146 case RTC_AIE_ON: 147 case RTC_UIE_OFF: 148 case RTC_UIE_ON: 149 break; 150 default: 151 return -ENOIOCTLCMD; 152 } 153 154 local_irq_disable(); 155 rtc_wait_not_busy(); 156 reg = rtc_read(OMAP_RTC_INTERRUPTS_REG); 157 switch (cmd) { 158 /* AIE = Alarm Interrupt Enable */ 159 case RTC_AIE_OFF: 160 reg &= ~OMAP_RTC_INTERRUPTS_IT_ALARM; 161 break; 162 case RTC_AIE_ON: 163 reg |= OMAP_RTC_INTERRUPTS_IT_ALARM; 164 break; 165 /* UIE = Update Interrupt Enable (1/second) */ 166 case RTC_UIE_OFF: 167 reg &= ~OMAP_RTC_INTERRUPTS_IT_TIMER; 168 break; 169 case RTC_UIE_ON: 170 reg |= OMAP_RTC_INTERRUPTS_IT_TIMER; 171 break; 172 } 173 rtc_wait_not_busy(); 174 rtc_write(reg, OMAP_RTC_INTERRUPTS_REG); 175 local_irq_enable(); 176 177 return 0; 178} 179 180#else 181#define omap_rtc_ioctl NULL 182#endif 183 184/* this hardware doesn't support "don't care" alarm fields */ 185static int tm2bcd(struct rtc_time *tm) 186{ 187 if (rtc_valid_tm(tm) != 0) 188 return -EINVAL; 189 190 tm->tm_sec = bin2bcd(tm->tm_sec); 191 tm->tm_min = bin2bcd(tm->tm_min); 192 tm->tm_hour = bin2bcd(tm->tm_hour); 193 tm->tm_mday = bin2bcd(tm->tm_mday); 194 195 tm->tm_mon = bin2bcd(tm->tm_mon + 1); 196 197 /* epoch == 1900 */ 198 if (tm->tm_year < 100 || tm->tm_year > 199) 199 return -EINVAL; 200 tm->tm_year = bin2bcd(tm->tm_year - 100); 201 202 return 0; 203} 204 205static void bcd2tm(struct rtc_time *tm) 206{ 207 tm->tm_sec = bcd2bin(tm->tm_sec); 208 tm->tm_min = bcd2bin(tm->tm_min); 209 tm->tm_hour = bcd2bin(tm->tm_hour); 210 tm->tm_mday = bcd2bin(tm->tm_mday); 211 tm->tm_mon = bcd2bin(tm->tm_mon) - 1; 212 /* epoch == 1900 */ 213 tm->tm_year = bcd2bin(tm->tm_year) + 100; 214} 215 216 217static int omap_rtc_read_time(struct device *dev, struct rtc_time *tm) 218{ 219 /* we don't report wday/yday/isdst ... */ 220 local_irq_disable(); 221 rtc_wait_not_busy(); 222 223 tm->tm_sec = rtc_read(OMAP_RTC_SECONDS_REG); 224 tm->tm_min = rtc_read(OMAP_RTC_MINUTES_REG); 225 tm->tm_hour = rtc_read(OMAP_RTC_HOURS_REG); 226 tm->tm_mday = rtc_read(OMAP_RTC_DAYS_REG); 227 tm->tm_mon = rtc_read(OMAP_RTC_MONTHS_REG); 228 tm->tm_year = rtc_read(OMAP_RTC_YEARS_REG); 229 230 local_irq_enable(); 231 232 bcd2tm(tm); 233 return 0; 234} 235 236static int omap_rtc_set_time(struct device *dev, struct rtc_time *tm) 237{ 238 if (tm2bcd(tm) < 0) 239 return -EINVAL; 240 local_irq_disable(); 241 rtc_wait_not_busy(); 242 243 rtc_write(tm->tm_year, OMAP_RTC_YEARS_REG); 244 rtc_write(tm->tm_mon, OMAP_RTC_MONTHS_REG); 245 rtc_write(tm->tm_mday, OMAP_RTC_DAYS_REG); 246 rtc_write(tm->tm_hour, OMAP_RTC_HOURS_REG); 247 rtc_write(tm->tm_min, OMAP_RTC_MINUTES_REG); 248 rtc_write(tm->tm_sec, OMAP_RTC_SECONDS_REG); 249 250 local_irq_enable(); 251 252 return 0; 253} 254 255static int omap_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm) 256{ 257 local_irq_disable(); 258 rtc_wait_not_busy(); 259 260 alm->time.tm_sec = rtc_read(OMAP_RTC_ALARM_SECONDS_REG); 261 alm->time.tm_min = rtc_read(OMAP_RTC_ALARM_MINUTES_REG); 262 alm->time.tm_hour = rtc_read(OMAP_RTC_ALARM_HOURS_REG); 263 alm->time.tm_mday = rtc_read(OMAP_RTC_ALARM_DAYS_REG); 264 alm->time.tm_mon = rtc_read(OMAP_RTC_ALARM_MONTHS_REG); 265 alm->time.tm_year = rtc_read(OMAP_RTC_ALARM_YEARS_REG); 266 267 local_irq_enable(); 268 269 bcd2tm(&alm->time); 270 alm->enabled = !!(rtc_read(OMAP_RTC_INTERRUPTS_REG) 271 & OMAP_RTC_INTERRUPTS_IT_ALARM); 272 273 return 0; 274} 275 276static int omap_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm) 277{ 278 u8 reg; 279 280 if (tm2bcd(&alm->time) < 0) 281 return -EINVAL; 282 283 local_irq_disable(); 284 rtc_wait_not_busy(); 285 286 rtc_write(alm->time.tm_year, OMAP_RTC_ALARM_YEARS_REG); 287 rtc_write(alm->time.tm_mon, OMAP_RTC_ALARM_MONTHS_REG); 288 rtc_write(alm->time.tm_mday, OMAP_RTC_ALARM_DAYS_REG); 289 rtc_write(alm->time.tm_hour, OMAP_RTC_ALARM_HOURS_REG); 290 rtc_write(alm->time.tm_min, OMAP_RTC_ALARM_MINUTES_REG); 291 rtc_write(alm->time.tm_sec, OMAP_RTC_ALARM_SECONDS_REG); 292 293 reg = rtc_read(OMAP_RTC_INTERRUPTS_REG); 294 if (alm->enabled) 295 reg |= OMAP_RTC_INTERRUPTS_IT_ALARM; 296 else 297 reg &= ~OMAP_RTC_INTERRUPTS_IT_ALARM; 298 rtc_write(reg, OMAP_RTC_INTERRUPTS_REG); 299 300 local_irq_enable(); 301 302 return 0; 303} 304 305static struct rtc_class_ops omap_rtc_ops = { 306 .ioctl = omap_rtc_ioctl, 307 .read_time = omap_rtc_read_time, 308 .set_time = omap_rtc_set_time, 309 .read_alarm = omap_rtc_read_alarm, 310 .set_alarm = omap_rtc_set_alarm, 311}; 312 313static int omap_rtc_alarm; 314static int omap_rtc_timer; 315 316static int __init omap_rtc_probe(struct platform_device *pdev) 317{ 318 struct resource *res, *mem; 319 struct rtc_device *rtc; 320 u8 reg, new_ctrl; 321 322 omap_rtc_timer = platform_get_irq(pdev, 0); 323 if (omap_rtc_timer <= 0) { 324 pr_debug("%s: no update irq?\n", pdev->name); 325 return -ENOENT; 326 } 327 328 omap_rtc_alarm = platform_get_irq(pdev, 1); 329 if (omap_rtc_alarm <= 0) { 330 pr_debug("%s: no alarm irq?\n", pdev->name); 331 return -ENOENT; 332 } 333 334 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 335 if (!res) { 336 pr_debug("%s: RTC resource data missing\n", pdev->name); 337 return -ENOENT; 338 } 339 340 mem = request_mem_region(res->start, resource_size(res), pdev->name); 341 if (!mem) { 342 pr_debug("%s: RTC registers at %08x are not free\n", 343 pdev->name, res->start); 344 return -EBUSY; 345 } 346 347 rtc_base = ioremap(res->start, resource_size(res)); 348 if (!rtc_base) { 349 pr_debug("%s: RTC registers can't be mapped\n", pdev->name); 350 goto fail; 351 } 352 353 rtc = rtc_device_register(pdev->name, &pdev->dev, 354 &omap_rtc_ops, THIS_MODULE); 355 if (IS_ERR(rtc)) { 356 pr_debug("%s: can't register RTC device, err %ld\n", 357 pdev->name, PTR_ERR(rtc)); 358 goto fail0; 359 } 360 platform_set_drvdata(pdev, rtc); 361 dev_set_drvdata(&rtc->dev, mem); 362 363 /* clear pending irqs, and set 1/second periodic, 364 * which we'll use instead of update irqs 365 */ 366 rtc_write(0, OMAP_RTC_INTERRUPTS_REG); 367 368 /* clear old status */ 369 reg = rtc_read(OMAP_RTC_STATUS_REG); 370 if (reg & (u8) OMAP_RTC_STATUS_POWER_UP) { 371 pr_info("%s: RTC power up reset detected\n", 372 pdev->name); 373 rtc_write(OMAP_RTC_STATUS_POWER_UP, OMAP_RTC_STATUS_REG); 374 } 375 if (reg & (u8) OMAP_RTC_STATUS_ALARM) 376 rtc_write(OMAP_RTC_STATUS_ALARM, OMAP_RTC_STATUS_REG); 377 378 /* handle periodic and alarm irqs */ 379 if (request_irq(omap_rtc_timer, rtc_irq, IRQF_DISABLED, 380 dev_name(&rtc->dev), rtc)) { 381 pr_debug("%s: RTC timer interrupt IRQ%d already claimed\n", 382 pdev->name, omap_rtc_timer); 383 goto fail1; 384 } 385 if ((omap_rtc_timer != omap_rtc_alarm) && 386 (request_irq(omap_rtc_alarm, rtc_irq, IRQF_DISABLED, 387 dev_name(&rtc->dev), rtc))) { 388 pr_debug("%s: RTC alarm interrupt IRQ%d already claimed\n", 389 pdev->name, omap_rtc_alarm); 390 goto fail2; 391 } 392 393 /* On boards with split power, RTC_ON_NOFF won't reset the RTC */ 394 reg = rtc_read(OMAP_RTC_CTRL_REG); 395 if (reg & (u8) OMAP_RTC_CTRL_STOP) 396 pr_info("%s: already running\n", pdev->name); 397 398 /* force to 24 hour mode */ 399 new_ctrl = reg & ~(OMAP_RTC_CTRL_SPLIT|OMAP_RTC_CTRL_AUTO_COMP); 400 new_ctrl |= OMAP_RTC_CTRL_STOP; 401 402 /* BOARD-SPECIFIC CUSTOMIZATION CAN GO HERE: 403 * 404 * - Boards wired so that RTC_WAKE_INT does something, and muxed 405 * right (W13_1610_RTC_WAKE_INT is the default after chip reset), 406 * should initialize the device wakeup flag appropriately. 407 * 408 * - Boards wired so RTC_ON_nOFF is used as the reset signal, 409 * rather than nPWRON_RESET, should forcibly enable split 410 * power mode. (Some chip errata report that RTC_CTRL_SPLIT 411 * is write-only, and always reads as zero...) 412 */ 413 device_init_wakeup(&pdev->dev, 0); 414 415 if (new_ctrl & (u8) OMAP_RTC_CTRL_SPLIT) 416 pr_info("%s: split power mode\n", pdev->name); 417 418 if (reg != new_ctrl) 419 rtc_write(new_ctrl, OMAP_RTC_CTRL_REG); 420 421 return 0; 422 423fail2: 424 free_irq(omap_rtc_timer, NULL); 425fail1: 426 rtc_device_unregister(rtc); 427fail0: 428 iounmap(rtc_base); 429fail: 430 release_resource(mem); 431 return -EIO; 432} 433 434static int __exit omap_rtc_remove(struct platform_device *pdev) 435{ 436 struct rtc_device *rtc = platform_get_drvdata(pdev); 437 438 device_init_wakeup(&pdev->dev, 0); 439 440 /* leave rtc running, but disable irqs */ 441 rtc_write(0, OMAP_RTC_INTERRUPTS_REG); 442 443 free_irq(omap_rtc_timer, rtc); 444 445 if (omap_rtc_timer != omap_rtc_alarm) 446 free_irq(omap_rtc_alarm, rtc); 447 448 release_resource(dev_get_drvdata(&rtc->dev)); 449 rtc_device_unregister(rtc); 450 return 0; 451} 452 453#ifdef CONFIG_PM 454 455static u8 irqstat; 456 457static int omap_rtc_suspend(struct platform_device *pdev, pm_message_t state) 458{ 459 irqstat = rtc_read(OMAP_RTC_INTERRUPTS_REG); 460 461 if (device_may_wakeup(&pdev->dev)) 462 enable_irq_wake(omap_rtc_alarm); 463 else 464 rtc_write(0, OMAP_RTC_INTERRUPTS_REG); 465 466 return 0; 467} 468 469static int omap_rtc_resume(struct platform_device *pdev) 470{ 471 if (device_may_wakeup(&pdev->dev)) 472 disable_irq_wake(omap_rtc_alarm); 473 else 474 rtc_write(irqstat, OMAP_RTC_INTERRUPTS_REG); 475 return 0; 476} 477 478#else 479#define omap_rtc_suspend NULL 480#define omap_rtc_resume NULL 481#endif 482 483static void omap_rtc_shutdown(struct platform_device *pdev) 484{ 485 rtc_write(0, OMAP_RTC_INTERRUPTS_REG); 486} 487 488MODULE_ALIAS("platform:omap_rtc"); 489static struct platform_driver omap_rtc_driver = { 490 .remove = __exit_p(omap_rtc_remove), 491 .suspend = omap_rtc_suspend, 492 .resume = omap_rtc_resume, 493 .shutdown = omap_rtc_shutdown, 494 .driver = { 495 .name = "omap_rtc", 496 .owner = THIS_MODULE, 497 }, 498}; 499 500static int __init rtc_init(void) 501{ 502 return platform_driver_probe(&omap_rtc_driver, omap_rtc_probe); 503} 504module_init(rtc_init); 505 506static void __exit rtc_exit(void) 507{ 508 platform_driver_unregister(&omap_rtc_driver); 509} 510module_exit(rtc_exit); 511 512MODULE_AUTHOR("George G. Davis (and others)"); 513MODULE_LICENSE("GPL"); 514