1/* 2 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com> 3 <http://rt2x00.serialmonkey.com> 4 5 This program is free software; you can redistribute it and/or modify 6 it under the terms of the GNU General Public License as published by 7 the Free Software Foundation; either version 2 of the License, or 8 (at your option) any later version. 9 10 This program is distributed in the hope that it will be useful, 11 but WITHOUT ANY WARRANTY; without even the implied warranty of 12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 GNU General Public License for more details. 14 15 You should have received a copy of the GNU General Public License 16 along with this program; if not, write to the 17 Free Software Foundation, Inc., 18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 19 */ 20 21/* 22 Module: rt2500usb 23 Abstract: rt2500usb device specific routines. 24 Supported chipsets: RT2570. 25 */ 26 27#include <linux/delay.h> 28#include <linux/etherdevice.h> 29#include <linux/init.h> 30#include <linux/kernel.h> 31#include <linux/module.h> 32#include <linux/slab.h> 33#include <linux/usb.h> 34 35#include "rt2x00.h" 36#include "rt2x00usb.h" 37#include "rt2500usb.h" 38 39/* 40 * Allow hardware encryption to be disabled. 41 */ 42static int modparam_nohwcrypt = 0; 43module_param_named(nohwcrypt, modparam_nohwcrypt, bool, S_IRUGO); 44MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption."); 45 46/* 47 * Register access. 48 * All access to the CSR registers will go through the methods 49 * rt2500usb_register_read and rt2500usb_register_write. 50 * BBP and RF register require indirect register access, 51 * and use the CSR registers BBPCSR and RFCSR to achieve this. 52 * These indirect registers work with busy bits, 53 * and we will try maximal REGISTER_BUSY_COUNT times to access 54 * the register while taking a REGISTER_BUSY_DELAY us delay 55 * between each attampt. When the busy bit is still set at that time, 56 * the access attempt is considered to have failed, 57 * and we will print an error. 58 * If the csr_mutex is already held then the _lock variants must 59 * be used instead. 60 */ 61static inline void rt2500usb_register_read(struct rt2x00_dev *rt2x00dev, 62 const unsigned int offset, 63 u16 *value) 64{ 65 __le16 reg; 66 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ, 67 USB_VENDOR_REQUEST_IN, offset, 68 ®, sizeof(reg), REGISTER_TIMEOUT); 69 *value = le16_to_cpu(reg); 70} 71 72static inline void rt2500usb_register_read_lock(struct rt2x00_dev *rt2x00dev, 73 const unsigned int offset, 74 u16 *value) 75{ 76 __le16 reg; 77 rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_READ, 78 USB_VENDOR_REQUEST_IN, offset, 79 ®, sizeof(reg), REGISTER_TIMEOUT); 80 *value = le16_to_cpu(reg); 81} 82 83static inline void rt2500usb_register_multiread(struct rt2x00_dev *rt2x00dev, 84 const unsigned int offset, 85 void *value, const u16 length) 86{ 87 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ, 88 USB_VENDOR_REQUEST_IN, offset, 89 value, length, 90 REGISTER_TIMEOUT16(length)); 91} 92 93static inline void rt2500usb_register_write(struct rt2x00_dev *rt2x00dev, 94 const unsigned int offset, 95 u16 value) 96{ 97 __le16 reg = cpu_to_le16(value); 98 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE, 99 USB_VENDOR_REQUEST_OUT, offset, 100 ®, sizeof(reg), REGISTER_TIMEOUT); 101} 102 103static inline void rt2500usb_register_write_lock(struct rt2x00_dev *rt2x00dev, 104 const unsigned int offset, 105 u16 value) 106{ 107 __le16 reg = cpu_to_le16(value); 108 rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_WRITE, 109 USB_VENDOR_REQUEST_OUT, offset, 110 ®, sizeof(reg), REGISTER_TIMEOUT); 111} 112 113static inline void rt2500usb_register_multiwrite(struct rt2x00_dev *rt2x00dev, 114 const unsigned int offset, 115 void *value, const u16 length) 116{ 117 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE, 118 USB_VENDOR_REQUEST_OUT, offset, 119 value, length, 120 REGISTER_TIMEOUT16(length)); 121} 122 123static int rt2500usb_regbusy_read(struct rt2x00_dev *rt2x00dev, 124 const unsigned int offset, 125 struct rt2x00_field16 field, 126 u16 *reg) 127{ 128 unsigned int i; 129 130 for (i = 0; i < REGISTER_BUSY_COUNT; i++) { 131 rt2500usb_register_read_lock(rt2x00dev, offset, reg); 132 if (!rt2x00_get_field16(*reg, field)) 133 return 1; 134 udelay(REGISTER_BUSY_DELAY); 135 } 136 137 ERROR(rt2x00dev, "Indirect register access failed: " 138 "offset=0x%.08x, value=0x%.08x\n", offset, *reg); 139 *reg = ~0; 140 141 return 0; 142} 143 144#define WAIT_FOR_BBP(__dev, __reg) \ 145 rt2500usb_regbusy_read((__dev), PHY_CSR8, PHY_CSR8_BUSY, (__reg)) 146#define WAIT_FOR_RF(__dev, __reg) \ 147 rt2500usb_regbusy_read((__dev), PHY_CSR10, PHY_CSR10_RF_BUSY, (__reg)) 148 149static void rt2500usb_bbp_write(struct rt2x00_dev *rt2x00dev, 150 const unsigned int word, const u8 value) 151{ 152 u16 reg; 153 154 mutex_lock(&rt2x00dev->csr_mutex); 155 156 /* 157 * Wait until the BBP becomes available, afterwards we 158 * can safely write the new data into the register. 159 */ 160 if (WAIT_FOR_BBP(rt2x00dev, ®)) { 161 reg = 0; 162 rt2x00_set_field16(®, PHY_CSR7_DATA, value); 163 rt2x00_set_field16(®, PHY_CSR7_REG_ID, word); 164 rt2x00_set_field16(®, PHY_CSR7_READ_CONTROL, 0); 165 166 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg); 167 } 168 169 mutex_unlock(&rt2x00dev->csr_mutex); 170} 171 172static void rt2500usb_bbp_read(struct rt2x00_dev *rt2x00dev, 173 const unsigned int word, u8 *value) 174{ 175 u16 reg; 176 177 mutex_lock(&rt2x00dev->csr_mutex); 178 179 /* 180 * Wait until the BBP becomes available, afterwards we 181 * can safely write the read request into the register. 182 * After the data has been written, we wait until hardware 183 * returns the correct value, if at any time the register 184 * doesn't become available in time, reg will be 0xffffffff 185 * which means we return 0xff to the caller. 186 */ 187 if (WAIT_FOR_BBP(rt2x00dev, ®)) { 188 reg = 0; 189 rt2x00_set_field16(®, PHY_CSR7_REG_ID, word); 190 rt2x00_set_field16(®, PHY_CSR7_READ_CONTROL, 1); 191 192 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg); 193 194 if (WAIT_FOR_BBP(rt2x00dev, ®)) 195 rt2500usb_register_read_lock(rt2x00dev, PHY_CSR7, ®); 196 } 197 198 *value = rt2x00_get_field16(reg, PHY_CSR7_DATA); 199 200 mutex_unlock(&rt2x00dev->csr_mutex); 201} 202 203static void rt2500usb_rf_write(struct rt2x00_dev *rt2x00dev, 204 const unsigned int word, const u32 value) 205{ 206 u16 reg; 207 208 mutex_lock(&rt2x00dev->csr_mutex); 209 210 /* 211 * Wait until the RF becomes available, afterwards we 212 * can safely write the new data into the register. 213 */ 214 if (WAIT_FOR_RF(rt2x00dev, ®)) { 215 reg = 0; 216 rt2x00_set_field16(®, PHY_CSR9_RF_VALUE, value); 217 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR9, reg); 218 219 reg = 0; 220 rt2x00_set_field16(®, PHY_CSR10_RF_VALUE, value >> 16); 221 rt2x00_set_field16(®, PHY_CSR10_RF_NUMBER_OF_BITS, 20); 222 rt2x00_set_field16(®, PHY_CSR10_RF_IF_SELECT, 0); 223 rt2x00_set_field16(®, PHY_CSR10_RF_BUSY, 1); 224 225 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR10, reg); 226 rt2x00_rf_write(rt2x00dev, word, value); 227 } 228 229 mutex_unlock(&rt2x00dev->csr_mutex); 230} 231 232#ifdef CONFIG_RT2X00_LIB_DEBUGFS 233static void _rt2500usb_register_read(struct rt2x00_dev *rt2x00dev, 234 const unsigned int offset, 235 u32 *value) 236{ 237 rt2500usb_register_read(rt2x00dev, offset, (u16 *)value); 238} 239 240static void _rt2500usb_register_write(struct rt2x00_dev *rt2x00dev, 241 const unsigned int offset, 242 u32 value) 243{ 244 rt2500usb_register_write(rt2x00dev, offset, value); 245} 246 247static const struct rt2x00debug rt2500usb_rt2x00debug = { 248 .owner = THIS_MODULE, 249 .csr = { 250 .read = _rt2500usb_register_read, 251 .write = _rt2500usb_register_write, 252 .flags = RT2X00DEBUGFS_OFFSET, 253 .word_base = CSR_REG_BASE, 254 .word_size = sizeof(u16), 255 .word_count = CSR_REG_SIZE / sizeof(u16), 256 }, 257 .eeprom = { 258 .read = rt2x00_eeprom_read, 259 .write = rt2x00_eeprom_write, 260 .word_base = EEPROM_BASE, 261 .word_size = sizeof(u16), 262 .word_count = EEPROM_SIZE / sizeof(u16), 263 }, 264 .bbp = { 265 .read = rt2500usb_bbp_read, 266 .write = rt2500usb_bbp_write, 267 .word_base = BBP_BASE, 268 .word_size = sizeof(u8), 269 .word_count = BBP_SIZE / sizeof(u8), 270 }, 271 .rf = { 272 .read = rt2x00_rf_read, 273 .write = rt2500usb_rf_write, 274 .word_base = RF_BASE, 275 .word_size = sizeof(u32), 276 .word_count = RF_SIZE / sizeof(u32), 277 }, 278}; 279#endif /* CONFIG_RT2X00_LIB_DEBUGFS */ 280 281static int rt2500usb_rfkill_poll(struct rt2x00_dev *rt2x00dev) 282{ 283 u16 reg; 284 285 rt2500usb_register_read(rt2x00dev, MAC_CSR19, ®); 286 return rt2x00_get_field32(reg, MAC_CSR19_BIT7); 287} 288 289#ifdef CONFIG_RT2X00_LIB_LEDS 290static void rt2500usb_brightness_set(struct led_classdev *led_cdev, 291 enum led_brightness brightness) 292{ 293 struct rt2x00_led *led = 294 container_of(led_cdev, struct rt2x00_led, led_dev); 295 unsigned int enabled = brightness != LED_OFF; 296 u16 reg; 297 298 rt2500usb_register_read(led->rt2x00dev, MAC_CSR20, ®); 299 300 if (led->type == LED_TYPE_RADIO || led->type == LED_TYPE_ASSOC) 301 rt2x00_set_field16(®, MAC_CSR20_LINK, enabled); 302 else if (led->type == LED_TYPE_ACTIVITY) 303 rt2x00_set_field16(®, MAC_CSR20_ACTIVITY, enabled); 304 305 rt2500usb_register_write(led->rt2x00dev, MAC_CSR20, reg); 306} 307 308static int rt2500usb_blink_set(struct led_classdev *led_cdev, 309 unsigned long *delay_on, 310 unsigned long *delay_off) 311{ 312 struct rt2x00_led *led = 313 container_of(led_cdev, struct rt2x00_led, led_dev); 314 u16 reg; 315 316 rt2500usb_register_read(led->rt2x00dev, MAC_CSR21, ®); 317 rt2x00_set_field16(®, MAC_CSR21_ON_PERIOD, *delay_on); 318 rt2x00_set_field16(®, MAC_CSR21_OFF_PERIOD, *delay_off); 319 rt2500usb_register_write(led->rt2x00dev, MAC_CSR21, reg); 320 321 return 0; 322} 323 324static void rt2500usb_init_led(struct rt2x00_dev *rt2x00dev, 325 struct rt2x00_led *led, 326 enum led_type type) 327{ 328 led->rt2x00dev = rt2x00dev; 329 led->type = type; 330 led->led_dev.brightness_set = rt2500usb_brightness_set; 331 led->led_dev.blink_set = rt2500usb_blink_set; 332 led->flags = LED_INITIALIZED; 333} 334#endif /* CONFIG_RT2X00_LIB_LEDS */ 335 336/* 337 * Configuration handlers. 338 */ 339 340/* 341 * rt2500usb does not differentiate between shared and pairwise 342 * keys, so we should use the same function for both key types. 343 */ 344static int rt2500usb_config_key(struct rt2x00_dev *rt2x00dev, 345 struct rt2x00lib_crypto *crypto, 346 struct ieee80211_key_conf *key) 347{ 348 u32 mask; 349 u16 reg; 350 enum cipher curr_cipher; 351 352 if (crypto->cmd == SET_KEY) { 353 /* 354 * Disallow to set WEP key other than with index 0, 355 * it is known that not work at least on some hardware. 356 * SW crypto will be used in that case. 357 */ 358 if (key->alg == ALG_WEP && key->keyidx != 0) 359 return -EOPNOTSUPP; 360 361 /* 362 * Pairwise key will always be entry 0, but this 363 * could collide with a shared key on the same 364 * position... 365 */ 366 mask = TXRX_CSR0_KEY_ID.bit_mask; 367 368 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, ®); 369 curr_cipher = rt2x00_get_field16(reg, TXRX_CSR0_ALGORITHM); 370 reg &= mask; 371 372 if (reg && reg == mask) 373 return -ENOSPC; 374 375 reg = rt2x00_get_field16(reg, TXRX_CSR0_KEY_ID); 376 377 key->hw_key_idx += reg ? ffz(reg) : 0; 378 /* 379 * Hardware requires that all keys use the same cipher 380 * (e.g. TKIP-only, AES-only, but not TKIP+AES). 381 * If this is not the first key, compare the cipher with the 382 * first one and fall back to SW crypto if not the same. 383 */ 384 if (key->hw_key_idx > 0 && crypto->cipher != curr_cipher) 385 return -EOPNOTSUPP; 386 387 rt2500usb_register_multiwrite(rt2x00dev, KEY_ENTRY(key->hw_key_idx), 388 crypto->key, sizeof(crypto->key)); 389 390 /* 391 * The driver does not support the IV/EIV generation 392 * in hardware. However it demands the data to be provided 393 * both separately as well as inside the frame. 394 * We already provided the CONFIG_CRYPTO_COPY_IV to rt2x00lib 395 * to ensure rt2x00lib will not strip the data from the 396 * frame after the copy, now we must tell mac80211 397 * to generate the IV/EIV data. 398 */ 399 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV; 400 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC; 401 } 402 403 /* 404 * TXRX_CSR0_KEY_ID contains only single-bit fields to indicate 405 * a particular key is valid. 406 */ 407 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, ®); 408 rt2x00_set_field16(®, TXRX_CSR0_ALGORITHM, crypto->cipher); 409 rt2x00_set_field16(®, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER); 410 411 mask = rt2x00_get_field16(reg, TXRX_CSR0_KEY_ID); 412 if (crypto->cmd == SET_KEY) 413 mask |= 1 << key->hw_key_idx; 414 else if (crypto->cmd == DISABLE_KEY) 415 mask &= ~(1 << key->hw_key_idx); 416 rt2x00_set_field16(®, TXRX_CSR0_KEY_ID, mask); 417 rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg); 418 419 return 0; 420} 421 422static void rt2500usb_config_filter(struct rt2x00_dev *rt2x00dev, 423 const unsigned int filter_flags) 424{ 425 u16 reg; 426 427 /* 428 * Start configuration steps. 429 * Note that the version error will always be dropped 430 * and broadcast frames will always be accepted since 431 * there is no filter for it at this time. 432 */ 433 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, ®); 434 rt2x00_set_field16(®, TXRX_CSR2_DROP_CRC, 435 !(filter_flags & FIF_FCSFAIL)); 436 rt2x00_set_field16(®, TXRX_CSR2_DROP_PHYSICAL, 437 !(filter_flags & FIF_PLCPFAIL)); 438 rt2x00_set_field16(®, TXRX_CSR2_DROP_CONTROL, 439 !(filter_flags & FIF_CONTROL)); 440 rt2x00_set_field16(®, TXRX_CSR2_DROP_NOT_TO_ME, 441 !(filter_flags & FIF_PROMISC_IN_BSS)); 442 rt2x00_set_field16(®, TXRX_CSR2_DROP_TODS, 443 !(filter_flags & FIF_PROMISC_IN_BSS) && 444 !rt2x00dev->intf_ap_count); 445 rt2x00_set_field16(®, TXRX_CSR2_DROP_VERSION_ERROR, 1); 446 rt2x00_set_field16(®, TXRX_CSR2_DROP_MULTICAST, 447 !(filter_flags & FIF_ALLMULTI)); 448 rt2x00_set_field16(®, TXRX_CSR2_DROP_BROADCAST, 0); 449 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg); 450} 451 452static void rt2500usb_config_intf(struct rt2x00_dev *rt2x00dev, 453 struct rt2x00_intf *intf, 454 struct rt2x00intf_conf *conf, 455 const unsigned int flags) 456{ 457 unsigned int bcn_preload; 458 u16 reg; 459 460 if (flags & CONFIG_UPDATE_TYPE) { 461 /* 462 * Enable beacon config 463 */ 464 bcn_preload = PREAMBLE + GET_DURATION(IEEE80211_HEADER, 20); 465 rt2500usb_register_read(rt2x00dev, TXRX_CSR20, ®); 466 rt2x00_set_field16(®, TXRX_CSR20_OFFSET, bcn_preload >> 6); 467 rt2x00_set_field16(®, TXRX_CSR20_BCN_EXPECT_WINDOW, 468 2 * (conf->type != NL80211_IFTYPE_STATION)); 469 rt2500usb_register_write(rt2x00dev, TXRX_CSR20, reg); 470 471 /* 472 * Enable synchronisation. 473 */ 474 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, ®); 475 rt2x00_set_field16(®, TXRX_CSR18_OFFSET, 0); 476 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg); 477 478 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, ®); 479 rt2x00_set_field16(®, TXRX_CSR19_TSF_COUNT, 1); 480 rt2x00_set_field16(®, TXRX_CSR19_TSF_SYNC, conf->sync); 481 rt2x00_set_field16(®, TXRX_CSR19_TBCN, 1); 482 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg); 483 } 484 485 if (flags & CONFIG_UPDATE_MAC) 486 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR2, conf->mac, 487 (3 * sizeof(__le16))); 488 489 if (flags & CONFIG_UPDATE_BSSID) 490 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR5, conf->bssid, 491 (3 * sizeof(__le16))); 492} 493 494static void rt2500usb_config_erp(struct rt2x00_dev *rt2x00dev, 495 struct rt2x00lib_erp *erp) 496{ 497 u16 reg; 498 499 rt2500usb_register_read(rt2x00dev, TXRX_CSR10, ®); 500 rt2x00_set_field16(®, TXRX_CSR10_AUTORESPOND_PREAMBLE, 501 !!erp->short_preamble); 502 rt2500usb_register_write(rt2x00dev, TXRX_CSR10, reg); 503 504 rt2500usb_register_write(rt2x00dev, TXRX_CSR11, erp->basic_rates); 505 506 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, ®); 507 rt2x00_set_field16(®, TXRX_CSR18_INTERVAL, erp->beacon_int * 4); 508 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg); 509 510 rt2500usb_register_write(rt2x00dev, MAC_CSR10, erp->slot_time); 511 rt2500usb_register_write(rt2x00dev, MAC_CSR11, erp->sifs); 512 rt2500usb_register_write(rt2x00dev, MAC_CSR12, erp->eifs); 513} 514 515static void rt2500usb_config_ant(struct rt2x00_dev *rt2x00dev, 516 struct antenna_setup *ant) 517{ 518 u8 r2; 519 u8 r14; 520 u16 csr5; 521 u16 csr6; 522 523 /* 524 * We should never come here because rt2x00lib is supposed 525 * to catch this and send us the correct antenna explicitely. 526 */ 527 BUG_ON(ant->rx == ANTENNA_SW_DIVERSITY || 528 ant->tx == ANTENNA_SW_DIVERSITY); 529 530 rt2500usb_bbp_read(rt2x00dev, 2, &r2); 531 rt2500usb_bbp_read(rt2x00dev, 14, &r14); 532 rt2500usb_register_read(rt2x00dev, PHY_CSR5, &csr5); 533 rt2500usb_register_read(rt2x00dev, PHY_CSR6, &csr6); 534 535 /* 536 * Configure the TX antenna. 537 */ 538 switch (ant->tx) { 539 case ANTENNA_HW_DIVERSITY: 540 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 1); 541 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 1); 542 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 1); 543 break; 544 case ANTENNA_A: 545 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 0); 546 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 0); 547 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 0); 548 break; 549 case ANTENNA_B: 550 default: 551 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 2); 552 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 2); 553 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 2); 554 break; 555 } 556 557 /* 558 * Configure the RX antenna. 559 */ 560 switch (ant->rx) { 561 case ANTENNA_HW_DIVERSITY: 562 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 1); 563 break; 564 case ANTENNA_A: 565 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 0); 566 break; 567 case ANTENNA_B: 568 default: 569 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 2); 570 break; 571 } 572 573 /* 574 * RT2525E and RT5222 need to flip TX I/Q 575 */ 576 if (rt2x00_rf(rt2x00dev, RF2525E) || rt2x00_rf(rt2x00dev, RF5222)) { 577 rt2x00_set_field8(&r2, BBP_R2_TX_IQ_FLIP, 1); 578 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 1); 579 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 1); 580 581 /* 582 * RT2525E does not need RX I/Q Flip. 583 */ 584 if (rt2x00_rf(rt2x00dev, RF2525E)) 585 rt2x00_set_field8(&r14, BBP_R14_RX_IQ_FLIP, 0); 586 } else { 587 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 0); 588 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 0); 589 } 590 591 rt2500usb_bbp_write(rt2x00dev, 2, r2); 592 rt2500usb_bbp_write(rt2x00dev, 14, r14); 593 rt2500usb_register_write(rt2x00dev, PHY_CSR5, csr5); 594 rt2500usb_register_write(rt2x00dev, PHY_CSR6, csr6); 595} 596 597static void rt2500usb_config_channel(struct rt2x00_dev *rt2x00dev, 598 struct rf_channel *rf, const int txpower) 599{ 600 /* 601 * Set TXpower. 602 */ 603 rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower)); 604 605 /* 606 * For RT2525E we should first set the channel to half band higher. 607 */ 608 if (rt2x00_rf(rt2x00dev, RF2525E)) { 609 static const u32 vals[] = { 610 0x000008aa, 0x000008ae, 0x000008ae, 0x000008b2, 611 0x000008b2, 0x000008b6, 0x000008b6, 0x000008ba, 612 0x000008ba, 0x000008be, 0x000008b7, 0x00000902, 613 0x00000902, 0x00000906 614 }; 615 616 rt2500usb_rf_write(rt2x00dev, 2, vals[rf->channel - 1]); 617 if (rf->rf4) 618 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4); 619 } 620 621 rt2500usb_rf_write(rt2x00dev, 1, rf->rf1); 622 rt2500usb_rf_write(rt2x00dev, 2, rf->rf2); 623 rt2500usb_rf_write(rt2x00dev, 3, rf->rf3); 624 if (rf->rf4) 625 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4); 626} 627 628static void rt2500usb_config_txpower(struct rt2x00_dev *rt2x00dev, 629 const int txpower) 630{ 631 u32 rf3; 632 633 rt2x00_rf_read(rt2x00dev, 3, &rf3); 634 rt2x00_set_field32(&rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower)); 635 rt2500usb_rf_write(rt2x00dev, 3, rf3); 636} 637 638static void rt2500usb_config_ps(struct rt2x00_dev *rt2x00dev, 639 struct rt2x00lib_conf *libconf) 640{ 641 enum dev_state state = 642 (libconf->conf->flags & IEEE80211_CONF_PS) ? 643 STATE_SLEEP : STATE_AWAKE; 644 u16 reg; 645 646 if (state == STATE_SLEEP) { 647 rt2500usb_register_read(rt2x00dev, MAC_CSR18, ®); 648 rt2x00_set_field16(®, MAC_CSR18_DELAY_AFTER_BEACON, 649 rt2x00dev->beacon_int - 20); 650 rt2x00_set_field16(®, MAC_CSR18_BEACONS_BEFORE_WAKEUP, 651 libconf->conf->listen_interval - 1); 652 653 /* We must first disable autowake before it can be enabled */ 654 rt2x00_set_field16(®, MAC_CSR18_AUTO_WAKE, 0); 655 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg); 656 657 rt2x00_set_field16(®, MAC_CSR18_AUTO_WAKE, 1); 658 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg); 659 } else { 660 rt2500usb_register_read(rt2x00dev, MAC_CSR18, ®); 661 rt2x00_set_field16(®, MAC_CSR18_AUTO_WAKE, 0); 662 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg); 663 } 664 665 rt2x00dev->ops->lib->set_device_state(rt2x00dev, state); 666} 667 668static void rt2500usb_config(struct rt2x00_dev *rt2x00dev, 669 struct rt2x00lib_conf *libconf, 670 const unsigned int flags) 671{ 672 if (flags & IEEE80211_CONF_CHANGE_CHANNEL) 673 rt2500usb_config_channel(rt2x00dev, &libconf->rf, 674 libconf->conf->power_level); 675 if ((flags & IEEE80211_CONF_CHANGE_POWER) && 676 !(flags & IEEE80211_CONF_CHANGE_CHANNEL)) 677 rt2500usb_config_txpower(rt2x00dev, 678 libconf->conf->power_level); 679 if (flags & IEEE80211_CONF_CHANGE_PS) 680 rt2500usb_config_ps(rt2x00dev, libconf); 681} 682 683/* 684 * Link tuning 685 */ 686static void rt2500usb_link_stats(struct rt2x00_dev *rt2x00dev, 687 struct link_qual *qual) 688{ 689 u16 reg; 690 691 /* 692 * Update FCS error count from register. 693 */ 694 rt2500usb_register_read(rt2x00dev, STA_CSR0, ®); 695 qual->rx_failed = rt2x00_get_field16(reg, STA_CSR0_FCS_ERROR); 696 697 /* 698 * Update False CCA count from register. 699 */ 700 rt2500usb_register_read(rt2x00dev, STA_CSR3, ®); 701 qual->false_cca = rt2x00_get_field16(reg, STA_CSR3_FALSE_CCA_ERROR); 702} 703 704static void rt2500usb_reset_tuner(struct rt2x00_dev *rt2x00dev, 705 struct link_qual *qual) 706{ 707 u16 eeprom; 708 u16 value; 709 710 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &eeprom); 711 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R24_LOW); 712 rt2500usb_bbp_write(rt2x00dev, 24, value); 713 714 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &eeprom); 715 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R25_LOW); 716 rt2500usb_bbp_write(rt2x00dev, 25, value); 717 718 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &eeprom); 719 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R61_LOW); 720 rt2500usb_bbp_write(rt2x00dev, 61, value); 721 722 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &eeprom); 723 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_VGCUPPER); 724 rt2500usb_bbp_write(rt2x00dev, 17, value); 725 726 qual->vgc_level = value; 727} 728 729/* 730 * Initialization functions. 731 */ 732static int rt2500usb_init_registers(struct rt2x00_dev *rt2x00dev) 733{ 734 u16 reg; 735 736 rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0x0001, 737 USB_MODE_TEST, REGISTER_TIMEOUT); 738 rt2x00usb_vendor_request_sw(rt2x00dev, USB_SINGLE_WRITE, 0x0308, 739 0x00f0, REGISTER_TIMEOUT); 740 741 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, ®); 742 rt2x00_set_field16(®, TXRX_CSR2_DISABLE_RX, 1); 743 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg); 744 745 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x1111); 746 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x1e11); 747 748 rt2500usb_register_read(rt2x00dev, MAC_CSR1, ®); 749 rt2x00_set_field16(®, MAC_CSR1_SOFT_RESET, 1); 750 rt2x00_set_field16(®, MAC_CSR1_BBP_RESET, 1); 751 rt2x00_set_field16(®, MAC_CSR1_HOST_READY, 0); 752 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg); 753 754 rt2500usb_register_read(rt2x00dev, MAC_CSR1, ®); 755 rt2x00_set_field16(®, MAC_CSR1_SOFT_RESET, 0); 756 rt2x00_set_field16(®, MAC_CSR1_BBP_RESET, 0); 757 rt2x00_set_field16(®, MAC_CSR1_HOST_READY, 0); 758 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg); 759 760 rt2500usb_register_read(rt2x00dev, TXRX_CSR5, ®); 761 rt2x00_set_field16(®, TXRX_CSR5_BBP_ID0, 13); 762 rt2x00_set_field16(®, TXRX_CSR5_BBP_ID0_VALID, 1); 763 rt2x00_set_field16(®, TXRX_CSR5_BBP_ID1, 12); 764 rt2x00_set_field16(®, TXRX_CSR5_BBP_ID1_VALID, 1); 765 rt2500usb_register_write(rt2x00dev, TXRX_CSR5, reg); 766 767 rt2500usb_register_read(rt2x00dev, TXRX_CSR6, ®); 768 rt2x00_set_field16(®, TXRX_CSR6_BBP_ID0, 10); 769 rt2x00_set_field16(®, TXRX_CSR6_BBP_ID0_VALID, 1); 770 rt2x00_set_field16(®, TXRX_CSR6_BBP_ID1, 11); 771 rt2x00_set_field16(®, TXRX_CSR6_BBP_ID1_VALID, 1); 772 rt2500usb_register_write(rt2x00dev, TXRX_CSR6, reg); 773 774 rt2500usb_register_read(rt2x00dev, TXRX_CSR7, ®); 775 rt2x00_set_field16(®, TXRX_CSR7_BBP_ID0, 7); 776 rt2x00_set_field16(®, TXRX_CSR7_BBP_ID0_VALID, 1); 777 rt2x00_set_field16(®, TXRX_CSR7_BBP_ID1, 6); 778 rt2x00_set_field16(®, TXRX_CSR7_BBP_ID1_VALID, 1); 779 rt2500usb_register_write(rt2x00dev, TXRX_CSR7, reg); 780 781 rt2500usb_register_read(rt2x00dev, TXRX_CSR8, ®); 782 rt2x00_set_field16(®, TXRX_CSR8_BBP_ID0, 5); 783 rt2x00_set_field16(®, TXRX_CSR8_BBP_ID0_VALID, 1); 784 rt2x00_set_field16(®, TXRX_CSR8_BBP_ID1, 0); 785 rt2x00_set_field16(®, TXRX_CSR8_BBP_ID1_VALID, 0); 786 rt2500usb_register_write(rt2x00dev, TXRX_CSR8, reg); 787 788 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, ®); 789 rt2x00_set_field16(®, TXRX_CSR19_TSF_COUNT, 0); 790 rt2x00_set_field16(®, TXRX_CSR19_TSF_SYNC, 0); 791 rt2x00_set_field16(®, TXRX_CSR19_TBCN, 0); 792 rt2x00_set_field16(®, TXRX_CSR19_BEACON_GEN, 0); 793 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg); 794 795 rt2500usb_register_write(rt2x00dev, TXRX_CSR21, 0xe78f); 796 rt2500usb_register_write(rt2x00dev, MAC_CSR9, 0xff1d); 797 798 if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE)) 799 return -EBUSY; 800 801 rt2500usb_register_read(rt2x00dev, MAC_CSR1, ®); 802 rt2x00_set_field16(®, MAC_CSR1_SOFT_RESET, 0); 803 rt2x00_set_field16(®, MAC_CSR1_BBP_RESET, 0); 804 rt2x00_set_field16(®, MAC_CSR1_HOST_READY, 1); 805 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg); 806 807 if (rt2x00_rev(rt2x00dev) >= RT2570_VERSION_C) { 808 rt2500usb_register_read(rt2x00dev, PHY_CSR2, ®); 809 rt2x00_set_field16(®, PHY_CSR2_LNA, 0); 810 } else { 811 reg = 0; 812 rt2x00_set_field16(®, PHY_CSR2_LNA, 1); 813 rt2x00_set_field16(®, PHY_CSR2_LNA_MODE, 3); 814 } 815 rt2500usb_register_write(rt2x00dev, PHY_CSR2, reg); 816 817 rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x0002); 818 rt2500usb_register_write(rt2x00dev, MAC_CSR22, 0x0053); 819 rt2500usb_register_write(rt2x00dev, MAC_CSR15, 0x01ee); 820 rt2500usb_register_write(rt2x00dev, MAC_CSR16, 0x0000); 821 822 rt2500usb_register_read(rt2x00dev, MAC_CSR8, ®); 823 rt2x00_set_field16(®, MAC_CSR8_MAX_FRAME_UNIT, 824 rt2x00dev->rx->data_size); 825 rt2500usb_register_write(rt2x00dev, MAC_CSR8, reg); 826 827 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, ®); 828 rt2x00_set_field16(®, TXRX_CSR0_ALGORITHM, CIPHER_NONE); 829 rt2x00_set_field16(®, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER); 830 rt2x00_set_field16(®, TXRX_CSR0_KEY_ID, 0); 831 rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg); 832 833 rt2500usb_register_read(rt2x00dev, MAC_CSR18, ®); 834 rt2x00_set_field16(®, MAC_CSR18_DELAY_AFTER_BEACON, 90); 835 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg); 836 837 rt2500usb_register_read(rt2x00dev, PHY_CSR4, ®); 838 rt2x00_set_field16(®, PHY_CSR4_LOW_RF_LE, 1); 839 rt2500usb_register_write(rt2x00dev, PHY_CSR4, reg); 840 841 rt2500usb_register_read(rt2x00dev, TXRX_CSR1, ®); 842 rt2x00_set_field16(®, TXRX_CSR1_AUTO_SEQUENCE, 1); 843 rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg); 844 845 return 0; 846} 847 848static int rt2500usb_wait_bbp_ready(struct rt2x00_dev *rt2x00dev) 849{ 850 unsigned int i; 851 u8 value; 852 853 for (i = 0; i < REGISTER_BUSY_COUNT; i++) { 854 rt2500usb_bbp_read(rt2x00dev, 0, &value); 855 if ((value != 0xff) && (value != 0x00)) 856 return 0; 857 udelay(REGISTER_BUSY_DELAY); 858 } 859 860 ERROR(rt2x00dev, "BBP register access failed, aborting.\n"); 861 return -EACCES; 862} 863 864static int rt2500usb_init_bbp(struct rt2x00_dev *rt2x00dev) 865{ 866 unsigned int i; 867 u16 eeprom; 868 u8 value; 869 u8 reg_id; 870 871 if (unlikely(rt2500usb_wait_bbp_ready(rt2x00dev))) 872 return -EACCES; 873 874 rt2500usb_bbp_write(rt2x00dev, 3, 0x02); 875 rt2500usb_bbp_write(rt2x00dev, 4, 0x19); 876 rt2500usb_bbp_write(rt2x00dev, 14, 0x1c); 877 rt2500usb_bbp_write(rt2x00dev, 15, 0x30); 878 rt2500usb_bbp_write(rt2x00dev, 16, 0xac); 879 rt2500usb_bbp_write(rt2x00dev, 18, 0x18); 880 rt2500usb_bbp_write(rt2x00dev, 19, 0xff); 881 rt2500usb_bbp_write(rt2x00dev, 20, 0x1e); 882 rt2500usb_bbp_write(rt2x00dev, 21, 0x08); 883 rt2500usb_bbp_write(rt2x00dev, 22, 0x08); 884 rt2500usb_bbp_write(rt2x00dev, 23, 0x08); 885 rt2500usb_bbp_write(rt2x00dev, 24, 0x80); 886 rt2500usb_bbp_write(rt2x00dev, 25, 0x50); 887 rt2500usb_bbp_write(rt2x00dev, 26, 0x08); 888 rt2500usb_bbp_write(rt2x00dev, 27, 0x23); 889 rt2500usb_bbp_write(rt2x00dev, 30, 0x10); 890 rt2500usb_bbp_write(rt2x00dev, 31, 0x2b); 891 rt2500usb_bbp_write(rt2x00dev, 32, 0xb9); 892 rt2500usb_bbp_write(rt2x00dev, 34, 0x12); 893 rt2500usb_bbp_write(rt2x00dev, 35, 0x50); 894 rt2500usb_bbp_write(rt2x00dev, 39, 0xc4); 895 rt2500usb_bbp_write(rt2x00dev, 40, 0x02); 896 rt2500usb_bbp_write(rt2x00dev, 41, 0x60); 897 rt2500usb_bbp_write(rt2x00dev, 53, 0x10); 898 rt2500usb_bbp_write(rt2x00dev, 54, 0x18); 899 rt2500usb_bbp_write(rt2x00dev, 56, 0x08); 900 rt2500usb_bbp_write(rt2x00dev, 57, 0x10); 901 rt2500usb_bbp_write(rt2x00dev, 58, 0x08); 902 rt2500usb_bbp_write(rt2x00dev, 61, 0x60); 903 rt2500usb_bbp_write(rt2x00dev, 62, 0x10); 904 rt2500usb_bbp_write(rt2x00dev, 75, 0xff); 905 906 for (i = 0; i < EEPROM_BBP_SIZE; i++) { 907 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom); 908 909 if (eeprom != 0xffff && eeprom != 0x0000) { 910 reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID); 911 value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE); 912 rt2500usb_bbp_write(rt2x00dev, reg_id, value); 913 } 914 } 915 916 return 0; 917} 918 919/* 920 * Device state switch handlers. 921 */ 922static void rt2500usb_toggle_rx(struct rt2x00_dev *rt2x00dev, 923 enum dev_state state) 924{ 925 u16 reg; 926 927 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, ®); 928 rt2x00_set_field16(®, TXRX_CSR2_DISABLE_RX, 929 (state == STATE_RADIO_RX_OFF) || 930 (state == STATE_RADIO_RX_OFF_LINK)); 931 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg); 932} 933 934static int rt2500usb_enable_radio(struct rt2x00_dev *rt2x00dev) 935{ 936 /* 937 * Initialize all registers. 938 */ 939 if (unlikely(rt2500usb_init_registers(rt2x00dev) || 940 rt2500usb_init_bbp(rt2x00dev))) 941 return -EIO; 942 943 return 0; 944} 945 946static void rt2500usb_disable_radio(struct rt2x00_dev *rt2x00dev) 947{ 948 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x2121); 949 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x2121); 950 951 /* 952 * Disable synchronisation. 953 */ 954 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0); 955 956 rt2x00usb_disable_radio(rt2x00dev); 957} 958 959static int rt2500usb_set_state(struct rt2x00_dev *rt2x00dev, 960 enum dev_state state) 961{ 962 u16 reg; 963 u16 reg2; 964 unsigned int i; 965 char put_to_sleep; 966 char bbp_state; 967 char rf_state; 968 969 put_to_sleep = (state != STATE_AWAKE); 970 971 reg = 0; 972 rt2x00_set_field16(®, MAC_CSR17_BBP_DESIRE_STATE, state); 973 rt2x00_set_field16(®, MAC_CSR17_RF_DESIRE_STATE, state); 974 rt2x00_set_field16(®, MAC_CSR17_PUT_TO_SLEEP, put_to_sleep); 975 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg); 976 rt2x00_set_field16(®, MAC_CSR17_SET_STATE, 1); 977 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg); 978 979 /* 980 * Device is not guaranteed to be in the requested state yet. 981 * We must wait until the register indicates that the 982 * device has entered the correct state. 983 */ 984 for (i = 0; i < REGISTER_BUSY_COUNT; i++) { 985 rt2500usb_register_read(rt2x00dev, MAC_CSR17, ®2); 986 bbp_state = rt2x00_get_field16(reg2, MAC_CSR17_BBP_CURR_STATE); 987 rf_state = rt2x00_get_field16(reg2, MAC_CSR17_RF_CURR_STATE); 988 if (bbp_state == state && rf_state == state) 989 return 0; 990 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg); 991 msleep(30); 992 } 993 994 return -EBUSY; 995} 996 997static int rt2500usb_set_device_state(struct rt2x00_dev *rt2x00dev, 998 enum dev_state state) 999{ 1000 int retval = 0; 1001 1002 switch (state) { 1003 case STATE_RADIO_ON: 1004 retval = rt2500usb_enable_radio(rt2x00dev); 1005 break; 1006 case STATE_RADIO_OFF: 1007 rt2500usb_disable_radio(rt2x00dev); 1008 break; 1009 case STATE_RADIO_RX_ON: 1010 case STATE_RADIO_RX_ON_LINK: 1011 case STATE_RADIO_RX_OFF: 1012 case STATE_RADIO_RX_OFF_LINK: 1013 rt2500usb_toggle_rx(rt2x00dev, state); 1014 break; 1015 case STATE_RADIO_IRQ_ON: 1016 case STATE_RADIO_IRQ_ON_ISR: 1017 case STATE_RADIO_IRQ_OFF: 1018 case STATE_RADIO_IRQ_OFF_ISR: 1019 /* No support, but no error either */ 1020 break; 1021 case STATE_DEEP_SLEEP: 1022 case STATE_SLEEP: 1023 case STATE_STANDBY: 1024 case STATE_AWAKE: 1025 retval = rt2500usb_set_state(rt2x00dev, state); 1026 break; 1027 default: 1028 retval = -ENOTSUPP; 1029 break; 1030 } 1031 1032 if (unlikely(retval)) 1033 ERROR(rt2x00dev, "Device failed to enter state %d (%d).\n", 1034 state, retval); 1035 1036 return retval; 1037} 1038 1039/* 1040 * TX descriptor initialization 1041 */ 1042static void rt2500usb_write_tx_desc(struct rt2x00_dev *rt2x00dev, 1043 struct sk_buff *skb, 1044 struct txentry_desc *txdesc) 1045{ 1046 struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb); 1047 __le32 *txd = (__le32 *) skb->data; 1048 u32 word; 1049 1050 /* 1051 * Start writing the descriptor words. 1052 */ 1053 rt2x00_desc_read(txd, 0, &word); 1054 rt2x00_set_field32(&word, TXD_W0_RETRY_LIMIT, txdesc->retry_limit); 1055 rt2x00_set_field32(&word, TXD_W0_MORE_FRAG, 1056 test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags)); 1057 rt2x00_set_field32(&word, TXD_W0_ACK, 1058 test_bit(ENTRY_TXD_ACK, &txdesc->flags)); 1059 rt2x00_set_field32(&word, TXD_W0_TIMESTAMP, 1060 test_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags)); 1061 rt2x00_set_field32(&word, TXD_W0_OFDM, 1062 (txdesc->rate_mode == RATE_MODE_OFDM)); 1063 rt2x00_set_field32(&word, TXD_W0_NEW_SEQ, 1064 test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags)); 1065 rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->ifs); 1066 rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, txdesc->length); 1067 rt2x00_set_field32(&word, TXD_W0_CIPHER, !!txdesc->cipher); 1068 rt2x00_set_field32(&word, TXD_W0_KEY_ID, txdesc->key_idx); 1069 rt2x00_desc_write(txd, 0, word); 1070 1071 rt2x00_desc_read(txd, 1, &word); 1072 rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, txdesc->iv_offset); 1073 rt2x00_set_field32(&word, TXD_W1_AIFS, txdesc->aifs); 1074 rt2x00_set_field32(&word, TXD_W1_CWMIN, txdesc->cw_min); 1075 rt2x00_set_field32(&word, TXD_W1_CWMAX, txdesc->cw_max); 1076 rt2x00_desc_write(txd, 1, word); 1077 1078 rt2x00_desc_read(txd, 2, &word); 1079 rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, txdesc->signal); 1080 rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, txdesc->service); 1081 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW, txdesc->length_low); 1082 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH, txdesc->length_high); 1083 rt2x00_desc_write(txd, 2, word); 1084 1085 if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc->flags)) { 1086 _rt2x00_desc_write(txd, 3, skbdesc->iv[0]); 1087 _rt2x00_desc_write(txd, 4, skbdesc->iv[1]); 1088 } 1089 1090 /* 1091 * Register descriptor details in skb frame descriptor. 1092 */ 1093 skbdesc->flags |= SKBDESC_DESC_IN_SKB; 1094 skbdesc->desc = txd; 1095 skbdesc->desc_len = TXD_DESC_SIZE; 1096} 1097 1098/* 1099 * TX data initialization 1100 */ 1101static void rt2500usb_beacondone(struct urb *urb); 1102 1103static void rt2500usb_write_beacon(struct queue_entry *entry, 1104 struct txentry_desc *txdesc) 1105{ 1106 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev; 1107 struct usb_device *usb_dev = to_usb_device_intf(rt2x00dev->dev); 1108 struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data; 1109 int pipe = usb_sndbulkpipe(usb_dev, entry->queue->usb_endpoint); 1110 int length; 1111 u16 reg, reg0; 1112 1113 /* 1114 * Disable beaconing while we are reloading the beacon data, 1115 * otherwise we might be sending out invalid data. 1116 */ 1117 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, ®); 1118 rt2x00_set_field16(®, TXRX_CSR19_BEACON_GEN, 0); 1119 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg); 1120 1121 /* 1122 * Add space for the descriptor in front of the skb. 1123 */ 1124 skb_push(entry->skb, TXD_DESC_SIZE); 1125 memset(entry->skb->data, 0, TXD_DESC_SIZE); 1126 1127 /* 1128 * Write the TX descriptor for the beacon. 1129 */ 1130 rt2500usb_write_tx_desc(rt2x00dev, entry->skb, txdesc); 1131 1132 /* 1133 * Dump beacon to userspace through debugfs. 1134 */ 1135 rt2x00debug_dump_frame(rt2x00dev, DUMP_FRAME_BEACON, entry->skb); 1136 1137 /* 1138 * USB devices cannot blindly pass the skb->len as the 1139 * length of the data to usb_fill_bulk_urb. Pass the skb 1140 * to the driver to determine what the length should be. 1141 */ 1142 length = rt2x00dev->ops->lib->get_tx_data_len(entry); 1143 1144 usb_fill_bulk_urb(bcn_priv->urb, usb_dev, pipe, 1145 entry->skb->data, length, rt2500usb_beacondone, 1146 entry); 1147 1148 /* 1149 * Second we need to create the guardian byte. 1150 * We only need a single byte, so lets recycle 1151 * the 'flags' field we are not using for beacons. 1152 */ 1153 bcn_priv->guardian_data = 0; 1154 usb_fill_bulk_urb(bcn_priv->guardian_urb, usb_dev, pipe, 1155 &bcn_priv->guardian_data, 1, rt2500usb_beacondone, 1156 entry); 1157 1158 /* 1159 * Send out the guardian byte. 1160 */ 1161 usb_submit_urb(bcn_priv->guardian_urb, GFP_ATOMIC); 1162 1163 /* 1164 * Enable beaconing again. 1165 */ 1166 rt2x00_set_field16(®, TXRX_CSR19_TSF_COUNT, 1); 1167 rt2x00_set_field16(®, TXRX_CSR19_TBCN, 1); 1168 reg0 = reg; 1169 rt2x00_set_field16(®, TXRX_CSR19_BEACON_GEN, 1); 1170 /* 1171 * Beacon generation will fail initially. 1172 * To prevent this we need to change the TXRX_CSR19 1173 * register several times (reg0 is the same as reg 1174 * except for TXRX_CSR19_BEACON_GEN, which is 0 in reg0 1175 * and 1 in reg). 1176 */ 1177 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg); 1178 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg0); 1179 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg); 1180 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg0); 1181 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg); 1182} 1183 1184static int rt2500usb_get_tx_data_len(struct queue_entry *entry) 1185{ 1186 int length; 1187 1188 /* 1189 * The length _must_ be a multiple of 2, 1190 * but it must _not_ be a multiple of the USB packet size. 1191 */ 1192 length = roundup(entry->skb->len, 2); 1193 length += (2 * !(length % entry->queue->usb_maxpacket)); 1194 1195 return length; 1196} 1197 1198/* 1199 * RX control handlers 1200 */ 1201static void rt2500usb_fill_rxdone(struct queue_entry *entry, 1202 struct rxdone_entry_desc *rxdesc) 1203{ 1204 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev; 1205 struct queue_entry_priv_usb *entry_priv = entry->priv_data; 1206 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb); 1207 __le32 *rxd = 1208 (__le32 *)(entry->skb->data + 1209 (entry_priv->urb->actual_length - 1210 entry->queue->desc_size)); 1211 u32 word0; 1212 u32 word1; 1213 1214 /* 1215 * Copy descriptor to the skbdesc->desc buffer, making it safe from moving of 1216 * frame data in rt2x00usb. 1217 */ 1218 memcpy(skbdesc->desc, rxd, skbdesc->desc_len); 1219 rxd = (__le32 *)skbdesc->desc; 1220 1221 /* 1222 * It is now safe to read the descriptor on all architectures. 1223 */ 1224 rt2x00_desc_read(rxd, 0, &word0); 1225 rt2x00_desc_read(rxd, 1, &word1); 1226 1227 if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR)) 1228 rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC; 1229 if (rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR)) 1230 rxdesc->flags |= RX_FLAG_FAILED_PLCP_CRC; 1231 1232 rxdesc->cipher = rt2x00_get_field32(word0, RXD_W0_CIPHER); 1233 if (rt2x00_get_field32(word0, RXD_W0_CIPHER_ERROR)) 1234 rxdesc->cipher_status = RX_CRYPTO_FAIL_KEY; 1235 1236 if (rxdesc->cipher != CIPHER_NONE) { 1237 _rt2x00_desc_read(rxd, 2, &rxdesc->iv[0]); 1238 _rt2x00_desc_read(rxd, 3, &rxdesc->iv[1]); 1239 rxdesc->dev_flags |= RXDONE_CRYPTO_IV; 1240 1241 /* ICV is located at the end of frame */ 1242 1243 rxdesc->flags |= RX_FLAG_MMIC_STRIPPED; 1244 if (rxdesc->cipher_status == RX_CRYPTO_SUCCESS) 1245 rxdesc->flags |= RX_FLAG_DECRYPTED; 1246 else if (rxdesc->cipher_status == RX_CRYPTO_FAIL_MIC) 1247 rxdesc->flags |= RX_FLAG_MMIC_ERROR; 1248 } 1249 1250 /* 1251 * Obtain the status about this packet. 1252 * When frame was received with an OFDM bitrate, 1253 * the signal is the PLCP value. If it was received with 1254 * a CCK bitrate the signal is the rate in 100kbit/s. 1255 */ 1256 rxdesc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL); 1257 rxdesc->rssi = 1258 rt2x00_get_field32(word1, RXD_W1_RSSI) - rt2x00dev->rssi_offset; 1259 rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT); 1260 1261 if (rt2x00_get_field32(word0, RXD_W0_OFDM)) 1262 rxdesc->dev_flags |= RXDONE_SIGNAL_PLCP; 1263 else 1264 rxdesc->dev_flags |= RXDONE_SIGNAL_BITRATE; 1265 if (rt2x00_get_field32(word0, RXD_W0_MY_BSS)) 1266 rxdesc->dev_flags |= RXDONE_MY_BSS; 1267 1268 /* 1269 * Adjust the skb memory window to the frame boundaries. 1270 */ 1271 skb_trim(entry->skb, rxdesc->size); 1272} 1273 1274/* 1275 * Interrupt functions. 1276 */ 1277static void rt2500usb_beacondone(struct urb *urb) 1278{ 1279 struct queue_entry *entry = (struct queue_entry *)urb->context; 1280 struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data; 1281 1282 if (!test_bit(DEVICE_STATE_ENABLED_RADIO, &entry->queue->rt2x00dev->flags)) 1283 return; 1284 1285 /* 1286 * Check if this was the guardian beacon, 1287 * if that was the case we need to send the real beacon now. 1288 * Otherwise we should free the sk_buffer, the device 1289 * should be doing the rest of the work now. 1290 */ 1291 if (bcn_priv->guardian_urb == urb) { 1292 usb_submit_urb(bcn_priv->urb, GFP_ATOMIC); 1293 } else if (bcn_priv->urb == urb) { 1294 dev_kfree_skb(entry->skb); 1295 entry->skb = NULL; 1296 } 1297} 1298 1299/* 1300 * Device probe functions. 1301 */ 1302static int rt2500usb_validate_eeprom(struct rt2x00_dev *rt2x00dev) 1303{ 1304 u16 word; 1305 u8 *mac; 1306 u8 bbp; 1307 1308 rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, EEPROM_SIZE); 1309 1310 /* 1311 * Start validation of the data that has been read. 1312 */ 1313 mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0); 1314 if (!is_valid_ether_addr(mac)) { 1315 random_ether_addr(mac); 1316 EEPROM(rt2x00dev, "MAC: %pM\n", mac); 1317 } 1318 1319 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word); 1320 if (word == 0xffff) { 1321 rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2); 1322 rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT, 1323 ANTENNA_SW_DIVERSITY); 1324 rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT, 1325 ANTENNA_SW_DIVERSITY); 1326 rt2x00_set_field16(&word, EEPROM_ANTENNA_LED_MODE, 1327 LED_MODE_DEFAULT); 1328 rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0); 1329 rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0); 1330 rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF2522); 1331 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word); 1332 EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word); 1333 } 1334 1335 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word); 1336 if (word == 0xffff) { 1337 rt2x00_set_field16(&word, EEPROM_NIC_CARDBUS_ACCEL, 0); 1338 rt2x00_set_field16(&word, EEPROM_NIC_DYN_BBP_TUNE, 0); 1339 rt2x00_set_field16(&word, EEPROM_NIC_CCK_TX_POWER, 0); 1340 rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word); 1341 EEPROM(rt2x00dev, "NIC: 0x%04x\n", word); 1342 } 1343 1344 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &word); 1345 if (word == 0xffff) { 1346 rt2x00_set_field16(&word, EEPROM_CALIBRATE_OFFSET_RSSI, 1347 DEFAULT_RSSI_OFFSET); 1348 rt2x00_eeprom_write(rt2x00dev, EEPROM_CALIBRATE_OFFSET, word); 1349 EEPROM(rt2x00dev, "Calibrate offset: 0x%04x\n", word); 1350 } 1351 1352 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &word); 1353 if (word == 0xffff) { 1354 rt2x00_set_field16(&word, EEPROM_BBPTUNE_THRESHOLD, 45); 1355 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE, word); 1356 EEPROM(rt2x00dev, "BBPtune: 0x%04x\n", word); 1357 } 1358 1359 /* 1360 * Switch lower vgc bound to current BBP R17 value, 1361 * lower the value a bit for better quality. 1362 */ 1363 rt2500usb_bbp_read(rt2x00dev, 17, &bbp); 1364 bbp -= 6; 1365 1366 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &word); 1367 if (word == 0xffff) { 1368 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCUPPER, 0x40); 1369 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp); 1370 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word); 1371 EEPROM(rt2x00dev, "BBPtune vgc: 0x%04x\n", word); 1372 } else { 1373 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp); 1374 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word); 1375 } 1376 1377 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &word); 1378 if (word == 0xffff) { 1379 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_LOW, 0x48); 1380 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_HIGH, 0x41); 1381 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R17, word); 1382 EEPROM(rt2x00dev, "BBPtune r17: 0x%04x\n", word); 1383 } 1384 1385 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &word); 1386 if (word == 0xffff) { 1387 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_LOW, 0x40); 1388 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_HIGH, 0x80); 1389 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R24, word); 1390 EEPROM(rt2x00dev, "BBPtune r24: 0x%04x\n", word); 1391 } 1392 1393 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &word); 1394 if (word == 0xffff) { 1395 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_LOW, 0x40); 1396 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_HIGH, 0x50); 1397 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R25, word); 1398 EEPROM(rt2x00dev, "BBPtune r25: 0x%04x\n", word); 1399 } 1400 1401 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &word); 1402 if (word == 0xffff) { 1403 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_LOW, 0x60); 1404 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_HIGH, 0x6d); 1405 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R61, word); 1406 EEPROM(rt2x00dev, "BBPtune r61: 0x%04x\n", word); 1407 } 1408 1409 return 0; 1410} 1411 1412static int rt2500usb_init_eeprom(struct rt2x00_dev *rt2x00dev) 1413{ 1414 u16 reg; 1415 u16 value; 1416 u16 eeprom; 1417 1418 /* 1419 * Read EEPROM word for configuration. 1420 */ 1421 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom); 1422 1423 /* 1424 * Identify RF chipset. 1425 */ 1426 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE); 1427 rt2500usb_register_read(rt2x00dev, MAC_CSR0, ®); 1428 rt2x00_set_chip(rt2x00dev, RT2570, value, reg); 1429 1430 if (((reg & 0xfff0) != 0) || ((reg & 0x0000000f) == 0)) { 1431 ERROR(rt2x00dev, "Invalid RT chipset detected.\n"); 1432 return -ENODEV; 1433 } 1434 1435 if (!rt2x00_rf(rt2x00dev, RF2522) && 1436 !rt2x00_rf(rt2x00dev, RF2523) && 1437 !rt2x00_rf(rt2x00dev, RF2524) && 1438 !rt2x00_rf(rt2x00dev, RF2525) && 1439 !rt2x00_rf(rt2x00dev, RF2525E) && 1440 !rt2x00_rf(rt2x00dev, RF5222)) { 1441 ERROR(rt2x00dev, "Invalid RF chipset detected.\n"); 1442 return -ENODEV; 1443 } 1444 1445 /* 1446 * Identify default antenna configuration. 1447 */ 1448 rt2x00dev->default_ant.tx = 1449 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TX_DEFAULT); 1450 rt2x00dev->default_ant.rx = 1451 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RX_DEFAULT); 1452 1453 /* 1454 * When the eeprom indicates SW_DIVERSITY use HW_DIVERSITY instead. 1455 * I am not 100% sure about this, but the legacy drivers do not 1456 * indicate antenna swapping in software is required when 1457 * diversity is enabled. 1458 */ 1459 if (rt2x00dev->default_ant.tx == ANTENNA_SW_DIVERSITY) 1460 rt2x00dev->default_ant.tx = ANTENNA_HW_DIVERSITY; 1461 if (rt2x00dev->default_ant.rx == ANTENNA_SW_DIVERSITY) 1462 rt2x00dev->default_ant.rx = ANTENNA_HW_DIVERSITY; 1463 1464 /* 1465 * Store led mode, for correct led behaviour. 1466 */ 1467#ifdef CONFIG_RT2X00_LIB_LEDS 1468 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_LED_MODE); 1469 1470 rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_radio, LED_TYPE_RADIO); 1471 if (value == LED_MODE_TXRX_ACTIVITY || 1472 value == LED_MODE_DEFAULT || 1473 value == LED_MODE_ASUS) 1474 rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_qual, 1475 LED_TYPE_ACTIVITY); 1476#endif /* CONFIG_RT2X00_LIB_LEDS */ 1477 1478 /* 1479 * Detect if this device has an hardware controlled radio. 1480 */ 1481 if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_HARDWARE_RADIO)) 1482 __set_bit(CONFIG_SUPPORT_HW_BUTTON, &rt2x00dev->flags); 1483 1484 /* 1485 * Read the RSSI <-> dBm offset information. 1486 */ 1487 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &eeprom); 1488 rt2x00dev->rssi_offset = 1489 rt2x00_get_field16(eeprom, EEPROM_CALIBRATE_OFFSET_RSSI); 1490 1491 return 0; 1492} 1493 1494/* 1495 * RF value list for RF2522 1496 * Supports: 2.4 GHz 1497 */ 1498static const struct rf_channel rf_vals_bg_2522[] = { 1499 { 1, 0x00002050, 0x000c1fda, 0x00000101, 0 }, 1500 { 2, 0x00002050, 0x000c1fee, 0x00000101, 0 }, 1501 { 3, 0x00002050, 0x000c2002, 0x00000101, 0 }, 1502 { 4, 0x00002050, 0x000c2016, 0x00000101, 0 }, 1503 { 5, 0x00002050, 0x000c202a, 0x00000101, 0 }, 1504 { 6, 0x00002050, 0x000c203e, 0x00000101, 0 }, 1505 { 7, 0x00002050, 0x000c2052, 0x00000101, 0 }, 1506 { 8, 0x00002050, 0x000c2066, 0x00000101, 0 }, 1507 { 9, 0x00002050, 0x000c207a, 0x00000101, 0 }, 1508 { 10, 0x00002050, 0x000c208e, 0x00000101, 0 }, 1509 { 11, 0x00002050, 0x000c20a2, 0x00000101, 0 }, 1510 { 12, 0x00002050, 0x000c20b6, 0x00000101, 0 }, 1511 { 13, 0x00002050, 0x000c20ca, 0x00000101, 0 }, 1512 { 14, 0x00002050, 0x000c20fa, 0x00000101, 0 }, 1513}; 1514 1515/* 1516 * RF value list for RF2523 1517 * Supports: 2.4 GHz 1518 */ 1519static const struct rf_channel rf_vals_bg_2523[] = { 1520 { 1, 0x00022010, 0x00000c9e, 0x000e0111, 0x00000a1b }, 1521 { 2, 0x00022010, 0x00000ca2, 0x000e0111, 0x00000a1b }, 1522 { 3, 0x00022010, 0x00000ca6, 0x000e0111, 0x00000a1b }, 1523 { 4, 0x00022010, 0x00000caa, 0x000e0111, 0x00000a1b }, 1524 { 5, 0x00022010, 0x00000cae, 0x000e0111, 0x00000a1b }, 1525 { 6, 0x00022010, 0x00000cb2, 0x000e0111, 0x00000a1b }, 1526 { 7, 0x00022010, 0x00000cb6, 0x000e0111, 0x00000a1b }, 1527 { 8, 0x00022010, 0x00000cba, 0x000e0111, 0x00000a1b }, 1528 { 9, 0x00022010, 0x00000cbe, 0x000e0111, 0x00000a1b }, 1529 { 10, 0x00022010, 0x00000d02, 0x000e0111, 0x00000a1b }, 1530 { 11, 0x00022010, 0x00000d06, 0x000e0111, 0x00000a1b }, 1531 { 12, 0x00022010, 0x00000d0a, 0x000e0111, 0x00000a1b }, 1532 { 13, 0x00022010, 0x00000d0e, 0x000e0111, 0x00000a1b }, 1533 { 14, 0x00022010, 0x00000d1a, 0x000e0111, 0x00000a03 }, 1534}; 1535 1536/* 1537 * RF value list for RF2524 1538 * Supports: 2.4 GHz 1539 */ 1540static const struct rf_channel rf_vals_bg_2524[] = { 1541 { 1, 0x00032020, 0x00000c9e, 0x00000101, 0x00000a1b }, 1542 { 2, 0x00032020, 0x00000ca2, 0x00000101, 0x00000a1b }, 1543 { 3, 0x00032020, 0x00000ca6, 0x00000101, 0x00000a1b }, 1544 { 4, 0x00032020, 0x00000caa, 0x00000101, 0x00000a1b }, 1545 { 5, 0x00032020, 0x00000cae, 0x00000101, 0x00000a1b }, 1546 { 6, 0x00032020, 0x00000cb2, 0x00000101, 0x00000a1b }, 1547 { 7, 0x00032020, 0x00000cb6, 0x00000101, 0x00000a1b }, 1548 { 8, 0x00032020, 0x00000cba, 0x00000101, 0x00000a1b }, 1549 { 9, 0x00032020, 0x00000cbe, 0x00000101, 0x00000a1b }, 1550 { 10, 0x00032020, 0x00000d02, 0x00000101, 0x00000a1b }, 1551 { 11, 0x00032020, 0x00000d06, 0x00000101, 0x00000a1b }, 1552 { 12, 0x00032020, 0x00000d0a, 0x00000101, 0x00000a1b }, 1553 { 13, 0x00032020, 0x00000d0e, 0x00000101, 0x00000a1b }, 1554 { 14, 0x00032020, 0x00000d1a, 0x00000101, 0x00000a03 }, 1555}; 1556 1557/* 1558 * RF value list for RF2525 1559 * Supports: 2.4 GHz 1560 */ 1561static const struct rf_channel rf_vals_bg_2525[] = { 1562 { 1, 0x00022020, 0x00080c9e, 0x00060111, 0x00000a1b }, 1563 { 2, 0x00022020, 0x00080ca2, 0x00060111, 0x00000a1b }, 1564 { 3, 0x00022020, 0x00080ca6, 0x00060111, 0x00000a1b }, 1565 { 4, 0x00022020, 0x00080caa, 0x00060111, 0x00000a1b }, 1566 { 5, 0x00022020, 0x00080cae, 0x00060111, 0x00000a1b }, 1567 { 6, 0x00022020, 0x00080cb2, 0x00060111, 0x00000a1b }, 1568 { 7, 0x00022020, 0x00080cb6, 0x00060111, 0x00000a1b }, 1569 { 8, 0x00022020, 0x00080cba, 0x00060111, 0x00000a1b }, 1570 { 9, 0x00022020, 0x00080cbe, 0x00060111, 0x00000a1b }, 1571 { 10, 0x00022020, 0x00080d02, 0x00060111, 0x00000a1b }, 1572 { 11, 0x00022020, 0x00080d06, 0x00060111, 0x00000a1b }, 1573 { 12, 0x00022020, 0x00080d0a, 0x00060111, 0x00000a1b }, 1574 { 13, 0x00022020, 0x00080d0e, 0x00060111, 0x00000a1b }, 1575 { 14, 0x00022020, 0x00080d1a, 0x00060111, 0x00000a03 }, 1576}; 1577 1578/* 1579 * RF value list for RF2525e 1580 * Supports: 2.4 GHz 1581 */ 1582static const struct rf_channel rf_vals_bg_2525e[] = { 1583 { 1, 0x00022010, 0x0000089a, 0x00060111, 0x00000e1b }, 1584 { 2, 0x00022010, 0x0000089e, 0x00060111, 0x00000e07 }, 1585 { 3, 0x00022010, 0x0000089e, 0x00060111, 0x00000e1b }, 1586 { 4, 0x00022010, 0x000008a2, 0x00060111, 0x00000e07 }, 1587 { 5, 0x00022010, 0x000008a2, 0x00060111, 0x00000e1b }, 1588 { 6, 0x00022010, 0x000008a6, 0x00060111, 0x00000e07 }, 1589 { 7, 0x00022010, 0x000008a6, 0x00060111, 0x00000e1b }, 1590 { 8, 0x00022010, 0x000008aa, 0x00060111, 0x00000e07 }, 1591 { 9, 0x00022010, 0x000008aa, 0x00060111, 0x00000e1b }, 1592 { 10, 0x00022010, 0x000008ae, 0x00060111, 0x00000e07 }, 1593 { 11, 0x00022010, 0x000008ae, 0x00060111, 0x00000e1b }, 1594 { 12, 0x00022010, 0x000008b2, 0x00060111, 0x00000e07 }, 1595 { 13, 0x00022010, 0x000008b2, 0x00060111, 0x00000e1b }, 1596 { 14, 0x00022010, 0x000008b6, 0x00060111, 0x00000e23 }, 1597}; 1598 1599/* 1600 * RF value list for RF5222 1601 * Supports: 2.4 GHz & 5.2 GHz 1602 */ 1603static const struct rf_channel rf_vals_5222[] = { 1604 { 1, 0x00022020, 0x00001136, 0x00000101, 0x00000a0b }, 1605 { 2, 0x00022020, 0x0000113a, 0x00000101, 0x00000a0b }, 1606 { 3, 0x00022020, 0x0000113e, 0x00000101, 0x00000a0b }, 1607 { 4, 0x00022020, 0x00001182, 0x00000101, 0x00000a0b }, 1608 { 5, 0x00022020, 0x00001186, 0x00000101, 0x00000a0b }, 1609 { 6, 0x00022020, 0x0000118a, 0x00000101, 0x00000a0b }, 1610 { 7, 0x00022020, 0x0000118e, 0x00000101, 0x00000a0b }, 1611 { 8, 0x00022020, 0x00001192, 0x00000101, 0x00000a0b }, 1612 { 9, 0x00022020, 0x00001196, 0x00000101, 0x00000a0b }, 1613 { 10, 0x00022020, 0x0000119a, 0x00000101, 0x00000a0b }, 1614 { 11, 0x00022020, 0x0000119e, 0x00000101, 0x00000a0b }, 1615 { 12, 0x00022020, 0x000011a2, 0x00000101, 0x00000a0b }, 1616 { 13, 0x00022020, 0x000011a6, 0x00000101, 0x00000a0b }, 1617 { 14, 0x00022020, 0x000011ae, 0x00000101, 0x00000a1b }, 1618 1619 /* 802.11 UNI / HyperLan 2 */ 1620 { 36, 0x00022010, 0x00018896, 0x00000101, 0x00000a1f }, 1621 { 40, 0x00022010, 0x0001889a, 0x00000101, 0x00000a1f }, 1622 { 44, 0x00022010, 0x0001889e, 0x00000101, 0x00000a1f }, 1623 { 48, 0x00022010, 0x000188a2, 0x00000101, 0x00000a1f }, 1624 { 52, 0x00022010, 0x000188a6, 0x00000101, 0x00000a1f }, 1625 { 66, 0x00022010, 0x000188aa, 0x00000101, 0x00000a1f }, 1626 { 60, 0x00022010, 0x000188ae, 0x00000101, 0x00000a1f }, 1627 { 64, 0x00022010, 0x000188b2, 0x00000101, 0x00000a1f }, 1628 1629 /* 802.11 HyperLan 2 */ 1630 { 100, 0x00022010, 0x00008802, 0x00000101, 0x00000a0f }, 1631 { 104, 0x00022010, 0x00008806, 0x00000101, 0x00000a0f }, 1632 { 108, 0x00022010, 0x0000880a, 0x00000101, 0x00000a0f }, 1633 { 112, 0x00022010, 0x0000880e, 0x00000101, 0x00000a0f }, 1634 { 116, 0x00022010, 0x00008812, 0x00000101, 0x00000a0f }, 1635 { 120, 0x00022010, 0x00008816, 0x00000101, 0x00000a0f }, 1636 { 124, 0x00022010, 0x0000881a, 0x00000101, 0x00000a0f }, 1637 { 128, 0x00022010, 0x0000881e, 0x00000101, 0x00000a0f }, 1638 { 132, 0x00022010, 0x00008822, 0x00000101, 0x00000a0f }, 1639 { 136, 0x00022010, 0x00008826, 0x00000101, 0x00000a0f }, 1640 1641 /* 802.11 UNII */ 1642 { 140, 0x00022010, 0x0000882a, 0x00000101, 0x00000a0f }, 1643 { 149, 0x00022020, 0x000090a6, 0x00000101, 0x00000a07 }, 1644 { 153, 0x00022020, 0x000090ae, 0x00000101, 0x00000a07 }, 1645 { 157, 0x00022020, 0x000090b6, 0x00000101, 0x00000a07 }, 1646 { 161, 0x00022020, 0x000090be, 0x00000101, 0x00000a07 }, 1647}; 1648 1649static int rt2500usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev) 1650{ 1651 struct hw_mode_spec *spec = &rt2x00dev->spec; 1652 struct channel_info *info; 1653 char *tx_power; 1654 unsigned int i; 1655 1656 /* 1657 * Initialize all hw fields. 1658 */ 1659 rt2x00dev->hw->flags = 1660 IEEE80211_HW_RX_INCLUDES_FCS | 1661 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING | 1662 IEEE80211_HW_SIGNAL_DBM | 1663 IEEE80211_HW_SUPPORTS_PS | 1664 IEEE80211_HW_PS_NULLFUNC_STACK; 1665 1666 SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev); 1667 SET_IEEE80211_PERM_ADDR(rt2x00dev->hw, 1668 rt2x00_eeprom_addr(rt2x00dev, 1669 EEPROM_MAC_ADDR_0)); 1670 1671 /* 1672 * Initialize hw_mode information. 1673 */ 1674 spec->supported_bands = SUPPORT_BAND_2GHZ; 1675 spec->supported_rates = SUPPORT_RATE_CCK | SUPPORT_RATE_OFDM; 1676 1677 if (rt2x00_rf(rt2x00dev, RF2522)) { 1678 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2522); 1679 spec->channels = rf_vals_bg_2522; 1680 } else if (rt2x00_rf(rt2x00dev, RF2523)) { 1681 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2523); 1682 spec->channels = rf_vals_bg_2523; 1683 } else if (rt2x00_rf(rt2x00dev, RF2524)) { 1684 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2524); 1685 spec->channels = rf_vals_bg_2524; 1686 } else if (rt2x00_rf(rt2x00dev, RF2525)) { 1687 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525); 1688 spec->channels = rf_vals_bg_2525; 1689 } else if (rt2x00_rf(rt2x00dev, RF2525E)) { 1690 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525e); 1691 spec->channels = rf_vals_bg_2525e; 1692 } else if (rt2x00_rf(rt2x00dev, RF5222)) { 1693 spec->supported_bands |= SUPPORT_BAND_5GHZ; 1694 spec->num_channels = ARRAY_SIZE(rf_vals_5222); 1695 spec->channels = rf_vals_5222; 1696 } 1697 1698 /* 1699 * Create channel information array 1700 */ 1701 info = kzalloc(spec->num_channels * sizeof(*info), GFP_KERNEL); 1702 if (!info) 1703 return -ENOMEM; 1704 1705 spec->channels_info = info; 1706 1707 tx_power = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_START); 1708 for (i = 0; i < 14; i++) { 1709 info[i].max_power = MAX_TXPOWER; 1710 info[i].default_power1 = TXPOWER_FROM_DEV(tx_power[i]); 1711 } 1712 1713 if (spec->num_channels > 14) { 1714 for (i = 14; i < spec->num_channels; i++) { 1715 info[i].max_power = MAX_TXPOWER; 1716 info[i].default_power1 = DEFAULT_TXPOWER; 1717 } 1718 } 1719 1720 return 0; 1721} 1722 1723static int rt2500usb_probe_hw(struct rt2x00_dev *rt2x00dev) 1724{ 1725 int retval; 1726 1727 /* 1728 * Allocate eeprom data. 1729 */ 1730 retval = rt2500usb_validate_eeprom(rt2x00dev); 1731 if (retval) 1732 return retval; 1733 1734 retval = rt2500usb_init_eeprom(rt2x00dev); 1735 if (retval) 1736 return retval; 1737 1738 /* 1739 * Initialize hw specifications. 1740 */ 1741 retval = rt2500usb_probe_hw_mode(rt2x00dev); 1742 if (retval) 1743 return retval; 1744 1745 /* 1746 * This device requires the atim queue 1747 */ 1748 __set_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags); 1749 __set_bit(DRIVER_REQUIRE_BEACON_GUARD, &rt2x00dev->flags); 1750 if (!modparam_nohwcrypt) { 1751 __set_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags); 1752 __set_bit(DRIVER_REQUIRE_COPY_IV, &rt2x00dev->flags); 1753 } 1754 __set_bit(DRIVER_SUPPORT_WATCHDOG, &rt2x00dev->flags); 1755 1756 /* 1757 * Set the rssi offset. 1758 */ 1759 rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET; 1760 1761 return 0; 1762} 1763 1764static const struct ieee80211_ops rt2500usb_mac80211_ops = { 1765 .tx = rt2x00mac_tx, 1766 .start = rt2x00mac_start, 1767 .stop = rt2x00mac_stop, 1768 .add_interface = rt2x00mac_add_interface, 1769 .remove_interface = rt2x00mac_remove_interface, 1770 .config = rt2x00mac_config, 1771 .configure_filter = rt2x00mac_configure_filter, 1772 .set_tim = rt2x00mac_set_tim, 1773 .set_key = rt2x00mac_set_key, 1774 .sw_scan_start = rt2x00mac_sw_scan_start, 1775 .sw_scan_complete = rt2x00mac_sw_scan_complete, 1776 .get_stats = rt2x00mac_get_stats, 1777 .bss_info_changed = rt2x00mac_bss_info_changed, 1778 .conf_tx = rt2x00mac_conf_tx, 1779 .rfkill_poll = rt2x00mac_rfkill_poll, 1780}; 1781 1782static const struct rt2x00lib_ops rt2500usb_rt2x00_ops = { 1783 .probe_hw = rt2500usb_probe_hw, 1784 .initialize = rt2x00usb_initialize, 1785 .uninitialize = rt2x00usb_uninitialize, 1786 .clear_entry = rt2x00usb_clear_entry, 1787 .set_device_state = rt2500usb_set_device_state, 1788 .rfkill_poll = rt2500usb_rfkill_poll, 1789 .link_stats = rt2500usb_link_stats, 1790 .reset_tuner = rt2500usb_reset_tuner, 1791 .watchdog = rt2x00usb_watchdog, 1792 .write_tx_desc = rt2500usb_write_tx_desc, 1793 .write_beacon = rt2500usb_write_beacon, 1794 .get_tx_data_len = rt2500usb_get_tx_data_len, 1795 .kick_tx_queue = rt2x00usb_kick_tx_queue, 1796 .kill_tx_queue = rt2x00usb_kill_tx_queue, 1797 .fill_rxdone = rt2500usb_fill_rxdone, 1798 .config_shared_key = rt2500usb_config_key, 1799 .config_pairwise_key = rt2500usb_config_key, 1800 .config_filter = rt2500usb_config_filter, 1801 .config_intf = rt2500usb_config_intf, 1802 .config_erp = rt2500usb_config_erp, 1803 .config_ant = rt2500usb_config_ant, 1804 .config = rt2500usb_config, 1805}; 1806 1807static const struct data_queue_desc rt2500usb_queue_rx = { 1808 .entry_num = RX_ENTRIES, 1809 .data_size = DATA_FRAME_SIZE, 1810 .desc_size = RXD_DESC_SIZE, 1811 .priv_size = sizeof(struct queue_entry_priv_usb), 1812}; 1813 1814static const struct data_queue_desc rt2500usb_queue_tx = { 1815 .entry_num = TX_ENTRIES, 1816 .data_size = DATA_FRAME_SIZE, 1817 .desc_size = TXD_DESC_SIZE, 1818 .priv_size = sizeof(struct queue_entry_priv_usb), 1819}; 1820 1821static const struct data_queue_desc rt2500usb_queue_bcn = { 1822 .entry_num = BEACON_ENTRIES, 1823 .data_size = MGMT_FRAME_SIZE, 1824 .desc_size = TXD_DESC_SIZE, 1825 .priv_size = sizeof(struct queue_entry_priv_usb_bcn), 1826}; 1827 1828static const struct data_queue_desc rt2500usb_queue_atim = { 1829 .entry_num = ATIM_ENTRIES, 1830 .data_size = DATA_FRAME_SIZE, 1831 .desc_size = TXD_DESC_SIZE, 1832 .priv_size = sizeof(struct queue_entry_priv_usb), 1833}; 1834 1835static const struct rt2x00_ops rt2500usb_ops = { 1836 .name = KBUILD_MODNAME, 1837 .max_sta_intf = 1, 1838 .max_ap_intf = 1, 1839 .eeprom_size = EEPROM_SIZE, 1840 .rf_size = RF_SIZE, 1841 .tx_queues = NUM_TX_QUEUES, 1842 .extra_tx_headroom = TXD_DESC_SIZE, 1843 .rx = &rt2500usb_queue_rx, 1844 .tx = &rt2500usb_queue_tx, 1845 .bcn = &rt2500usb_queue_bcn, 1846 .atim = &rt2500usb_queue_atim, 1847 .lib = &rt2500usb_rt2x00_ops, 1848 .hw = &rt2500usb_mac80211_ops, 1849#ifdef CONFIG_RT2X00_LIB_DEBUGFS 1850 .debugfs = &rt2500usb_rt2x00debug, 1851#endif /* CONFIG_RT2X00_LIB_DEBUGFS */ 1852}; 1853 1854/* 1855 * rt2500usb module information. 1856 */ 1857static struct usb_device_id rt2500usb_device_table[] = { 1858 /* ASUS */ 1859 { USB_DEVICE(0x0b05, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) }, 1860 { USB_DEVICE(0x0b05, 0x1707), USB_DEVICE_DATA(&rt2500usb_ops) }, 1861 /* Belkin */ 1862 { USB_DEVICE(0x050d, 0x7050), USB_DEVICE_DATA(&rt2500usb_ops) }, 1863 { USB_DEVICE(0x050d, 0x7051), USB_DEVICE_DATA(&rt2500usb_ops) }, 1864 { USB_DEVICE(0x050d, 0x705a), USB_DEVICE_DATA(&rt2500usb_ops) }, 1865 /* Cisco Systems */ 1866 { USB_DEVICE(0x13b1, 0x000d), USB_DEVICE_DATA(&rt2500usb_ops) }, 1867 { USB_DEVICE(0x13b1, 0x0011), USB_DEVICE_DATA(&rt2500usb_ops) }, 1868 { USB_DEVICE(0x13b1, 0x001a), USB_DEVICE_DATA(&rt2500usb_ops) }, 1869 /* CNet */ 1870 { USB_DEVICE(0x1371, 0x9022), USB_DEVICE_DATA(&rt2500usb_ops) }, 1871 /* Conceptronic */ 1872 { USB_DEVICE(0x14b2, 0x3c02), USB_DEVICE_DATA(&rt2500usb_ops) }, 1873 /* D-LINK */ 1874 { USB_DEVICE(0x2001, 0x3c00), USB_DEVICE_DATA(&rt2500usb_ops) }, 1875 /* Gigabyte */ 1876 { USB_DEVICE(0x1044, 0x8001), USB_DEVICE_DATA(&rt2500usb_ops) }, 1877 { USB_DEVICE(0x1044, 0x8007), USB_DEVICE_DATA(&rt2500usb_ops) }, 1878 /* Hercules */ 1879 { USB_DEVICE(0x06f8, 0xe000), USB_DEVICE_DATA(&rt2500usb_ops) }, 1880 /* Melco */ 1881 { USB_DEVICE(0x0411, 0x005e), USB_DEVICE_DATA(&rt2500usb_ops) }, 1882 { USB_DEVICE(0x0411, 0x0066), USB_DEVICE_DATA(&rt2500usb_ops) }, 1883 { USB_DEVICE(0x0411, 0x0067), USB_DEVICE_DATA(&rt2500usb_ops) }, 1884 { USB_DEVICE(0x0411, 0x008b), USB_DEVICE_DATA(&rt2500usb_ops) }, 1885 { USB_DEVICE(0x0411, 0x0097), USB_DEVICE_DATA(&rt2500usb_ops) }, 1886 /* MSI */ 1887 { USB_DEVICE(0x0db0, 0x6861), USB_DEVICE_DATA(&rt2500usb_ops) }, 1888 { USB_DEVICE(0x0db0, 0x6865), USB_DEVICE_DATA(&rt2500usb_ops) }, 1889 { USB_DEVICE(0x0db0, 0x6869), USB_DEVICE_DATA(&rt2500usb_ops) }, 1890 /* Ralink */ 1891 { USB_DEVICE(0x148f, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) }, 1892 { USB_DEVICE(0x148f, 0x2570), USB_DEVICE_DATA(&rt2500usb_ops) }, 1893 { USB_DEVICE(0x148f, 0x2573), USB_DEVICE_DATA(&rt2500usb_ops) }, 1894 { USB_DEVICE(0x148f, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) }, 1895 /* Sagem */ 1896 { USB_DEVICE(0x079b, 0x004b), USB_DEVICE_DATA(&rt2500usb_ops) }, 1897 /* Siemens */ 1898 { USB_DEVICE(0x0681, 0x3c06), USB_DEVICE_DATA(&rt2500usb_ops) }, 1899 /* SMC */ 1900 { USB_DEVICE(0x0707, 0xee13), USB_DEVICE_DATA(&rt2500usb_ops) }, 1901 /* Spairon */ 1902 { USB_DEVICE(0x114b, 0x0110), USB_DEVICE_DATA(&rt2500usb_ops) }, 1903 /* SURECOM */ 1904 { USB_DEVICE(0x0769, 0x11f3), USB_DEVICE_DATA(&rt2500usb_ops) }, 1905 /* Trust */ 1906 { USB_DEVICE(0x0eb0, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) }, 1907 /* VTech */ 1908 { USB_DEVICE(0x0f88, 0x3012), USB_DEVICE_DATA(&rt2500usb_ops) }, 1909 /* Zinwell */ 1910 { USB_DEVICE(0x5a57, 0x0260), USB_DEVICE_DATA(&rt2500usb_ops) }, 1911 { 0, } 1912}; 1913 1914MODULE_AUTHOR(DRV_PROJECT); 1915MODULE_VERSION(DRV_VERSION); 1916MODULE_DESCRIPTION("Ralink RT2500 USB Wireless LAN driver."); 1917MODULE_SUPPORTED_DEVICE("Ralink RT2570 USB chipset based cards"); 1918MODULE_DEVICE_TABLE(usb, rt2500usb_device_table); 1919MODULE_LICENSE("GPL"); 1920 1921static struct usb_driver rt2500usb_driver = { 1922 .name = KBUILD_MODNAME, 1923 .id_table = rt2500usb_device_table, 1924 .probe = rt2x00usb_probe, 1925 .disconnect = rt2x00usb_disconnect, 1926 .suspend = rt2x00usb_suspend, 1927 .resume = rt2x00usb_resume, 1928}; 1929 1930static int __init rt2500usb_init(void) 1931{ 1932 return usb_register(&rt2500usb_driver); 1933} 1934 1935static void __exit rt2500usb_exit(void) 1936{ 1937 usb_deregister(&rt2500usb_driver); 1938} 1939 1940module_init(rt2500usb_init); 1941module_exit(rt2500usb_exit); 1942