1/* 2 * Sealevel Systems 4021 driver. 3 * 4 * This program is free software; you can redistribute it and/or 5 * modify it under the terms of the GNU General Public License 6 * as published by the Free Software Foundation; either version 7 * 2 of the License, or (at your option) any later version. 8 * 9 * (c) Copyright 1999, 2001 Alan Cox 10 * (c) Copyright 2001 Red Hat Inc. 11 * Generic HDLC port Copyright (C) 2008 Krzysztof Halasa <khc@pm.waw.pl> 12 * 13 */ 14 15#include <linux/module.h> 16#include <linux/kernel.h> 17#include <linux/mm.h> 18#include <linux/net.h> 19#include <linux/skbuff.h> 20#include <linux/netdevice.h> 21#include <linux/if_arp.h> 22#include <linux/delay.h> 23#include <linux/hdlc.h> 24#include <linux/ioport.h> 25#include <linux/init.h> 26#include <linux/slab.h> 27#include <net/arp.h> 28 29#include <asm/irq.h> 30#include <asm/io.h> 31#include <asm/dma.h> 32#include <asm/byteorder.h> 33#include "z85230.h" 34 35 36struct slvl_device 37{ 38 struct z8530_channel *chan; 39 int channel; 40}; 41 42 43struct slvl_board 44{ 45 struct slvl_device dev[2]; 46 struct z8530_dev board; 47 int iobase; 48}; 49 50/* 51 * Network driver support routines 52 */ 53 54static inline struct slvl_device* dev_to_chan(struct net_device *dev) 55{ 56 return (struct slvl_device *)dev_to_hdlc(dev)->priv; 57} 58 59/* 60 * Frame receive. Simple for our card as we do HDLC and there 61 * is no funny garbage involved 62 */ 63 64static void sealevel_input(struct z8530_channel *c, struct sk_buff *skb) 65{ 66 /* Drop the CRC - it's not a good idea to try and negotiate it ;) */ 67 skb_trim(skb, skb->len - 2); 68 skb->protocol = hdlc_type_trans(skb, c->netdevice); 69 skb_reset_mac_header(skb); 70 skb->dev = c->netdevice; 71 netif_rx(skb); 72} 73 74/* 75 * We've been placed in the UP state 76 */ 77 78static int sealevel_open(struct net_device *d) 79{ 80 struct slvl_device *slvl = dev_to_chan(d); 81 int err = -1; 82 int unit = slvl->channel; 83 84 /* 85 * Link layer up. 86 */ 87 88 switch (unit) { 89 case 0: 90 err = z8530_sync_dma_open(d, slvl->chan); 91 break; 92 case 1: 93 err = z8530_sync_open(d, slvl->chan); 94 break; 95 } 96 97 if (err) 98 return err; 99 100 err = hdlc_open(d); 101 if (err) { 102 switch (unit) { 103 case 0: 104 z8530_sync_dma_close(d, slvl->chan); 105 break; 106 case 1: 107 z8530_sync_close(d, slvl->chan); 108 break; 109 } 110 return err; 111 } 112 113 slvl->chan->rx_function = sealevel_input; 114 115 /* 116 * Go go go 117 */ 118 netif_start_queue(d); 119 return 0; 120} 121 122static int sealevel_close(struct net_device *d) 123{ 124 struct slvl_device *slvl = dev_to_chan(d); 125 int unit = slvl->channel; 126 127 /* 128 * Discard new frames 129 */ 130 131 slvl->chan->rx_function = z8530_null_rx; 132 133 hdlc_close(d); 134 netif_stop_queue(d); 135 136 switch (unit) { 137 case 0: 138 z8530_sync_dma_close(d, slvl->chan); 139 break; 140 case 1: 141 z8530_sync_close(d, slvl->chan); 142 break; 143 } 144 return 0; 145} 146 147static int sealevel_ioctl(struct net_device *d, struct ifreq *ifr, int cmd) 148{ 149 /* struct slvl_device *slvl=dev_to_chan(d); 150 z8530_ioctl(d,&slvl->sync.chanA,ifr,cmd) */ 151 return hdlc_ioctl(d, ifr, cmd); 152} 153 154/* 155 * Passed network frames, fire them downwind. 156 */ 157 158static netdev_tx_t sealevel_queue_xmit(struct sk_buff *skb, 159 struct net_device *d) 160{ 161 return z8530_queue_xmit(dev_to_chan(d)->chan, skb); 162} 163 164static int sealevel_attach(struct net_device *dev, unsigned short encoding, 165 unsigned short parity) 166{ 167 if (encoding == ENCODING_NRZ && parity == PARITY_CRC16_PR1_CCITT) 168 return 0; 169 return -EINVAL; 170} 171 172static const struct net_device_ops sealevel_ops = { 173 .ndo_open = sealevel_open, 174 .ndo_stop = sealevel_close, 175 .ndo_change_mtu = hdlc_change_mtu, 176 .ndo_start_xmit = hdlc_start_xmit, 177 .ndo_do_ioctl = sealevel_ioctl, 178}; 179 180static int slvl_setup(struct slvl_device *sv, int iobase, int irq) 181{ 182 struct net_device *dev = alloc_hdlcdev(sv); 183 if (!dev) 184 return -1; 185 186 dev_to_hdlc(dev)->attach = sealevel_attach; 187 dev_to_hdlc(dev)->xmit = sealevel_queue_xmit; 188 dev->netdev_ops = &sealevel_ops; 189 dev->base_addr = iobase; 190 dev->irq = irq; 191 192 if (register_hdlc_device(dev)) { 193 printk(KERN_ERR "sealevel: unable to register HDLC device\n"); 194 free_netdev(dev); 195 return -1; 196 } 197 198 sv->chan->netdevice = dev; 199 return 0; 200} 201 202 203/* 204 * Allocate and setup Sealevel board. 205 */ 206 207static __init struct slvl_board *slvl_init(int iobase, int irq, 208 int txdma, int rxdma, int slow) 209{ 210 struct z8530_dev *dev; 211 struct slvl_board *b; 212 213 /* 214 * Get the needed I/O space 215 */ 216 217 if (!request_region(iobase, 8, "Sealevel 4021")) { 218 printk(KERN_WARNING "sealevel: I/O 0x%X already in use.\n", 219 iobase); 220 return NULL; 221 } 222 223 b = kzalloc(sizeof(struct slvl_board), GFP_KERNEL); 224 if (!b) 225 goto err_kzalloc; 226 227 b->dev[0].chan = &b->board.chanA; 228 b->dev[0].channel = 0; 229 230 b->dev[1].chan = &b->board.chanB; 231 b->dev[1].channel = 1; 232 233 dev = &b->board; 234 235 /* 236 * Stuff in the I/O addressing 237 */ 238 239 dev->active = 0; 240 241 b->iobase = iobase; 242 243 /* 244 * Select 8530 delays for the old board 245 */ 246 247 if (slow) 248 iobase |= Z8530_PORT_SLEEP; 249 250 dev->chanA.ctrlio = iobase + 1; 251 dev->chanA.dataio = iobase; 252 dev->chanB.ctrlio = iobase + 3; 253 dev->chanB.dataio = iobase + 2; 254 255 dev->chanA.irqs = &z8530_nop; 256 dev->chanB.irqs = &z8530_nop; 257 258 /* 259 * Assert DTR enable DMA 260 */ 261 262 outb(3 | (1 << 7), b->iobase + 4); 263 264 265 /* We want a fast IRQ for this device. Actually we'd like an even faster 266 IRQ ;) - This is one driver RtLinux is made for */ 267 268 if (request_irq(irq, z8530_interrupt, IRQF_DISABLED, 269 "SeaLevel", dev) < 0) { 270 printk(KERN_WARNING "sealevel: IRQ %d already in use.\n", irq); 271 goto err_request_irq; 272 } 273 274 dev->irq = irq; 275 dev->chanA.private = &b->dev[0]; 276 dev->chanB.private = &b->dev[1]; 277 dev->chanA.dev = dev; 278 dev->chanB.dev = dev; 279 280 dev->chanA.txdma = 3; 281 dev->chanA.rxdma = 1; 282 if (request_dma(dev->chanA.txdma, "SeaLevel (TX)")) 283 goto err_dma_tx; 284 285 if (request_dma(dev->chanA.rxdma, "SeaLevel (RX)")) 286 goto err_dma_rx; 287 288 disable_irq(irq); 289 290 /* 291 * Begin normal initialise 292 */ 293 294 if (z8530_init(dev) != 0) { 295 printk(KERN_ERR "Z8530 series device not found.\n"); 296 enable_irq(irq); 297 goto free_hw; 298 } 299 if (dev->type == Z85C30) { 300 z8530_channel_load(&dev->chanA, z8530_hdlc_kilostream); 301 z8530_channel_load(&dev->chanB, z8530_hdlc_kilostream); 302 } else { 303 z8530_channel_load(&dev->chanA, z8530_hdlc_kilostream_85230); 304 z8530_channel_load(&dev->chanB, z8530_hdlc_kilostream_85230); 305 } 306 307 /* 308 * Now we can take the IRQ 309 */ 310 311 enable_irq(irq); 312 313 if (slvl_setup(&b->dev[0], iobase, irq)) 314 goto free_hw; 315 if (slvl_setup(&b->dev[1], iobase, irq)) 316 goto free_netdev0; 317 318 z8530_describe(dev, "I/O", iobase); 319 dev->active = 1; 320 return b; 321 322free_netdev0: 323 unregister_hdlc_device(b->dev[0].chan->netdevice); 324 free_netdev(b->dev[0].chan->netdevice); 325free_hw: 326 free_dma(dev->chanA.rxdma); 327err_dma_rx: 328 free_dma(dev->chanA.txdma); 329err_dma_tx: 330 free_irq(irq, dev); 331err_request_irq: 332 kfree(b); 333err_kzalloc: 334 release_region(iobase, 8); 335 return NULL; 336} 337 338static void __exit slvl_shutdown(struct slvl_board *b) 339{ 340 int u; 341 342 z8530_shutdown(&b->board); 343 344 for (u = 0; u < 2; u++) { 345 struct net_device *d = b->dev[u].chan->netdevice; 346 unregister_hdlc_device(d); 347 free_netdev(d); 348 } 349 350 free_irq(b->board.irq, &b->board); 351 free_dma(b->board.chanA.rxdma); 352 free_dma(b->board.chanA.txdma); 353 /* DMA off on the card, drop DTR */ 354 outb(0, b->iobase); 355 release_region(b->iobase, 8); 356 kfree(b); 357} 358 359 360static int io=0x238; 361static int txdma=1; 362static int rxdma=3; 363static int irq=5; 364static int slow=0; 365 366module_param(io, int, 0); 367MODULE_PARM_DESC(io, "The I/O base of the Sealevel card"); 368module_param(txdma, int, 0); 369MODULE_PARM_DESC(txdma, "Transmit DMA channel"); 370module_param(rxdma, int, 0); 371MODULE_PARM_DESC(rxdma, "Receive DMA channel"); 372module_param(irq, int, 0); 373MODULE_PARM_DESC(irq, "The interrupt line setting for the SeaLevel card"); 374module_param(slow, bool, 0); 375MODULE_PARM_DESC(slow, "Set this for an older Sealevel card such as the 4012"); 376 377MODULE_AUTHOR("Alan Cox"); 378MODULE_LICENSE("GPL"); 379MODULE_DESCRIPTION("Modular driver for the SeaLevel 4021"); 380 381static struct slvl_board *slvl_unit; 382 383static int __init slvl_init_module(void) 384{ 385 slvl_unit = slvl_init(io, irq, txdma, rxdma, slow); 386 387 return slvl_unit ? 0 : -ENODEV; 388} 389 390static void __exit slvl_cleanup_module(void) 391{ 392 if (slvl_unit) 393 slvl_shutdown(slvl_unit); 394} 395 396module_init(slvl_init_module); 397module_exit(slvl_cleanup_module); 398