1 /*************************************************************************** 2 * 3 * Copyright (C) 2007-2010 SMSC 4 * 5 * This program is free software; you can redistribute it and/or 6 * modify it under the terms of the GNU General Public License 7 * as published by the Free Software Foundation; either version 2 8 * of the License, or (at your option) any later version. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License 16 * along with this program; if not, write to the Free Software 17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 18 * 19 *****************************************************************************/ 20 21#include <linux/module.h> 22#include <linux/kmod.h> 23#include <linux/init.h> 24#include <linux/netdevice.h> 25#include <linux/etherdevice.h> 26#include <linux/ethtool.h> 27#include <linux/mii.h> 28#include <linux/usb.h> 29#include <linux/crc32.h> 30#include <linux/usb/usbnet.h> 31#include <linux/slab.h> 32#include "smsc75xx.h" 33 34#define SMSC_CHIPNAME "smsc75xx" 35#define SMSC_DRIVER_VERSION "1.0.0" 36#define HS_USB_PKT_SIZE (512) 37#define FS_USB_PKT_SIZE (64) 38#define DEFAULT_HS_BURST_CAP_SIZE (16 * 1024 + 5 * HS_USB_PKT_SIZE) 39#define DEFAULT_FS_BURST_CAP_SIZE (6 * 1024 + 33 * FS_USB_PKT_SIZE) 40#define DEFAULT_BULK_IN_DELAY (0x00002000) 41#define MAX_SINGLE_PACKET_SIZE (9000) 42#define LAN75XX_EEPROM_MAGIC (0x7500) 43#define EEPROM_MAC_OFFSET (0x01) 44#define DEFAULT_TX_CSUM_ENABLE (true) 45#define DEFAULT_RX_CSUM_ENABLE (true) 46#define DEFAULT_TSO_ENABLE (true) 47#define SMSC75XX_INTERNAL_PHY_ID (1) 48#define SMSC75XX_TX_OVERHEAD (8) 49#define MAX_RX_FIFO_SIZE (20 * 1024) 50#define MAX_TX_FIFO_SIZE (12 * 1024) 51#define USB_VENDOR_ID_SMSC (0x0424) 52#define USB_PRODUCT_ID_LAN7500 (0x7500) 53#define USB_PRODUCT_ID_LAN7505 (0x7505) 54 55#define check_warn(ret, fmt, args...) \ 56 ({ if (ret < 0) netdev_warn(dev->net, fmt, ##args); }) 57 58#define check_warn_return(ret, fmt, args...) \ 59 ({ if (ret < 0) { netdev_warn(dev->net, fmt, ##args); return ret; } }) 60 61#define check_warn_goto_done(ret, fmt, args...) \ 62 ({ if (ret < 0) { netdev_warn(dev->net, fmt, ##args); goto done; } }) 63 64struct smsc75xx_priv { 65 struct usbnet *dev; 66 u32 rfe_ctl; 67 u32 multicast_hash_table[DP_SEL_VHF_HASH_LEN]; 68 bool use_rx_csum; 69 struct mutex dataport_mutex; 70 spinlock_t rfe_ctl_lock; 71 struct work_struct set_multicast; 72}; 73 74struct usb_context { 75 struct usb_ctrlrequest req; 76 struct usbnet *dev; 77}; 78 79static int turbo_mode = true; 80module_param(turbo_mode, bool, 0644); 81MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction"); 82 83static int __must_check smsc75xx_read_reg(struct usbnet *dev, u32 index, 84 u32 *data) 85{ 86 u32 *buf = kmalloc(4, GFP_KERNEL); 87 int ret; 88 89 BUG_ON(!dev); 90 91 if (!buf) 92 return -ENOMEM; 93 94 ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0), 95 USB_VENDOR_REQUEST_READ_REGISTER, 96 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 97 00, index, buf, 4, USB_CTRL_GET_TIMEOUT); 98 99 if (unlikely(ret < 0)) 100 netdev_warn(dev->net, 101 "Failed to read register index 0x%08x", index); 102 103 le32_to_cpus(buf); 104 *data = *buf; 105 kfree(buf); 106 107 return ret; 108} 109 110static int __must_check smsc75xx_write_reg(struct usbnet *dev, u32 index, 111 u32 data) 112{ 113 u32 *buf = kmalloc(4, GFP_KERNEL); 114 int ret; 115 116 BUG_ON(!dev); 117 118 if (!buf) 119 return -ENOMEM; 120 121 *buf = data; 122 cpu_to_le32s(buf); 123 124 ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0), 125 USB_VENDOR_REQUEST_WRITE_REGISTER, 126 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 127 00, index, buf, 4, USB_CTRL_SET_TIMEOUT); 128 129 if (unlikely(ret < 0)) 130 netdev_warn(dev->net, 131 "Failed to write register index 0x%08x", index); 132 133 kfree(buf); 134 135 return ret; 136} 137 138/* Loop until the read is completed with timeout 139 * called with phy_mutex held */ 140static int smsc75xx_phy_wait_not_busy(struct usbnet *dev) 141{ 142 unsigned long start_time = jiffies; 143 u32 val; 144 int ret; 145 146 do { 147 ret = smsc75xx_read_reg(dev, MII_ACCESS, &val); 148 check_warn_return(ret, "Error reading MII_ACCESS"); 149 150 if (!(val & MII_ACCESS_BUSY)) 151 return 0; 152 } while (!time_after(jiffies, start_time + HZ)); 153 154 return -EIO; 155} 156 157static int smsc75xx_mdio_read(struct net_device *netdev, int phy_id, int idx) 158{ 159 struct usbnet *dev = netdev_priv(netdev); 160 u32 val, addr; 161 int ret; 162 163 mutex_lock(&dev->phy_mutex); 164 165 /* confirm MII not busy */ 166 ret = smsc75xx_phy_wait_not_busy(dev); 167 check_warn_goto_done(ret, "MII is busy in smsc75xx_mdio_read"); 168 169 /* set the address, index & direction (read from PHY) */ 170 phy_id &= dev->mii.phy_id_mask; 171 idx &= dev->mii.reg_num_mask; 172 addr = ((phy_id << MII_ACCESS_PHY_ADDR_SHIFT) & MII_ACCESS_PHY_ADDR) 173 | ((idx << MII_ACCESS_REG_ADDR_SHIFT) & MII_ACCESS_REG_ADDR) 174 | MII_ACCESS_READ; 175 ret = smsc75xx_write_reg(dev, MII_ACCESS, addr); 176 check_warn_goto_done(ret, "Error writing MII_ACCESS"); 177 178 ret = smsc75xx_phy_wait_not_busy(dev); 179 check_warn_goto_done(ret, "Timed out reading MII reg %02X", idx); 180 181 ret = smsc75xx_read_reg(dev, MII_DATA, &val); 182 check_warn_goto_done(ret, "Error reading MII_DATA"); 183 184 ret = (u16)(val & 0xFFFF); 185 186done: 187 mutex_unlock(&dev->phy_mutex); 188 return ret; 189} 190 191static void smsc75xx_mdio_write(struct net_device *netdev, int phy_id, int idx, 192 int regval) 193{ 194 struct usbnet *dev = netdev_priv(netdev); 195 u32 val, addr; 196 int ret; 197 198 mutex_lock(&dev->phy_mutex); 199 200 /* confirm MII not busy */ 201 ret = smsc75xx_phy_wait_not_busy(dev); 202 check_warn_goto_done(ret, "MII is busy in smsc75xx_mdio_write"); 203 204 val = regval; 205 ret = smsc75xx_write_reg(dev, MII_DATA, val); 206 check_warn_goto_done(ret, "Error writing MII_DATA"); 207 208 /* set the address, index & direction (write to PHY) */ 209 phy_id &= dev->mii.phy_id_mask; 210 idx &= dev->mii.reg_num_mask; 211 addr = ((phy_id << MII_ACCESS_PHY_ADDR_SHIFT) & MII_ACCESS_PHY_ADDR) 212 | ((idx << MII_ACCESS_REG_ADDR_SHIFT) & MII_ACCESS_REG_ADDR) 213 | MII_ACCESS_WRITE; 214 ret = smsc75xx_write_reg(dev, MII_ACCESS, addr); 215 check_warn_goto_done(ret, "Error writing MII_ACCESS"); 216 217 ret = smsc75xx_phy_wait_not_busy(dev); 218 check_warn_goto_done(ret, "Timed out writing MII reg %02X", idx); 219 220done: 221 mutex_unlock(&dev->phy_mutex); 222} 223 224static int smsc75xx_wait_eeprom(struct usbnet *dev) 225{ 226 unsigned long start_time = jiffies; 227 u32 val; 228 int ret; 229 230 do { 231 ret = smsc75xx_read_reg(dev, E2P_CMD, &val); 232 check_warn_return(ret, "Error reading E2P_CMD"); 233 234 if (!(val & E2P_CMD_BUSY) || (val & E2P_CMD_TIMEOUT)) 235 break; 236 udelay(40); 237 } while (!time_after(jiffies, start_time + HZ)); 238 239 if (val & (E2P_CMD_TIMEOUT | E2P_CMD_BUSY)) { 240 netdev_warn(dev->net, "EEPROM read operation timeout"); 241 return -EIO; 242 } 243 244 return 0; 245} 246 247static int smsc75xx_eeprom_confirm_not_busy(struct usbnet *dev) 248{ 249 unsigned long start_time = jiffies; 250 u32 val; 251 int ret; 252 253 do { 254 ret = smsc75xx_read_reg(dev, E2P_CMD, &val); 255 check_warn_return(ret, "Error reading E2P_CMD"); 256 257 if (!(val & E2P_CMD_BUSY)) 258 return 0; 259 260 udelay(40); 261 } while (!time_after(jiffies, start_time + HZ)); 262 263 netdev_warn(dev->net, "EEPROM is busy"); 264 return -EIO; 265} 266 267static int smsc75xx_read_eeprom(struct usbnet *dev, u32 offset, u32 length, 268 u8 *data) 269{ 270 u32 val; 271 int i, ret; 272 273 BUG_ON(!dev); 274 BUG_ON(!data); 275 276 ret = smsc75xx_eeprom_confirm_not_busy(dev); 277 if (ret) 278 return ret; 279 280 for (i = 0; i < length; i++) { 281 val = E2P_CMD_BUSY | E2P_CMD_READ | (offset & E2P_CMD_ADDR); 282 ret = smsc75xx_write_reg(dev, E2P_CMD, val); 283 check_warn_return(ret, "Error writing E2P_CMD"); 284 285 ret = smsc75xx_wait_eeprom(dev); 286 if (ret < 0) 287 return ret; 288 289 ret = smsc75xx_read_reg(dev, E2P_DATA, &val); 290 check_warn_return(ret, "Error reading E2P_DATA"); 291 292 data[i] = val & 0xFF; 293 offset++; 294 } 295 296 return 0; 297} 298 299static int smsc75xx_write_eeprom(struct usbnet *dev, u32 offset, u32 length, 300 u8 *data) 301{ 302 u32 val; 303 int i, ret; 304 305 BUG_ON(!dev); 306 BUG_ON(!data); 307 308 ret = smsc75xx_eeprom_confirm_not_busy(dev); 309 if (ret) 310 return ret; 311 312 /* Issue write/erase enable command */ 313 val = E2P_CMD_BUSY | E2P_CMD_EWEN; 314 ret = smsc75xx_write_reg(dev, E2P_CMD, val); 315 check_warn_return(ret, "Error writing E2P_CMD"); 316 317 ret = smsc75xx_wait_eeprom(dev); 318 if (ret < 0) 319 return ret; 320 321 for (i = 0; i < length; i++) { 322 323 /* Fill data register */ 324 val = data[i]; 325 ret = smsc75xx_write_reg(dev, E2P_DATA, val); 326 check_warn_return(ret, "Error writing E2P_DATA"); 327 328 /* Send "write" command */ 329 val = E2P_CMD_BUSY | E2P_CMD_WRITE | (offset & E2P_CMD_ADDR); 330 ret = smsc75xx_write_reg(dev, E2P_CMD, val); 331 check_warn_return(ret, "Error writing E2P_CMD"); 332 333 ret = smsc75xx_wait_eeprom(dev); 334 if (ret < 0) 335 return ret; 336 337 offset++; 338 } 339 340 return 0; 341} 342 343static int smsc75xx_dataport_wait_not_busy(struct usbnet *dev) 344{ 345 int i, ret; 346 347 for (i = 0; i < 100; i++) { 348 u32 dp_sel; 349 ret = smsc75xx_read_reg(dev, DP_SEL, &dp_sel); 350 check_warn_return(ret, "Error reading DP_SEL"); 351 352 if (dp_sel & DP_SEL_DPRDY) 353 return 0; 354 355 udelay(40); 356 } 357 358 netdev_warn(dev->net, "smsc75xx_dataport_wait_not_busy timed out"); 359 360 return -EIO; 361} 362 363static int smsc75xx_dataport_write(struct usbnet *dev, u32 ram_select, u32 addr, 364 u32 length, u32 *buf) 365{ 366 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); 367 u32 dp_sel; 368 int i, ret; 369 370 mutex_lock(&pdata->dataport_mutex); 371 372 ret = smsc75xx_dataport_wait_not_busy(dev); 373 check_warn_goto_done(ret, "smsc75xx_dataport_write busy on entry"); 374 375 ret = smsc75xx_read_reg(dev, DP_SEL, &dp_sel); 376 check_warn_goto_done(ret, "Error reading DP_SEL"); 377 378 dp_sel &= ~DP_SEL_RSEL; 379 dp_sel |= ram_select; 380 ret = smsc75xx_write_reg(dev, DP_SEL, dp_sel); 381 check_warn_goto_done(ret, "Error writing DP_SEL"); 382 383 for (i = 0; i < length; i++) { 384 ret = smsc75xx_write_reg(dev, DP_ADDR, addr + i); 385 check_warn_goto_done(ret, "Error writing DP_ADDR"); 386 387 ret = smsc75xx_write_reg(dev, DP_DATA, buf[i]); 388 check_warn_goto_done(ret, "Error writing DP_DATA"); 389 390 ret = smsc75xx_write_reg(dev, DP_CMD, DP_CMD_WRITE); 391 check_warn_goto_done(ret, "Error writing DP_CMD"); 392 393 ret = smsc75xx_dataport_wait_not_busy(dev); 394 check_warn_goto_done(ret, "smsc75xx_dataport_write timeout"); 395 } 396 397done: 398 mutex_unlock(&pdata->dataport_mutex); 399 return ret; 400} 401 402/* returns hash bit number for given MAC address */ 403static u32 smsc75xx_hash(char addr[ETH_ALEN]) 404{ 405 return (ether_crc(ETH_ALEN, addr) >> 23) & 0x1ff; 406} 407 408static void smsc75xx_deferred_multicast_write(struct work_struct *param) 409{ 410 struct smsc75xx_priv *pdata = 411 container_of(param, struct smsc75xx_priv, set_multicast); 412 struct usbnet *dev = pdata->dev; 413 int ret; 414 415 netif_dbg(dev, drv, dev->net, "deferred multicast write 0x%08x", 416 pdata->rfe_ctl); 417 418 smsc75xx_dataport_write(dev, DP_SEL_VHF, DP_SEL_VHF_VLAN_LEN, 419 DP_SEL_VHF_HASH_LEN, pdata->multicast_hash_table); 420 421 ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl); 422 check_warn(ret, "Error writing RFE_CRL"); 423} 424 425static void smsc75xx_set_multicast(struct net_device *netdev) 426{ 427 struct usbnet *dev = netdev_priv(netdev); 428 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); 429 unsigned long flags; 430 int i; 431 432 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags); 433 434 pdata->rfe_ctl &= 435 ~(RFE_CTL_AU | RFE_CTL_AM | RFE_CTL_DPF | RFE_CTL_MHF); 436 pdata->rfe_ctl |= RFE_CTL_AB; 437 438 for (i = 0; i < DP_SEL_VHF_HASH_LEN; i++) 439 pdata->multicast_hash_table[i] = 0; 440 441 if (dev->net->flags & IFF_PROMISC) { 442 netif_dbg(dev, drv, dev->net, "promiscuous mode enabled"); 443 pdata->rfe_ctl |= RFE_CTL_AM | RFE_CTL_AU; 444 } else if (dev->net->flags & IFF_ALLMULTI) { 445 netif_dbg(dev, drv, dev->net, "receive all multicast enabled"); 446 pdata->rfe_ctl |= RFE_CTL_AM | RFE_CTL_DPF; 447 } else if (!netdev_mc_empty(dev->net)) { 448 struct netdev_hw_addr *ha; 449 450 netif_dbg(dev, drv, dev->net, "receive multicast hash filter"); 451 452 pdata->rfe_ctl |= RFE_CTL_MHF | RFE_CTL_DPF; 453 454 netdev_for_each_mc_addr(ha, netdev) { 455 u32 bitnum = smsc75xx_hash(ha->addr); 456 pdata->multicast_hash_table[bitnum / 32] |= 457 (1 << (bitnum % 32)); 458 } 459 } else { 460 netif_dbg(dev, drv, dev->net, "receive own packets only"); 461 pdata->rfe_ctl |= RFE_CTL_DPF; 462 } 463 464 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags); 465 466 /* defer register writes to a sleepable context */ 467 schedule_work(&pdata->set_multicast); 468} 469 470static int smsc75xx_update_flowcontrol(struct usbnet *dev, u8 duplex, 471 u16 lcladv, u16 rmtadv) 472{ 473 u32 flow = 0, fct_flow = 0; 474 int ret; 475 476 if (duplex == DUPLEX_FULL) { 477 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv); 478 479 if (cap & FLOW_CTRL_TX) { 480 flow = (FLOW_TX_FCEN | 0xFFFF); 481 /* set fct_flow thresholds to 20% and 80% */ 482 fct_flow = (8 << 8) | 32; 483 } 484 485 if (cap & FLOW_CTRL_RX) 486 flow |= FLOW_RX_FCEN; 487 488 netif_dbg(dev, link, dev->net, "rx pause %s, tx pause %s", 489 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"), 490 (cap & FLOW_CTRL_TX ? "enabled" : "disabled")); 491 } else { 492 netif_dbg(dev, link, dev->net, "half duplex"); 493 } 494 495 ret = smsc75xx_write_reg(dev, FLOW, flow); 496 check_warn_return(ret, "Error writing FLOW"); 497 498 ret = smsc75xx_write_reg(dev, FCT_FLOW, fct_flow); 499 check_warn_return(ret, "Error writing FCT_FLOW"); 500 501 return 0; 502} 503 504static int smsc75xx_link_reset(struct usbnet *dev) 505{ 506 struct mii_if_info *mii = &dev->mii; 507 struct ethtool_cmd ecmd; 508 u16 lcladv, rmtadv; 509 int ret; 510 511 /* clear interrupt status */ 512 ret = smsc75xx_mdio_read(dev->net, mii->phy_id, PHY_INT_SRC); 513 check_warn_return(ret, "Error reading PHY_INT_SRC"); 514 515 ret = smsc75xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL); 516 check_warn_return(ret, "Error writing INT_STS"); 517 518 mii_check_media(mii, 1, 1); 519 mii_ethtool_gset(&dev->mii, &ecmd); 520 lcladv = smsc75xx_mdio_read(dev->net, mii->phy_id, MII_ADVERTISE); 521 rmtadv = smsc75xx_mdio_read(dev->net, mii->phy_id, MII_LPA); 522 523 netif_dbg(dev, link, dev->net, "speed: %d duplex: %d lcladv: %04x" 524 " rmtadv: %04x", ecmd.speed, ecmd.duplex, lcladv, rmtadv); 525 526 return smsc75xx_update_flowcontrol(dev, ecmd.duplex, lcladv, rmtadv); 527} 528 529static void smsc75xx_status(struct usbnet *dev, struct urb *urb) 530{ 531 u32 intdata; 532 533 if (urb->actual_length != 4) { 534 netdev_warn(dev->net, 535 "unexpected urb length %d", urb->actual_length); 536 return; 537 } 538 539 memcpy(&intdata, urb->transfer_buffer, 4); 540 le32_to_cpus(&intdata); 541 542 netif_dbg(dev, link, dev->net, "intdata: 0x%08X", intdata); 543 544 if (intdata & INT_ENP_PHY_INT) 545 usbnet_defer_kevent(dev, EVENT_LINK_RESET); 546 else 547 netdev_warn(dev->net, 548 "unexpected interrupt, intdata=0x%08X", intdata); 549} 550 551/* Enable or disable Rx checksum offload engine */ 552static int smsc75xx_set_rx_csum_offload(struct usbnet *dev) 553{ 554 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); 555 unsigned long flags; 556 int ret; 557 558 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags); 559 560 if (pdata->use_rx_csum) 561 pdata->rfe_ctl |= RFE_CTL_TCPUDP_CKM | RFE_CTL_IP_CKM; 562 else 563 pdata->rfe_ctl &= ~(RFE_CTL_TCPUDP_CKM | RFE_CTL_IP_CKM); 564 565 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags); 566 567 ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl); 568 check_warn_return(ret, "Error writing RFE_CTL"); 569 570 return 0; 571} 572 573static int smsc75xx_ethtool_get_eeprom_len(struct net_device *net) 574{ 575 return MAX_EEPROM_SIZE; 576} 577 578static int smsc75xx_ethtool_get_eeprom(struct net_device *netdev, 579 struct ethtool_eeprom *ee, u8 *data) 580{ 581 struct usbnet *dev = netdev_priv(netdev); 582 583 ee->magic = LAN75XX_EEPROM_MAGIC; 584 585 return smsc75xx_read_eeprom(dev, ee->offset, ee->len, data); 586} 587 588static int smsc75xx_ethtool_set_eeprom(struct net_device *netdev, 589 struct ethtool_eeprom *ee, u8 *data) 590{ 591 struct usbnet *dev = netdev_priv(netdev); 592 593 if (ee->magic != LAN75XX_EEPROM_MAGIC) { 594 netdev_warn(dev->net, 595 "EEPROM: magic value mismatch: 0x%x", ee->magic); 596 return -EINVAL; 597 } 598 599 return smsc75xx_write_eeprom(dev, ee->offset, ee->len, data); 600} 601 602static u32 smsc75xx_ethtool_get_rx_csum(struct net_device *netdev) 603{ 604 struct usbnet *dev = netdev_priv(netdev); 605 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); 606 607 return pdata->use_rx_csum; 608} 609 610static int smsc75xx_ethtool_set_rx_csum(struct net_device *netdev, u32 val) 611{ 612 struct usbnet *dev = netdev_priv(netdev); 613 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); 614 615 pdata->use_rx_csum = !!val; 616 617 return smsc75xx_set_rx_csum_offload(dev); 618} 619 620static int smsc75xx_ethtool_set_tso(struct net_device *netdev, u32 data) 621{ 622 if (data) 623 netdev->features |= NETIF_F_TSO | NETIF_F_TSO6; 624 else 625 netdev->features &= ~(NETIF_F_TSO | NETIF_F_TSO6); 626 627 return 0; 628} 629 630static const struct ethtool_ops smsc75xx_ethtool_ops = { 631 .get_link = usbnet_get_link, 632 .nway_reset = usbnet_nway_reset, 633 .get_drvinfo = usbnet_get_drvinfo, 634 .get_msglevel = usbnet_get_msglevel, 635 .set_msglevel = usbnet_set_msglevel, 636 .get_settings = usbnet_get_settings, 637 .set_settings = usbnet_set_settings, 638 .get_eeprom_len = smsc75xx_ethtool_get_eeprom_len, 639 .get_eeprom = smsc75xx_ethtool_get_eeprom, 640 .set_eeprom = smsc75xx_ethtool_set_eeprom, 641 .get_tx_csum = ethtool_op_get_tx_csum, 642 .set_tx_csum = ethtool_op_set_tx_hw_csum, 643 .get_rx_csum = smsc75xx_ethtool_get_rx_csum, 644 .set_rx_csum = smsc75xx_ethtool_set_rx_csum, 645 .get_tso = ethtool_op_get_tso, 646 .set_tso = smsc75xx_ethtool_set_tso, 647}; 648 649static int smsc75xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd) 650{ 651 struct usbnet *dev = netdev_priv(netdev); 652 653 if (!netif_running(netdev)) 654 return -EINVAL; 655 656 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL); 657} 658 659static void smsc75xx_init_mac_address(struct usbnet *dev) 660{ 661 /* try reading mac address from EEPROM */ 662 if (smsc75xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN, 663 dev->net->dev_addr) == 0) { 664 if (is_valid_ether_addr(dev->net->dev_addr)) { 665 /* eeprom values are valid so use them */ 666 netif_dbg(dev, ifup, dev->net, 667 "MAC address read from EEPROM"); 668 return; 669 } 670 } 671 672 /* no eeprom, or eeprom values are invalid. generate random MAC */ 673 random_ether_addr(dev->net->dev_addr); 674 netif_dbg(dev, ifup, dev->net, "MAC address set to random_ether_addr"); 675} 676 677static int smsc75xx_set_mac_address(struct usbnet *dev) 678{ 679 u32 addr_lo = dev->net->dev_addr[0] | dev->net->dev_addr[1] << 8 | 680 dev->net->dev_addr[2] << 16 | dev->net->dev_addr[3] << 24; 681 u32 addr_hi = dev->net->dev_addr[4] | dev->net->dev_addr[5] << 8; 682 683 int ret = smsc75xx_write_reg(dev, RX_ADDRH, addr_hi); 684 check_warn_return(ret, "Failed to write RX_ADDRH: %d", ret); 685 686 ret = smsc75xx_write_reg(dev, RX_ADDRL, addr_lo); 687 check_warn_return(ret, "Failed to write RX_ADDRL: %d", ret); 688 689 addr_hi |= ADDR_FILTX_FB_VALID; 690 ret = smsc75xx_write_reg(dev, ADDR_FILTX, addr_hi); 691 check_warn_return(ret, "Failed to write ADDR_FILTX: %d", ret); 692 693 ret = smsc75xx_write_reg(dev, ADDR_FILTX + 4, addr_lo); 694 check_warn_return(ret, "Failed to write ADDR_FILTX+4: %d", ret); 695 696 return 0; 697} 698 699static int smsc75xx_phy_initialize(struct usbnet *dev) 700{ 701 int bmcr, timeout = 0; 702 703 /* Initialize MII structure */ 704 dev->mii.dev = dev->net; 705 dev->mii.mdio_read = smsc75xx_mdio_read; 706 dev->mii.mdio_write = smsc75xx_mdio_write; 707 dev->mii.phy_id_mask = 0x1f; 708 dev->mii.reg_num_mask = 0x1f; 709 dev->mii.phy_id = SMSC75XX_INTERNAL_PHY_ID; 710 711 /* reset phy and wait for reset to complete */ 712 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET); 713 714 do { 715 msleep(10); 716 bmcr = smsc75xx_mdio_read(dev->net, dev->mii.phy_id, MII_BMCR); 717 check_warn_return(bmcr, "Error reading MII_BMCR"); 718 timeout++; 719 } while ((bmcr & MII_BMCR) && (timeout < 100)); 720 721 if (timeout >= 100) { 722 netdev_warn(dev->net, "timeout on PHY Reset"); 723 return -EIO; 724 } 725 726 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE, 727 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP | 728 ADVERTISE_PAUSE_ASYM); 729 730 /* read to clear */ 731 smsc75xx_mdio_read(dev->net, dev->mii.phy_id, PHY_INT_SRC); 732 check_warn_return(bmcr, "Error reading PHY_INT_SRC"); 733 734 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_MASK, 735 PHY_INT_MASK_DEFAULT); 736 mii_nway_restart(&dev->mii); 737 738 netif_dbg(dev, ifup, dev->net, "phy initialised successfully"); 739 return 0; 740} 741 742static int smsc75xx_set_rx_max_frame_length(struct usbnet *dev, int size) 743{ 744 int ret = 0; 745 u32 buf; 746 bool rxenabled; 747 748 ret = smsc75xx_read_reg(dev, MAC_RX, &buf); 749 check_warn_return(ret, "Failed to read MAC_RX: %d", ret); 750 751 rxenabled = ((buf & MAC_RX_RXEN) != 0); 752 753 if (rxenabled) { 754 buf &= ~MAC_RX_RXEN; 755 ret = smsc75xx_write_reg(dev, MAC_RX, buf); 756 check_warn_return(ret, "Failed to write MAC_RX: %d", ret); 757 } 758 759 /* add 4 to size for FCS */ 760 buf &= ~MAC_RX_MAX_SIZE; 761 buf |= (((size + 4) << MAC_RX_MAX_SIZE_SHIFT) & MAC_RX_MAX_SIZE); 762 763 ret = smsc75xx_write_reg(dev, MAC_RX, buf); 764 check_warn_return(ret, "Failed to write MAC_RX: %d", ret); 765 766 if (rxenabled) { 767 buf |= MAC_RX_RXEN; 768 ret = smsc75xx_write_reg(dev, MAC_RX, buf); 769 check_warn_return(ret, "Failed to write MAC_RX: %d", ret); 770 } 771 772 return 0; 773} 774 775static int smsc75xx_change_mtu(struct net_device *netdev, int new_mtu) 776{ 777 struct usbnet *dev = netdev_priv(netdev); 778 779 int ret = smsc75xx_set_rx_max_frame_length(dev, new_mtu); 780 check_warn_return(ret, "Failed to set mac rx frame length"); 781 782 return usbnet_change_mtu(netdev, new_mtu); 783} 784 785static int smsc75xx_reset(struct usbnet *dev) 786{ 787 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); 788 u32 buf; 789 int ret = 0, timeout; 790 791 netif_dbg(dev, ifup, dev->net, "entering smsc75xx_reset"); 792 793 ret = smsc75xx_read_reg(dev, HW_CFG, &buf); 794 check_warn_return(ret, "Failed to read HW_CFG: %d", ret); 795 796 buf |= HW_CFG_LRST; 797 798 ret = smsc75xx_write_reg(dev, HW_CFG, buf); 799 check_warn_return(ret, "Failed to write HW_CFG: %d", ret); 800 801 timeout = 0; 802 do { 803 msleep(10); 804 ret = smsc75xx_read_reg(dev, HW_CFG, &buf); 805 check_warn_return(ret, "Failed to read HW_CFG: %d", ret); 806 timeout++; 807 } while ((buf & HW_CFG_LRST) && (timeout < 100)); 808 809 if (timeout >= 100) { 810 netdev_warn(dev->net, "timeout on completion of Lite Reset"); 811 return -EIO; 812 } 813 814 netif_dbg(dev, ifup, dev->net, "Lite reset complete, resetting PHY"); 815 816 ret = smsc75xx_read_reg(dev, PMT_CTL, &buf); 817 check_warn_return(ret, "Failed to read PMT_CTL: %d", ret); 818 819 buf |= PMT_CTL_PHY_RST; 820 821 ret = smsc75xx_write_reg(dev, PMT_CTL, buf); 822 check_warn_return(ret, "Failed to write PMT_CTL: %d", ret); 823 824 timeout = 0; 825 do { 826 msleep(10); 827 ret = smsc75xx_read_reg(dev, PMT_CTL, &buf); 828 check_warn_return(ret, "Failed to read PMT_CTL: %d", ret); 829 timeout++; 830 } while ((buf & PMT_CTL_PHY_RST) && (timeout < 100)); 831 832 if (timeout >= 100) { 833 netdev_warn(dev->net, "timeout waiting for PHY Reset"); 834 return -EIO; 835 } 836 837 netif_dbg(dev, ifup, dev->net, "PHY reset complete"); 838 839 smsc75xx_init_mac_address(dev); 840 841 ret = smsc75xx_set_mac_address(dev); 842 check_warn_return(ret, "Failed to set mac address"); 843 844 netif_dbg(dev, ifup, dev->net, "MAC Address: %pM", dev->net->dev_addr); 845 846 ret = smsc75xx_read_reg(dev, HW_CFG, &buf); 847 check_warn_return(ret, "Failed to read HW_CFG: %d", ret); 848 849 netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG : 0x%08x", buf); 850 851 buf |= HW_CFG_BIR; 852 853 ret = smsc75xx_write_reg(dev, HW_CFG, buf); 854 check_warn_return(ret, "Failed to write HW_CFG: %d", ret); 855 856 ret = smsc75xx_read_reg(dev, HW_CFG, &buf); 857 check_warn_return(ret, "Failed to read HW_CFG: %d", ret); 858 859 netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG after " 860 "writing HW_CFG_BIR: 0x%08x", buf); 861 862 if (!turbo_mode) { 863 buf = 0; 864 dev->rx_urb_size = MAX_SINGLE_PACKET_SIZE; 865 } else if (dev->udev->speed == USB_SPEED_HIGH) { 866 buf = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE; 867 dev->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE; 868 } else { 869 buf = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE; 870 dev->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE; 871 } 872 873 netif_dbg(dev, ifup, dev->net, "rx_urb_size=%ld", 874 (ulong)dev->rx_urb_size); 875 876 ret = smsc75xx_write_reg(dev, BURST_CAP, buf); 877 check_warn_return(ret, "Failed to write BURST_CAP: %d", ret); 878 879 ret = smsc75xx_read_reg(dev, BURST_CAP, &buf); 880 check_warn_return(ret, "Failed to read BURST_CAP: %d", ret); 881 882 netif_dbg(dev, ifup, dev->net, 883 "Read Value from BURST_CAP after writing: 0x%08x", buf); 884 885 ret = smsc75xx_write_reg(dev, BULK_IN_DLY, DEFAULT_BULK_IN_DELAY); 886 check_warn_return(ret, "Failed to write BULK_IN_DLY: %d", ret); 887 888 ret = smsc75xx_read_reg(dev, BULK_IN_DLY, &buf); 889 check_warn_return(ret, "Failed to read BULK_IN_DLY: %d", ret); 890 891 netif_dbg(dev, ifup, dev->net, 892 "Read Value from BULK_IN_DLY after writing: 0x%08x", buf); 893 894 if (turbo_mode) { 895 ret = smsc75xx_read_reg(dev, HW_CFG, &buf); 896 check_warn_return(ret, "Failed to read HW_CFG: %d", ret); 897 898 netif_dbg(dev, ifup, dev->net, "HW_CFG: 0x%08x", buf); 899 900 buf |= (HW_CFG_MEF | HW_CFG_BCE); 901 902 ret = smsc75xx_write_reg(dev, HW_CFG, buf); 903 check_warn_return(ret, "Failed to write HW_CFG: %d", ret); 904 905 ret = smsc75xx_read_reg(dev, HW_CFG, &buf); 906 check_warn_return(ret, "Failed to read HW_CFG: %d", ret); 907 908 netif_dbg(dev, ifup, dev->net, "HW_CFG: 0x%08x", buf); 909 } 910 911 /* set FIFO sizes */ 912 buf = (MAX_RX_FIFO_SIZE - 512) / 512; 913 ret = smsc75xx_write_reg(dev, FCT_RX_FIFO_END, buf); 914 check_warn_return(ret, "Failed to write FCT_RX_FIFO_END: %d", ret); 915 916 netif_dbg(dev, ifup, dev->net, "FCT_RX_FIFO_END set to 0x%08x", buf); 917 918 buf = (MAX_TX_FIFO_SIZE - 512) / 512; 919 ret = smsc75xx_write_reg(dev, FCT_TX_FIFO_END, buf); 920 check_warn_return(ret, "Failed to write FCT_TX_FIFO_END: %d", ret); 921 922 netif_dbg(dev, ifup, dev->net, "FCT_TX_FIFO_END set to 0x%08x", buf); 923 924 ret = smsc75xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL); 925 check_warn_return(ret, "Failed to write INT_STS: %d", ret); 926 927 ret = smsc75xx_read_reg(dev, ID_REV, &buf); 928 check_warn_return(ret, "Failed to read ID_REV: %d", ret); 929 930 netif_dbg(dev, ifup, dev->net, "ID_REV = 0x%08x", buf); 931 932 /* Configure GPIO pins as LED outputs */ 933 ret = smsc75xx_read_reg(dev, LED_GPIO_CFG, &buf); 934 check_warn_return(ret, "Failed to read LED_GPIO_CFG: %d", ret); 935 936 buf &= ~(LED_GPIO_CFG_LED2_FUN_SEL | LED_GPIO_CFG_LED10_FUN_SEL); 937 buf |= LED_GPIO_CFG_LEDGPIO_EN | LED_GPIO_CFG_LED2_FUN_SEL; 938 939 ret = smsc75xx_write_reg(dev, LED_GPIO_CFG, buf); 940 check_warn_return(ret, "Failed to write LED_GPIO_CFG: %d", ret); 941 942 ret = smsc75xx_write_reg(dev, FLOW, 0); 943 check_warn_return(ret, "Failed to write FLOW: %d", ret); 944 945 ret = smsc75xx_write_reg(dev, FCT_FLOW, 0); 946 check_warn_return(ret, "Failed to write FCT_FLOW: %d", ret); 947 948 /* Don't need rfe_ctl_lock during initialisation */ 949 ret = smsc75xx_read_reg(dev, RFE_CTL, &pdata->rfe_ctl); 950 check_warn_return(ret, "Failed to read RFE_CTL: %d", ret); 951 952 pdata->rfe_ctl |= RFE_CTL_AB | RFE_CTL_DPF; 953 954 ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl); 955 check_warn_return(ret, "Failed to write RFE_CTL: %d", ret); 956 957 ret = smsc75xx_read_reg(dev, RFE_CTL, &pdata->rfe_ctl); 958 check_warn_return(ret, "Failed to read RFE_CTL: %d", ret); 959 960 netif_dbg(dev, ifup, dev->net, "RFE_CTL set to 0x%08x", pdata->rfe_ctl); 961 962 /* Enable or disable checksum offload engines */ 963 ethtool_op_set_tx_hw_csum(dev->net, DEFAULT_TX_CSUM_ENABLE); 964 ret = smsc75xx_set_rx_csum_offload(dev); 965 check_warn_return(ret, "Failed to set rx csum offload: %d", ret); 966 967 smsc75xx_ethtool_set_tso(dev->net, DEFAULT_TSO_ENABLE); 968 969 smsc75xx_set_multicast(dev->net); 970 971 ret = smsc75xx_phy_initialize(dev); 972 check_warn_return(ret, "Failed to initialize PHY: %d", ret); 973 974 ret = smsc75xx_read_reg(dev, INT_EP_CTL, &buf); 975 check_warn_return(ret, "Failed to read INT_EP_CTL: %d", ret); 976 977 /* enable PHY interrupts */ 978 buf |= INT_ENP_PHY_INT; 979 980 ret = smsc75xx_write_reg(dev, INT_EP_CTL, buf); 981 check_warn_return(ret, "Failed to write INT_EP_CTL: %d", ret); 982 983 ret = smsc75xx_read_reg(dev, MAC_TX, &buf); 984 check_warn_return(ret, "Failed to read MAC_TX: %d", ret); 985 986 buf |= MAC_TX_TXEN; 987 988 ret = smsc75xx_write_reg(dev, MAC_TX, buf); 989 check_warn_return(ret, "Failed to write MAC_TX: %d", ret); 990 991 netif_dbg(dev, ifup, dev->net, "MAC_TX set to 0x%08x", buf); 992 993 ret = smsc75xx_read_reg(dev, FCT_TX_CTL, &buf); 994 check_warn_return(ret, "Failed to read FCT_TX_CTL: %d", ret); 995 996 buf |= FCT_TX_CTL_EN; 997 998 ret = smsc75xx_write_reg(dev, FCT_TX_CTL, buf); 999 check_warn_return(ret, "Failed to write FCT_TX_CTL: %d", ret); 1000 1001 netif_dbg(dev, ifup, dev->net, "FCT_TX_CTL set to 0x%08x", buf); 1002 1003 ret = smsc75xx_set_rx_max_frame_length(dev, 1514); 1004 check_warn_return(ret, "Failed to set max rx frame length"); 1005 1006 ret = smsc75xx_read_reg(dev, MAC_RX, &buf); 1007 check_warn_return(ret, "Failed to read MAC_RX: %d", ret); 1008 1009 buf |= MAC_RX_RXEN; 1010 1011 ret = smsc75xx_write_reg(dev, MAC_RX, buf); 1012 check_warn_return(ret, "Failed to write MAC_RX: %d", ret); 1013 1014 netif_dbg(dev, ifup, dev->net, "MAC_RX set to 0x%08x", buf); 1015 1016 ret = smsc75xx_read_reg(dev, FCT_RX_CTL, &buf); 1017 check_warn_return(ret, "Failed to read FCT_RX_CTL: %d", ret); 1018 1019 buf |= FCT_RX_CTL_EN; 1020 1021 ret = smsc75xx_write_reg(dev, FCT_RX_CTL, buf); 1022 check_warn_return(ret, "Failed to write FCT_RX_CTL: %d", ret); 1023 1024 netif_dbg(dev, ifup, dev->net, "FCT_RX_CTL set to 0x%08x", buf); 1025 1026 netif_dbg(dev, ifup, dev->net, "smsc75xx_reset, return 0"); 1027 return 0; 1028} 1029 1030static const struct net_device_ops smsc75xx_netdev_ops = { 1031 .ndo_open = usbnet_open, 1032 .ndo_stop = usbnet_stop, 1033 .ndo_start_xmit = usbnet_start_xmit, 1034 .ndo_tx_timeout = usbnet_tx_timeout, 1035 .ndo_change_mtu = smsc75xx_change_mtu, 1036 .ndo_set_mac_address = eth_mac_addr, 1037 .ndo_validate_addr = eth_validate_addr, 1038 .ndo_do_ioctl = smsc75xx_ioctl, 1039 .ndo_set_multicast_list = smsc75xx_set_multicast, 1040}; 1041 1042static int smsc75xx_bind(struct usbnet *dev, struct usb_interface *intf) 1043{ 1044 struct smsc75xx_priv *pdata = NULL; 1045 int ret; 1046 1047 printk(KERN_INFO SMSC_CHIPNAME " v" SMSC_DRIVER_VERSION "\n"); 1048 1049 ret = usbnet_get_endpoints(dev, intf); 1050 check_warn_return(ret, "usbnet_get_endpoints failed: %d", ret); 1051 1052 dev->data[0] = (unsigned long)kzalloc(sizeof(struct smsc75xx_priv), 1053 GFP_KERNEL); 1054 1055 pdata = (struct smsc75xx_priv *)(dev->data[0]); 1056 if (!pdata) { 1057 netdev_warn(dev->net, "Unable to allocate smsc75xx_priv"); 1058 return -ENOMEM; 1059 } 1060 1061 pdata->dev = dev; 1062 1063 spin_lock_init(&pdata->rfe_ctl_lock); 1064 mutex_init(&pdata->dataport_mutex); 1065 1066 INIT_WORK(&pdata->set_multicast, smsc75xx_deferred_multicast_write); 1067 1068 pdata->use_rx_csum = DEFAULT_RX_CSUM_ENABLE; 1069 1070 /* We have to advertise SG otherwise TSO cannot be enabled */ 1071 dev->net->features |= NETIF_F_SG; 1072 1073 /* Init all registers */ 1074 ret = smsc75xx_reset(dev); 1075 1076 dev->net->netdev_ops = &smsc75xx_netdev_ops; 1077 dev->net->ethtool_ops = &smsc75xx_ethtool_ops; 1078 dev->net->flags |= IFF_MULTICAST; 1079 dev->net->hard_header_len += SMSC75XX_TX_OVERHEAD; 1080 return 0; 1081} 1082 1083static void smsc75xx_unbind(struct usbnet *dev, struct usb_interface *intf) 1084{ 1085 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); 1086 if (pdata) { 1087 netif_dbg(dev, ifdown, dev->net, "free pdata"); 1088 kfree(pdata); 1089 pdata = NULL; 1090 dev->data[0] = 0; 1091 } 1092} 1093 1094static void smsc75xx_rx_csum_offload(struct sk_buff *skb, u32 rx_cmd_a, 1095 u32 rx_cmd_b) 1096{ 1097 if (unlikely(rx_cmd_a & RX_CMD_A_LCSM)) { 1098 skb->ip_summed = CHECKSUM_NONE; 1099 } else { 1100 skb->csum = ntohs((u16)(rx_cmd_b >> RX_CMD_B_CSUM_SHIFT)); 1101 skb->ip_summed = CHECKSUM_COMPLETE; 1102 } 1103} 1104 1105static int smsc75xx_rx_fixup(struct usbnet *dev, struct sk_buff *skb) 1106{ 1107 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); 1108 1109 while (skb->len > 0) { 1110 u32 rx_cmd_a, rx_cmd_b, align_count, size; 1111 struct sk_buff *ax_skb; 1112 unsigned char *packet; 1113 1114 memcpy(&rx_cmd_a, skb->data, sizeof(rx_cmd_a)); 1115 le32_to_cpus(&rx_cmd_a); 1116 skb_pull(skb, 4); 1117 1118 memcpy(&rx_cmd_b, skb->data, sizeof(rx_cmd_b)); 1119 le32_to_cpus(&rx_cmd_b); 1120 skb_pull(skb, 4 + NET_IP_ALIGN); 1121 1122 packet = skb->data; 1123 1124 /* get the packet length */ 1125 size = (rx_cmd_a & RX_CMD_A_LEN) - NET_IP_ALIGN; 1126 align_count = (4 - ((size + NET_IP_ALIGN) % 4)) % 4; 1127 1128 if (unlikely(rx_cmd_a & RX_CMD_A_RED)) { 1129 netif_dbg(dev, rx_err, dev->net, 1130 "Error rx_cmd_a=0x%08x", rx_cmd_a); 1131 dev->net->stats.rx_errors++; 1132 dev->net->stats.rx_dropped++; 1133 1134 if (rx_cmd_a & RX_CMD_A_FCS) 1135 dev->net->stats.rx_crc_errors++; 1136 else if (rx_cmd_a & (RX_CMD_A_LONG | RX_CMD_A_RUNT)) 1137 dev->net->stats.rx_frame_errors++; 1138 } else { 1139 /* ETH_FRAME_LEN + 4(CRC) + 2(COE) + 4(Vlan) */ 1140 if (unlikely(size > (ETH_FRAME_LEN + 12))) { 1141 netif_dbg(dev, rx_err, dev->net, 1142 "size err rx_cmd_a=0x%08x", rx_cmd_a); 1143 return 0; 1144 } 1145 1146 /* last frame in this batch */ 1147 if (skb->len == size) { 1148 if (pdata->use_rx_csum) 1149 smsc75xx_rx_csum_offload(skb, rx_cmd_a, 1150 rx_cmd_b); 1151 else 1152 skb->ip_summed = CHECKSUM_NONE; 1153 1154 skb_trim(skb, skb->len - 4); /* remove fcs */ 1155 skb->truesize = size + sizeof(struct sk_buff); 1156 1157 return 1; 1158 } 1159 1160 ax_skb = skb_clone(skb, GFP_ATOMIC); 1161 if (unlikely(!ax_skb)) { 1162 netdev_warn(dev->net, "Error allocating skb"); 1163 return 0; 1164 } 1165 1166 ax_skb->len = size; 1167 ax_skb->data = packet; 1168 skb_set_tail_pointer(ax_skb, size); 1169 1170 if (pdata->use_rx_csum) 1171 smsc75xx_rx_csum_offload(ax_skb, rx_cmd_a, 1172 rx_cmd_b); 1173 else 1174 ax_skb->ip_summed = CHECKSUM_NONE; 1175 1176 skb_trim(ax_skb, ax_skb->len - 4); /* remove fcs */ 1177 ax_skb->truesize = size + sizeof(struct sk_buff); 1178 1179 usbnet_skb_return(dev, ax_skb); 1180 } 1181 1182 skb_pull(skb, size); 1183 1184 /* padding bytes before the next frame starts */ 1185 if (skb->len) 1186 skb_pull(skb, align_count); 1187 } 1188 1189 if (unlikely(skb->len < 0)) { 1190 netdev_warn(dev->net, "invalid rx length<0 %d", skb->len); 1191 return 0; 1192 } 1193 1194 return 1; 1195} 1196 1197static struct sk_buff *smsc75xx_tx_fixup(struct usbnet *dev, 1198 struct sk_buff *skb, gfp_t flags) 1199{ 1200 u32 tx_cmd_a, tx_cmd_b; 1201 1202 skb_linearize(skb); 1203 1204 if (skb_headroom(skb) < SMSC75XX_TX_OVERHEAD) { 1205 struct sk_buff *skb2 = 1206 skb_copy_expand(skb, SMSC75XX_TX_OVERHEAD, 0, flags); 1207 dev_kfree_skb_any(skb); 1208 skb = skb2; 1209 if (!skb) 1210 return NULL; 1211 } 1212 1213 tx_cmd_a = (u32)(skb->len & TX_CMD_A_LEN) | TX_CMD_A_FCS; 1214 1215 if (skb->ip_summed == CHECKSUM_PARTIAL) 1216 tx_cmd_a |= TX_CMD_A_IPE | TX_CMD_A_TPE; 1217 1218 if (skb_is_gso(skb)) { 1219 u16 mss = max(skb_shinfo(skb)->gso_size, TX_MSS_MIN); 1220 tx_cmd_b = (mss << TX_CMD_B_MSS_SHIFT) & TX_CMD_B_MSS; 1221 1222 tx_cmd_a |= TX_CMD_A_LSO; 1223 } else { 1224 tx_cmd_b = 0; 1225 } 1226 1227 skb_push(skb, 4); 1228 cpu_to_le32s(&tx_cmd_b); 1229 memcpy(skb->data, &tx_cmd_b, 4); 1230 1231 skb_push(skb, 4); 1232 cpu_to_le32s(&tx_cmd_a); 1233 memcpy(skb->data, &tx_cmd_a, 4); 1234 1235 return skb; 1236} 1237 1238static const struct driver_info smsc75xx_info = { 1239 .description = "smsc75xx USB 2.0 Gigabit Ethernet", 1240 .bind = smsc75xx_bind, 1241 .unbind = smsc75xx_unbind, 1242 .link_reset = smsc75xx_link_reset, 1243 .reset = smsc75xx_reset, 1244 .rx_fixup = smsc75xx_rx_fixup, 1245 .tx_fixup = smsc75xx_tx_fixup, 1246 .status = smsc75xx_status, 1247 .flags = FLAG_ETHER | FLAG_SEND_ZLP, 1248}; 1249 1250static const struct usb_device_id products[] = { 1251 { 1252 /* SMSC7500 USB Gigabit Ethernet Device */ 1253 USB_DEVICE(USB_VENDOR_ID_SMSC, USB_PRODUCT_ID_LAN7500), 1254 .driver_info = (unsigned long) &smsc75xx_info, 1255 }, 1256 { 1257 /* SMSC7500 USB Gigabit Ethernet Device */ 1258 USB_DEVICE(USB_VENDOR_ID_SMSC, USB_PRODUCT_ID_LAN7505), 1259 .driver_info = (unsigned long) &smsc75xx_info, 1260 }, 1261 { }, /* END */ 1262}; 1263MODULE_DEVICE_TABLE(usb, products); 1264 1265static struct usb_driver smsc75xx_driver = { 1266 .name = SMSC_CHIPNAME, 1267 .id_table = products, 1268 .probe = usbnet_probe, 1269 .suspend = usbnet_suspend, 1270 .resume = usbnet_resume, 1271 .disconnect = usbnet_disconnect, 1272}; 1273 1274static int __init smsc75xx_init(void) 1275{ 1276 return usb_register(&smsc75xx_driver); 1277} 1278module_init(smsc75xx_init); 1279 1280static void __exit smsc75xx_exit(void) 1281{ 1282 usb_deregister(&smsc75xx_driver); 1283} 1284module_exit(smsc75xx_exit); 1285 1286MODULE_AUTHOR("Nancy Lin"); 1287MODULE_AUTHOR("Steve Glendinning <steve.glendinning@smsc.com>"); 1288MODULE_DESCRIPTION("SMSC75XX USB 2.0 Gigabit Ethernet Devices"); 1289MODULE_LICENSE("GPL"); 1290