1/******************************************************************************* 2 3 Copyright(c) 2006 Tundra Semiconductor Corporation. 4 5 This program is free software; you can redistribute it and/or modify it 6 under the terms of the GNU General Public License as published by the Free 7 Software Foundation; either version 2 of the License, or (at your option) 8 any later version. 9 10 This program is distributed in the hope that it will be useful, but WITHOUT 11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 more details. 14 15 You should have received a copy of the GNU General Public License along with 16 this program; if not, write to the Free Software Foundation, Inc., 59 17 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 18 19*******************************************************************************/ 20 21/* This driver is based on the driver code originally developed 22 * for the Intel IOC80314 (ForestLake) Gigabit Ethernet by 23 * scott.wood@timesys.com * Copyright (C) 2003 TimeSys Corporation 24 * 25 * Currently changes from original version are: 26 * - porting to Tsi108-based platform and kernel 2.6 (kong.lai@tundra.com) 27 * - modifications to handle two ports independently and support for 28 * additional PHY devices (alexandre.bounine@tundra.com) 29 * - Get hardware information from platform device. (tie-fei.zang@freescale.com) 30 * 31 */ 32 33#include <linux/module.h> 34#include <linux/types.h> 35#include <linux/init.h> 36#include <linux/net.h> 37#include <linux/netdevice.h> 38#include <linux/etherdevice.h> 39#include <linux/ethtool.h> 40#include <linux/skbuff.h> 41#include <linux/spinlock.h> 42#include <linux/delay.h> 43#include <linux/crc32.h> 44#include <linux/mii.h> 45#include <linux/device.h> 46#include <linux/pci.h> 47#include <linux/rtnetlink.h> 48#include <linux/timer.h> 49#include <linux/platform_device.h> 50#include <linux/gfp.h> 51 52#include <asm/system.h> 53#include <asm/io.h> 54#include <asm/tsi108.h> 55 56#include "tsi108_eth.h" 57 58#define MII_READ_DELAY 10000 /* max link wait time in msec */ 59 60#define TSI108_RXRING_LEN 256 61 62/* NOTE: The driver currently does not support receiving packets 63 * larger than the buffer size, so don't decrease this (unless you 64 * want to add such support). 65 */ 66#define TSI108_RXBUF_SIZE 1536 67 68#define TSI108_TXRING_LEN 256 69 70#define TSI108_TX_INT_FREQ 64 71 72/* Check the phy status every half a second. */ 73#define CHECK_PHY_INTERVAL (HZ/2) 74 75static int tsi108_init_one(struct platform_device *pdev); 76static int tsi108_ether_remove(struct platform_device *pdev); 77 78struct tsi108_prv_data { 79 void __iomem *regs; /* Base of normal regs */ 80 void __iomem *phyregs; /* Base of register bank used for PHY access */ 81 82 struct net_device *dev; 83 struct napi_struct napi; 84 85 unsigned int phy; /* Index of PHY for this interface */ 86 unsigned int irq_num; 87 unsigned int id; 88 unsigned int phy_type; 89 90 struct timer_list timer;/* Timer that triggers the check phy function */ 91 unsigned int rxtail; /* Next entry in rxring to read */ 92 unsigned int rxhead; /* Next entry in rxring to give a new buffer */ 93 unsigned int rxfree; /* Number of free, allocated RX buffers */ 94 95 unsigned int rxpending; /* Non-zero if there are still descriptors 96 * to be processed from a previous descriptor 97 * interrupt condition that has been cleared */ 98 99 unsigned int txtail; /* Next TX descriptor to check status on */ 100 unsigned int txhead; /* Next TX descriptor to use */ 101 102 /* Number of free TX descriptors. This could be calculated from 103 * rxhead and rxtail if one descriptor were left unused to disambiguate 104 * full and empty conditions, but it's simpler to just keep track 105 * explicitly. */ 106 107 unsigned int txfree; 108 109 unsigned int phy_ok; /* The PHY is currently powered on. */ 110 111 /* PHY status (duplex is 1 for half, 2 for full, 112 * so that the default 0 indicates that neither has 113 * yet been configured). */ 114 115 unsigned int link_up; 116 unsigned int speed; 117 unsigned int duplex; 118 119 tx_desc *txring; 120 rx_desc *rxring; 121 struct sk_buff *txskbs[TSI108_TXRING_LEN]; 122 struct sk_buff *rxskbs[TSI108_RXRING_LEN]; 123 124 dma_addr_t txdma, rxdma; 125 126 /* txlock nests in misclock and phy_lock */ 127 128 spinlock_t txlock, misclock; 129 130 /* stats is used to hold the upper bits of each hardware counter, 131 * and tmpstats is used to hold the full values for returning 132 * to the caller of get_stats(). They must be separate in case 133 * an overflow interrupt occurs before the stats are consumed. 134 */ 135 136 struct net_device_stats stats; 137 struct net_device_stats tmpstats; 138 139 /* These stats are kept separate in hardware, thus require individual 140 * fields for handling carry. They are combined in get_stats. 141 */ 142 143 unsigned long rx_fcs; /* Add to rx_frame_errors */ 144 unsigned long rx_short_fcs; /* Add to rx_frame_errors */ 145 unsigned long rx_long_fcs; /* Add to rx_frame_errors */ 146 unsigned long rx_underruns; /* Add to rx_length_errors */ 147 unsigned long rx_overruns; /* Add to rx_length_errors */ 148 149 unsigned long tx_coll_abort; /* Add to tx_aborted_errors/collisions */ 150 unsigned long tx_pause_drop; /* Add to tx_aborted_errors */ 151 152 unsigned long mc_hash[16]; 153 u32 msg_enable; /* debug message level */ 154 struct mii_if_info mii_if; 155 unsigned int init_media; 156}; 157 158/* Structure for a device driver */ 159 160static struct platform_driver tsi_eth_driver = { 161 .probe = tsi108_init_one, 162 .remove = tsi108_ether_remove, 163 .driver = { 164 .name = "tsi-ethernet", 165 .owner = THIS_MODULE, 166 }, 167}; 168 169static void tsi108_timed_checker(unsigned long dev_ptr); 170 171static void dump_eth_one(struct net_device *dev) 172{ 173 struct tsi108_prv_data *data = netdev_priv(dev); 174 175 printk("Dumping %s...\n", dev->name); 176 printk("intstat %x intmask %x phy_ok %d" 177 " link %d speed %d duplex %d\n", 178 TSI_READ(TSI108_EC_INTSTAT), 179 TSI_READ(TSI108_EC_INTMASK), data->phy_ok, 180 data->link_up, data->speed, data->duplex); 181 182 printk("TX: head %d, tail %d, free %d, stat %x, estat %x, err %x\n", 183 data->txhead, data->txtail, data->txfree, 184 TSI_READ(TSI108_EC_TXSTAT), 185 TSI_READ(TSI108_EC_TXESTAT), 186 TSI_READ(TSI108_EC_TXERR)); 187 188 printk("RX: head %d, tail %d, free %d, stat %x," 189 " estat %x, err %x, pending %d\n\n", 190 data->rxhead, data->rxtail, data->rxfree, 191 TSI_READ(TSI108_EC_RXSTAT), 192 TSI_READ(TSI108_EC_RXESTAT), 193 TSI_READ(TSI108_EC_RXERR), data->rxpending); 194} 195 196/* Synchronization is needed between the thread and up/down events. 197 * Note that the PHY is accessed through the same registers for both 198 * interfaces, so this can't be made interface-specific. 199 */ 200 201static DEFINE_SPINLOCK(phy_lock); 202 203static int tsi108_read_mii(struct tsi108_prv_data *data, int reg) 204{ 205 unsigned i; 206 207 TSI_WRITE_PHY(TSI108_MAC_MII_ADDR, 208 (data->phy << TSI108_MAC_MII_ADDR_PHY) | 209 (reg << TSI108_MAC_MII_ADDR_REG)); 210 TSI_WRITE_PHY(TSI108_MAC_MII_CMD, 0); 211 TSI_WRITE_PHY(TSI108_MAC_MII_CMD, TSI108_MAC_MII_CMD_READ); 212 for (i = 0; i < 100; i++) { 213 if (!(TSI_READ_PHY(TSI108_MAC_MII_IND) & 214 (TSI108_MAC_MII_IND_NOTVALID | TSI108_MAC_MII_IND_BUSY))) 215 break; 216 udelay(10); 217 } 218 219 if (i == 100) 220 return 0xffff; 221 else 222 return (TSI_READ_PHY(TSI108_MAC_MII_DATAIN)); 223} 224 225static void tsi108_write_mii(struct tsi108_prv_data *data, 226 int reg, u16 val) 227{ 228 unsigned i = 100; 229 TSI_WRITE_PHY(TSI108_MAC_MII_ADDR, 230 (data->phy << TSI108_MAC_MII_ADDR_PHY) | 231 (reg << TSI108_MAC_MII_ADDR_REG)); 232 TSI_WRITE_PHY(TSI108_MAC_MII_DATAOUT, val); 233 while (i--) { 234 if(!(TSI_READ_PHY(TSI108_MAC_MII_IND) & 235 TSI108_MAC_MII_IND_BUSY)) 236 break; 237 udelay(10); 238 } 239} 240 241static int tsi108_mdio_read(struct net_device *dev, int addr, int reg) 242{ 243 struct tsi108_prv_data *data = netdev_priv(dev); 244 return tsi108_read_mii(data, reg); 245} 246 247static void tsi108_mdio_write(struct net_device *dev, int addr, int reg, int val) 248{ 249 struct tsi108_prv_data *data = netdev_priv(dev); 250 tsi108_write_mii(data, reg, val); 251} 252 253static inline void tsi108_write_tbi(struct tsi108_prv_data *data, 254 int reg, u16 val) 255{ 256 unsigned i = 1000; 257 TSI_WRITE(TSI108_MAC_MII_ADDR, 258 (0x1e << TSI108_MAC_MII_ADDR_PHY) 259 | (reg << TSI108_MAC_MII_ADDR_REG)); 260 TSI_WRITE(TSI108_MAC_MII_DATAOUT, val); 261 while(i--) { 262 if(!(TSI_READ(TSI108_MAC_MII_IND) & TSI108_MAC_MII_IND_BUSY)) 263 return; 264 udelay(10); 265 } 266 printk(KERN_ERR "%s function time out\n", __func__); 267} 268 269static int mii_speed(struct mii_if_info *mii) 270{ 271 int advert, lpa, val, media; 272 int lpa2 = 0; 273 int speed; 274 275 if (!mii_link_ok(mii)) 276 return 0; 277 278 val = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_BMSR); 279 if ((val & BMSR_ANEGCOMPLETE) == 0) 280 return 0; 281 282 advert = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_ADVERTISE); 283 lpa = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_LPA); 284 media = mii_nway_result(advert & lpa); 285 286 if (mii->supports_gmii) 287 lpa2 = mii->mdio_read(mii->dev, mii->phy_id, MII_STAT1000); 288 289 speed = lpa2 & (LPA_1000FULL | LPA_1000HALF) ? 1000 : 290 (media & (ADVERTISE_100FULL | ADVERTISE_100HALF) ? 100 : 10); 291 return speed; 292} 293 294static void tsi108_check_phy(struct net_device *dev) 295{ 296 struct tsi108_prv_data *data = netdev_priv(dev); 297 u32 mac_cfg2_reg, portctrl_reg; 298 u32 duplex; 299 u32 speed; 300 unsigned long flags; 301 302 spin_lock_irqsave(&phy_lock, flags); 303 304 if (!data->phy_ok) 305 goto out; 306 307 duplex = mii_check_media(&data->mii_if, netif_msg_link(data), data->init_media); 308 data->init_media = 0; 309 310 if (netif_carrier_ok(dev)) { 311 312 speed = mii_speed(&data->mii_if); 313 314 if ((speed != data->speed) || duplex) { 315 316 mac_cfg2_reg = TSI_READ(TSI108_MAC_CFG2); 317 portctrl_reg = TSI_READ(TSI108_EC_PORTCTRL); 318 319 mac_cfg2_reg &= ~TSI108_MAC_CFG2_IFACE_MASK; 320 321 if (speed == 1000) { 322 mac_cfg2_reg |= TSI108_MAC_CFG2_GIG; 323 portctrl_reg &= ~TSI108_EC_PORTCTRL_NOGIG; 324 } else { 325 mac_cfg2_reg |= TSI108_MAC_CFG2_NOGIG; 326 portctrl_reg |= TSI108_EC_PORTCTRL_NOGIG; 327 } 328 329 data->speed = speed; 330 331 if (data->mii_if.full_duplex) { 332 mac_cfg2_reg |= TSI108_MAC_CFG2_FULLDUPLEX; 333 portctrl_reg &= ~TSI108_EC_PORTCTRL_HALFDUPLEX; 334 data->duplex = 2; 335 } else { 336 mac_cfg2_reg &= ~TSI108_MAC_CFG2_FULLDUPLEX; 337 portctrl_reg |= TSI108_EC_PORTCTRL_HALFDUPLEX; 338 data->duplex = 1; 339 } 340 341 TSI_WRITE(TSI108_MAC_CFG2, mac_cfg2_reg); 342 TSI_WRITE(TSI108_EC_PORTCTRL, portctrl_reg); 343 } 344 345 if (data->link_up == 0) { 346 /* The manual says it can take 3-4 usecs for the speed change 347 * to take effect. 348 */ 349 udelay(5); 350 351 spin_lock(&data->txlock); 352 if (is_valid_ether_addr(dev->dev_addr) && data->txfree) 353 netif_wake_queue(dev); 354 355 data->link_up = 1; 356 spin_unlock(&data->txlock); 357 } 358 } else { 359 if (data->link_up == 1) { 360 netif_stop_queue(dev); 361 data->link_up = 0; 362 printk(KERN_NOTICE "%s : link is down\n", dev->name); 363 } 364 365 goto out; 366 } 367 368 369out: 370 spin_unlock_irqrestore(&phy_lock, flags); 371} 372 373static inline void 374tsi108_stat_carry_one(int carry, int carry_bit, int carry_shift, 375 unsigned long *upper) 376{ 377 if (carry & carry_bit) 378 *upper += carry_shift; 379} 380 381static void tsi108_stat_carry(struct net_device *dev) 382{ 383 struct tsi108_prv_data *data = netdev_priv(dev); 384 u32 carry1, carry2; 385 386 spin_lock_irq(&data->misclock); 387 388 carry1 = TSI_READ(TSI108_STAT_CARRY1); 389 carry2 = TSI_READ(TSI108_STAT_CARRY2); 390 391 TSI_WRITE(TSI108_STAT_CARRY1, carry1); 392 TSI_WRITE(TSI108_STAT_CARRY2, carry2); 393 394 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXBYTES, 395 TSI108_STAT_RXBYTES_CARRY, &data->stats.rx_bytes); 396 397 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXPKTS, 398 TSI108_STAT_RXPKTS_CARRY, 399 &data->stats.rx_packets); 400 401 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXFCS, 402 TSI108_STAT_RXFCS_CARRY, &data->rx_fcs); 403 404 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXMCAST, 405 TSI108_STAT_RXMCAST_CARRY, 406 &data->stats.multicast); 407 408 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXALIGN, 409 TSI108_STAT_RXALIGN_CARRY, 410 &data->stats.rx_frame_errors); 411 412 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXLENGTH, 413 TSI108_STAT_RXLENGTH_CARRY, 414 &data->stats.rx_length_errors); 415 416 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXRUNT, 417 TSI108_STAT_RXRUNT_CARRY, &data->rx_underruns); 418 419 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXJUMBO, 420 TSI108_STAT_RXJUMBO_CARRY, &data->rx_overruns); 421 422 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXFRAG, 423 TSI108_STAT_RXFRAG_CARRY, &data->rx_short_fcs); 424 425 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXJABBER, 426 TSI108_STAT_RXJABBER_CARRY, &data->rx_long_fcs); 427 428 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXDROP, 429 TSI108_STAT_RXDROP_CARRY, 430 &data->stats.rx_missed_errors); 431 432 tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXBYTES, 433 TSI108_STAT_TXBYTES_CARRY, &data->stats.tx_bytes); 434 435 tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXPKTS, 436 TSI108_STAT_TXPKTS_CARRY, 437 &data->stats.tx_packets); 438 439 tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXEXDEF, 440 TSI108_STAT_TXEXDEF_CARRY, 441 &data->stats.tx_aborted_errors); 442 443 tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXEXCOL, 444 TSI108_STAT_TXEXCOL_CARRY, &data->tx_coll_abort); 445 446 tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXTCOL, 447 TSI108_STAT_TXTCOL_CARRY, 448 &data->stats.collisions); 449 450 tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXPAUSE, 451 TSI108_STAT_TXPAUSEDROP_CARRY, 452 &data->tx_pause_drop); 453 454 spin_unlock_irq(&data->misclock); 455} 456 457/* Read a stat counter atomically with respect to carries. 458 * data->misclock must be held. 459 */ 460static inline unsigned long 461tsi108_read_stat(struct tsi108_prv_data * data, int reg, int carry_bit, 462 int carry_shift, unsigned long *upper) 463{ 464 int carryreg; 465 unsigned long val; 466 467 if (reg < 0xb0) 468 carryreg = TSI108_STAT_CARRY1; 469 else 470 carryreg = TSI108_STAT_CARRY2; 471 472 again: 473 val = TSI_READ(reg) | *upper; 474 475 /* Check to see if it overflowed, but the interrupt hasn't 476 * been serviced yet. If so, handle the carry here, and 477 * try again. 478 */ 479 480 if (unlikely(TSI_READ(carryreg) & carry_bit)) { 481 *upper += carry_shift; 482 TSI_WRITE(carryreg, carry_bit); 483 goto again; 484 } 485 486 return val; 487} 488 489static struct net_device_stats *tsi108_get_stats(struct net_device *dev) 490{ 491 unsigned long excol; 492 493 struct tsi108_prv_data *data = netdev_priv(dev); 494 spin_lock_irq(&data->misclock); 495 496 data->tmpstats.rx_packets = 497 tsi108_read_stat(data, TSI108_STAT_RXPKTS, 498 TSI108_STAT_CARRY1_RXPKTS, 499 TSI108_STAT_RXPKTS_CARRY, &data->stats.rx_packets); 500 501 data->tmpstats.tx_packets = 502 tsi108_read_stat(data, TSI108_STAT_TXPKTS, 503 TSI108_STAT_CARRY2_TXPKTS, 504 TSI108_STAT_TXPKTS_CARRY, &data->stats.tx_packets); 505 506 data->tmpstats.rx_bytes = 507 tsi108_read_stat(data, TSI108_STAT_RXBYTES, 508 TSI108_STAT_CARRY1_RXBYTES, 509 TSI108_STAT_RXBYTES_CARRY, &data->stats.rx_bytes); 510 511 data->tmpstats.tx_bytes = 512 tsi108_read_stat(data, TSI108_STAT_TXBYTES, 513 TSI108_STAT_CARRY2_TXBYTES, 514 TSI108_STAT_TXBYTES_CARRY, &data->stats.tx_bytes); 515 516 data->tmpstats.multicast = 517 tsi108_read_stat(data, TSI108_STAT_RXMCAST, 518 TSI108_STAT_CARRY1_RXMCAST, 519 TSI108_STAT_RXMCAST_CARRY, &data->stats.multicast); 520 521 excol = tsi108_read_stat(data, TSI108_STAT_TXEXCOL, 522 TSI108_STAT_CARRY2_TXEXCOL, 523 TSI108_STAT_TXEXCOL_CARRY, 524 &data->tx_coll_abort); 525 526 data->tmpstats.collisions = 527 tsi108_read_stat(data, TSI108_STAT_TXTCOL, 528 TSI108_STAT_CARRY2_TXTCOL, 529 TSI108_STAT_TXTCOL_CARRY, &data->stats.collisions); 530 531 data->tmpstats.collisions += excol; 532 533 data->tmpstats.rx_length_errors = 534 tsi108_read_stat(data, TSI108_STAT_RXLENGTH, 535 TSI108_STAT_CARRY1_RXLENGTH, 536 TSI108_STAT_RXLENGTH_CARRY, 537 &data->stats.rx_length_errors); 538 539 data->tmpstats.rx_length_errors += 540 tsi108_read_stat(data, TSI108_STAT_RXRUNT, 541 TSI108_STAT_CARRY1_RXRUNT, 542 TSI108_STAT_RXRUNT_CARRY, &data->rx_underruns); 543 544 data->tmpstats.rx_length_errors += 545 tsi108_read_stat(data, TSI108_STAT_RXJUMBO, 546 TSI108_STAT_CARRY1_RXJUMBO, 547 TSI108_STAT_RXJUMBO_CARRY, &data->rx_overruns); 548 549 data->tmpstats.rx_frame_errors = 550 tsi108_read_stat(data, TSI108_STAT_RXALIGN, 551 TSI108_STAT_CARRY1_RXALIGN, 552 TSI108_STAT_RXALIGN_CARRY, 553 &data->stats.rx_frame_errors); 554 555 data->tmpstats.rx_frame_errors += 556 tsi108_read_stat(data, TSI108_STAT_RXFCS, 557 TSI108_STAT_CARRY1_RXFCS, TSI108_STAT_RXFCS_CARRY, 558 &data->rx_fcs); 559 560 data->tmpstats.rx_frame_errors += 561 tsi108_read_stat(data, TSI108_STAT_RXFRAG, 562 TSI108_STAT_CARRY1_RXFRAG, 563 TSI108_STAT_RXFRAG_CARRY, &data->rx_short_fcs); 564 565 data->tmpstats.rx_missed_errors = 566 tsi108_read_stat(data, TSI108_STAT_RXDROP, 567 TSI108_STAT_CARRY1_RXDROP, 568 TSI108_STAT_RXDROP_CARRY, 569 &data->stats.rx_missed_errors); 570 571 /* These three are maintained by software. */ 572 data->tmpstats.rx_fifo_errors = data->stats.rx_fifo_errors; 573 data->tmpstats.rx_crc_errors = data->stats.rx_crc_errors; 574 575 data->tmpstats.tx_aborted_errors = 576 tsi108_read_stat(data, TSI108_STAT_TXEXDEF, 577 TSI108_STAT_CARRY2_TXEXDEF, 578 TSI108_STAT_TXEXDEF_CARRY, 579 &data->stats.tx_aborted_errors); 580 581 data->tmpstats.tx_aborted_errors += 582 tsi108_read_stat(data, TSI108_STAT_TXPAUSEDROP, 583 TSI108_STAT_CARRY2_TXPAUSE, 584 TSI108_STAT_TXPAUSEDROP_CARRY, 585 &data->tx_pause_drop); 586 587 data->tmpstats.tx_aborted_errors += excol; 588 589 data->tmpstats.tx_errors = data->tmpstats.tx_aborted_errors; 590 data->tmpstats.rx_errors = data->tmpstats.rx_length_errors + 591 data->tmpstats.rx_crc_errors + 592 data->tmpstats.rx_frame_errors + 593 data->tmpstats.rx_fifo_errors + data->tmpstats.rx_missed_errors; 594 595 spin_unlock_irq(&data->misclock); 596 return &data->tmpstats; 597} 598 599static void tsi108_restart_rx(struct tsi108_prv_data * data, struct net_device *dev) 600{ 601 TSI_WRITE(TSI108_EC_RXQ_PTRHIGH, 602 TSI108_EC_RXQ_PTRHIGH_VALID); 603 604 TSI_WRITE(TSI108_EC_RXCTRL, TSI108_EC_RXCTRL_GO 605 | TSI108_EC_RXCTRL_QUEUE0); 606} 607 608static void tsi108_restart_tx(struct tsi108_prv_data * data) 609{ 610 TSI_WRITE(TSI108_EC_TXQ_PTRHIGH, 611 TSI108_EC_TXQ_PTRHIGH_VALID); 612 613 TSI_WRITE(TSI108_EC_TXCTRL, TSI108_EC_TXCTRL_IDLEINT | 614 TSI108_EC_TXCTRL_GO | TSI108_EC_TXCTRL_QUEUE0); 615} 616 617/* txlock must be held by caller, with IRQs disabled, and 618 * with permission to re-enable them when the lock is dropped. 619 */ 620static void tsi108_complete_tx(struct net_device *dev) 621{ 622 struct tsi108_prv_data *data = netdev_priv(dev); 623 int tx; 624 struct sk_buff *skb; 625 int release = 0; 626 627 while (!data->txfree || data->txhead != data->txtail) { 628 tx = data->txtail; 629 630 if (data->txring[tx].misc & TSI108_TX_OWN) 631 break; 632 633 skb = data->txskbs[tx]; 634 635 if (!(data->txring[tx].misc & TSI108_TX_OK)) 636 printk("%s: bad tx packet, misc %x\n", 637 dev->name, data->txring[tx].misc); 638 639 data->txtail = (data->txtail + 1) % TSI108_TXRING_LEN; 640 data->txfree++; 641 642 if (data->txring[tx].misc & TSI108_TX_EOF) { 643 dev_kfree_skb_any(skb); 644 release++; 645 } 646 } 647 648 if (release) { 649 if (is_valid_ether_addr(dev->dev_addr) && data->link_up) 650 netif_wake_queue(dev); 651 } 652} 653 654static int tsi108_send_packet(struct sk_buff * skb, struct net_device *dev) 655{ 656 struct tsi108_prv_data *data = netdev_priv(dev); 657 int frags = skb_shinfo(skb)->nr_frags + 1; 658 int i; 659 660 if (!data->phy_ok && net_ratelimit()) 661 printk(KERN_ERR "%s: Transmit while PHY is down!\n", dev->name); 662 663 if (!data->link_up) { 664 printk(KERN_ERR "%s: Transmit while link is down!\n", 665 dev->name); 666 netif_stop_queue(dev); 667 return NETDEV_TX_BUSY; 668 } 669 670 if (data->txfree < MAX_SKB_FRAGS + 1) { 671 netif_stop_queue(dev); 672 673 if (net_ratelimit()) 674 printk(KERN_ERR "%s: Transmit with full tx ring!\n", 675 dev->name); 676 return NETDEV_TX_BUSY; 677 } 678 679 if (data->txfree - frags < MAX_SKB_FRAGS + 1) { 680 netif_stop_queue(dev); 681 } 682 683 spin_lock_irq(&data->txlock); 684 685 for (i = 0; i < frags; i++) { 686 int misc = 0; 687 int tx = data->txhead; 688 689 /* This is done to mark every TSI108_TX_INT_FREQ tx buffers with 690 * the interrupt bit. TX descriptor-complete interrupts are 691 * enabled when the queue fills up, and masked when there is 692 * still free space. This way, when saturating the outbound 693 * link, the tx interrupts are kept to a reasonable level. 694 * When the queue is not full, reclamation of skbs still occurs 695 * as new packets are transmitted, or on a queue-empty 696 * interrupt. 697 */ 698 699 if ((tx % TSI108_TX_INT_FREQ == 0) && 700 ((TSI108_TXRING_LEN - data->txfree) >= TSI108_TX_INT_FREQ)) 701 misc = TSI108_TX_INT; 702 703 data->txskbs[tx] = skb; 704 705 if (i == 0) { 706 data->txring[tx].buf0 = dma_map_single(NULL, skb->data, 707 skb_headlen(skb), DMA_TO_DEVICE); 708 data->txring[tx].len = skb_headlen(skb); 709 misc |= TSI108_TX_SOF; 710 } else { 711 skb_frag_t *frag = &skb_shinfo(skb)->frags[i - 1]; 712 713 data->txring[tx].buf0 = 714 dma_map_page(NULL, frag->page, frag->page_offset, 715 frag->size, DMA_TO_DEVICE); 716 data->txring[tx].len = frag->size; 717 } 718 719 if (i == frags - 1) 720 misc |= TSI108_TX_EOF; 721 722 if (netif_msg_pktdata(data)) { 723 int i; 724 printk("%s: Tx Frame contents (%d)\n", dev->name, 725 skb->len); 726 for (i = 0; i < skb->len; i++) 727 printk(" %2.2x", skb->data[i]); 728 printk(".\n"); 729 } 730 data->txring[tx].misc = misc | TSI108_TX_OWN; 731 732 data->txhead = (data->txhead + 1) % TSI108_TXRING_LEN; 733 data->txfree--; 734 } 735 736 tsi108_complete_tx(dev); 737 738 /* This must be done after the check for completed tx descriptors, 739 * so that the tail pointer is correct. 740 */ 741 742 if (!(TSI_READ(TSI108_EC_TXSTAT) & TSI108_EC_TXSTAT_QUEUE0)) 743 tsi108_restart_tx(data); 744 745 spin_unlock_irq(&data->txlock); 746 return NETDEV_TX_OK; 747} 748 749static int tsi108_complete_rx(struct net_device *dev, int budget) 750{ 751 struct tsi108_prv_data *data = netdev_priv(dev); 752 int done = 0; 753 754 while (data->rxfree && done != budget) { 755 int rx = data->rxtail; 756 struct sk_buff *skb; 757 758 if (data->rxring[rx].misc & TSI108_RX_OWN) 759 break; 760 761 skb = data->rxskbs[rx]; 762 data->rxtail = (data->rxtail + 1) % TSI108_RXRING_LEN; 763 data->rxfree--; 764 done++; 765 766 if (data->rxring[rx].misc & TSI108_RX_BAD) { 767 spin_lock_irq(&data->misclock); 768 769 if (data->rxring[rx].misc & TSI108_RX_CRC) 770 data->stats.rx_crc_errors++; 771 if (data->rxring[rx].misc & TSI108_RX_OVER) 772 data->stats.rx_fifo_errors++; 773 774 spin_unlock_irq(&data->misclock); 775 776 dev_kfree_skb_any(skb); 777 continue; 778 } 779 if (netif_msg_pktdata(data)) { 780 int i; 781 printk("%s: Rx Frame contents (%d)\n", 782 dev->name, data->rxring[rx].len); 783 for (i = 0; i < data->rxring[rx].len; i++) 784 printk(" %2.2x", skb->data[i]); 785 printk(".\n"); 786 } 787 788 skb_put(skb, data->rxring[rx].len); 789 skb->protocol = eth_type_trans(skb, dev); 790 netif_receive_skb(skb); 791 } 792 793 return done; 794} 795 796static int tsi108_refill_rx(struct net_device *dev, int budget) 797{ 798 struct tsi108_prv_data *data = netdev_priv(dev); 799 int done = 0; 800 801 while (data->rxfree != TSI108_RXRING_LEN && done != budget) { 802 int rx = data->rxhead; 803 struct sk_buff *skb; 804 805 skb = netdev_alloc_skb_ip_align(dev, TSI108_RXBUF_SIZE); 806 data->rxskbs[rx] = skb; 807 if (!skb) 808 break; 809 810 data->rxring[rx].buf0 = dma_map_single(NULL, skb->data, 811 TSI108_RX_SKB_SIZE, 812 DMA_FROM_DEVICE); 813 814 /* Sometimes the hardware sets blen to zero after packet 815 * reception, even though the manual says that it's only ever 816 * modified by the driver. 817 */ 818 819 data->rxring[rx].blen = TSI108_RX_SKB_SIZE; 820 data->rxring[rx].misc = TSI108_RX_OWN | TSI108_RX_INT; 821 822 data->rxhead = (data->rxhead + 1) % TSI108_RXRING_LEN; 823 data->rxfree++; 824 done++; 825 } 826 827 if (done != 0 && !(TSI_READ(TSI108_EC_RXSTAT) & 828 TSI108_EC_RXSTAT_QUEUE0)) 829 tsi108_restart_rx(data, dev); 830 831 return done; 832} 833 834static int tsi108_poll(struct napi_struct *napi, int budget) 835{ 836 struct tsi108_prv_data *data = container_of(napi, struct tsi108_prv_data, napi); 837 struct net_device *dev = data->dev; 838 u32 estat = TSI_READ(TSI108_EC_RXESTAT); 839 u32 intstat = TSI_READ(TSI108_EC_INTSTAT); 840 int num_received = 0, num_filled = 0; 841 842 intstat &= TSI108_INT_RXQUEUE0 | TSI108_INT_RXTHRESH | 843 TSI108_INT_RXOVERRUN | TSI108_INT_RXERROR | TSI108_INT_RXWAIT; 844 845 TSI_WRITE(TSI108_EC_RXESTAT, estat); 846 TSI_WRITE(TSI108_EC_INTSTAT, intstat); 847 848 if (data->rxpending || (estat & TSI108_EC_RXESTAT_Q0_DESCINT)) 849 num_received = tsi108_complete_rx(dev, budget); 850 851 /* This should normally fill no more slots than the number of 852 * packets received in tsi108_complete_rx(). The exception 853 * is when we previously ran out of memory for RX SKBs. In that 854 * case, it's helpful to obey the budget, not only so that the 855 * CPU isn't hogged, but so that memory (which may still be low) 856 * is not hogged by one device. 857 * 858 * A work unit is considered to be two SKBs to allow us to catch 859 * up when the ring has shrunk due to out-of-memory but we're 860 * still removing the full budget's worth of packets each time. 861 */ 862 863 if (data->rxfree < TSI108_RXRING_LEN) 864 num_filled = tsi108_refill_rx(dev, budget * 2); 865 866 if (intstat & TSI108_INT_RXERROR) { 867 u32 err = TSI_READ(TSI108_EC_RXERR); 868 TSI_WRITE(TSI108_EC_RXERR, err); 869 870 if (err) { 871 if (net_ratelimit()) 872 printk(KERN_DEBUG "%s: RX error %x\n", 873 dev->name, err); 874 875 if (!(TSI_READ(TSI108_EC_RXSTAT) & 876 TSI108_EC_RXSTAT_QUEUE0)) 877 tsi108_restart_rx(data, dev); 878 } 879 } 880 881 if (intstat & TSI108_INT_RXOVERRUN) { 882 spin_lock_irq(&data->misclock); 883 data->stats.rx_fifo_errors++; 884 spin_unlock_irq(&data->misclock); 885 } 886 887 if (num_received < budget) { 888 data->rxpending = 0; 889 napi_complete(napi); 890 891 TSI_WRITE(TSI108_EC_INTMASK, 892 TSI_READ(TSI108_EC_INTMASK) 893 & ~(TSI108_INT_RXQUEUE0 894 | TSI108_INT_RXTHRESH | 895 TSI108_INT_RXOVERRUN | 896 TSI108_INT_RXERROR | 897 TSI108_INT_RXWAIT)); 898 } else { 899 data->rxpending = 1; 900 } 901 902 return num_received; 903} 904 905static void tsi108_rx_int(struct net_device *dev) 906{ 907 struct tsi108_prv_data *data = netdev_priv(dev); 908 909 /* A race could cause dev to already be scheduled, so it's not an 910 * error if that happens (and interrupts shouldn't be re-masked, 911 * because that can cause harmful races, if poll has already 912 * unmasked them but not cleared LINK_STATE_SCHED). 913 * 914 * This can happen if this code races with tsi108_poll(), which masks 915 * the interrupts after tsi108_irq_one() read the mask, but before 916 * napi_schedule is called. It could also happen due to calls 917 * from tsi108_check_rxring(). 918 */ 919 920 if (napi_schedule_prep(&data->napi)) { 921 /* Mask, rather than ack, the receive interrupts. The ack 922 * will happen in tsi108_poll(). 923 */ 924 925 TSI_WRITE(TSI108_EC_INTMASK, 926 TSI_READ(TSI108_EC_INTMASK) | 927 TSI108_INT_RXQUEUE0 928 | TSI108_INT_RXTHRESH | 929 TSI108_INT_RXOVERRUN | TSI108_INT_RXERROR | 930 TSI108_INT_RXWAIT); 931 __napi_schedule(&data->napi); 932 } else { 933 if (!netif_running(dev)) { 934 /* This can happen if an interrupt occurs while the 935 * interface is being brought down, as the START 936 * bit is cleared before the stop function is called. 937 * 938 * In this case, the interrupts must be masked, or 939 * they will continue indefinitely. 940 * 941 * There's a race here if the interface is brought down 942 * and then up in rapid succession, as the device could 943 * be made running after the above check and before 944 * the masking below. This will only happen if the IRQ 945 * thread has a lower priority than the task brining 946 * up the interface. Fixing this race would likely 947 * require changes in generic code. 948 */ 949 950 TSI_WRITE(TSI108_EC_INTMASK, 951 TSI_READ 952 (TSI108_EC_INTMASK) | 953 TSI108_INT_RXQUEUE0 | 954 TSI108_INT_RXTHRESH | 955 TSI108_INT_RXOVERRUN | 956 TSI108_INT_RXERROR | 957 TSI108_INT_RXWAIT); 958 } 959 } 960} 961 962/* If the RX ring has run out of memory, try periodically 963 * to allocate some more, as otherwise poll would never 964 * get called (apart from the initial end-of-queue condition). 965 * 966 * This is called once per second (by default) from the thread. 967 */ 968 969static void tsi108_check_rxring(struct net_device *dev) 970{ 971 struct tsi108_prv_data *data = netdev_priv(dev); 972 973 /* A poll is scheduled, as opposed to caling tsi108_refill_rx 974 * directly, so as to keep the receive path single-threaded 975 * (and thus not needing a lock). 976 */ 977 978 if (netif_running(dev) && data->rxfree < TSI108_RXRING_LEN / 4) 979 tsi108_rx_int(dev); 980} 981 982static void tsi108_tx_int(struct net_device *dev) 983{ 984 struct tsi108_prv_data *data = netdev_priv(dev); 985 u32 estat = TSI_READ(TSI108_EC_TXESTAT); 986 987 TSI_WRITE(TSI108_EC_TXESTAT, estat); 988 TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_TXQUEUE0 | 989 TSI108_INT_TXIDLE | TSI108_INT_TXERROR); 990 if (estat & TSI108_EC_TXESTAT_Q0_ERR) { 991 u32 err = TSI_READ(TSI108_EC_TXERR); 992 TSI_WRITE(TSI108_EC_TXERR, err); 993 994 if (err && net_ratelimit()) 995 printk(KERN_ERR "%s: TX error %x\n", dev->name, err); 996 } 997 998 if (estat & (TSI108_EC_TXESTAT_Q0_DESCINT | TSI108_EC_TXESTAT_Q0_EOQ)) { 999 spin_lock(&data->txlock); 1000 tsi108_complete_tx(dev); 1001 spin_unlock(&data->txlock); 1002 } 1003} 1004 1005 1006static irqreturn_t tsi108_irq(int irq, void *dev_id) 1007{ 1008 struct net_device *dev = dev_id; 1009 struct tsi108_prv_data *data = netdev_priv(dev); 1010 u32 stat = TSI_READ(TSI108_EC_INTSTAT); 1011 1012 if (!(stat & TSI108_INT_ANY)) 1013 return IRQ_NONE; /* Not our interrupt */ 1014 1015 stat &= ~TSI_READ(TSI108_EC_INTMASK); 1016 1017 if (stat & (TSI108_INT_TXQUEUE0 | TSI108_INT_TXIDLE | 1018 TSI108_INT_TXERROR)) 1019 tsi108_tx_int(dev); 1020 if (stat & (TSI108_INT_RXQUEUE0 | TSI108_INT_RXTHRESH | 1021 TSI108_INT_RXWAIT | TSI108_INT_RXOVERRUN | 1022 TSI108_INT_RXERROR)) 1023 tsi108_rx_int(dev); 1024 1025 if (stat & TSI108_INT_SFN) { 1026 if (net_ratelimit()) 1027 printk(KERN_DEBUG "%s: SFN error\n", dev->name); 1028 TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_SFN); 1029 } 1030 1031 if (stat & TSI108_INT_STATCARRY) { 1032 tsi108_stat_carry(dev); 1033 TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_STATCARRY); 1034 } 1035 1036 return IRQ_HANDLED; 1037} 1038 1039static void tsi108_stop_ethernet(struct net_device *dev) 1040{ 1041 struct tsi108_prv_data *data = netdev_priv(dev); 1042 int i = 1000; 1043 /* Disable all TX and RX queues ... */ 1044 TSI_WRITE(TSI108_EC_TXCTRL, 0); 1045 TSI_WRITE(TSI108_EC_RXCTRL, 0); 1046 1047 /* ...and wait for them to become idle */ 1048 while(i--) { 1049 if(!(TSI_READ(TSI108_EC_TXSTAT) & TSI108_EC_TXSTAT_ACTIVE)) 1050 break; 1051 udelay(10); 1052 } 1053 i = 1000; 1054 while(i--){ 1055 if(!(TSI_READ(TSI108_EC_RXSTAT) & TSI108_EC_RXSTAT_ACTIVE)) 1056 return; 1057 udelay(10); 1058 } 1059 printk(KERN_ERR "%s function time out\n", __func__); 1060} 1061 1062static void tsi108_reset_ether(struct tsi108_prv_data * data) 1063{ 1064 TSI_WRITE(TSI108_MAC_CFG1, TSI108_MAC_CFG1_SOFTRST); 1065 udelay(100); 1066 TSI_WRITE(TSI108_MAC_CFG1, 0); 1067 1068 TSI_WRITE(TSI108_EC_PORTCTRL, TSI108_EC_PORTCTRL_STATRST); 1069 udelay(100); 1070 TSI_WRITE(TSI108_EC_PORTCTRL, 1071 TSI_READ(TSI108_EC_PORTCTRL) & 1072 ~TSI108_EC_PORTCTRL_STATRST); 1073 1074 TSI_WRITE(TSI108_EC_TXCFG, TSI108_EC_TXCFG_RST); 1075 udelay(100); 1076 TSI_WRITE(TSI108_EC_TXCFG, 1077 TSI_READ(TSI108_EC_TXCFG) & 1078 ~TSI108_EC_TXCFG_RST); 1079 1080 TSI_WRITE(TSI108_EC_RXCFG, TSI108_EC_RXCFG_RST); 1081 udelay(100); 1082 TSI_WRITE(TSI108_EC_RXCFG, 1083 TSI_READ(TSI108_EC_RXCFG) & 1084 ~TSI108_EC_RXCFG_RST); 1085 1086 TSI_WRITE(TSI108_MAC_MII_MGMT_CFG, 1087 TSI_READ(TSI108_MAC_MII_MGMT_CFG) | 1088 TSI108_MAC_MII_MGMT_RST); 1089 udelay(100); 1090 TSI_WRITE(TSI108_MAC_MII_MGMT_CFG, 1091 (TSI_READ(TSI108_MAC_MII_MGMT_CFG) & 1092 ~(TSI108_MAC_MII_MGMT_RST | 1093 TSI108_MAC_MII_MGMT_CLK)) | 0x07); 1094} 1095 1096static int tsi108_get_mac(struct net_device *dev) 1097{ 1098 struct tsi108_prv_data *data = netdev_priv(dev); 1099 u32 word1 = TSI_READ(TSI108_MAC_ADDR1); 1100 u32 word2 = TSI_READ(TSI108_MAC_ADDR2); 1101 1102 /* Note that the octets are reversed from what the manual says, 1103 * producing an even weirder ordering... 1104 */ 1105 if (word2 == 0 && word1 == 0) { 1106 dev->dev_addr[0] = 0x00; 1107 dev->dev_addr[1] = 0x06; 1108 dev->dev_addr[2] = 0xd2; 1109 dev->dev_addr[3] = 0x00; 1110 dev->dev_addr[4] = 0x00; 1111 if (0x8 == data->phy) 1112 dev->dev_addr[5] = 0x01; 1113 else 1114 dev->dev_addr[5] = 0x02; 1115 1116 word2 = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 24); 1117 1118 word1 = (dev->dev_addr[2] << 0) | (dev->dev_addr[3] << 8) | 1119 (dev->dev_addr[4] << 16) | (dev->dev_addr[5] << 24); 1120 1121 TSI_WRITE(TSI108_MAC_ADDR1, word1); 1122 TSI_WRITE(TSI108_MAC_ADDR2, word2); 1123 } else { 1124 dev->dev_addr[0] = (word2 >> 16) & 0xff; 1125 dev->dev_addr[1] = (word2 >> 24) & 0xff; 1126 dev->dev_addr[2] = (word1 >> 0) & 0xff; 1127 dev->dev_addr[3] = (word1 >> 8) & 0xff; 1128 dev->dev_addr[4] = (word1 >> 16) & 0xff; 1129 dev->dev_addr[5] = (word1 >> 24) & 0xff; 1130 } 1131 1132 if (!is_valid_ether_addr(dev->dev_addr)) { 1133 printk(KERN_ERR 1134 "%s: Invalid MAC address. word1: %08x, word2: %08x\n", 1135 dev->name, word1, word2); 1136 return -EINVAL; 1137 } 1138 1139 return 0; 1140} 1141 1142static int tsi108_set_mac(struct net_device *dev, void *addr) 1143{ 1144 struct tsi108_prv_data *data = netdev_priv(dev); 1145 u32 word1, word2; 1146 int i; 1147 1148 if (!is_valid_ether_addr(addr)) 1149 return -EINVAL; 1150 1151 for (i = 0; i < 6; i++) 1152 /* +2 is for the offset of the HW addr type */ 1153 dev->dev_addr[i] = ((unsigned char *)addr)[i + 2]; 1154 1155 word2 = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 24); 1156 1157 word1 = (dev->dev_addr[2] << 0) | (dev->dev_addr[3] << 8) | 1158 (dev->dev_addr[4] << 16) | (dev->dev_addr[5] << 24); 1159 1160 spin_lock_irq(&data->misclock); 1161 TSI_WRITE(TSI108_MAC_ADDR1, word1); 1162 TSI_WRITE(TSI108_MAC_ADDR2, word2); 1163 spin_lock(&data->txlock); 1164 1165 if (data->txfree && data->link_up) 1166 netif_wake_queue(dev); 1167 1168 spin_unlock(&data->txlock); 1169 spin_unlock_irq(&data->misclock); 1170 return 0; 1171} 1172 1173/* Protected by dev->xmit_lock. */ 1174static void tsi108_set_rx_mode(struct net_device *dev) 1175{ 1176 struct tsi108_prv_data *data = netdev_priv(dev); 1177 u32 rxcfg = TSI_READ(TSI108_EC_RXCFG); 1178 1179 if (dev->flags & IFF_PROMISC) { 1180 rxcfg &= ~(TSI108_EC_RXCFG_UC_HASH | TSI108_EC_RXCFG_MC_HASH); 1181 rxcfg |= TSI108_EC_RXCFG_UFE | TSI108_EC_RXCFG_MFE; 1182 goto out; 1183 } 1184 1185 rxcfg &= ~(TSI108_EC_RXCFG_UFE | TSI108_EC_RXCFG_MFE); 1186 1187 if (dev->flags & IFF_ALLMULTI || !netdev_mc_empty(dev)) { 1188 int i; 1189 struct netdev_hw_addr *ha; 1190 rxcfg |= TSI108_EC_RXCFG_MFE | TSI108_EC_RXCFG_MC_HASH; 1191 1192 memset(data->mc_hash, 0, sizeof(data->mc_hash)); 1193 1194 netdev_for_each_mc_addr(ha, dev) { 1195 u32 hash, crc; 1196 1197 crc = ether_crc(6, ha->addr); 1198 hash = crc >> 23; 1199 __set_bit(hash, &data->mc_hash[0]); 1200 } 1201 1202 TSI_WRITE(TSI108_EC_HASHADDR, 1203 TSI108_EC_HASHADDR_AUTOINC | 1204 TSI108_EC_HASHADDR_MCAST); 1205 1206 for (i = 0; i < 16; i++) { 1207 /* The manual says that the hardware may drop 1208 * back-to-back writes to the data register. 1209 */ 1210 udelay(1); 1211 TSI_WRITE(TSI108_EC_HASHDATA, 1212 data->mc_hash[i]); 1213 } 1214 } 1215 1216 out: 1217 TSI_WRITE(TSI108_EC_RXCFG, rxcfg); 1218} 1219 1220static void tsi108_init_phy(struct net_device *dev) 1221{ 1222 struct tsi108_prv_data *data = netdev_priv(dev); 1223 u32 i = 0; 1224 u16 phyval = 0; 1225 unsigned long flags; 1226 1227 spin_lock_irqsave(&phy_lock, flags); 1228 1229 tsi108_write_mii(data, MII_BMCR, BMCR_RESET); 1230 while (--i) { 1231 if(!(tsi108_read_mii(data, MII_BMCR) & BMCR_RESET)) 1232 break; 1233 udelay(10); 1234 } 1235 if (i == 0) 1236 printk(KERN_ERR "%s function time out\n", __func__); 1237 1238 if (data->phy_type == TSI108_PHY_BCM54XX) { 1239 tsi108_write_mii(data, 0x09, 0x0300); 1240 tsi108_write_mii(data, 0x10, 0x1020); 1241 tsi108_write_mii(data, 0x1c, 0x8c00); 1242 } 1243 1244 tsi108_write_mii(data, 1245 MII_BMCR, 1246 BMCR_ANENABLE | BMCR_ANRESTART); 1247 while (tsi108_read_mii(data, MII_BMCR) & BMCR_ANRESTART) 1248 cpu_relax(); 1249 1250 /* Set G/MII mode and receive clock select in TBI control #2. The 1251 * second port won't work if this isn't done, even though we don't 1252 * use TBI mode. 1253 */ 1254 1255 tsi108_write_tbi(data, 0x11, 0x30); 1256 1257 1258 data->link_up = 0; 1259 1260 while (!((phyval = tsi108_read_mii(data, MII_BMSR)) & 1261 BMSR_LSTATUS)) { 1262 if (i++ > (MII_READ_DELAY / 10)) { 1263 break; 1264 } 1265 spin_unlock_irqrestore(&phy_lock, flags); 1266 msleep(10); 1267 spin_lock_irqsave(&phy_lock, flags); 1268 } 1269 1270 data->mii_if.supports_gmii = mii_check_gmii_support(&data->mii_if); 1271 printk(KERN_DEBUG "PHY_STAT reg contains %08x\n", phyval); 1272 data->phy_ok = 1; 1273 data->init_media = 1; 1274 spin_unlock_irqrestore(&phy_lock, flags); 1275} 1276 1277static void tsi108_kill_phy(struct net_device *dev) 1278{ 1279 struct tsi108_prv_data *data = netdev_priv(dev); 1280 unsigned long flags; 1281 1282 spin_lock_irqsave(&phy_lock, flags); 1283 tsi108_write_mii(data, MII_BMCR, BMCR_PDOWN); 1284 data->phy_ok = 0; 1285 spin_unlock_irqrestore(&phy_lock, flags); 1286} 1287 1288static int tsi108_open(struct net_device *dev) 1289{ 1290 int i; 1291 struct tsi108_prv_data *data = netdev_priv(dev); 1292 unsigned int rxring_size = TSI108_RXRING_LEN * sizeof(rx_desc); 1293 unsigned int txring_size = TSI108_TXRING_LEN * sizeof(tx_desc); 1294 1295 i = request_irq(data->irq_num, tsi108_irq, 0, dev->name, dev); 1296 if (i != 0) { 1297 printk(KERN_ERR "tsi108_eth%d: Could not allocate IRQ%d.\n", 1298 data->id, data->irq_num); 1299 return i; 1300 } else { 1301 dev->irq = data->irq_num; 1302 printk(KERN_NOTICE 1303 "tsi108_open : Port %d Assigned IRQ %d to %s\n", 1304 data->id, dev->irq, dev->name); 1305 } 1306 1307 data->rxring = dma_alloc_coherent(NULL, rxring_size, 1308 &data->rxdma, GFP_KERNEL); 1309 1310 if (!data->rxring) { 1311 printk(KERN_DEBUG 1312 "TSI108_ETH: failed to allocate memory for rxring!\n"); 1313 return -ENOMEM; 1314 } else { 1315 memset(data->rxring, 0, rxring_size); 1316 } 1317 1318 data->txring = dma_alloc_coherent(NULL, txring_size, 1319 &data->txdma, GFP_KERNEL); 1320 1321 if (!data->txring) { 1322 printk(KERN_DEBUG 1323 "TSI108_ETH: failed to allocate memory for txring!\n"); 1324 pci_free_consistent(0, rxring_size, data->rxring, data->rxdma); 1325 return -ENOMEM; 1326 } else { 1327 memset(data->txring, 0, txring_size); 1328 } 1329 1330 for (i = 0; i < TSI108_RXRING_LEN; i++) { 1331 data->rxring[i].next0 = data->rxdma + (i + 1) * sizeof(rx_desc); 1332 data->rxring[i].blen = TSI108_RXBUF_SIZE; 1333 data->rxring[i].vlan = 0; 1334 } 1335 1336 data->rxring[TSI108_RXRING_LEN - 1].next0 = data->rxdma; 1337 1338 data->rxtail = 0; 1339 data->rxhead = 0; 1340 1341 for (i = 0; i < TSI108_RXRING_LEN; i++) { 1342 struct sk_buff *skb; 1343 1344 skb = netdev_alloc_skb_ip_align(dev, TSI108_RXBUF_SIZE); 1345 if (!skb) { 1346 /* Bah. No memory for now, but maybe we'll get 1347 * some more later. 1348 * For now, we'll live with the smaller ring. 1349 */ 1350 printk(KERN_WARNING 1351 "%s: Could only allocate %d receive skb(s).\n", 1352 dev->name, i); 1353 data->rxhead = i; 1354 break; 1355 } 1356 1357 data->rxskbs[i] = skb; 1358 data->rxskbs[i] = skb; 1359 data->rxring[i].buf0 = virt_to_phys(data->rxskbs[i]->data); 1360 data->rxring[i].misc = TSI108_RX_OWN | TSI108_RX_INT; 1361 } 1362 1363 data->rxfree = i; 1364 TSI_WRITE(TSI108_EC_RXQ_PTRLOW, data->rxdma); 1365 1366 for (i = 0; i < TSI108_TXRING_LEN; i++) { 1367 data->txring[i].next0 = data->txdma + (i + 1) * sizeof(tx_desc); 1368 data->txring[i].misc = 0; 1369 } 1370 1371 data->txring[TSI108_TXRING_LEN - 1].next0 = data->txdma; 1372 data->txtail = 0; 1373 data->txhead = 0; 1374 data->txfree = TSI108_TXRING_LEN; 1375 TSI_WRITE(TSI108_EC_TXQ_PTRLOW, data->txdma); 1376 tsi108_init_phy(dev); 1377 1378 napi_enable(&data->napi); 1379 1380 setup_timer(&data->timer, tsi108_timed_checker, (unsigned long)dev); 1381 mod_timer(&data->timer, jiffies + 1); 1382 1383 tsi108_restart_rx(data, dev); 1384 1385 TSI_WRITE(TSI108_EC_INTSTAT, ~0); 1386 1387 TSI_WRITE(TSI108_EC_INTMASK, 1388 ~(TSI108_INT_TXQUEUE0 | TSI108_INT_RXERROR | 1389 TSI108_INT_RXTHRESH | TSI108_INT_RXQUEUE0 | 1390 TSI108_INT_RXOVERRUN | TSI108_INT_RXWAIT | 1391 TSI108_INT_SFN | TSI108_INT_STATCARRY)); 1392 1393 TSI_WRITE(TSI108_MAC_CFG1, 1394 TSI108_MAC_CFG1_RXEN | TSI108_MAC_CFG1_TXEN); 1395 netif_start_queue(dev); 1396 return 0; 1397} 1398 1399static int tsi108_close(struct net_device *dev) 1400{ 1401 struct tsi108_prv_data *data = netdev_priv(dev); 1402 1403 netif_stop_queue(dev); 1404 napi_disable(&data->napi); 1405 1406 del_timer_sync(&data->timer); 1407 1408 tsi108_stop_ethernet(dev); 1409 tsi108_kill_phy(dev); 1410 TSI_WRITE(TSI108_EC_INTMASK, ~0); 1411 TSI_WRITE(TSI108_MAC_CFG1, 0); 1412 1413 /* Check for any pending TX packets, and drop them. */ 1414 1415 while (!data->txfree || data->txhead != data->txtail) { 1416 int tx = data->txtail; 1417 struct sk_buff *skb; 1418 skb = data->txskbs[tx]; 1419 data->txtail = (data->txtail + 1) % TSI108_TXRING_LEN; 1420 data->txfree++; 1421 dev_kfree_skb(skb); 1422 } 1423 1424 free_irq(data->irq_num, dev); 1425 1426 /* Discard the RX ring. */ 1427 1428 while (data->rxfree) { 1429 int rx = data->rxtail; 1430 struct sk_buff *skb; 1431 1432 skb = data->rxskbs[rx]; 1433 data->rxtail = (data->rxtail + 1) % TSI108_RXRING_LEN; 1434 data->rxfree--; 1435 dev_kfree_skb(skb); 1436 } 1437 1438 dma_free_coherent(0, 1439 TSI108_RXRING_LEN * sizeof(rx_desc), 1440 data->rxring, data->rxdma); 1441 dma_free_coherent(0, 1442 TSI108_TXRING_LEN * sizeof(tx_desc), 1443 data->txring, data->txdma); 1444 1445 return 0; 1446} 1447 1448static void tsi108_init_mac(struct net_device *dev) 1449{ 1450 struct tsi108_prv_data *data = netdev_priv(dev); 1451 1452 TSI_WRITE(TSI108_MAC_CFG2, TSI108_MAC_CFG2_DFLT_PREAMBLE | 1453 TSI108_MAC_CFG2_PADCRC); 1454 1455 TSI_WRITE(TSI108_EC_TXTHRESH, 1456 (192 << TSI108_EC_TXTHRESH_STARTFILL) | 1457 (192 << TSI108_EC_TXTHRESH_STOPFILL)); 1458 1459 TSI_WRITE(TSI108_STAT_CARRYMASK1, 1460 ~(TSI108_STAT_CARRY1_RXBYTES | 1461 TSI108_STAT_CARRY1_RXPKTS | 1462 TSI108_STAT_CARRY1_RXFCS | 1463 TSI108_STAT_CARRY1_RXMCAST | 1464 TSI108_STAT_CARRY1_RXALIGN | 1465 TSI108_STAT_CARRY1_RXLENGTH | 1466 TSI108_STAT_CARRY1_RXRUNT | 1467 TSI108_STAT_CARRY1_RXJUMBO | 1468 TSI108_STAT_CARRY1_RXFRAG | 1469 TSI108_STAT_CARRY1_RXJABBER | 1470 TSI108_STAT_CARRY1_RXDROP)); 1471 1472 TSI_WRITE(TSI108_STAT_CARRYMASK2, 1473 ~(TSI108_STAT_CARRY2_TXBYTES | 1474 TSI108_STAT_CARRY2_TXPKTS | 1475 TSI108_STAT_CARRY2_TXEXDEF | 1476 TSI108_STAT_CARRY2_TXEXCOL | 1477 TSI108_STAT_CARRY2_TXTCOL | 1478 TSI108_STAT_CARRY2_TXPAUSE)); 1479 1480 TSI_WRITE(TSI108_EC_PORTCTRL, TSI108_EC_PORTCTRL_STATEN); 1481 TSI_WRITE(TSI108_MAC_CFG1, 0); 1482 1483 TSI_WRITE(TSI108_EC_RXCFG, 1484 TSI108_EC_RXCFG_SE | TSI108_EC_RXCFG_BFE); 1485 1486 TSI_WRITE(TSI108_EC_TXQ_CFG, TSI108_EC_TXQ_CFG_DESC_INT | 1487 TSI108_EC_TXQ_CFG_EOQ_OWN_INT | 1488 TSI108_EC_TXQ_CFG_WSWP | (TSI108_PBM_PORT << 1489 TSI108_EC_TXQ_CFG_SFNPORT)); 1490 1491 TSI_WRITE(TSI108_EC_RXQ_CFG, TSI108_EC_RXQ_CFG_DESC_INT | 1492 TSI108_EC_RXQ_CFG_EOQ_OWN_INT | 1493 TSI108_EC_RXQ_CFG_WSWP | (TSI108_PBM_PORT << 1494 TSI108_EC_RXQ_CFG_SFNPORT)); 1495 1496 TSI_WRITE(TSI108_EC_TXQ_BUFCFG, 1497 TSI108_EC_TXQ_BUFCFG_BURST256 | 1498 TSI108_EC_TXQ_BUFCFG_BSWP | (TSI108_PBM_PORT << 1499 TSI108_EC_TXQ_BUFCFG_SFNPORT)); 1500 1501 TSI_WRITE(TSI108_EC_RXQ_BUFCFG, 1502 TSI108_EC_RXQ_BUFCFG_BURST256 | 1503 TSI108_EC_RXQ_BUFCFG_BSWP | (TSI108_PBM_PORT << 1504 TSI108_EC_RXQ_BUFCFG_SFNPORT)); 1505 1506 TSI_WRITE(TSI108_EC_INTMASK, ~0); 1507} 1508 1509static int tsi108_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) 1510{ 1511 struct tsi108_prv_data *data = netdev_priv(dev); 1512 unsigned long flags; 1513 int rc; 1514 1515 spin_lock_irqsave(&data->txlock, flags); 1516 rc = mii_ethtool_gset(&data->mii_if, cmd); 1517 spin_unlock_irqrestore(&data->txlock, flags); 1518 1519 return rc; 1520} 1521 1522static int tsi108_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) 1523{ 1524 struct tsi108_prv_data *data = netdev_priv(dev); 1525 unsigned long flags; 1526 int rc; 1527 1528 spin_lock_irqsave(&data->txlock, flags); 1529 rc = mii_ethtool_sset(&data->mii_if, cmd); 1530 spin_unlock_irqrestore(&data->txlock, flags); 1531 1532 return rc; 1533} 1534 1535static int tsi108_do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) 1536{ 1537 struct tsi108_prv_data *data = netdev_priv(dev); 1538 if (!netif_running(dev)) 1539 return -EINVAL; 1540 return generic_mii_ioctl(&data->mii_if, if_mii(rq), cmd, NULL); 1541} 1542 1543static const struct ethtool_ops tsi108_ethtool_ops = { 1544 .get_link = ethtool_op_get_link, 1545 .get_settings = tsi108_get_settings, 1546 .set_settings = tsi108_set_settings, 1547}; 1548 1549static const struct net_device_ops tsi108_netdev_ops = { 1550 .ndo_open = tsi108_open, 1551 .ndo_stop = tsi108_close, 1552 .ndo_start_xmit = tsi108_send_packet, 1553 .ndo_set_multicast_list = tsi108_set_rx_mode, 1554 .ndo_get_stats = tsi108_get_stats, 1555 .ndo_do_ioctl = tsi108_do_ioctl, 1556 .ndo_set_mac_address = tsi108_set_mac, 1557 .ndo_validate_addr = eth_validate_addr, 1558 .ndo_change_mtu = eth_change_mtu, 1559}; 1560 1561static int 1562tsi108_init_one(struct platform_device *pdev) 1563{ 1564 struct net_device *dev = NULL; 1565 struct tsi108_prv_data *data = NULL; 1566 hw_info *einfo; 1567 int err = 0; 1568 1569 einfo = pdev->dev.platform_data; 1570 1571 if (NULL == einfo) { 1572 printk(KERN_ERR "tsi-eth %d: Missing additional data!\n", 1573 pdev->id); 1574 return -ENODEV; 1575 } 1576 1577 /* Create an ethernet device instance */ 1578 1579 dev = alloc_etherdev(sizeof(struct tsi108_prv_data)); 1580 if (!dev) { 1581 printk("tsi108_eth: Could not allocate a device structure\n"); 1582 return -ENOMEM; 1583 } 1584 1585 printk("tsi108_eth%d: probe...\n", pdev->id); 1586 data = netdev_priv(dev); 1587 data->dev = dev; 1588 1589 pr_debug("tsi108_eth%d:regs:phyresgs:phy:irq_num=0x%x:0x%x:0x%x:0x%x\n", 1590 pdev->id, einfo->regs, einfo->phyregs, 1591 einfo->phy, einfo->irq_num); 1592 1593 data->regs = ioremap(einfo->regs, 0x400); 1594 if (NULL == data->regs) { 1595 err = -ENOMEM; 1596 goto regs_fail; 1597 } 1598 1599 data->phyregs = ioremap(einfo->phyregs, 0x400); 1600 if (NULL == data->phyregs) { 1601 err = -ENOMEM; 1602 goto regs_fail; 1603 } 1604/* MII setup */ 1605 data->mii_if.dev = dev; 1606 data->mii_if.mdio_read = tsi108_mdio_read; 1607 data->mii_if.mdio_write = tsi108_mdio_write; 1608 data->mii_if.phy_id = einfo->phy; 1609 data->mii_if.phy_id_mask = 0x1f; 1610 data->mii_if.reg_num_mask = 0x1f; 1611 1612 data->phy = einfo->phy; 1613 data->phy_type = einfo->phy_type; 1614 data->irq_num = einfo->irq_num; 1615 data->id = pdev->id; 1616 netif_napi_add(dev, &data->napi, tsi108_poll, 64); 1617 dev->netdev_ops = &tsi108_netdev_ops; 1618 dev->ethtool_ops = &tsi108_ethtool_ops; 1619 1620 /* Apparently, the Linux networking code won't use scatter-gather 1621 * if the hardware doesn't do checksums. However, it's faster 1622 * to checksum in place and use SG, as (among other reasons) 1623 * the cache won't be dirtied (which then has to be flushed 1624 * before DMA). The checksumming is done by the driver (via 1625 * a new function skb_csum_dev() in net/core/skbuff.c). 1626 */ 1627 1628 dev->features = NETIF_F_HIGHDMA; 1629 1630 spin_lock_init(&data->txlock); 1631 spin_lock_init(&data->misclock); 1632 1633 tsi108_reset_ether(data); 1634 tsi108_kill_phy(dev); 1635 1636 if ((err = tsi108_get_mac(dev)) != 0) { 1637 printk(KERN_ERR "%s: Invalid MAC address. Please correct.\n", 1638 dev->name); 1639 goto register_fail; 1640 } 1641 1642 tsi108_init_mac(dev); 1643 err = register_netdev(dev); 1644 if (err) { 1645 printk(KERN_ERR "%s: Cannot register net device, aborting.\n", 1646 dev->name); 1647 goto register_fail; 1648 } 1649 1650 platform_set_drvdata(pdev, dev); 1651 printk(KERN_INFO "%s: Tsi108 Gigabit Ethernet, MAC: %pM\n", 1652 dev->name, dev->dev_addr); 1653#ifdef DEBUG 1654 data->msg_enable = DEBUG; 1655 dump_eth_one(dev); 1656#endif 1657 1658 return 0; 1659 1660register_fail: 1661 iounmap(data->regs); 1662 iounmap(data->phyregs); 1663 1664regs_fail: 1665 free_netdev(dev); 1666 return err; 1667} 1668 1669/* There's no way to either get interrupts from the PHY when 1670 * something changes, or to have the Tsi108 automatically communicate 1671 * with the PHY to reconfigure itself. 1672 * 1673 * Thus, we have to do it using a timer. 1674 */ 1675 1676static void tsi108_timed_checker(unsigned long dev_ptr) 1677{ 1678 struct net_device *dev = (struct net_device *)dev_ptr; 1679 struct tsi108_prv_data *data = netdev_priv(dev); 1680 1681 tsi108_check_phy(dev); 1682 tsi108_check_rxring(dev); 1683 mod_timer(&data->timer, jiffies + CHECK_PHY_INTERVAL); 1684} 1685 1686static int tsi108_ether_init(void) 1687{ 1688 int ret; 1689 ret = platform_driver_register (&tsi_eth_driver); 1690 if (ret < 0){ 1691 printk("tsi108_ether_init: error initializing ethernet " 1692 "device\n"); 1693 return ret; 1694 } 1695 return 0; 1696} 1697 1698static int tsi108_ether_remove(struct platform_device *pdev) 1699{ 1700 struct net_device *dev = platform_get_drvdata(pdev); 1701 struct tsi108_prv_data *priv = netdev_priv(dev); 1702 1703 unregister_netdev(dev); 1704 tsi108_stop_ethernet(dev); 1705 platform_set_drvdata(pdev, NULL); 1706 iounmap(priv->regs); 1707 iounmap(priv->phyregs); 1708 free_netdev(dev); 1709 1710 return 0; 1711} 1712static void tsi108_ether_exit(void) 1713{ 1714 platform_driver_unregister(&tsi_eth_driver); 1715} 1716 1717module_init(tsi108_ether_init); 1718module_exit(tsi108_ether_exit); 1719 1720MODULE_AUTHOR("Tundra Semiconductor Corporation"); 1721MODULE_DESCRIPTION("Tsi108 Gigabit Ethernet driver"); 1722MODULE_LICENSE("GPL"); 1723MODULE_ALIAS("platform:tsi-ethernet"); 1724