1/* $Id: sunlance.c,v 1.112 2002/01/15 06:48:55 Exp $ 2 * lance.c: Linux/Sparc/Lance driver 3 * 4 * Written 1995, 1996 by Miguel de Icaza 5 * Sources: 6 * The Linux depca driver 7 * The Linux lance driver. 8 * The Linux skeleton driver. 9 * The NetBSD Sparc/Lance driver. 10 * Theo de Raadt (deraadt@openbsd.org) 11 * NCR92C990 Lan Controller manual 12 * 13 * 1.4: 14 * Added support to run with a ledma on the Sun4m 15 * 16 * 1.5: 17 * Added multiple card detection. 18 * 19 * 4/17/96: Burst sizes and tpe selection on sun4m by Eddie C. Dost 20 * (ecd@skynet.be) 21 * 22 * 5/15/96: auto carrier detection on sun4m by Eddie C. Dost 23 * (ecd@skynet.be) 24 * 25 * 5/17/96: lebuffer on scsi/ether cards now work David S. Miller 26 * (davem@caip.rutgers.edu) 27 * 28 * 5/29/96: override option 'tpe-link-test?', if it is 'false', as 29 * this disables auto carrier detection on sun4m. Eddie C. Dost 30 * (ecd@skynet.be) 31 * 32 * 1.7: 33 * 6/26/96: Bug fix for multiple ledmas, miguel. 34 * 35 * 1.8: 36 * Stole multicast code from depca.c, fixed lance_tx. 37 * 38 * 1.9: 39 * 8/21/96: Fixed the multicast code (Pedro Roque) 40 * 41 * 8/28/96: Send fake packet in lance_open() if auto_select is true, 42 * so we can detect the carrier loss condition in time. 43 * Eddie C. Dost (ecd@skynet.be) 44 * 45 * 9/15/96: Align rx_buf so that eth_copy_and_sum() won't cause an 46 * MNA trap during chksum_partial_copy(). (ecd@skynet.be) 47 * 48 * 11/17/96: Handle LE_C0_MERR in lance_interrupt(). (ecd@skynet.be) 49 * 50 * 12/22/96: Don't loop forever in lance_rx() on incomplete packets. 51 * This was the sun4c killer. Shit, stupid bug. 52 * (ecd@skynet.be) 53 * 54 * 1.10: 55 * 1/26/97: Modularize driver. (ecd@skynet.be) 56 * 57 * 1.11: 58 * 12/27/97: Added sun4d support. (jj@sunsite.mff.cuni.cz) 59 * 60 * 1.12: 61 * 11/3/99: Fixed SMP race in lance_start_xmit found by davem. 62 * Anton Blanchard (anton@progsoc.uts.edu.au) 63 * 2.00: 11/9/99: Massive overhaul and port to new SBUS driver interfaces. 64 * David S. Miller (davem@redhat.com) 65 * 2.01: 66 * 11/08/01: Use library crc32 functions (Matt_Domsch@dell.com) 67 * 68 */ 69 70#undef DEBUG_DRIVER 71 72static char lancestr[] = "LANCE"; 73 74#include <linux/module.h> 75#include <linux/kernel.h> 76#include <linux/types.h> 77#include <linux/fcntl.h> 78#include <linux/interrupt.h> 79#include <linux/ioport.h> 80#include <linux/in.h> 81#include <linux/string.h> 82#include <linux/delay.h> 83#include <linux/init.h> 84#include <linux/crc32.h> 85#include <linux/errno.h> 86#include <linux/socket.h> /* Used for the temporal inet entries and routing */ 87#include <linux/route.h> 88#include <linux/netdevice.h> 89#include <linux/etherdevice.h> 90#include <linux/skbuff.h> 91#include <linux/ethtool.h> 92#include <linux/bitops.h> 93#include <linux/dma-mapping.h> 94#include <linux/of.h> 95#include <linux/of_device.h> 96#include <linux/gfp.h> 97 98#include <asm/system.h> 99#include <asm/io.h> 100#include <asm/dma.h> 101#include <asm/pgtable.h> 102#include <asm/byteorder.h> /* Used by the checksum routines */ 103#include <asm/idprom.h> 104#include <asm/prom.h> 105#include <asm/auxio.h> /* For tpe-link-test? setting */ 106#include <asm/irq.h> 107 108#define DRV_NAME "sunlance" 109#define DRV_VERSION "2.02" 110#define DRV_RELDATE "8/24/03" 111#define DRV_AUTHOR "Miguel de Icaza (miguel@nuclecu.unam.mx)" 112 113static char version[] = 114 DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " " DRV_AUTHOR "\n"; 115 116MODULE_VERSION(DRV_VERSION); 117MODULE_AUTHOR(DRV_AUTHOR); 118MODULE_DESCRIPTION("Sun Lance ethernet driver"); 119MODULE_LICENSE("GPL"); 120 121/* Define: 2^4 Tx buffers and 2^4 Rx buffers */ 122#ifndef LANCE_LOG_TX_BUFFERS 123#define LANCE_LOG_TX_BUFFERS 4 124#define LANCE_LOG_RX_BUFFERS 4 125#endif 126 127#define LE_CSR0 0 128#define LE_CSR1 1 129#define LE_CSR2 2 130#define LE_CSR3 3 131 132#define LE_MO_PROM 0x8000 /* Enable promiscuous mode */ 133 134#define LE_C0_ERR 0x8000 /* Error: set if BAB, SQE, MISS or ME is set */ 135#define LE_C0_BABL 0x4000 /* BAB: Babble: tx timeout. */ 136#define LE_C0_CERR 0x2000 /* SQE: Signal quality error */ 137#define LE_C0_MISS 0x1000 /* MISS: Missed a packet */ 138#define LE_C0_MERR 0x0800 /* ME: Memory error */ 139#define LE_C0_RINT 0x0400 /* Received interrupt */ 140#define LE_C0_TINT 0x0200 /* Transmitter Interrupt */ 141#define LE_C0_IDON 0x0100 /* IFIN: Init finished. */ 142#define LE_C0_INTR 0x0080 /* Interrupt or error */ 143#define LE_C0_INEA 0x0040 /* Interrupt enable */ 144#define LE_C0_RXON 0x0020 /* Receiver on */ 145#define LE_C0_TXON 0x0010 /* Transmitter on */ 146#define LE_C0_TDMD 0x0008 /* Transmitter demand */ 147#define LE_C0_STOP 0x0004 /* Stop the card */ 148#define LE_C0_STRT 0x0002 /* Start the card */ 149#define LE_C0_INIT 0x0001 /* Init the card */ 150 151#define LE_C3_BSWP 0x4 /* SWAP */ 152#define LE_C3_ACON 0x2 /* ALE Control */ 153#define LE_C3_BCON 0x1 /* Byte control */ 154 155/* Receive message descriptor 1 */ 156#define LE_R1_OWN 0x80 /* Who owns the entry */ 157#define LE_R1_ERR 0x40 /* Error: if FRA, OFL, CRC or BUF is set */ 158#define LE_R1_FRA 0x20 /* FRA: Frame error */ 159#define LE_R1_OFL 0x10 /* OFL: Frame overflow */ 160#define LE_R1_CRC 0x08 /* CRC error */ 161#define LE_R1_BUF 0x04 /* BUF: Buffer error */ 162#define LE_R1_SOP 0x02 /* Start of packet */ 163#define LE_R1_EOP 0x01 /* End of packet */ 164#define LE_R1_POK 0x03 /* Packet is complete: SOP + EOP */ 165 166#define LE_T1_OWN 0x80 /* Lance owns the packet */ 167#define LE_T1_ERR 0x40 /* Error summary */ 168#define LE_T1_EMORE 0x10 /* Error: more than one retry needed */ 169#define LE_T1_EONE 0x08 /* Error: one retry needed */ 170#define LE_T1_EDEF 0x04 /* Error: deferred */ 171#define LE_T1_SOP 0x02 /* Start of packet */ 172#define LE_T1_EOP 0x01 /* End of packet */ 173#define LE_T1_POK 0x03 /* Packet is complete: SOP + EOP */ 174 175#define LE_T3_BUF 0x8000 /* Buffer error */ 176#define LE_T3_UFL 0x4000 /* Error underflow */ 177#define LE_T3_LCOL 0x1000 /* Error late collision */ 178#define LE_T3_CLOS 0x0800 /* Error carrier loss */ 179#define LE_T3_RTY 0x0400 /* Error retry */ 180#define LE_T3_TDR 0x03ff /* Time Domain Reflectometry counter */ 181 182#define TX_RING_SIZE (1 << (LANCE_LOG_TX_BUFFERS)) 183#define TX_RING_MOD_MASK (TX_RING_SIZE - 1) 184#define TX_RING_LEN_BITS ((LANCE_LOG_TX_BUFFERS) << 29) 185#define TX_NEXT(__x) (((__x)+1) & TX_RING_MOD_MASK) 186 187#define RX_RING_SIZE (1 << (LANCE_LOG_RX_BUFFERS)) 188#define RX_RING_MOD_MASK (RX_RING_SIZE - 1) 189#define RX_RING_LEN_BITS ((LANCE_LOG_RX_BUFFERS) << 29) 190#define RX_NEXT(__x) (((__x)+1) & RX_RING_MOD_MASK) 191 192#define PKT_BUF_SZ 1544 193#define RX_BUFF_SIZE PKT_BUF_SZ 194#define TX_BUFF_SIZE PKT_BUF_SZ 195 196struct lance_rx_desc { 197 u16 rmd0; /* low address of packet */ 198 u8 rmd1_bits; /* descriptor bits */ 199 u8 rmd1_hadr; /* high address of packet */ 200 s16 length; /* This length is 2s complement (negative)! 201 * Buffer length 202 */ 203 u16 mblength; /* This is the actual number of bytes received */ 204}; 205 206struct lance_tx_desc { 207 u16 tmd0; /* low address of packet */ 208 u8 tmd1_bits; /* descriptor bits */ 209 u8 tmd1_hadr; /* high address of packet */ 210 s16 length; /* Length is 2s complement (negative)! */ 211 u16 misc; 212}; 213 214/* The LANCE initialization block, described in databook. */ 215/* On the Sparc, this block should be on a DMA region */ 216struct lance_init_block { 217 u16 mode; /* Pre-set mode (reg. 15) */ 218 u8 phys_addr[6]; /* Physical ethernet address */ 219 u32 filter[2]; /* Multicast filter. */ 220 221 /* Receive and transmit ring base, along with extra bits. */ 222 u16 rx_ptr; /* receive descriptor addr */ 223 u16 rx_len; /* receive len and high addr */ 224 u16 tx_ptr; /* transmit descriptor addr */ 225 u16 tx_len; /* transmit len and high addr */ 226 227 /* The Tx and Rx ring entries must aligned on 8-byte boundaries. */ 228 struct lance_rx_desc brx_ring[RX_RING_SIZE]; 229 struct lance_tx_desc btx_ring[TX_RING_SIZE]; 230 231 u8 tx_buf [TX_RING_SIZE][TX_BUFF_SIZE]; 232 u8 pad[2]; /* align rx_buf for copy_and_sum(). */ 233 u8 rx_buf [RX_RING_SIZE][RX_BUFF_SIZE]; 234}; 235 236#define libdesc_offset(rt, elem) \ 237((__u32)(((unsigned long)(&(((struct lance_init_block *)0)->rt[elem]))))) 238 239#define libbuff_offset(rt, elem) \ 240((__u32)(((unsigned long)(&(((struct lance_init_block *)0)->rt[elem][0]))))) 241 242struct lance_private { 243 void __iomem *lregs; /* Lance RAP/RDP regs. */ 244 void __iomem *dregs; /* DMA controller regs. */ 245 struct lance_init_block __iomem *init_block_iomem; 246 struct lance_init_block *init_block_mem; 247 248 spinlock_t lock; 249 250 int rx_new, tx_new; 251 int rx_old, tx_old; 252 253 struct platform_device *ledma; /* If set this points to ledma */ 254 char tpe; /* cable-selection is TPE */ 255 char auto_select; /* cable-selection by carrier */ 256 char burst_sizes; /* ledma SBus burst sizes */ 257 char pio_buffer; /* init block in PIO space? */ 258 259 unsigned short busmaster_regval; 260 261 void (*init_ring)(struct net_device *); 262 void (*rx)(struct net_device *); 263 void (*tx)(struct net_device *); 264 265 char *name; 266 dma_addr_t init_block_dvma; 267 struct net_device *dev; /* Backpointer */ 268 struct platform_device *op; 269 struct platform_device *lebuffer; 270 struct timer_list multicast_timer; 271}; 272 273#define TX_BUFFS_AVAIL ((lp->tx_old<=lp->tx_new)?\ 274 lp->tx_old+TX_RING_MOD_MASK-lp->tx_new:\ 275 lp->tx_old - lp->tx_new-1) 276 277/* Lance registers. */ 278#define RDP 0x00UL /* register data port */ 279#define RAP 0x02UL /* register address port */ 280#define LANCE_REG_SIZE 0x04UL 281 282#define STOP_LANCE(__lp) \ 283do { void __iomem *__base = (__lp)->lregs; \ 284 sbus_writew(LE_CSR0, __base + RAP); \ 285 sbus_writew(LE_C0_STOP, __base + RDP); \ 286} while (0) 287 288int sparc_lance_debug = 2; 289 290/* The Lance uses 24 bit addresses */ 291/* On the Sun4c the DVMA will provide the remaining bytes for us */ 292/* On the Sun4m we have to instruct the ledma to provide them */ 293/* Even worse, on scsi/ether SBUS cards, the init block and the 294 * transmit/receive buffers are addresses as offsets from absolute 295 * zero on the lebuffer PIO area. -DaveM 296 */ 297 298#define LANCE_ADDR(x) ((long)(x) & ~0xff000000) 299 300/* Load the CSR registers */ 301static void load_csrs(struct lance_private *lp) 302{ 303 u32 leptr; 304 305 if (lp->pio_buffer) 306 leptr = 0; 307 else 308 leptr = LANCE_ADDR(lp->init_block_dvma); 309 310 sbus_writew(LE_CSR1, lp->lregs + RAP); 311 sbus_writew(leptr & 0xffff, lp->lregs + RDP); 312 sbus_writew(LE_CSR2, lp->lregs + RAP); 313 sbus_writew(leptr >> 16, lp->lregs + RDP); 314 sbus_writew(LE_CSR3, lp->lregs + RAP); 315 sbus_writew(lp->busmaster_regval, lp->lregs + RDP); 316 317 /* Point back to csr0 */ 318 sbus_writew(LE_CSR0, lp->lregs + RAP); 319} 320 321/* Setup the Lance Rx and Tx rings */ 322static void lance_init_ring_dvma(struct net_device *dev) 323{ 324 struct lance_private *lp = netdev_priv(dev); 325 struct lance_init_block *ib = lp->init_block_mem; 326 dma_addr_t aib = lp->init_block_dvma; 327 __u32 leptr; 328 int i; 329 330 /* Lock out other processes while setting up hardware */ 331 netif_stop_queue(dev); 332 lp->rx_new = lp->tx_new = 0; 333 lp->rx_old = lp->tx_old = 0; 334 335 /* Copy the ethernet address to the lance init block 336 * Note that on the sparc you need to swap the ethernet address. 337 */ 338 ib->phys_addr [0] = dev->dev_addr [1]; 339 ib->phys_addr [1] = dev->dev_addr [0]; 340 ib->phys_addr [2] = dev->dev_addr [3]; 341 ib->phys_addr [3] = dev->dev_addr [2]; 342 ib->phys_addr [4] = dev->dev_addr [5]; 343 ib->phys_addr [5] = dev->dev_addr [4]; 344 345 /* Setup the Tx ring entries */ 346 for (i = 0; i < TX_RING_SIZE; i++) { 347 leptr = LANCE_ADDR(aib + libbuff_offset(tx_buf, i)); 348 ib->btx_ring [i].tmd0 = leptr; 349 ib->btx_ring [i].tmd1_hadr = leptr >> 16; 350 ib->btx_ring [i].tmd1_bits = 0; 351 ib->btx_ring [i].length = 0xf000; /* The ones required by tmd2 */ 352 ib->btx_ring [i].misc = 0; 353 } 354 355 /* Setup the Rx ring entries */ 356 for (i = 0; i < RX_RING_SIZE; i++) { 357 leptr = LANCE_ADDR(aib + libbuff_offset(rx_buf, i)); 358 359 ib->brx_ring [i].rmd0 = leptr; 360 ib->brx_ring [i].rmd1_hadr = leptr >> 16; 361 ib->brx_ring [i].rmd1_bits = LE_R1_OWN; 362 ib->brx_ring [i].length = -RX_BUFF_SIZE | 0xf000; 363 ib->brx_ring [i].mblength = 0; 364 } 365 366 /* Setup the initialization block */ 367 368 /* Setup rx descriptor pointer */ 369 leptr = LANCE_ADDR(aib + libdesc_offset(brx_ring, 0)); 370 ib->rx_len = (LANCE_LOG_RX_BUFFERS << 13) | (leptr >> 16); 371 ib->rx_ptr = leptr; 372 373 /* Setup tx descriptor pointer */ 374 leptr = LANCE_ADDR(aib + libdesc_offset(btx_ring, 0)); 375 ib->tx_len = (LANCE_LOG_TX_BUFFERS << 13) | (leptr >> 16); 376 ib->tx_ptr = leptr; 377} 378 379static void lance_init_ring_pio(struct net_device *dev) 380{ 381 struct lance_private *lp = netdev_priv(dev); 382 struct lance_init_block __iomem *ib = lp->init_block_iomem; 383 u32 leptr; 384 int i; 385 386 /* Lock out other processes while setting up hardware */ 387 netif_stop_queue(dev); 388 lp->rx_new = lp->tx_new = 0; 389 lp->rx_old = lp->tx_old = 0; 390 391 /* Copy the ethernet address to the lance init block 392 * Note that on the sparc you need to swap the ethernet address. 393 */ 394 sbus_writeb(dev->dev_addr[1], &ib->phys_addr[0]); 395 sbus_writeb(dev->dev_addr[0], &ib->phys_addr[1]); 396 sbus_writeb(dev->dev_addr[3], &ib->phys_addr[2]); 397 sbus_writeb(dev->dev_addr[2], &ib->phys_addr[3]); 398 sbus_writeb(dev->dev_addr[5], &ib->phys_addr[4]); 399 sbus_writeb(dev->dev_addr[4], &ib->phys_addr[5]); 400 401 /* Setup the Tx ring entries */ 402 for (i = 0; i < TX_RING_SIZE; i++) { 403 leptr = libbuff_offset(tx_buf, i); 404 sbus_writew(leptr, &ib->btx_ring [i].tmd0); 405 sbus_writeb(leptr >> 16,&ib->btx_ring [i].tmd1_hadr); 406 sbus_writeb(0, &ib->btx_ring [i].tmd1_bits); 407 408 /* The ones required by tmd2 */ 409 sbus_writew(0xf000, &ib->btx_ring [i].length); 410 sbus_writew(0, &ib->btx_ring [i].misc); 411 } 412 413 /* Setup the Rx ring entries */ 414 for (i = 0; i < RX_RING_SIZE; i++) { 415 leptr = libbuff_offset(rx_buf, i); 416 417 sbus_writew(leptr, &ib->brx_ring [i].rmd0); 418 sbus_writeb(leptr >> 16,&ib->brx_ring [i].rmd1_hadr); 419 sbus_writeb(LE_R1_OWN, &ib->brx_ring [i].rmd1_bits); 420 sbus_writew(-RX_BUFF_SIZE|0xf000, 421 &ib->brx_ring [i].length); 422 sbus_writew(0, &ib->brx_ring [i].mblength); 423 } 424 425 /* Setup the initialization block */ 426 427 /* Setup rx descriptor pointer */ 428 leptr = libdesc_offset(brx_ring, 0); 429 sbus_writew((LANCE_LOG_RX_BUFFERS << 13) | (leptr >> 16), 430 &ib->rx_len); 431 sbus_writew(leptr, &ib->rx_ptr); 432 433 /* Setup tx descriptor pointer */ 434 leptr = libdesc_offset(btx_ring, 0); 435 sbus_writew((LANCE_LOG_TX_BUFFERS << 13) | (leptr >> 16), 436 &ib->tx_len); 437 sbus_writew(leptr, &ib->tx_ptr); 438} 439 440static void init_restart_ledma(struct lance_private *lp) 441{ 442 u32 csr = sbus_readl(lp->dregs + DMA_CSR); 443 444 if (!(csr & DMA_HNDL_ERROR)) { 445 /* E-Cache draining */ 446 while (sbus_readl(lp->dregs + DMA_CSR) & DMA_FIFO_ISDRAIN) 447 barrier(); 448 } 449 450 csr = sbus_readl(lp->dregs + DMA_CSR); 451 csr &= ~DMA_E_BURSTS; 452 if (lp->burst_sizes & DMA_BURST32) 453 csr |= DMA_E_BURST32; 454 else 455 csr |= DMA_E_BURST16; 456 457 csr |= (DMA_DSBL_RD_DRN | DMA_DSBL_WR_INV | DMA_FIFO_INV); 458 459 if (lp->tpe) 460 csr |= DMA_EN_ENETAUI; 461 else 462 csr &= ~DMA_EN_ENETAUI; 463 udelay(20); 464 sbus_writel(csr, lp->dregs + DMA_CSR); 465 udelay(200); 466} 467 468static int init_restart_lance(struct lance_private *lp) 469{ 470 u16 regval = 0; 471 int i; 472 473 if (lp->dregs) 474 init_restart_ledma(lp); 475 476 sbus_writew(LE_CSR0, lp->lregs + RAP); 477 sbus_writew(LE_C0_INIT, lp->lregs + RDP); 478 479 /* Wait for the lance to complete initialization */ 480 for (i = 0; i < 100; i++) { 481 regval = sbus_readw(lp->lregs + RDP); 482 483 if (regval & (LE_C0_ERR | LE_C0_IDON)) 484 break; 485 barrier(); 486 } 487 if (i == 100 || (regval & LE_C0_ERR)) { 488 printk(KERN_ERR "LANCE unopened after %d ticks, csr0=%4.4x.\n", 489 i, regval); 490 if (lp->dregs) 491 printk("dcsr=%8.8x\n", sbus_readl(lp->dregs + DMA_CSR)); 492 return -1; 493 } 494 495 /* Clear IDON by writing a "1", enable interrupts and start lance */ 496 sbus_writew(LE_C0_IDON, lp->lregs + RDP); 497 sbus_writew(LE_C0_INEA | LE_C0_STRT, lp->lregs + RDP); 498 499 if (lp->dregs) { 500 u32 csr = sbus_readl(lp->dregs + DMA_CSR); 501 502 csr |= DMA_INT_ENAB; 503 sbus_writel(csr, lp->dregs + DMA_CSR); 504 } 505 506 return 0; 507} 508 509static void lance_rx_dvma(struct net_device *dev) 510{ 511 struct lance_private *lp = netdev_priv(dev); 512 struct lance_init_block *ib = lp->init_block_mem; 513 struct lance_rx_desc *rd; 514 u8 bits; 515 int len, entry = lp->rx_new; 516 struct sk_buff *skb; 517 518 for (rd = &ib->brx_ring [entry]; 519 !((bits = rd->rmd1_bits) & LE_R1_OWN); 520 rd = &ib->brx_ring [entry]) { 521 522 /* We got an incomplete frame? */ 523 if ((bits & LE_R1_POK) != LE_R1_POK) { 524 dev->stats.rx_over_errors++; 525 dev->stats.rx_errors++; 526 } else if (bits & LE_R1_ERR) { 527 /* Count only the end frame as a rx error, 528 * not the beginning 529 */ 530 if (bits & LE_R1_BUF) dev->stats.rx_fifo_errors++; 531 if (bits & LE_R1_CRC) dev->stats.rx_crc_errors++; 532 if (bits & LE_R1_OFL) dev->stats.rx_over_errors++; 533 if (bits & LE_R1_FRA) dev->stats.rx_frame_errors++; 534 if (bits & LE_R1_EOP) dev->stats.rx_errors++; 535 } else { 536 len = (rd->mblength & 0xfff) - 4; 537 skb = dev_alloc_skb(len + 2); 538 539 if (skb == NULL) { 540 printk(KERN_INFO "%s: Memory squeeze, deferring packet.\n", 541 dev->name); 542 dev->stats.rx_dropped++; 543 rd->mblength = 0; 544 rd->rmd1_bits = LE_R1_OWN; 545 lp->rx_new = RX_NEXT(entry); 546 return; 547 } 548 549 dev->stats.rx_bytes += len; 550 551 skb_reserve(skb, 2); /* 16 byte align */ 552 skb_put(skb, len); /* make room */ 553 skb_copy_to_linear_data(skb, 554 (unsigned char *)&(ib->rx_buf [entry][0]), 555 len); 556 skb->protocol = eth_type_trans(skb, dev); 557 netif_rx(skb); 558 dev->stats.rx_packets++; 559 } 560 561 /* Return the packet to the pool */ 562 rd->mblength = 0; 563 rd->rmd1_bits = LE_R1_OWN; 564 entry = RX_NEXT(entry); 565 } 566 567 lp->rx_new = entry; 568} 569 570static void lance_tx_dvma(struct net_device *dev) 571{ 572 struct lance_private *lp = netdev_priv(dev); 573 struct lance_init_block *ib = lp->init_block_mem; 574 int i, j; 575 576 spin_lock(&lp->lock); 577 578 j = lp->tx_old; 579 for (i = j; i != lp->tx_new; i = j) { 580 struct lance_tx_desc *td = &ib->btx_ring [i]; 581 u8 bits = td->tmd1_bits; 582 583 /* If we hit a packet not owned by us, stop */ 584 if (bits & LE_T1_OWN) 585 break; 586 587 if (bits & LE_T1_ERR) { 588 u16 status = td->misc; 589 590 dev->stats.tx_errors++; 591 if (status & LE_T3_RTY) dev->stats.tx_aborted_errors++; 592 if (status & LE_T3_LCOL) dev->stats.tx_window_errors++; 593 594 if (status & LE_T3_CLOS) { 595 dev->stats.tx_carrier_errors++; 596 if (lp->auto_select) { 597 lp->tpe = 1 - lp->tpe; 598 printk(KERN_NOTICE "%s: Carrier Lost, trying %s\n", 599 dev->name, lp->tpe?"TPE":"AUI"); 600 STOP_LANCE(lp); 601 lp->init_ring(dev); 602 load_csrs(lp); 603 init_restart_lance(lp); 604 goto out; 605 } 606 } 607 608 /* Buffer errors and underflows turn off the 609 * transmitter, restart the adapter. 610 */ 611 if (status & (LE_T3_BUF|LE_T3_UFL)) { 612 dev->stats.tx_fifo_errors++; 613 614 printk(KERN_ERR "%s: Tx: ERR_BUF|ERR_UFL, restarting\n", 615 dev->name); 616 STOP_LANCE(lp); 617 lp->init_ring(dev); 618 load_csrs(lp); 619 init_restart_lance(lp); 620 goto out; 621 } 622 } else if ((bits & LE_T1_POK) == LE_T1_POK) { 623 /* 624 * So we don't count the packet more than once. 625 */ 626 td->tmd1_bits = bits & ~(LE_T1_POK); 627 628 /* One collision before packet was sent. */ 629 if (bits & LE_T1_EONE) 630 dev->stats.collisions++; 631 632 /* More than one collision, be optimistic. */ 633 if (bits & LE_T1_EMORE) 634 dev->stats.collisions += 2; 635 636 dev->stats.tx_packets++; 637 } 638 639 j = TX_NEXT(j); 640 } 641 lp->tx_old = j; 642out: 643 if (netif_queue_stopped(dev) && 644 TX_BUFFS_AVAIL > 0) 645 netif_wake_queue(dev); 646 647 spin_unlock(&lp->lock); 648} 649 650static void lance_piocopy_to_skb(struct sk_buff *skb, void __iomem *piobuf, int len) 651{ 652 u16 *p16 = (u16 *) skb->data; 653 u32 *p32; 654 u8 *p8; 655 void __iomem *pbuf = piobuf; 656 657 /* We know here that both src and dest are on a 16bit boundary. */ 658 *p16++ = sbus_readw(pbuf); 659 p32 = (u32 *) p16; 660 pbuf += 2; 661 len -= 2; 662 663 while (len >= 4) { 664 *p32++ = sbus_readl(pbuf); 665 pbuf += 4; 666 len -= 4; 667 } 668 p8 = (u8 *) p32; 669 if (len >= 2) { 670 p16 = (u16 *) p32; 671 *p16++ = sbus_readw(pbuf); 672 pbuf += 2; 673 len -= 2; 674 p8 = (u8 *) p16; 675 } 676 if (len >= 1) 677 *p8 = sbus_readb(pbuf); 678} 679 680static void lance_rx_pio(struct net_device *dev) 681{ 682 struct lance_private *lp = netdev_priv(dev); 683 struct lance_init_block __iomem *ib = lp->init_block_iomem; 684 struct lance_rx_desc __iomem *rd; 685 unsigned char bits; 686 int len, entry; 687 struct sk_buff *skb; 688 689 entry = lp->rx_new; 690 for (rd = &ib->brx_ring [entry]; 691 !((bits = sbus_readb(&rd->rmd1_bits)) & LE_R1_OWN); 692 rd = &ib->brx_ring [entry]) { 693 694 /* We got an incomplete frame? */ 695 if ((bits & LE_R1_POK) != LE_R1_POK) { 696 dev->stats.rx_over_errors++; 697 dev->stats.rx_errors++; 698 } else if (bits & LE_R1_ERR) { 699 /* Count only the end frame as a rx error, 700 * not the beginning 701 */ 702 if (bits & LE_R1_BUF) dev->stats.rx_fifo_errors++; 703 if (bits & LE_R1_CRC) dev->stats.rx_crc_errors++; 704 if (bits & LE_R1_OFL) dev->stats.rx_over_errors++; 705 if (bits & LE_R1_FRA) dev->stats.rx_frame_errors++; 706 if (bits & LE_R1_EOP) dev->stats.rx_errors++; 707 } else { 708 len = (sbus_readw(&rd->mblength) & 0xfff) - 4; 709 skb = dev_alloc_skb(len + 2); 710 711 if (skb == NULL) { 712 printk(KERN_INFO "%s: Memory squeeze, deferring packet.\n", 713 dev->name); 714 dev->stats.rx_dropped++; 715 sbus_writew(0, &rd->mblength); 716 sbus_writeb(LE_R1_OWN, &rd->rmd1_bits); 717 lp->rx_new = RX_NEXT(entry); 718 return; 719 } 720 721 dev->stats.rx_bytes += len; 722 723 skb_reserve (skb, 2); /* 16 byte align */ 724 skb_put(skb, len); /* make room */ 725 lance_piocopy_to_skb(skb, &(ib->rx_buf[entry][0]), len); 726 skb->protocol = eth_type_trans(skb, dev); 727 netif_rx(skb); 728 dev->stats.rx_packets++; 729 } 730 731 /* Return the packet to the pool */ 732 sbus_writew(0, &rd->mblength); 733 sbus_writeb(LE_R1_OWN, &rd->rmd1_bits); 734 entry = RX_NEXT(entry); 735 } 736 737 lp->rx_new = entry; 738} 739 740static void lance_tx_pio(struct net_device *dev) 741{ 742 struct lance_private *lp = netdev_priv(dev); 743 struct lance_init_block __iomem *ib = lp->init_block_iomem; 744 int i, j; 745 746 spin_lock(&lp->lock); 747 748 j = lp->tx_old; 749 for (i = j; i != lp->tx_new; i = j) { 750 struct lance_tx_desc __iomem *td = &ib->btx_ring [i]; 751 u8 bits = sbus_readb(&td->tmd1_bits); 752 753 /* If we hit a packet not owned by us, stop */ 754 if (bits & LE_T1_OWN) 755 break; 756 757 if (bits & LE_T1_ERR) { 758 u16 status = sbus_readw(&td->misc); 759 760 dev->stats.tx_errors++; 761 if (status & LE_T3_RTY) dev->stats.tx_aborted_errors++; 762 if (status & LE_T3_LCOL) dev->stats.tx_window_errors++; 763 764 if (status & LE_T3_CLOS) { 765 dev->stats.tx_carrier_errors++; 766 if (lp->auto_select) { 767 lp->tpe = 1 - lp->tpe; 768 printk(KERN_NOTICE "%s: Carrier Lost, trying %s\n", 769 dev->name, lp->tpe?"TPE":"AUI"); 770 STOP_LANCE(lp); 771 lp->init_ring(dev); 772 load_csrs(lp); 773 init_restart_lance(lp); 774 goto out; 775 } 776 } 777 778 /* Buffer errors and underflows turn off the 779 * transmitter, restart the adapter. 780 */ 781 if (status & (LE_T3_BUF|LE_T3_UFL)) { 782 dev->stats.tx_fifo_errors++; 783 784 printk(KERN_ERR "%s: Tx: ERR_BUF|ERR_UFL, restarting\n", 785 dev->name); 786 STOP_LANCE(lp); 787 lp->init_ring(dev); 788 load_csrs(lp); 789 init_restart_lance(lp); 790 goto out; 791 } 792 } else if ((bits & LE_T1_POK) == LE_T1_POK) { 793 /* 794 * So we don't count the packet more than once. 795 */ 796 sbus_writeb(bits & ~(LE_T1_POK), &td->tmd1_bits); 797 798 /* One collision before packet was sent. */ 799 if (bits & LE_T1_EONE) 800 dev->stats.collisions++; 801 802 /* More than one collision, be optimistic. */ 803 if (bits & LE_T1_EMORE) 804 dev->stats.collisions += 2; 805 806 dev->stats.tx_packets++; 807 } 808 809 j = TX_NEXT(j); 810 } 811 lp->tx_old = j; 812 813 if (netif_queue_stopped(dev) && 814 TX_BUFFS_AVAIL > 0) 815 netif_wake_queue(dev); 816out: 817 spin_unlock(&lp->lock); 818} 819 820static irqreturn_t lance_interrupt(int irq, void *dev_id) 821{ 822 struct net_device *dev = dev_id; 823 struct lance_private *lp = netdev_priv(dev); 824 int csr0; 825 826 sbus_writew(LE_CSR0, lp->lregs + RAP); 827 csr0 = sbus_readw(lp->lregs + RDP); 828 829 /* Acknowledge all the interrupt sources ASAP */ 830 sbus_writew(csr0 & (LE_C0_INTR | LE_C0_TINT | LE_C0_RINT), 831 lp->lregs + RDP); 832 833 if ((csr0 & LE_C0_ERR) != 0) { 834 /* Clear the error condition */ 835 sbus_writew((LE_C0_BABL | LE_C0_ERR | LE_C0_MISS | 836 LE_C0_CERR | LE_C0_MERR), 837 lp->lregs + RDP); 838 } 839 840 if (csr0 & LE_C0_RINT) 841 lp->rx(dev); 842 843 if (csr0 & LE_C0_TINT) 844 lp->tx(dev); 845 846 if (csr0 & LE_C0_BABL) 847 dev->stats.tx_errors++; 848 849 if (csr0 & LE_C0_MISS) 850 dev->stats.rx_errors++; 851 852 if (csr0 & LE_C0_MERR) { 853 if (lp->dregs) { 854 u32 addr = sbus_readl(lp->dregs + DMA_ADDR); 855 856 printk(KERN_ERR "%s: Memory error, status %04x, addr %06x\n", 857 dev->name, csr0, addr & 0xffffff); 858 } else { 859 printk(KERN_ERR "%s: Memory error, status %04x\n", 860 dev->name, csr0); 861 } 862 863 sbus_writew(LE_C0_STOP, lp->lregs + RDP); 864 865 if (lp->dregs) { 866 u32 dma_csr = sbus_readl(lp->dregs + DMA_CSR); 867 868 dma_csr |= DMA_FIFO_INV; 869 sbus_writel(dma_csr, lp->dregs + DMA_CSR); 870 } 871 872 lp->init_ring(dev); 873 load_csrs(lp); 874 init_restart_lance(lp); 875 netif_wake_queue(dev); 876 } 877 878 sbus_writew(LE_C0_INEA, lp->lregs + RDP); 879 880 return IRQ_HANDLED; 881} 882 883/* Build a fake network packet and send it to ourselves. */ 884static void build_fake_packet(struct lance_private *lp) 885{ 886 struct net_device *dev = lp->dev; 887 int i, entry; 888 889 entry = lp->tx_new & TX_RING_MOD_MASK; 890 if (lp->pio_buffer) { 891 struct lance_init_block __iomem *ib = lp->init_block_iomem; 892 u16 __iomem *packet = (u16 __iomem *) &(ib->tx_buf[entry][0]); 893 struct ethhdr __iomem *eth = (struct ethhdr __iomem *) packet; 894 for (i = 0; i < (ETH_ZLEN / sizeof(u16)); i++) 895 sbus_writew(0, &packet[i]); 896 for (i = 0; i < 6; i++) { 897 sbus_writeb(dev->dev_addr[i], ð->h_dest[i]); 898 sbus_writeb(dev->dev_addr[i], ð->h_source[i]); 899 } 900 sbus_writew((-ETH_ZLEN) | 0xf000, &ib->btx_ring[entry].length); 901 sbus_writew(0, &ib->btx_ring[entry].misc); 902 sbus_writeb(LE_T1_POK|LE_T1_OWN, &ib->btx_ring[entry].tmd1_bits); 903 } else { 904 struct lance_init_block *ib = lp->init_block_mem; 905 u16 *packet = (u16 *) &(ib->tx_buf[entry][0]); 906 struct ethhdr *eth = (struct ethhdr *) packet; 907 memset(packet, 0, ETH_ZLEN); 908 for (i = 0; i < 6; i++) { 909 eth->h_dest[i] = dev->dev_addr[i]; 910 eth->h_source[i] = dev->dev_addr[i]; 911 } 912 ib->btx_ring[entry].length = (-ETH_ZLEN) | 0xf000; 913 ib->btx_ring[entry].misc = 0; 914 ib->btx_ring[entry].tmd1_bits = (LE_T1_POK|LE_T1_OWN); 915 } 916 lp->tx_new = TX_NEXT(entry); 917} 918 919static int lance_open(struct net_device *dev) 920{ 921 struct lance_private *lp = netdev_priv(dev); 922 int status = 0; 923 924 STOP_LANCE(lp); 925 926 if (request_irq(dev->irq, lance_interrupt, IRQF_SHARED, 927 lancestr, (void *) dev)) { 928 printk(KERN_ERR "Lance: Can't get irq %d\n", dev->irq); 929 return -EAGAIN; 930 } 931 932 /* On the 4m, setup the ledma to provide the upper bits for buffers */ 933 if (lp->dregs) { 934 u32 regval = lp->init_block_dvma & 0xff000000; 935 936 sbus_writel(regval, lp->dregs + DMA_TEST); 937 } 938 939 /* Set mode and clear multicast filter only at device open, 940 * so that lance_init_ring() called at any error will not 941 * forget multicast filters. 942 * 943 * BTW it is common bug in all lance drivers! --ANK 944 */ 945 if (lp->pio_buffer) { 946 struct lance_init_block __iomem *ib = lp->init_block_iomem; 947 sbus_writew(0, &ib->mode); 948 sbus_writel(0, &ib->filter[0]); 949 sbus_writel(0, &ib->filter[1]); 950 } else { 951 struct lance_init_block *ib = lp->init_block_mem; 952 ib->mode = 0; 953 ib->filter [0] = 0; 954 ib->filter [1] = 0; 955 } 956 957 lp->init_ring(dev); 958 load_csrs(lp); 959 960 netif_start_queue(dev); 961 962 status = init_restart_lance(lp); 963 if (!status && lp->auto_select) { 964 build_fake_packet(lp); 965 sbus_writew(LE_C0_INEA | LE_C0_TDMD, lp->lregs + RDP); 966 } 967 968 return status; 969} 970 971static int lance_close(struct net_device *dev) 972{ 973 struct lance_private *lp = netdev_priv(dev); 974 975 netif_stop_queue(dev); 976 del_timer_sync(&lp->multicast_timer); 977 978 STOP_LANCE(lp); 979 980 free_irq(dev->irq, (void *) dev); 981 return 0; 982} 983 984static int lance_reset(struct net_device *dev) 985{ 986 struct lance_private *lp = netdev_priv(dev); 987 int status; 988 989 STOP_LANCE(lp); 990 991 /* On the 4m, reset the dma too */ 992 if (lp->dregs) { 993 u32 csr, addr; 994 995 printk(KERN_ERR "resetting ledma\n"); 996 csr = sbus_readl(lp->dregs + DMA_CSR); 997 sbus_writel(csr | DMA_RST_ENET, lp->dregs + DMA_CSR); 998 udelay(200); 999 sbus_writel(csr & ~DMA_RST_ENET, lp->dregs + DMA_CSR); 1000 1001 addr = lp->init_block_dvma & 0xff000000; 1002 sbus_writel(addr, lp->dregs + DMA_TEST); 1003 } 1004 lp->init_ring(dev); 1005 load_csrs(lp); 1006 dev->trans_start = jiffies; /* prevent tx timeout */ 1007 status = init_restart_lance(lp); 1008 return status; 1009} 1010 1011static void lance_piocopy_from_skb(void __iomem *dest, unsigned char *src, int len) 1012{ 1013 void __iomem *piobuf = dest; 1014 u32 *p32; 1015 u16 *p16; 1016 u8 *p8; 1017 1018 switch ((unsigned long)src & 0x3) { 1019 case 0: 1020 p32 = (u32 *) src; 1021 while (len >= 4) { 1022 sbus_writel(*p32, piobuf); 1023 p32++; 1024 piobuf += 4; 1025 len -= 4; 1026 } 1027 src = (char *) p32; 1028 break; 1029 case 1: 1030 case 3: 1031 p8 = (u8 *) src; 1032 while (len >= 4) { 1033 u32 val; 1034 1035 val = p8[0] << 24; 1036 val |= p8[1] << 16; 1037 val |= p8[2] << 8; 1038 val |= p8[3]; 1039 sbus_writel(val, piobuf); 1040 p8 += 4; 1041 piobuf += 4; 1042 len -= 4; 1043 } 1044 src = (char *) p8; 1045 break; 1046 case 2: 1047 p16 = (u16 *) src; 1048 while (len >= 4) { 1049 u32 val = p16[0]<<16 | p16[1]; 1050 sbus_writel(val, piobuf); 1051 p16 += 2; 1052 piobuf += 4; 1053 len -= 4; 1054 } 1055 src = (char *) p16; 1056 break; 1057 } 1058 if (len >= 2) { 1059 u16 val = src[0] << 8 | src[1]; 1060 sbus_writew(val, piobuf); 1061 src += 2; 1062 piobuf += 2; 1063 len -= 2; 1064 } 1065 if (len >= 1) 1066 sbus_writeb(src[0], piobuf); 1067} 1068 1069static void lance_piozero(void __iomem *dest, int len) 1070{ 1071 void __iomem *piobuf = dest; 1072 1073 if ((unsigned long)piobuf & 1) { 1074 sbus_writeb(0, piobuf); 1075 piobuf += 1; 1076 len -= 1; 1077 if (len == 0) 1078 return; 1079 } 1080 if (len == 1) { 1081 sbus_writeb(0, piobuf); 1082 return; 1083 } 1084 if ((unsigned long)piobuf & 2) { 1085 sbus_writew(0, piobuf); 1086 piobuf += 2; 1087 len -= 2; 1088 if (len == 0) 1089 return; 1090 } 1091 while (len >= 4) { 1092 sbus_writel(0, piobuf); 1093 piobuf += 4; 1094 len -= 4; 1095 } 1096 if (len >= 2) { 1097 sbus_writew(0, piobuf); 1098 piobuf += 2; 1099 len -= 2; 1100 } 1101 if (len >= 1) 1102 sbus_writeb(0, piobuf); 1103} 1104 1105static void lance_tx_timeout(struct net_device *dev) 1106{ 1107 struct lance_private *lp = netdev_priv(dev); 1108 1109 printk(KERN_ERR "%s: transmit timed out, status %04x, reset\n", 1110 dev->name, sbus_readw(lp->lregs + RDP)); 1111 lance_reset(dev); 1112 netif_wake_queue(dev); 1113} 1114 1115static int lance_start_xmit(struct sk_buff *skb, struct net_device *dev) 1116{ 1117 struct lance_private *lp = netdev_priv(dev); 1118 int entry, skblen, len; 1119 1120 skblen = skb->len; 1121 1122 len = (skblen <= ETH_ZLEN) ? ETH_ZLEN : skblen; 1123 1124 spin_lock_irq(&lp->lock); 1125 1126 dev->stats.tx_bytes += len; 1127 1128 entry = lp->tx_new & TX_RING_MOD_MASK; 1129 if (lp->pio_buffer) { 1130 struct lance_init_block __iomem *ib = lp->init_block_iomem; 1131 sbus_writew((-len) | 0xf000, &ib->btx_ring[entry].length); 1132 sbus_writew(0, &ib->btx_ring[entry].misc); 1133 lance_piocopy_from_skb(&ib->tx_buf[entry][0], skb->data, skblen); 1134 if (len != skblen) 1135 lance_piozero(&ib->tx_buf[entry][skblen], len - skblen); 1136 sbus_writeb(LE_T1_POK | LE_T1_OWN, &ib->btx_ring[entry].tmd1_bits); 1137 } else { 1138 struct lance_init_block *ib = lp->init_block_mem; 1139 ib->btx_ring [entry].length = (-len) | 0xf000; 1140 ib->btx_ring [entry].misc = 0; 1141 skb_copy_from_linear_data(skb, &ib->tx_buf [entry][0], skblen); 1142 if (len != skblen) 1143 memset((char *) &ib->tx_buf [entry][skblen], 0, len - skblen); 1144 ib->btx_ring [entry].tmd1_bits = (LE_T1_POK | LE_T1_OWN); 1145 } 1146 1147 lp->tx_new = TX_NEXT(entry); 1148 1149 if (TX_BUFFS_AVAIL <= 0) 1150 netif_stop_queue(dev); 1151 1152 /* Kick the lance: transmit now */ 1153 sbus_writew(LE_C0_INEA | LE_C0_TDMD, lp->lregs + RDP); 1154 1155 /* Read back CSR to invalidate the E-Cache. 1156 * This is needed, because DMA_DSBL_WR_INV is set. 1157 */ 1158 if (lp->dregs) 1159 sbus_readw(lp->lregs + RDP); 1160 1161 spin_unlock_irq(&lp->lock); 1162 1163 dev_kfree_skb(skb); 1164 1165 return NETDEV_TX_OK; 1166} 1167 1168/* taken from the depca driver */ 1169static void lance_load_multicast(struct net_device *dev) 1170{ 1171 struct lance_private *lp = netdev_priv(dev); 1172 struct netdev_hw_addr *ha; 1173 char *addrs; 1174 u32 crc; 1175 u32 val; 1176 1177 /* set all multicast bits */ 1178 if (dev->flags & IFF_ALLMULTI) 1179 val = ~0; 1180 else 1181 val = 0; 1182 1183 if (lp->pio_buffer) { 1184 struct lance_init_block __iomem *ib = lp->init_block_iomem; 1185 sbus_writel(val, &ib->filter[0]); 1186 sbus_writel(val, &ib->filter[1]); 1187 } else { 1188 struct lance_init_block *ib = lp->init_block_mem; 1189 ib->filter [0] = val; 1190 ib->filter [1] = val; 1191 } 1192 1193 if (dev->flags & IFF_ALLMULTI) 1194 return; 1195 1196 /* Add addresses */ 1197 netdev_for_each_mc_addr(ha, dev) { 1198 addrs = ha->addr; 1199 1200 /* multicast address? */ 1201 if (!(*addrs & 1)) 1202 continue; 1203 crc = ether_crc_le(6, addrs); 1204 crc = crc >> 26; 1205 if (lp->pio_buffer) { 1206 struct lance_init_block __iomem *ib = lp->init_block_iomem; 1207 u16 __iomem *mcast_table = (u16 __iomem *) &ib->filter; 1208 u16 tmp = sbus_readw(&mcast_table[crc>>4]); 1209 tmp |= 1 << (crc & 0xf); 1210 sbus_writew(tmp, &mcast_table[crc>>4]); 1211 } else { 1212 struct lance_init_block *ib = lp->init_block_mem; 1213 u16 *mcast_table = (u16 *) &ib->filter; 1214 mcast_table [crc >> 4] |= 1 << (crc & 0xf); 1215 } 1216 } 1217} 1218 1219static void lance_set_multicast(struct net_device *dev) 1220{ 1221 struct lance_private *lp = netdev_priv(dev); 1222 struct lance_init_block *ib_mem = lp->init_block_mem; 1223 struct lance_init_block __iomem *ib_iomem = lp->init_block_iomem; 1224 u16 mode; 1225 1226 if (!netif_running(dev)) 1227 return; 1228 1229 if (lp->tx_old != lp->tx_new) { 1230 mod_timer(&lp->multicast_timer, jiffies + 4); 1231 netif_wake_queue(dev); 1232 return; 1233 } 1234 1235 netif_stop_queue(dev); 1236 1237 STOP_LANCE(lp); 1238 lp->init_ring(dev); 1239 1240 if (lp->pio_buffer) 1241 mode = sbus_readw(&ib_iomem->mode); 1242 else 1243 mode = ib_mem->mode; 1244 if (dev->flags & IFF_PROMISC) { 1245 mode |= LE_MO_PROM; 1246 if (lp->pio_buffer) 1247 sbus_writew(mode, &ib_iomem->mode); 1248 else 1249 ib_mem->mode = mode; 1250 } else { 1251 mode &= ~LE_MO_PROM; 1252 if (lp->pio_buffer) 1253 sbus_writew(mode, &ib_iomem->mode); 1254 else 1255 ib_mem->mode = mode; 1256 lance_load_multicast(dev); 1257 } 1258 load_csrs(lp); 1259 init_restart_lance(lp); 1260 netif_wake_queue(dev); 1261} 1262 1263static void lance_set_multicast_retry(unsigned long _opaque) 1264{ 1265 struct net_device *dev = (struct net_device *) _opaque; 1266 1267 lance_set_multicast(dev); 1268} 1269 1270static void lance_free_hwresources(struct lance_private *lp) 1271{ 1272 if (lp->lregs) 1273 of_iounmap(&lp->op->resource[0], lp->lregs, LANCE_REG_SIZE); 1274 if (lp->dregs) { 1275 struct platform_device *ledma = lp->ledma; 1276 1277 of_iounmap(&ledma->resource[0], lp->dregs, 1278 resource_size(&ledma->resource[0])); 1279 } 1280 if (lp->init_block_iomem) { 1281 of_iounmap(&lp->lebuffer->resource[0], lp->init_block_iomem, 1282 sizeof(struct lance_init_block)); 1283 } else if (lp->init_block_mem) { 1284 dma_free_coherent(&lp->op->dev, 1285 sizeof(struct lance_init_block), 1286 lp->init_block_mem, 1287 lp->init_block_dvma); 1288 } 1289} 1290 1291/* Ethtool support... */ 1292static void sparc_lance_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) 1293{ 1294 strcpy(info->driver, "sunlance"); 1295 strcpy(info->version, "2.02"); 1296} 1297 1298static u32 sparc_lance_get_link(struct net_device *dev) 1299{ 1300 /* We really do not keep track of this, but this 1301 * is better than not reporting anything at all. 1302 */ 1303 return 1; 1304} 1305 1306static const struct ethtool_ops sparc_lance_ethtool_ops = { 1307 .get_drvinfo = sparc_lance_get_drvinfo, 1308 .get_link = sparc_lance_get_link, 1309}; 1310 1311static const struct net_device_ops sparc_lance_ops = { 1312 .ndo_open = lance_open, 1313 .ndo_stop = lance_close, 1314 .ndo_start_xmit = lance_start_xmit, 1315 .ndo_set_multicast_list = lance_set_multicast, 1316 .ndo_tx_timeout = lance_tx_timeout, 1317 .ndo_change_mtu = eth_change_mtu, 1318 .ndo_set_mac_address = eth_mac_addr, 1319 .ndo_validate_addr = eth_validate_addr, 1320}; 1321 1322static int __devinit sparc_lance_probe_one(struct platform_device *op, 1323 struct platform_device *ledma, 1324 struct platform_device *lebuffer) 1325{ 1326 struct device_node *dp = op->dev.of_node; 1327 static unsigned version_printed; 1328 struct lance_private *lp; 1329 struct net_device *dev; 1330 int i; 1331 1332 dev = alloc_etherdev(sizeof(struct lance_private) + 8); 1333 if (!dev) 1334 return -ENOMEM; 1335 1336 lp = netdev_priv(dev); 1337 1338 if (sparc_lance_debug && version_printed++ == 0) 1339 printk (KERN_INFO "%s", version); 1340 1341 spin_lock_init(&lp->lock); 1342 1343 /* Copy the IDPROM ethernet address to the device structure, later we 1344 * will copy the address in the device structure to the lance 1345 * initialization block. 1346 */ 1347 for (i = 0; i < 6; i++) 1348 dev->dev_addr[i] = idprom->id_ethaddr[i]; 1349 1350 /* Get the IO region */ 1351 lp->lregs = of_ioremap(&op->resource[0], 0, 1352 LANCE_REG_SIZE, lancestr); 1353 if (!lp->lregs) { 1354 printk(KERN_ERR "SunLance: Cannot map registers.\n"); 1355 goto fail; 1356 } 1357 1358 lp->ledma = ledma; 1359 if (lp->ledma) { 1360 lp->dregs = of_ioremap(&ledma->resource[0], 0, 1361 resource_size(&ledma->resource[0]), 1362 "ledma"); 1363 if (!lp->dregs) { 1364 printk(KERN_ERR "SunLance: Cannot map " 1365 "ledma registers.\n"); 1366 goto fail; 1367 } 1368 } 1369 1370 lp->op = op; 1371 lp->lebuffer = lebuffer; 1372 if (lebuffer) { 1373 /* sanity check */ 1374 if (lebuffer->resource[0].start & 7) { 1375 printk(KERN_ERR "SunLance: ERROR: Rx and Tx rings not on even boundary.\n"); 1376 goto fail; 1377 } 1378 lp->init_block_iomem = 1379 of_ioremap(&lebuffer->resource[0], 0, 1380 sizeof(struct lance_init_block), "lebuffer"); 1381 if (!lp->init_block_iomem) { 1382 printk(KERN_ERR "SunLance: Cannot map PIO buffer.\n"); 1383 goto fail; 1384 } 1385 lp->init_block_dvma = 0; 1386 lp->pio_buffer = 1; 1387 lp->init_ring = lance_init_ring_pio; 1388 lp->rx = lance_rx_pio; 1389 lp->tx = lance_tx_pio; 1390 } else { 1391 lp->init_block_mem = 1392 dma_alloc_coherent(&op->dev, 1393 sizeof(struct lance_init_block), 1394 &lp->init_block_dvma, GFP_ATOMIC); 1395 if (!lp->init_block_mem) { 1396 printk(KERN_ERR "SunLance: Cannot allocate consistent DMA memory.\n"); 1397 goto fail; 1398 } 1399 lp->pio_buffer = 0; 1400 lp->init_ring = lance_init_ring_dvma; 1401 lp->rx = lance_rx_dvma; 1402 lp->tx = lance_tx_dvma; 1403 } 1404 lp->busmaster_regval = of_getintprop_default(dp, "busmaster-regval", 1405 (LE_C3_BSWP | 1406 LE_C3_ACON | 1407 LE_C3_BCON)); 1408 1409 lp->name = lancestr; 1410 1411 lp->burst_sizes = 0; 1412 if (lp->ledma) { 1413 struct device_node *ledma_dp = ledma->dev.of_node; 1414 struct device_node *sbus_dp; 1415 unsigned int sbmask; 1416 const char *prop; 1417 u32 csr; 1418 1419 /* Find burst-size property for ledma */ 1420 lp->burst_sizes = of_getintprop_default(ledma_dp, 1421 "burst-sizes", 0); 1422 1423 /* ledma may be capable of fast bursts, but sbus may not. */ 1424 sbus_dp = ledma_dp->parent; 1425 sbmask = of_getintprop_default(sbus_dp, "burst-sizes", 1426 DMA_BURSTBITS); 1427 lp->burst_sizes &= sbmask; 1428 1429 /* Get the cable-selection property */ 1430 prop = of_get_property(ledma_dp, "cable-selection", NULL); 1431 if (!prop || prop[0] == '\0') { 1432 struct device_node *nd; 1433 1434 printk(KERN_INFO "SunLance: using " 1435 "auto-carrier-detection.\n"); 1436 1437 nd = of_find_node_by_path("/options"); 1438 if (!nd) 1439 goto no_link_test; 1440 1441 prop = of_get_property(nd, "tpe-link-test?", NULL); 1442 if (!prop) 1443 goto no_link_test; 1444 1445 if (strcmp(prop, "true")) { 1446 printk(KERN_NOTICE "SunLance: warning: overriding option " 1447 "'tpe-link-test?'\n"); 1448 printk(KERN_NOTICE "SunLance: warning: mail any problems " 1449 "to ecd@skynet.be\n"); 1450 auxio_set_lte(AUXIO_LTE_ON); 1451 } 1452no_link_test: 1453 lp->auto_select = 1; 1454 lp->tpe = 0; 1455 } else if (!strcmp(prop, "aui")) { 1456 lp->auto_select = 0; 1457 lp->tpe = 0; 1458 } else { 1459 lp->auto_select = 0; 1460 lp->tpe = 1; 1461 } 1462 1463 /* Reset ledma */ 1464 csr = sbus_readl(lp->dregs + DMA_CSR); 1465 sbus_writel(csr | DMA_RST_ENET, lp->dregs + DMA_CSR); 1466 udelay(200); 1467 sbus_writel(csr & ~DMA_RST_ENET, lp->dregs + DMA_CSR); 1468 } else 1469 lp->dregs = NULL; 1470 1471 lp->dev = dev; 1472 SET_NETDEV_DEV(dev, &op->dev); 1473 dev->watchdog_timeo = 5*HZ; 1474 dev->ethtool_ops = &sparc_lance_ethtool_ops; 1475 dev->netdev_ops = &sparc_lance_ops; 1476 1477 dev->irq = op->archdata.irqs[0]; 1478 1479 /* We cannot sleep if the chip is busy during a 1480 * multicast list update event, because such events 1481 * can occur from interrupts (ex. IPv6). So we 1482 * use a timer to try again later when necessary. -DaveM 1483 */ 1484 init_timer(&lp->multicast_timer); 1485 lp->multicast_timer.data = (unsigned long) dev; 1486 lp->multicast_timer.function = &lance_set_multicast_retry; 1487 1488 if (register_netdev(dev)) { 1489 printk(KERN_ERR "SunLance: Cannot register device.\n"); 1490 goto fail; 1491 } 1492 1493 dev_set_drvdata(&op->dev, lp); 1494 1495 printk(KERN_INFO "%s: LANCE %pM\n", 1496 dev->name, dev->dev_addr); 1497 1498 return 0; 1499 1500fail: 1501 lance_free_hwresources(lp); 1502 free_netdev(dev); 1503 return -ENODEV; 1504} 1505 1506static int __devinit sunlance_sbus_probe(struct platform_device *op, const struct of_device_id *match) 1507{ 1508 struct platform_device *parent = to_platform_device(op->dev.parent); 1509 struct device_node *parent_dp = parent->dev.of_node; 1510 int err; 1511 1512 if (!strcmp(parent_dp->name, "ledma")) { 1513 err = sparc_lance_probe_one(op, parent, NULL); 1514 } else if (!strcmp(parent_dp->name, "lebuffer")) { 1515 err = sparc_lance_probe_one(op, NULL, parent); 1516 } else 1517 err = sparc_lance_probe_one(op, NULL, NULL); 1518 1519 return err; 1520} 1521 1522static int __devexit sunlance_sbus_remove(struct platform_device *op) 1523{ 1524 struct lance_private *lp = dev_get_drvdata(&op->dev); 1525 struct net_device *net_dev = lp->dev; 1526 1527 unregister_netdev(net_dev); 1528 1529 lance_free_hwresources(lp); 1530 1531 free_netdev(net_dev); 1532 1533 dev_set_drvdata(&op->dev, NULL); 1534 1535 return 0; 1536} 1537 1538static const struct of_device_id sunlance_sbus_match[] = { 1539 { 1540 .name = "le", 1541 }, 1542 {}, 1543}; 1544 1545MODULE_DEVICE_TABLE(of, sunlance_sbus_match); 1546 1547static struct of_platform_driver sunlance_sbus_driver = { 1548 .driver = { 1549 .name = "sunlance", 1550 .owner = THIS_MODULE, 1551 .of_match_table = sunlance_sbus_match, 1552 }, 1553 .probe = sunlance_sbus_probe, 1554 .remove = __devexit_p(sunlance_sbus_remove), 1555}; 1556 1557 1558/* Find all the lance cards on the system and initialize them */ 1559static int __init sparc_lance_init(void) 1560{ 1561 return of_register_platform_driver(&sunlance_sbus_driver); 1562} 1563 1564static void __exit sparc_lance_exit(void) 1565{ 1566 of_unregister_platform_driver(&sunlance_sbus_driver); 1567} 1568 1569module_init(sparc_lance_init); 1570module_exit(sparc_lance_exit); 1571