1/* ewrk3.c: A DIGITAL EtherWORKS 3 ethernet driver for Linux. 2 3 Written 1994 by David C. Davies. 4 5 Copyright 1994 Digital Equipment Corporation. 6 7 This software may be used and distributed according to the terms of 8 the GNU General Public License, incorporated herein by reference. 9 10 This driver is written for the Digital Equipment Corporation series 11 of EtherWORKS ethernet cards: 12 13 DE203 Turbo (BNC) 14 DE204 Turbo (TP) 15 DE205 Turbo (TP BNC) 16 17 The driver has been tested on a relatively busy network using the DE205 18 card and benchmarked with 'ttcp': it transferred 16M of data at 975kB/s 19 (7.8Mb/s) to a DECstation 5000/200. 20 21 The author may be reached at davies@maniac.ultranet.com. 22 23 ========================================================================= 24 This driver has been written substantially from scratch, although its 25 inheritance of style and stack interface from 'depca.c' and in turn from 26 Donald Becker's 'lance.c' should be obvious. 27 28 The DE203/4/5 boards all use a new proprietary chip in place of the 29 LANCE chip used in prior cards (DEPCA, DE100, DE200/1/2, DE210, DE422). 30 Use the depca.c driver in the standard distribution for the LANCE based 31 cards from DIGITAL; this driver will not work with them. 32 33 The DE203/4/5 cards have 2 main modes: shared memory and I/O only. I/O 34 only makes all the card accesses through I/O transactions and no high 35 (shared) memory is used. This mode provides a >48% performance penalty 36 and is deprecated in this driver, although allowed to provide initial 37 setup when hardstrapped. 38 39 The shared memory mode comes in 3 flavours: 2kB, 32kB and 64kB. There is 40 no point in using any mode other than the 2kB mode - their performances 41 are virtually identical, although the driver has been tested in the 2kB 42 and 32kB modes. I would suggest you uncomment the line: 43 44 FORCE_2K_MODE; 45 46 to allow the driver to configure the card as a 2kB card at your current 47 base address, thus leaving more room to clutter your system box with 48 other memory hungry boards. 49 50 As many ISA and EISA cards can be supported under this driver as you 51 wish, limited primarily by the available IRQ lines, rather than by the 52 available I/O addresses (24 ISA, 16 EISA). I have checked different 53 configurations of multiple depca cards and ewrk3 cards and have not 54 found a problem yet (provided you have at least depca.c v0.38) ... 55 56 The board IRQ setting must be at an unused IRQ which is auto-probed 57 using Donald Becker's autoprobe routines. All these cards are at 58 {5,10,11,15}. 59 60 No 16MB memory limitation should exist with this driver as DMA is not 61 used and the common memory area is in low memory on the network card (my 62 current system has 20MB and I've not had problems yet). 63 64 The ability to load this driver as a loadable module has been included 65 and used extensively during the driver development (to save those long 66 reboot sequences). To utilise this ability, you have to do 8 things: 67 68 0) have a copy of the loadable modules code installed on your system. 69 1) copy ewrk3.c from the /linux/drivers/net directory to your favourite 70 temporary directory. 71 2) edit the source code near line 1898 to reflect the I/O address and 72 IRQ you're using. 73 3) compile ewrk3.c, but include -DMODULE in the command line to ensure 74 that the correct bits are compiled (see end of source code). 75 4) if you are wanting to add a new card, goto 5. Otherwise, recompile a 76 kernel with the ewrk3 configuration turned off and reboot. 77 5) insmod ewrk3.o 78 [Alan Cox: Changed this so you can insmod ewrk3.o irq=x io=y] 79 [Adam Kropelin: now accepts irq=x1,x2 io=y1,y2 for multiple cards] 80 6) run the net startup bits for your new eth?? interface manually 81 (usually /etc/rc.inet[12] at boot time). 82 7) enjoy! 83 84 Note that autoprobing is not allowed in loadable modules - the system is 85 already up and running and you're messing with interrupts. 86 87 To unload a module, turn off the associated interface 88 'ifconfig eth?? down' then 'rmmod ewrk3'. 89 90 Promiscuous mode has been turned off in this driver, but all the 91 multicast address bits have been turned on. This improved the send 92 performance on a busy network by about 13%. 93 94 Ioctl's have now been provided (primarily because I wanted to grab some 95 packet size statistics). They are patterned after 'plipconfig.c' from a 96 suggestion by Alan Cox. Using these ioctls, you can enable promiscuous 97 mode, add/delete multicast addresses, change the hardware address, get 98 packet size distribution statistics and muck around with the control and 99 status register. I'll add others if and when the need arises. 100 101 TO DO: 102 ------ 103 104 105 Revision History 106 ---------------- 107 108 Version Date Description 109 110 0.1 26-aug-94 Initial writing. ALPHA code release. 111 0.11 31-aug-94 Fixed: 2k mode memory base calc., 112 LeMAC version calc., 113 IRQ vector assignments during autoprobe. 114 0.12 31-aug-94 Tested working on LeMAC2 (DE20[345]-AC) card. 115 Fixed up MCA hash table algorithm. 116 0.20 4-sep-94 Added IOCTL functionality. 117 0.21 14-sep-94 Added I/O mode. 118 0.21axp 15-sep-94 Special version for ALPHA AXP Linux V1.0. 119 0.22 16-sep-94 Added more IOCTLs & tidied up. 120 0.23 21-sep-94 Added transmit cut through. 121 0.24 31-oct-94 Added uid checks in some ioctls. 122 0.30 1-nov-94 BETA code release. 123 0.31 5-dec-94 Added check/allocate region code. 124 0.32 16-jan-95 Broadcast packet fix. 125 0.33 10-Feb-95 Fix recognition bug reported by <bkm@star.rl.ac.uk>. 126 0.40 27-Dec-95 Rationalise MODULE and autoprobe code. 127 Rewrite for portability & updated. 128 ALPHA support from <jestabro@amt.tay1.dec.com> 129 Added verify_area() calls in ewrk3_ioctl() from 130 suggestion by <heiko@colossus.escape.de>. 131 Add new multicasting code. 132 0.41 20-Jan-96 Fix IRQ set up problem reported by 133 <kenneth@bbs.sas.ntu.ac.sg>. 134 0.42 22-Apr-96 Fix alloc_device() bug <jari@markkus2.fimr.fi> 135 0.43 16-Aug-96 Update alloc_device() to conform to de4x5.c 136 0.44 08-Nov-01 use library crc32 functions <Matt_Domsch@dell.com> 137 0.45 19-Jul-02 fix unaligned access on alpha <martin@bruli.net> 138 0.46 10-Oct-02 Multiple NIC support when module <akropel1@rochester.rr.com> 139 0.47 18-Oct-02 ethtool support <akropel1@rochester.rr.com> 140 0.48 18-Oct-02 cli/sti removal for 2.5 <vda@port.imtp.ilyichevsk.odessa.ua> 141 ioctl locking, signature search cleanup <akropel1@rochester.rr.com> 142 143 ========================================================================= 144 */ 145 146#include <linux/module.h> 147#include <linux/kernel.h> 148#include <linux/sched.h> 149#include <linux/string.h> 150#include <linux/errno.h> 151#include <linux/ioport.h> 152#include <linux/slab.h> 153#include <linux/interrupt.h> 154#include <linux/delay.h> 155#include <linux/init.h> 156#include <linux/crc32.h> 157#include <linux/netdevice.h> 158#include <linux/etherdevice.h> 159#include <linux/skbuff.h> 160#include <linux/ethtool.h> 161#include <linux/time.h> 162#include <linux/types.h> 163#include <linux/unistd.h> 164#include <linux/ctype.h> 165#include <linux/bitops.h> 166 167#include <asm/io.h> 168#include <asm/dma.h> 169#include <asm/uaccess.h> 170 171#include "ewrk3.h" 172 173#define DRV_NAME "ewrk3" 174#define DRV_VERSION "0.48" 175 176static char version[] __initdata = 177DRV_NAME ":v" DRV_VERSION " 2002/10/18 davies@maniac.ultranet.com\n"; 178 179#ifdef EWRK3_DEBUG 180static int ewrk3_debug = EWRK3_DEBUG; 181#else 182static int ewrk3_debug = 1; 183#endif 184 185#define EWRK3_NDA 0xffe0 /* No Device Address */ 186 187#define PROBE_LENGTH 32 188#define ETH_PROM_SIG 0xAA5500FFUL 189 190#ifndef EWRK3_SIGNATURE 191#define EWRK3_SIGNATURE {"DE203","DE204","DE205",""} 192#define EWRK3_STRLEN 8 193#endif 194 195#ifndef EWRK3_RAM_BASE_ADDRESSES 196#define EWRK3_RAM_BASE_ADDRESSES {0xc0000,0xd0000,0x00000} 197#endif 198 199/* 200 ** Sets up the I/O area for the autoprobe. 201 */ 202#define EWRK3_IO_BASE 0x100 /* Start address for probe search */ 203#define EWRK3_IOP_INC 0x20 /* I/O address increment */ 204#define EWRK3_TOTAL_SIZE 0x20 /* required I/O address length */ 205 206#ifndef MAX_NUM_EWRK3S 207#define MAX_NUM_EWRK3S 21 208#endif 209 210#ifndef EWRK3_EISA_IO_PORTS 211#define EWRK3_EISA_IO_PORTS 0x0c00 /* I/O port base address, slot 0 */ 212#endif 213 214#ifndef MAX_EISA_SLOTS 215#define MAX_EISA_SLOTS 16 216#define EISA_SLOT_INC 0x1000 217#endif 218 219#define QUEUE_PKT_TIMEOUT (1*HZ) /* Jiffies */ 220 221/* 222 ** EtherWORKS 3 shared memory window sizes 223 */ 224#define IO_ONLY 0x00 225#define SHMEM_2K 0x800 226#define SHMEM_32K 0x8000 227#define SHMEM_64K 0x10000 228 229/* 230 ** EtherWORKS 3 IRQ ENABLE/DISABLE 231 */ 232#define ENABLE_IRQs { \ 233 icr |= lp->irq_mask;\ 234 outb(icr, EWRK3_ICR); /* Enable the IRQs */\ 235} 236 237#define DISABLE_IRQs { \ 238 icr = inb(EWRK3_ICR);\ 239 icr &= ~lp->irq_mask;\ 240 outb(icr, EWRK3_ICR); /* Disable the IRQs */\ 241} 242 243/* 244 ** EtherWORKS 3 START/STOP 245 */ 246#define START_EWRK3 { \ 247 csr = inb(EWRK3_CSR);\ 248 csr &= ~(CSR_TXD|CSR_RXD);\ 249 outb(csr, EWRK3_CSR); /* Enable the TX and/or RX */\ 250} 251 252#define STOP_EWRK3 { \ 253 csr = (CSR_TXD|CSR_RXD);\ 254 outb(csr, EWRK3_CSR); /* Disable the TX and/or RX */\ 255} 256 257/* 258 ** The EtherWORKS 3 private structure 259 */ 260#define EWRK3_PKT_STAT_SZ 16 261#define EWRK3_PKT_BIN_SZ 128 /* Should be >=100 unless you 262 increase EWRK3_PKT_STAT_SZ */ 263 264struct ewrk3_stats { 265 u32 bins[EWRK3_PKT_STAT_SZ]; 266 u32 unicast; 267 u32 multicast; 268 u32 broadcast; 269 u32 excessive_collisions; 270 u32 tx_underruns; 271 u32 excessive_underruns; 272}; 273 274struct ewrk3_private { 275 char adapter_name[80]; /* Name exported to /proc/ioports */ 276 u_long shmem_base; /* Shared memory start address */ 277 void __iomem *shmem; 278 u_long shmem_length; /* Shared memory window length */ 279 struct ewrk3_stats pktStats; /* Private stats counters */ 280 u_char irq_mask; /* Adapter IRQ mask bits */ 281 u_char mPage; /* Maximum 2kB Page number */ 282 u_char lemac; /* Chip rev. level */ 283 u_char hard_strapped; /* Don't allow a full open */ 284 u_char txc; /* Transmit cut through */ 285 void __iomem *mctbl; /* Pointer to the multicast table */ 286 u_char led_mask; /* Used to reserve LED access for ethtool */ 287 spinlock_t hw_lock; 288}; 289 290/* 291 ** Force the EtherWORKS 3 card to be in 2kB MODE 292 */ 293#define FORCE_2K_MODE { \ 294 shmem_length = SHMEM_2K;\ 295 outb(((mem_start - 0x80000) >> 11), EWRK3_MBR);\ 296} 297 298/* 299 ** Public Functions 300 */ 301static int ewrk3_open(struct net_device *dev); 302static netdev_tx_t ewrk3_queue_pkt(struct sk_buff *skb, struct net_device *dev); 303static irqreturn_t ewrk3_interrupt(int irq, void *dev_id); 304static int ewrk3_close(struct net_device *dev); 305static void set_multicast_list(struct net_device *dev); 306static int ewrk3_ioctl(struct net_device *dev, struct ifreq *rq, int cmd); 307static const struct ethtool_ops ethtool_ops_203; 308static const struct ethtool_ops ethtool_ops; 309 310/* 311 ** Private functions 312 */ 313static int ewrk3_hw_init(struct net_device *dev, u_long iobase); 314static void ewrk3_init(struct net_device *dev); 315static int ewrk3_rx(struct net_device *dev); 316static int ewrk3_tx(struct net_device *dev); 317static void ewrk3_timeout(struct net_device *dev); 318 319static void EthwrkSignature(char *name, char *eeprom_image); 320static int DevicePresent(u_long iobase); 321static void SetMulticastFilter(struct net_device *dev); 322static int EISA_signature(char *name, s32 eisa_id); 323 324static int Read_EEPROM(u_long iobase, u_char eaddr); 325static int Write_EEPROM(short data, u_long iobase, u_char eaddr); 326static u_char get_hw_addr(struct net_device *dev, u_char * eeprom_image, char chipType); 327 328static int ewrk3_probe1(struct net_device *dev, u_long iobase, int irq); 329static int isa_probe(struct net_device *dev, u_long iobase); 330static int eisa_probe(struct net_device *dev, u_long iobase); 331 332static u_char irq[MAX_NUM_EWRK3S+1] = {5, 0, 10, 3, 11, 9, 15, 12}; 333 334static char name[EWRK3_STRLEN + 1]; 335static int num_ewrks3s; 336 337/* 338 ** Miscellaneous defines... 339 */ 340#define INIT_EWRK3 {\ 341 outb(EEPROM_INIT, EWRK3_IOPR);\ 342 mdelay(1);\ 343} 344 345#ifndef MODULE 346struct net_device * __init ewrk3_probe(int unit) 347{ 348 struct net_device *dev = alloc_etherdev(sizeof(struct ewrk3_private)); 349 int err; 350 351 if (!dev) 352 return ERR_PTR(-ENOMEM); 353 354 if (unit >= 0) { 355 sprintf(dev->name, "eth%d", unit); 356 netdev_boot_setup_check(dev); 357 } 358 359 err = ewrk3_probe1(dev, dev->base_addr, dev->irq); 360 if (err) 361 goto out; 362 return dev; 363out: 364 free_netdev(dev); 365 return ERR_PTR(err); 366 367} 368#endif 369 370static int __init ewrk3_probe1(struct net_device *dev, u_long iobase, int irq) 371{ 372 int err; 373 374 dev->base_addr = iobase; 375 dev->irq = irq; 376 377 /* Address PROM pattern */ 378 err = isa_probe(dev, iobase); 379 if (err != 0) 380 err = eisa_probe(dev, iobase); 381 382 if (err) 383 return err; 384 385 err = register_netdev(dev); 386 if (err) 387 release_region(dev->base_addr, EWRK3_TOTAL_SIZE); 388 389 return err; 390} 391 392static const struct net_device_ops ewrk3_netdev_ops = { 393 .ndo_open = ewrk3_open, 394 .ndo_start_xmit = ewrk3_queue_pkt, 395 .ndo_stop = ewrk3_close, 396 .ndo_set_multicast_list = set_multicast_list, 397 .ndo_do_ioctl = ewrk3_ioctl, 398 .ndo_tx_timeout = ewrk3_timeout, 399 .ndo_change_mtu = eth_change_mtu, 400 .ndo_set_mac_address = eth_mac_addr, 401 .ndo_validate_addr = eth_validate_addr, 402}; 403 404static int __init 405ewrk3_hw_init(struct net_device *dev, u_long iobase) 406{ 407 struct ewrk3_private *lp; 408 int i, status = 0; 409 u_long mem_start, shmem_length; 410 u_char cr, cmr, icr, nicsr, lemac, hard_strapped = 0; 411 u_char eeprom_image[EEPROM_MAX], chksum, eisa_cr = 0; 412 413 /* 414 ** Stop the EWRK3. Enable the DBR ROM. Disable interrupts and remote boot. 415 ** This also disables the EISA_ENABLE bit in the EISA Control Register. 416 */ 417 if (iobase > 0x400) 418 eisa_cr = inb(EISA_CR); 419 INIT_EWRK3; 420 421 nicsr = inb(EWRK3_CSR); 422 423 icr = inb(EWRK3_ICR); 424 icr &= 0x70; 425 outb(icr, EWRK3_ICR); /* Disable all the IRQs */ 426 427 if (nicsr != (CSR_TXD | CSR_RXD)) 428 return -ENXIO; 429 430 /* Check that the EEPROM is alive and well and not living on Pluto... */ 431 for (chksum = 0, i = 0; i < EEPROM_MAX; i += 2) { 432 union { 433 short val; 434 char c[2]; 435 } tmp; 436 437 tmp.val = (short) Read_EEPROM(iobase, (i >> 1)); 438 eeprom_image[i] = tmp.c[0]; 439 eeprom_image[i + 1] = tmp.c[1]; 440 chksum += eeprom_image[i] + eeprom_image[i + 1]; 441 } 442 443 if (chksum != 0) { /* Bad EEPROM Data! */ 444 printk("%s: Device has a bad on-board EEPROM.\n", dev->name); 445 return -ENXIO; 446 } 447 448 EthwrkSignature(name, eeprom_image); 449 if (*name == '\0') 450 return -ENXIO; 451 452 dev->base_addr = iobase; 453 454 if (iobase > 0x400) { 455 outb(eisa_cr, EISA_CR); /* Rewrite the EISA CR */ 456 } 457 lemac = eeprom_image[EEPROM_CHIPVER]; 458 cmr = inb(EWRK3_CMR); 459 460 if (((lemac == LeMAC) && ((cmr & CMR_NO_EEPROM) != CMR_NO_EEPROM)) || 461 ((lemac == LeMAC2) && !(cmr & CMR_HS))) { 462 printk("%s: %s at %#4lx", dev->name, name, iobase); 463 hard_strapped = 1; 464 } else if ((iobase & 0x0fff) == EWRK3_EISA_IO_PORTS) { 465 /* EISA slot address */ 466 printk("%s: %s at %#4lx (EISA slot %ld)", 467 dev->name, name, iobase, ((iobase >> 12) & 0x0f)); 468 } else { /* ISA port address */ 469 printk("%s: %s at %#4lx", dev->name, name, iobase); 470 } 471 472 printk(", h/w address "); 473 if (lemac != LeMAC2) 474 DevicePresent(iobase); /* need after EWRK3_INIT */ 475 status = get_hw_addr(dev, eeprom_image, lemac); 476 printk("%pM\n", dev->dev_addr); 477 478 if (status) { 479 printk(" which has an EEPROM CRC error.\n"); 480 return -ENXIO; 481 } 482 483 if (lemac == LeMAC2) { /* Special LeMAC2 CMR things */ 484 cmr &= ~(CMR_RA | CMR_WB | CMR_LINK | CMR_POLARITY | CMR_0WS); 485 if (eeprom_image[EEPROM_MISC0] & READ_AHEAD) 486 cmr |= CMR_RA; 487 if (eeprom_image[EEPROM_MISC0] & WRITE_BEHIND) 488 cmr |= CMR_WB; 489 if (eeprom_image[EEPROM_NETMAN0] & NETMAN_POL) 490 cmr |= CMR_POLARITY; 491 if (eeprom_image[EEPROM_NETMAN0] & NETMAN_LINK) 492 cmr |= CMR_LINK; 493 if (eeprom_image[EEPROM_MISC0] & _0WS_ENA) 494 cmr |= CMR_0WS; 495 } 496 if (eeprom_image[EEPROM_SETUP] & SETUP_DRAM) 497 cmr |= CMR_DRAM; 498 outb(cmr, EWRK3_CMR); 499 500 cr = inb(EWRK3_CR); /* Set up the Control Register */ 501 cr |= eeprom_image[EEPROM_SETUP] & SETUP_APD; 502 if (cr & SETUP_APD) 503 cr |= eeprom_image[EEPROM_SETUP] & SETUP_PS; 504 cr |= eeprom_image[EEPROM_MISC0] & FAST_BUS; 505 cr |= eeprom_image[EEPROM_MISC0] & ENA_16; 506 outb(cr, EWRK3_CR); 507 508 /* 509 ** Determine the base address and window length for the EWRK3 510 ** RAM from the memory base register. 511 */ 512 mem_start = inb(EWRK3_MBR); 513 shmem_length = 0; 514 if (mem_start != 0) { 515 if ((mem_start >= 0x0a) && (mem_start <= 0x0f)) { 516 mem_start *= SHMEM_64K; 517 shmem_length = SHMEM_64K; 518 } else if ((mem_start >= 0x14) && (mem_start <= 0x1f)) { 519 mem_start *= SHMEM_32K; 520 shmem_length = SHMEM_32K; 521 } else if ((mem_start >= 0x40) && (mem_start <= 0xff)) { 522 mem_start = mem_start * SHMEM_2K + 0x80000; 523 shmem_length = SHMEM_2K; 524 } else { 525 return -ENXIO; 526 } 527 } 528 /* 529 ** See the top of this source code for comments about 530 ** uncommenting this line. 531 */ 532/* FORCE_2K_MODE; */ 533 534 if (hard_strapped) { 535 printk(" is hard strapped.\n"); 536 } else if (mem_start) { 537 printk(" has a %dk RAM window", (int) (shmem_length >> 10)); 538 printk(" at 0x%.5lx", mem_start); 539 } else { 540 printk(" is in I/O only mode"); 541 } 542 543 lp = netdev_priv(dev); 544 lp->shmem_base = mem_start; 545 lp->shmem = ioremap(mem_start, shmem_length); 546 if (!lp->shmem) 547 return -ENOMEM; 548 lp->shmem_length = shmem_length; 549 lp->lemac = lemac; 550 lp->hard_strapped = hard_strapped; 551 lp->led_mask = CR_LED; 552 spin_lock_init(&lp->hw_lock); 553 554 lp->mPage = 64; 555 if (cmr & CMR_DRAM) 556 lp->mPage <<= 1; /* 2 DRAMS on module */ 557 558 sprintf(lp->adapter_name, "%s (%s)", name, dev->name); 559 560 lp->irq_mask = ICR_TNEM | ICR_TXDM | ICR_RNEM | ICR_RXDM; 561 562 if (!hard_strapped) { 563 /* 564 ** Enable EWRK3 board interrupts for autoprobing 565 */ 566 icr |= ICR_IE; /* Enable interrupts */ 567 outb(icr, EWRK3_ICR); 568 569 /* The DMA channel may be passed in on this parameter. */ 570 dev->dma = 0; 571 572 /* To auto-IRQ we enable the initialization-done and DMA err, 573 interrupts. For now we will always get a DMA error. */ 574 if (dev->irq < 2) { 575#ifndef MODULE 576 u_char irqnum; 577 unsigned long irq_mask; 578 579 580 irq_mask = probe_irq_on(); 581 582 /* 583 ** Trigger a TNE interrupt. 584 */ 585 icr |= ICR_TNEM; 586 outb(1, EWRK3_TDQ); /* Write to the TX done queue */ 587 outb(icr, EWRK3_ICR); /* Unmask the TXD interrupt */ 588 589 irqnum = irq[((icr & IRQ_SEL) >> 4)]; 590 591 mdelay(20); 592 dev->irq = probe_irq_off(irq_mask); 593 if ((dev->irq) && (irqnum == dev->irq)) { 594 printk(" and uses IRQ%d.\n", dev->irq); 595 } else { 596 if (!dev->irq) { 597 printk(" and failed to detect IRQ line.\n"); 598 } else if ((irqnum == 1) && (lemac == LeMAC2)) { 599 printk(" and an illegal IRQ line detected.\n"); 600 } else { 601 printk(", but incorrect IRQ line detected.\n"); 602 } 603 iounmap(lp->shmem); 604 return -ENXIO; 605 } 606 607 DISABLE_IRQs; /* Mask all interrupts */ 608 609#endif /* MODULE */ 610 } else { 611 printk(" and requires IRQ%d.\n", dev->irq); 612 } 613 } 614 615 if (ewrk3_debug > 1) { 616 printk(version); 617 } 618 /* The EWRK3-specific entries in the device structure. */ 619 dev->netdev_ops = &ewrk3_netdev_ops; 620 if (lp->adapter_name[4] == '3') 621 SET_ETHTOOL_OPS(dev, ðtool_ops_203); 622 else 623 SET_ETHTOOL_OPS(dev, ðtool_ops); 624 dev->watchdog_timeo = QUEUE_PKT_TIMEOUT; 625 626 dev->mem_start = 0; 627 628 return 0; 629} 630 631 632static int ewrk3_open(struct net_device *dev) 633{ 634 struct ewrk3_private *lp = netdev_priv(dev); 635 u_long iobase = dev->base_addr; 636 int status = 0; 637 u_char icr, csr; 638 639 /* 640 ** Stop the TX and RX... 641 */ 642 STOP_EWRK3; 643 644 if (!lp->hard_strapped) { 645 if (request_irq(dev->irq, (void *) ewrk3_interrupt, 0, "ewrk3", dev)) { 646 printk("ewrk3_open(): Requested IRQ%d is busy\n", dev->irq); 647 status = -EAGAIN; 648 } else { 649 650 /* 651 ** Re-initialize the EWRK3... 652 */ 653 ewrk3_init(dev); 654 655 if (ewrk3_debug > 1) { 656 printk("%s: ewrk3 open with irq %d\n", dev->name, dev->irq); 657 printk(" physical address: %pM\n", dev->dev_addr); 658 if (lp->shmem_length == 0) { 659 printk(" no shared memory, I/O only mode\n"); 660 } else { 661 printk(" start of shared memory: 0x%08lx\n", lp->shmem_base); 662 printk(" window length: 0x%04lx\n", lp->shmem_length); 663 } 664 printk(" # of DRAMS: %d\n", ((inb(EWRK3_CMR) & 0x02) ? 2 : 1)); 665 printk(" csr: 0x%02x\n", inb(EWRK3_CSR)); 666 printk(" cr: 0x%02x\n", inb(EWRK3_CR)); 667 printk(" icr: 0x%02x\n", inb(EWRK3_ICR)); 668 printk(" cmr: 0x%02x\n", inb(EWRK3_CMR)); 669 printk(" fmqc: 0x%02x\n", inb(EWRK3_FMQC)); 670 } 671 netif_start_queue(dev); 672 /* 673 ** Unmask EWRK3 board interrupts 674 */ 675 icr = inb(EWRK3_ICR); 676 ENABLE_IRQs; 677 678 } 679 } else { 680 printk(KERN_ERR "%s: ewrk3 available for hard strapped set up only.\n", dev->name); 681 printk(KERN_ERR " Run the 'ewrk3setup' utility or remove the hard straps.\n"); 682 return -EINVAL; 683 } 684 685 return status; 686} 687 688/* 689 ** Initialize the EtherWORKS 3 operating conditions 690 */ 691static void ewrk3_init(struct net_device *dev) 692{ 693 struct ewrk3_private *lp = netdev_priv(dev); 694 u_char csr, page; 695 u_long iobase = dev->base_addr; 696 int i; 697 698 /* 699 ** Enable any multicasts 700 */ 701 set_multicast_list(dev); 702 703 /* 704 ** Set hardware MAC address. Address is initialized from the EEPROM 705 ** during startup but may have since been changed by the user. 706 */ 707 for (i=0; i<ETH_ALEN; i++) 708 outb(dev->dev_addr[i], EWRK3_PAR0 + i); 709 710 /* 711 ** Clean out any remaining entries in all the queues here 712 */ 713 while (inb(EWRK3_TQ)); 714 while (inb(EWRK3_TDQ)); 715 while (inb(EWRK3_RQ)); 716 while (inb(EWRK3_FMQ)); 717 718 /* 719 ** Write a clean free memory queue 720 */ 721 for (page = 1; page < lp->mPage; page++) { /* Write the free page numbers */ 722 outb(page, EWRK3_FMQ); /* to the Free Memory Queue */ 723 } 724 725 START_EWRK3; /* Enable the TX and/or RX */ 726} 727 728/* 729 * Transmit timeout 730 */ 731 732static void ewrk3_timeout(struct net_device *dev) 733{ 734 struct ewrk3_private *lp = netdev_priv(dev); 735 u_char icr, csr; 736 u_long iobase = dev->base_addr; 737 738 if (!lp->hard_strapped) 739 { 740 printk(KERN_WARNING"%s: transmit timed/locked out, status %04x, resetting.\n", 741 dev->name, inb(EWRK3_CSR)); 742 743 /* 744 ** Mask all board interrupts 745 */ 746 DISABLE_IRQs; 747 748 /* 749 ** Stop the TX and RX... 750 */ 751 STOP_EWRK3; 752 753 ewrk3_init(dev); 754 755 /* 756 ** Unmask EWRK3 board interrupts 757 */ 758 ENABLE_IRQs; 759 760 dev->trans_start = jiffies; /* prevent tx timeout */ 761 netif_wake_queue(dev); 762 } 763} 764 765/* 766 ** Writes a socket buffer to the free page queue 767 */ 768static netdev_tx_t ewrk3_queue_pkt(struct sk_buff *skb, struct net_device *dev) 769{ 770 struct ewrk3_private *lp = netdev_priv(dev); 771 u_long iobase = dev->base_addr; 772 void __iomem *buf = NULL; 773 u_char icr; 774 u_char page; 775 776 spin_lock_irq (&lp->hw_lock); 777 DISABLE_IRQs; 778 779 /* if no resources available, exit, request packet be queued */ 780 if (inb (EWRK3_FMQC) == 0) { 781 printk (KERN_WARNING "%s: ewrk3_queue_pkt(): No free resources...\n", 782 dev->name); 783 printk (KERN_WARNING "%s: ewrk3_queue_pkt(): CSR: %02x ICR: %02x FMQC: %02x\n", 784 dev->name, inb (EWRK3_CSR), inb (EWRK3_ICR), 785 inb (EWRK3_FMQC)); 786 goto err_out; 787 } 788 789 /* 790 ** Get a free page from the FMQ 791 */ 792 if ((page = inb (EWRK3_FMQ)) >= lp->mPage) { 793 printk ("ewrk3_queue_pkt(): Invalid free memory page (%d).\n", 794 (u_char) page); 795 goto err_out; 796 } 797 798 799 /* 800 ** Set up shared memory window and pointer into the window 801 */ 802 if (lp->shmem_length == IO_ONLY) { 803 outb (page, EWRK3_IOPR); 804 } else if (lp->shmem_length == SHMEM_2K) { 805 buf = lp->shmem; 806 outb (page, EWRK3_MPR); 807 } else if (lp->shmem_length == SHMEM_32K) { 808 buf = (((short) page << 11) & 0x7800) + lp->shmem; 809 outb ((page >> 4), EWRK3_MPR); 810 } else if (lp->shmem_length == SHMEM_64K) { 811 buf = (((short) page << 11) & 0xf800) + lp->shmem; 812 outb ((page >> 5), EWRK3_MPR); 813 } else { 814 printk (KERN_ERR "%s: Oops - your private data area is hosed!\n", 815 dev->name); 816 BUG (); 817 } 818 819 /* 820 ** Set up the buffer control structures and copy the data from 821 ** the socket buffer to the shared memory . 822 */ 823 if (lp->shmem_length == IO_ONLY) { 824 int i; 825 u_char *p = skb->data; 826 outb ((char) (TCR_QMODE | TCR_PAD | TCR_IFC), EWRK3_DATA); 827 outb ((char) (skb->len & 0xff), EWRK3_DATA); 828 outb ((char) ((skb->len >> 8) & 0xff), EWRK3_DATA); 829 outb ((char) 0x04, EWRK3_DATA); 830 for (i = 0; i < skb->len; i++) { 831 outb (*p++, EWRK3_DATA); 832 } 833 outb (page, EWRK3_TQ); /* Start sending pkt */ 834 } else { 835 writeb ((char) (TCR_QMODE | TCR_PAD | TCR_IFC), buf); /* ctrl byte */ 836 buf += 1; 837 writeb ((char) (skb->len & 0xff), buf); /* length (16 bit xfer) */ 838 buf += 1; 839 if (lp->txc) { 840 writeb(((skb->len >> 8) & 0xff) | XCT, buf); 841 buf += 1; 842 writeb (0x04, buf); /* index byte */ 843 buf += 1; 844 writeb (0x00, (buf + skb->len)); /* Write the XCT flag */ 845 memcpy_toio (buf, skb->data, PRELOAD); /* Write PRELOAD bytes */ 846 outb (page, EWRK3_TQ); /* Start sending pkt */ 847 memcpy_toio (buf + PRELOAD, 848 skb->data + PRELOAD, 849 skb->len - PRELOAD); 850 writeb (0xff, (buf + skb->len)); /* Write the XCT flag */ 851 } else { 852 writeb ((skb->len >> 8) & 0xff, buf); 853 buf += 1; 854 writeb (0x04, buf); /* index byte */ 855 buf += 1; 856 memcpy_toio (buf, skb->data, skb->len); /* Write data bytes */ 857 outb (page, EWRK3_TQ); /* Start sending pkt */ 858 } 859 } 860 861 ENABLE_IRQs; 862 spin_unlock_irq (&lp->hw_lock); 863 864 dev->stats.tx_bytes += skb->len; 865 dev_kfree_skb (skb); 866 867 /* Check for free resources: stop Tx queue if there are none */ 868 if (inb (EWRK3_FMQC) == 0) 869 netif_stop_queue (dev); 870 871 return NETDEV_TX_OK; 872 873err_out: 874 ENABLE_IRQs; 875 spin_unlock_irq (&lp->hw_lock); 876 return NETDEV_TX_BUSY; 877} 878 879/* 880 ** The EWRK3 interrupt handler. 881 */ 882static irqreturn_t ewrk3_interrupt(int irq, void *dev_id) 883{ 884 struct net_device *dev = dev_id; 885 struct ewrk3_private *lp; 886 u_long iobase; 887 u_char icr, cr, csr; 888 889 lp = netdev_priv(dev); 890 iobase = dev->base_addr; 891 892 /* get the interrupt information */ 893 csr = inb(EWRK3_CSR); 894 895 /* 896 ** Mask the EWRK3 board interrupts and turn on the LED 897 */ 898 spin_lock(&lp->hw_lock); 899 DISABLE_IRQs; 900 901 cr = inb(EWRK3_CR); 902 cr |= lp->led_mask; 903 outb(cr, EWRK3_CR); 904 905 if (csr & CSR_RNE) /* Rx interrupt (packet[s] arrived) */ 906 ewrk3_rx(dev); 907 908 if (csr & CSR_TNE) /* Tx interrupt (packet sent) */ 909 ewrk3_tx(dev); 910 911 /* 912 ** Now deal with the TX/RX disable flags. These are set when there 913 ** are no more resources. If resources free up then enable these 914 ** interrupts, otherwise mask them - failure to do this will result 915 ** in the system hanging in an interrupt loop. 916 */ 917 if (inb(EWRK3_FMQC)) { /* any resources available? */ 918 lp->irq_mask |= ICR_TXDM | ICR_RXDM; /* enable the interrupt source */ 919 csr &= ~(CSR_TXD | CSR_RXD); /* ensure restart of a stalled TX or RX */ 920 outb(csr, EWRK3_CSR); 921 netif_wake_queue(dev); 922 } else { 923 lp->irq_mask &= ~(ICR_TXDM | ICR_RXDM); /* disable the interrupt source */ 924 } 925 926 /* Unmask the EWRK3 board interrupts and turn off the LED */ 927 cr &= ~(lp->led_mask); 928 outb(cr, EWRK3_CR); 929 ENABLE_IRQs; 930 spin_unlock(&lp->hw_lock); 931 return IRQ_HANDLED; 932} 933 934/* Called with lp->hw_lock held */ 935static int ewrk3_rx(struct net_device *dev) 936{ 937 struct ewrk3_private *lp = netdev_priv(dev); 938 u_long iobase = dev->base_addr; 939 int i, status = 0; 940 u_char page; 941 void __iomem *buf = NULL; 942 943 while (inb(EWRK3_RQC) && !status) { /* Whilst there's incoming data */ 944 if ((page = inb(EWRK3_RQ)) < lp->mPage) { /* Get next entry's buffer page */ 945 /* 946 ** Set up shared memory window and pointer into the window 947 */ 948 if (lp->shmem_length == IO_ONLY) { 949 outb(page, EWRK3_IOPR); 950 } else if (lp->shmem_length == SHMEM_2K) { 951 buf = lp->shmem; 952 outb(page, EWRK3_MPR); 953 } else if (lp->shmem_length == SHMEM_32K) { 954 buf = (((short) page << 11) & 0x7800) + lp->shmem; 955 outb((page >> 4), EWRK3_MPR); 956 } else if (lp->shmem_length == SHMEM_64K) { 957 buf = (((short) page << 11) & 0xf800) + lp->shmem; 958 outb((page >> 5), EWRK3_MPR); 959 } else { 960 status = -1; 961 printk("%s: Oops - your private data area is hosed!\n", dev->name); 962 } 963 964 if (!status) { 965 char rx_status; 966 int pkt_len; 967 968 if (lp->shmem_length == IO_ONLY) { 969 rx_status = inb(EWRK3_DATA); 970 pkt_len = inb(EWRK3_DATA); 971 pkt_len |= ((u_short) inb(EWRK3_DATA) << 8); 972 } else { 973 rx_status = readb(buf); 974 buf += 1; 975 pkt_len = readw(buf); 976 buf += 3; 977 } 978 979 if (!(rx_status & R_ROK)) { /* There was an error. */ 980 dev->stats.rx_errors++; /* Update the error stats. */ 981 if (rx_status & R_DBE) 982 dev->stats.rx_frame_errors++; 983 if (rx_status & R_CRC) 984 dev->stats.rx_crc_errors++; 985 if (rx_status & R_PLL) 986 dev->stats.rx_fifo_errors++; 987 } else { 988 struct sk_buff *skb; 989 990 if ((skb = dev_alloc_skb(pkt_len + 2)) != NULL) { 991 unsigned char *p; 992 skb_reserve(skb, 2); /* Align to 16 bytes */ 993 p = skb_put(skb, pkt_len); 994 995 if (lp->shmem_length == IO_ONLY) { 996 *p = inb(EWRK3_DATA); /* dummy read */ 997 for (i = 0; i < pkt_len; i++) { 998 *p++ = inb(EWRK3_DATA); 999 } 1000 } else { 1001 memcpy_fromio(p, buf, pkt_len); 1002 } 1003 1004 for (i = 1; i < EWRK3_PKT_STAT_SZ - 1; i++) { 1005 if (pkt_len < i * EWRK3_PKT_BIN_SZ) { 1006 lp->pktStats.bins[i]++; 1007 i = EWRK3_PKT_STAT_SZ; 1008 } 1009 } 1010 p = skb->data; /* Look at the dest addr */ 1011 if (p[0] & 0x01) { /* Multicast/Broadcast */ 1012 if ((*(s16 *) & p[0] == -1) && (*(s16 *) & p[2] == -1) && (*(s16 *) & p[4] == -1)) { 1013 lp->pktStats.broadcast++; 1014 } else { 1015 lp->pktStats.multicast++; 1016 } 1017 } else if ((*(s16 *) & p[0] == *(s16 *) & dev->dev_addr[0]) && 1018 (*(s16 *) & p[2] == *(s16 *) & dev->dev_addr[2]) && 1019 (*(s16 *) & p[4] == *(s16 *) & dev->dev_addr[4])) { 1020 lp->pktStats.unicast++; 1021 } 1022 lp->pktStats.bins[0]++; /* Duplicates stats.rx_packets */ 1023 if (lp->pktStats.bins[0] == 0) { /* Reset counters */ 1024 memset(&lp->pktStats, 0, sizeof(lp->pktStats)); 1025 } 1026 /* 1027 ** Notify the upper protocol layers that there is another 1028 ** packet to handle 1029 */ 1030 skb->protocol = eth_type_trans(skb, dev); 1031 netif_rx(skb); 1032 1033 /* 1034 ** Update stats 1035 */ 1036 dev->stats.rx_packets++; 1037 dev->stats.rx_bytes += pkt_len; 1038 } else { 1039 printk("%s: Insufficient memory; nuking packet.\n", dev->name); 1040 dev->stats.rx_dropped++; /* Really, deferred. */ 1041 break; 1042 } 1043 } 1044 } 1045 /* 1046 ** Return the received buffer to the free memory queue 1047 */ 1048 outb(page, EWRK3_FMQ); 1049 } else { 1050 printk("ewrk3_rx(): Illegal page number, page %d\n", page); 1051 printk("ewrk3_rx(): CSR: %02x ICR: %02x FMQC: %02x\n", inb(EWRK3_CSR), inb(EWRK3_ICR), inb(EWRK3_FMQC)); 1052 } 1053 } 1054 return status; 1055} 1056 1057/* 1058** Buffer sent - check for TX buffer errors. 1059** Called with lp->hw_lock held 1060*/ 1061static int ewrk3_tx(struct net_device *dev) 1062{ 1063 struct ewrk3_private *lp = netdev_priv(dev); 1064 u_long iobase = dev->base_addr; 1065 u_char tx_status; 1066 1067 while ((tx_status = inb(EWRK3_TDQ)) > 0) { /* Whilst there's old buffers */ 1068 if (tx_status & T_VSTS) { /* The status is valid */ 1069 if (tx_status & T_TXE) { 1070 dev->stats.tx_errors++; 1071 if (tx_status & T_NCL) 1072 dev->stats.tx_carrier_errors++; 1073 if (tx_status & T_LCL) 1074 dev->stats.tx_window_errors++; 1075 if (tx_status & T_CTU) { 1076 if ((tx_status & T_COLL) ^ T_XUR) { 1077 lp->pktStats.tx_underruns++; 1078 } else { 1079 lp->pktStats.excessive_underruns++; 1080 } 1081 } else if (tx_status & T_COLL) { 1082 if ((tx_status & T_COLL) ^ T_XCOLL) { 1083 dev->stats.collisions++; 1084 } else { 1085 lp->pktStats.excessive_collisions++; 1086 } 1087 } 1088 } else { 1089 dev->stats.tx_packets++; 1090 } 1091 } 1092 } 1093 1094 return 0; 1095} 1096 1097static int ewrk3_close(struct net_device *dev) 1098{ 1099 struct ewrk3_private *lp = netdev_priv(dev); 1100 u_long iobase = dev->base_addr; 1101 u_char icr, csr; 1102 1103 netif_stop_queue(dev); 1104 1105 if (ewrk3_debug > 1) { 1106 printk("%s: Shutting down ethercard, status was %2.2x.\n", 1107 dev->name, inb(EWRK3_CSR)); 1108 } 1109 /* 1110 ** We stop the EWRK3 here... mask interrupts and stop TX & RX 1111 */ 1112 DISABLE_IRQs; 1113 1114 STOP_EWRK3; 1115 1116 /* 1117 ** Clean out the TX and RX queues here (note that one entry 1118 ** may get added to either the TXD or RX queues if the TX or RX 1119 ** just starts processing a packet before the STOP_EWRK3 command 1120 ** is received. This will be flushed in the ewrk3_open() call). 1121 */ 1122 while (inb(EWRK3_TQ)); 1123 while (inb(EWRK3_TDQ)); 1124 while (inb(EWRK3_RQ)); 1125 1126 if (!lp->hard_strapped) { 1127 free_irq(dev->irq, dev); 1128 } 1129 return 0; 1130} 1131 1132/* 1133 ** Set or clear the multicast filter for this adapter. 1134 */ 1135static void set_multicast_list(struct net_device *dev) 1136{ 1137 struct ewrk3_private *lp = netdev_priv(dev); 1138 u_long iobase = dev->base_addr; 1139 u_char csr; 1140 1141 csr = inb(EWRK3_CSR); 1142 1143 if (lp->shmem_length == IO_ONLY) { 1144 lp->mctbl = NULL; 1145 } else { 1146 lp->mctbl = lp->shmem + PAGE0_HTE; 1147 } 1148 1149 csr &= ~(CSR_PME | CSR_MCE); 1150 if (dev->flags & IFF_PROMISC) { /* set promiscuous mode */ 1151 csr |= CSR_PME; 1152 outb(csr, EWRK3_CSR); 1153 } else { 1154 SetMulticastFilter(dev); 1155 csr |= CSR_MCE; 1156 outb(csr, EWRK3_CSR); 1157 } 1158} 1159 1160/* 1161 ** Calculate the hash code and update the logical address filter 1162 ** from a list of ethernet multicast addresses. 1163 ** Little endian crc one liner from Matt Thomas, DEC. 1164 ** 1165 ** Note that when clearing the table, the broadcast bit must remain asserted 1166 ** to receive broadcast messages. 1167 */ 1168static void SetMulticastFilter(struct net_device *dev) 1169{ 1170 struct ewrk3_private *lp = netdev_priv(dev); 1171 struct netdev_hw_addr *ha; 1172 u_long iobase = dev->base_addr; 1173 int i; 1174 char *addrs, bit, byte; 1175 short __iomem *p = lp->mctbl; 1176 u16 hashcode; 1177 u32 crc; 1178 1179 spin_lock_irq(&lp->hw_lock); 1180 1181 if (lp->shmem_length == IO_ONLY) { 1182 outb(0, EWRK3_IOPR); 1183 outw(PAGE0_HTE, EWRK3_PIR1); 1184 } else { 1185 outb(0, EWRK3_MPR); 1186 } 1187 1188 if (dev->flags & IFF_ALLMULTI) { 1189 for (i = 0; i < (HASH_TABLE_LEN >> 3); i++) { 1190 if (lp->shmem_length == IO_ONLY) { 1191 outb(0xff, EWRK3_DATA); 1192 } else { /* memset didn't work here */ 1193 writew(0xffff, p); 1194 p++; 1195 i++; 1196 } 1197 } 1198 } else { 1199 /* Clear table except for broadcast bit */ 1200 if (lp->shmem_length == IO_ONLY) { 1201 for (i = 0; i < (HASH_TABLE_LEN >> 4) - 1; i++) { 1202 outb(0x00, EWRK3_DATA); 1203 } 1204 outb(0x80, EWRK3_DATA); 1205 i++; /* insert the broadcast bit */ 1206 for (; i < (HASH_TABLE_LEN >> 3); i++) { 1207 outb(0x00, EWRK3_DATA); 1208 } 1209 } else { 1210 memset_io(lp->mctbl, 0, HASH_TABLE_LEN >> 3); 1211 writeb(0x80, lp->mctbl + (HASH_TABLE_LEN >> 4) - 1); 1212 } 1213 1214 /* Update table */ 1215 netdev_for_each_mc_addr(ha, dev) { 1216 addrs = ha->addr; 1217 if ((*addrs & 0x01) == 1) { /* multicast address? */ 1218 crc = ether_crc_le(ETH_ALEN, addrs); 1219 hashcode = crc & ((1 << 9) - 1); /* hashcode is 9 LSb of CRC */ 1220 1221 byte = hashcode >> 3; /* bit[3-8] -> byte in filter */ 1222 bit = 1 << (hashcode & 0x07); /* bit[0-2] -> bit in byte */ 1223 1224 if (lp->shmem_length == IO_ONLY) { 1225 u_char tmp; 1226 1227 outw(PAGE0_HTE + byte, EWRK3_PIR1); 1228 tmp = inb(EWRK3_DATA); 1229 tmp |= bit; 1230 outw(PAGE0_HTE + byte, EWRK3_PIR1); 1231 outb(tmp, EWRK3_DATA); 1232 } else { 1233 writeb(readb(lp->mctbl + byte) | bit, lp->mctbl + byte); 1234 } 1235 } 1236 } 1237 } 1238 1239 spin_unlock_irq(&lp->hw_lock); 1240} 1241 1242/* 1243 ** ISA bus I/O device probe 1244 */ 1245static int __init isa_probe(struct net_device *dev, u_long ioaddr) 1246{ 1247 int i = num_ewrks3s, maxSlots; 1248 int ret = -ENODEV; 1249 1250 u_long iobase; 1251 1252 if (ioaddr >= 0x400) 1253 goto out; 1254 1255 if (ioaddr == 0) { /* Autoprobing */ 1256 iobase = EWRK3_IO_BASE; /* Get the first slot address */ 1257 maxSlots = 24; 1258 } else { /* Probe a specific location */ 1259 iobase = ioaddr; 1260 maxSlots = i + 1; 1261 } 1262 1263 for (; (i < maxSlots) && (dev != NULL); 1264 iobase += EWRK3_IOP_INC, i++) 1265 { 1266 if (request_region(iobase, EWRK3_TOTAL_SIZE, DRV_NAME)) { 1267 if (DevicePresent(iobase) == 0) { 1268 int irq = dev->irq; 1269 ret = ewrk3_hw_init(dev, iobase); 1270 if (!ret) 1271 break; 1272 dev->irq = irq; 1273 } 1274 release_region(iobase, EWRK3_TOTAL_SIZE); 1275 } 1276 } 1277 out: 1278 1279 return ret; 1280} 1281 1282/* 1283 ** EISA bus I/O device probe. Probe from slot 1 since slot 0 is usually 1284 ** the motherboard. 1285 */ 1286static int __init eisa_probe(struct net_device *dev, u_long ioaddr) 1287{ 1288 int i, maxSlots; 1289 u_long iobase; 1290 int ret = -ENODEV; 1291 1292 if (ioaddr < 0x1000) 1293 goto out; 1294 1295 iobase = ioaddr; 1296 i = (ioaddr >> 12); 1297 maxSlots = i + 1; 1298 1299 for (i = 1; (i < maxSlots) && (dev != NULL); i++, iobase += EISA_SLOT_INC) { 1300 if (EISA_signature(name, EISA_ID) == 0) { 1301 if (request_region(iobase, EWRK3_TOTAL_SIZE, DRV_NAME) && 1302 DevicePresent(iobase) == 0) { 1303 int irq = dev->irq; 1304 ret = ewrk3_hw_init(dev, iobase); 1305 if (!ret) 1306 break; 1307 dev->irq = irq; 1308 } 1309 release_region(iobase, EWRK3_TOTAL_SIZE); 1310 } 1311 } 1312 1313 out: 1314 return ret; 1315} 1316 1317 1318/* 1319 ** Read the EWRK3 EEPROM using this routine 1320 */ 1321static int Read_EEPROM(u_long iobase, u_char eaddr) 1322{ 1323 int i; 1324 1325 outb((eaddr & 0x3f), EWRK3_PIR1); /* set up 6 bits of address info */ 1326 outb(EEPROM_RD, EWRK3_IOPR); /* issue read command */ 1327 for (i = 0; i < 5000; i++) 1328 inb(EWRK3_CSR); /* wait 1msec */ 1329 1330 return inw(EWRK3_EPROM1); /* 16 bits data return */ 1331} 1332 1333/* 1334 ** Write the EWRK3 EEPROM using this routine 1335 */ 1336static int Write_EEPROM(short data, u_long iobase, u_char eaddr) 1337{ 1338 int i; 1339 1340 outb(EEPROM_WR_EN, EWRK3_IOPR); /* issue write enable command */ 1341 for (i = 0; i < 5000; i++) 1342 inb(EWRK3_CSR); /* wait 1msec */ 1343 outw(data, EWRK3_EPROM1); /* write data to register */ 1344 outb((eaddr & 0x3f), EWRK3_PIR1); /* set up 6 bits of address info */ 1345 outb(EEPROM_WR, EWRK3_IOPR); /* issue write command */ 1346 for (i = 0; i < 75000; i++) 1347 inb(EWRK3_CSR); /* wait 15msec */ 1348 outb(EEPROM_WR_DIS, EWRK3_IOPR); /* issue write disable command */ 1349 for (i = 0; i < 5000; i++) 1350 inb(EWRK3_CSR); /* wait 1msec */ 1351 1352 return 0; 1353} 1354 1355/* 1356 ** Look for a particular board name in the on-board EEPROM. 1357 */ 1358static void __init EthwrkSignature(char *name, char *eeprom_image) 1359{ 1360 int i; 1361 char *signatures[] = EWRK3_SIGNATURE; 1362 1363 for (i=0; *signatures[i] != '\0'; i++) 1364 if( !strncmp(eeprom_image+EEPROM_PNAME7, signatures[i], strlen(signatures[i])) ) 1365 break; 1366 1367 if (*signatures[i] != '\0') { 1368 memcpy(name, eeprom_image+EEPROM_PNAME7, EWRK3_STRLEN); 1369 name[EWRK3_STRLEN] = '\0'; 1370 } else 1371 name[0] = '\0'; 1372} 1373 1374/* 1375 ** Look for a special sequence in the Ethernet station address PROM that 1376 ** is common across all EWRK3 products. 1377 ** 1378 ** Search the Ethernet address ROM for the signature. Since the ROM address 1379 ** counter can start at an arbitrary point, the search must include the entire 1380 ** probe sequence length plus the (length_of_the_signature - 1). 1381 ** Stop the search IMMEDIATELY after the signature is found so that the 1382 ** PROM address counter is correctly positioned at the start of the 1383 ** ethernet address for later read out. 1384 */ 1385 1386static int __init DevicePresent(u_long iobase) 1387{ 1388 union { 1389 struct { 1390 u32 a; 1391 u32 b; 1392 } llsig; 1393 char Sig[sizeof(u32) << 1]; 1394 } 1395 dev; 1396 short sigLength; 1397 char data; 1398 int i, j, status = 0; 1399 1400 dev.llsig.a = ETH_PROM_SIG; 1401 dev.llsig.b = ETH_PROM_SIG; 1402 sigLength = sizeof(u32) << 1; 1403 1404 for (i = 0, j = 0; j < sigLength && i < PROBE_LENGTH + sigLength - 1; i++) { 1405 data = inb(EWRK3_APROM); 1406 if (dev.Sig[j] == data) { /* track signature */ 1407 j++; 1408 } else { /* lost signature; begin search again */ 1409 if (data == dev.Sig[0]) { 1410 j = 1; 1411 } else { 1412 j = 0; 1413 } 1414 } 1415 } 1416 1417 if (j != sigLength) { 1418 status = -ENODEV; /* search failed */ 1419 } 1420 return status; 1421} 1422 1423static u_char __init get_hw_addr(struct net_device *dev, u_char * eeprom_image, char chipType) 1424{ 1425 int i, j, k; 1426 u_short chksum; 1427 u_char crc, lfsr, sd, status = 0; 1428 u_long iobase = dev->base_addr; 1429 u16 tmp; 1430 1431 if (chipType == LeMAC2) { 1432 for (crc = 0x6a, j = 0; j < ETH_ALEN; j++) { 1433 sd = dev->dev_addr[j] = eeprom_image[EEPROM_PADDR0 + j]; 1434 outb(dev->dev_addr[j], EWRK3_PAR0 + j); 1435 for (k = 0; k < 8; k++, sd >>= 1) { 1436 lfsr = ((((crc & 0x02) >> 1) ^ (crc & 0x01)) ^ (sd & 0x01)) << 7; 1437 crc = (crc >> 1) + lfsr; 1438 } 1439 } 1440 if (crc != eeprom_image[EEPROM_PA_CRC]) 1441 status = -1; 1442 } else { 1443 for (i = 0, k = 0; i < ETH_ALEN;) { 1444 k <<= 1; 1445 if (k > 0xffff) 1446 k -= 0xffff; 1447 1448 k += (u_char) (tmp = inb(EWRK3_APROM)); 1449 dev->dev_addr[i] = (u_char) tmp; 1450 outb(dev->dev_addr[i], EWRK3_PAR0 + i); 1451 i++; 1452 k += (u_short) ((tmp = inb(EWRK3_APROM)) << 8); 1453 dev->dev_addr[i] = (u_char) tmp; 1454 outb(dev->dev_addr[i], EWRK3_PAR0 + i); 1455 i++; 1456 1457 if (k > 0xffff) 1458 k -= 0xffff; 1459 } 1460 if (k == 0xffff) 1461 k = 0; 1462 chksum = inb(EWRK3_APROM); 1463 chksum |= (inb(EWRK3_APROM) << 8); 1464 if (k != chksum) 1465 status = -1; 1466 } 1467 1468 return status; 1469} 1470 1471/* 1472 ** Look for a particular board name in the EISA configuration space 1473 */ 1474static int __init EISA_signature(char *name, s32 eisa_id) 1475{ 1476 u_long i; 1477 char *signatures[] = EWRK3_SIGNATURE; 1478 char ManCode[EWRK3_STRLEN]; 1479 union { 1480 s32 ID; 1481 char Id[4]; 1482 } Eisa; 1483 int status = 0; 1484 1485 *name = '\0'; 1486 for (i = 0; i < 4; i++) { 1487 Eisa.Id[i] = inb(eisa_id + i); 1488 } 1489 1490 ManCode[0] = (((Eisa.Id[0] >> 2) & 0x1f) + 0x40); 1491 ManCode[1] = (((Eisa.Id[1] & 0xe0) >> 5) + ((Eisa.Id[0] & 0x03) << 3) + 0x40); 1492 ManCode[2] = (((Eisa.Id[2] >> 4) & 0x0f) + 0x30); 1493 ManCode[3] = ((Eisa.Id[2] & 0x0f) + 0x30); 1494 ManCode[4] = (((Eisa.Id[3] >> 4) & 0x0f) + 0x30); 1495 ManCode[5] = '\0'; 1496 1497 for (i = 0; (*signatures[i] != '\0') && (*name == '\0'); i++) { 1498 if (strstr(ManCode, signatures[i]) != NULL) { 1499 strcpy(name, ManCode); 1500 status = 1; 1501 } 1502 } 1503 1504 return status; /* return the device name string */ 1505} 1506 1507static void ewrk3_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) 1508{ 1509 int fwrev = Read_EEPROM(dev->base_addr, EEPROM_REVLVL); 1510 1511 strcpy(info->driver, DRV_NAME); 1512 strcpy(info->version, DRV_VERSION); 1513 sprintf(info->fw_version, "%d", fwrev); 1514 strcpy(info->bus_info, "N/A"); 1515 info->eedump_len = EEPROM_MAX; 1516} 1517 1518static int ewrk3_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd) 1519{ 1520 struct ewrk3_private *lp = netdev_priv(dev); 1521 unsigned long iobase = dev->base_addr; 1522 u8 cr = inb(EWRK3_CR); 1523 1524 switch (lp->adapter_name[4]) { 1525 case '3': /* DE203 */ 1526 ecmd->supported = SUPPORTED_BNC; 1527 ecmd->port = PORT_BNC; 1528 break; 1529 1530 case '4': /* DE204 */ 1531 ecmd->supported = SUPPORTED_TP; 1532 ecmd->port = PORT_TP; 1533 break; 1534 1535 case '5': /* DE205 */ 1536 ecmd->supported = SUPPORTED_TP | SUPPORTED_BNC | SUPPORTED_AUI; 1537 ecmd->autoneg = !(cr & CR_APD); 1538 /* 1539 ** Port is only valid if autoneg is disabled 1540 ** and even then we don't know if AUI is jumpered. 1541 */ 1542 if (!ecmd->autoneg) 1543 ecmd->port = (cr & CR_PSEL) ? PORT_BNC : PORT_TP; 1544 break; 1545 } 1546 1547 ecmd->supported |= SUPPORTED_10baseT_Half; 1548 ecmd->speed = SPEED_10; 1549 ecmd->duplex = DUPLEX_HALF; 1550 return 0; 1551} 1552 1553static int ewrk3_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd) 1554{ 1555 struct ewrk3_private *lp = netdev_priv(dev); 1556 unsigned long iobase = dev->base_addr; 1557 unsigned long flags; 1558 u8 cr; 1559 1560 /* DE205 is the only card with anything to set */ 1561 if (lp->adapter_name[4] != '5') 1562 return -EOPNOTSUPP; 1563 1564 /* Sanity-check parameters */ 1565 if (ecmd->speed != SPEED_10) 1566 return -EINVAL; 1567 if (ecmd->port != PORT_TP && ecmd->port != PORT_BNC) 1568 return -EINVAL; /* AUI is not software-selectable */ 1569 if (ecmd->transceiver != XCVR_INTERNAL) 1570 return -EINVAL; 1571 if (ecmd->duplex != DUPLEX_HALF) 1572 return -EINVAL; 1573 if (ecmd->phy_address != 0) 1574 return -EINVAL; 1575 1576 spin_lock_irqsave(&lp->hw_lock, flags); 1577 cr = inb(EWRK3_CR); 1578 1579 /* If Autoneg is set, change to Auto Port mode */ 1580 /* Otherwise, disable Auto Port and set port explicitly */ 1581 if (ecmd->autoneg) { 1582 cr &= ~CR_APD; 1583 } else { 1584 cr |= CR_APD; 1585 if (ecmd->port == PORT_TP) 1586 cr &= ~CR_PSEL; /* Force TP */ 1587 else 1588 cr |= CR_PSEL; /* Force BNC */ 1589 } 1590 1591 /* Commit the changes */ 1592 outb(cr, EWRK3_CR); 1593 spin_unlock_irqrestore(&lp->hw_lock, flags); 1594 return 0; 1595} 1596 1597static u32 ewrk3_get_link(struct net_device *dev) 1598{ 1599 unsigned long iobase = dev->base_addr; 1600 u8 cmr = inb(EWRK3_CMR); 1601 /* DE203 has BNC only and link status does not apply */ 1602 /* On DE204 this is always valid since TP is the only port. */ 1603 /* On DE205 this reflects TP status even if BNC or AUI is selected. */ 1604 return !(cmr & CMR_LINK); 1605} 1606 1607static int ewrk3_phys_id(struct net_device *dev, u32 data) 1608{ 1609 struct ewrk3_private *lp = netdev_priv(dev); 1610 unsigned long iobase = dev->base_addr; 1611 unsigned long flags; 1612 u8 cr; 1613 int count; 1614 1615 /* Toggle LED 4x per second */ 1616 count = data << 2; 1617 1618 spin_lock_irqsave(&lp->hw_lock, flags); 1619 1620 /* Bail if a PHYS_ID is already in progress */ 1621 if (lp->led_mask == 0) { 1622 spin_unlock_irqrestore(&lp->hw_lock, flags); 1623 return -EBUSY; 1624 } 1625 1626 /* Prevent ISR from twiddling the LED */ 1627 lp->led_mask = 0; 1628 1629 while (count--) { 1630 /* Toggle the LED */ 1631 cr = inb(EWRK3_CR); 1632 outb(cr ^ CR_LED, EWRK3_CR); 1633 1634 /* Wait a little while */ 1635 spin_unlock_irqrestore(&lp->hw_lock, flags); 1636 msleep(250); 1637 spin_lock_irqsave(&lp->hw_lock, flags); 1638 1639 /* Exit if we got a signal */ 1640 if (signal_pending(current)) 1641 break; 1642 } 1643 1644 lp->led_mask = CR_LED; 1645 cr = inb(EWRK3_CR); 1646 outb(cr & ~CR_LED, EWRK3_CR); 1647 spin_unlock_irqrestore(&lp->hw_lock, flags); 1648 return signal_pending(current) ? -ERESTARTSYS : 0; 1649} 1650 1651static const struct ethtool_ops ethtool_ops_203 = { 1652 .get_drvinfo = ewrk3_get_drvinfo, 1653 .get_settings = ewrk3_get_settings, 1654 .set_settings = ewrk3_set_settings, 1655 .phys_id = ewrk3_phys_id, 1656}; 1657 1658static const struct ethtool_ops ethtool_ops = { 1659 .get_drvinfo = ewrk3_get_drvinfo, 1660 .get_settings = ewrk3_get_settings, 1661 .set_settings = ewrk3_set_settings, 1662 .get_link = ewrk3_get_link, 1663 .phys_id = ewrk3_phys_id, 1664}; 1665 1666/* 1667 ** Perform IOCTL call functions here. Some are privileged operations and the 1668 ** effective uid is checked in those cases. 1669 */ 1670static int ewrk3_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) 1671{ 1672 struct ewrk3_private *lp = netdev_priv(dev); 1673 struct ewrk3_ioctl *ioc = (struct ewrk3_ioctl *) &rq->ifr_ifru; 1674 u_long iobase = dev->base_addr; 1675 int i, j, status = 0; 1676 u_char csr; 1677 unsigned long flags; 1678 union ewrk3_addr { 1679 u_char addr[HASH_TABLE_LEN * ETH_ALEN]; 1680 u_short val[(HASH_TABLE_LEN * ETH_ALEN) >> 1]; 1681 }; 1682 1683 union ewrk3_addr *tmp; 1684 1685 /* All we handle are private IOCTLs */ 1686 if (cmd != EWRK3IOCTL) 1687 return -EOPNOTSUPP; 1688 1689 tmp = kmalloc(sizeof(union ewrk3_addr), GFP_KERNEL); 1690 if(tmp==NULL) 1691 return -ENOMEM; 1692 1693 switch (ioc->cmd) { 1694 case EWRK3_GET_HWADDR: /* Get the hardware address */ 1695 for (i = 0; i < ETH_ALEN; i++) { 1696 tmp->addr[i] = dev->dev_addr[i]; 1697 } 1698 ioc->len = ETH_ALEN; 1699 if (copy_to_user(ioc->data, tmp->addr, ioc->len)) 1700 status = -EFAULT; 1701 break; 1702 1703 case EWRK3_SET_HWADDR: /* Set the hardware address */ 1704 if (capable(CAP_NET_ADMIN)) { 1705 spin_lock_irqsave(&lp->hw_lock, flags); 1706 csr = inb(EWRK3_CSR); 1707 csr |= (CSR_TXD | CSR_RXD); 1708 outb(csr, EWRK3_CSR); /* Disable the TX and RX */ 1709 spin_unlock_irqrestore(&lp->hw_lock, flags); 1710 1711 if (copy_from_user(tmp->addr, ioc->data, ETH_ALEN)) { 1712 status = -EFAULT; 1713 break; 1714 } 1715 spin_lock_irqsave(&lp->hw_lock, flags); 1716 for (i = 0; i < ETH_ALEN; i++) { 1717 dev->dev_addr[i] = tmp->addr[i]; 1718 outb(tmp->addr[i], EWRK3_PAR0 + i); 1719 } 1720 1721 csr = inb(EWRK3_CSR); 1722 csr &= ~(CSR_TXD | CSR_RXD); /* Enable the TX and RX */ 1723 outb(csr, EWRK3_CSR); 1724 spin_unlock_irqrestore(&lp->hw_lock, flags); 1725 } else { 1726 status = -EPERM; 1727 } 1728 1729 break; 1730 case EWRK3_SET_PROM: /* Set Promiscuous Mode */ 1731 if (capable(CAP_NET_ADMIN)) { 1732 spin_lock_irqsave(&lp->hw_lock, flags); 1733 csr = inb(EWRK3_CSR); 1734 csr |= CSR_PME; 1735 csr &= ~CSR_MCE; 1736 outb(csr, EWRK3_CSR); 1737 spin_unlock_irqrestore(&lp->hw_lock, flags); 1738 } else { 1739 status = -EPERM; 1740 } 1741 1742 break; 1743 case EWRK3_CLR_PROM: /* Clear Promiscuous Mode */ 1744 if (capable(CAP_NET_ADMIN)) { 1745 spin_lock_irqsave(&lp->hw_lock, flags); 1746 csr = inb(EWRK3_CSR); 1747 csr &= ~CSR_PME; 1748 outb(csr, EWRK3_CSR); 1749 spin_unlock_irqrestore(&lp->hw_lock, flags); 1750 } else { 1751 status = -EPERM; 1752 } 1753 1754 break; 1755 case EWRK3_GET_MCA: /* Get the multicast address table */ 1756 spin_lock_irqsave(&lp->hw_lock, flags); 1757 if (lp->shmem_length == IO_ONLY) { 1758 outb(0, EWRK3_IOPR); 1759 outw(PAGE0_HTE, EWRK3_PIR1); 1760 for (i = 0; i < (HASH_TABLE_LEN >> 3); i++) { 1761 tmp->addr[i] = inb(EWRK3_DATA); 1762 } 1763 } else { 1764 outb(0, EWRK3_MPR); 1765 memcpy_fromio(tmp->addr, lp->shmem + PAGE0_HTE, (HASH_TABLE_LEN >> 3)); 1766 } 1767 spin_unlock_irqrestore(&lp->hw_lock, flags); 1768 1769 ioc->len = (HASH_TABLE_LEN >> 3); 1770 if (copy_to_user(ioc->data, tmp->addr, ioc->len)) 1771 status = -EFAULT; 1772 1773 break; 1774 case EWRK3_SET_MCA: /* Set a multicast address */ 1775 if (capable(CAP_NET_ADMIN)) { 1776 if (ioc->len > HASH_TABLE_LEN) { 1777 status = -EINVAL; 1778 break; 1779 } 1780 if (copy_from_user(tmp->addr, ioc->data, ETH_ALEN * ioc->len)) { 1781 status = -EFAULT; 1782 break; 1783 } 1784 set_multicast_list(dev); 1785 } else { 1786 status = -EPERM; 1787 } 1788 1789 break; 1790 case EWRK3_CLR_MCA: /* Clear all multicast addresses */ 1791 if (capable(CAP_NET_ADMIN)) { 1792 set_multicast_list(dev); 1793 } else { 1794 status = -EPERM; 1795 } 1796 1797 break; 1798 case EWRK3_MCA_EN: /* Enable multicast addressing */ 1799 if (capable(CAP_NET_ADMIN)) { 1800 spin_lock_irqsave(&lp->hw_lock, flags); 1801 csr = inb(EWRK3_CSR); 1802 csr |= CSR_MCE; 1803 csr &= ~CSR_PME; 1804 outb(csr, EWRK3_CSR); 1805 spin_unlock_irqrestore(&lp->hw_lock, flags); 1806 } else { 1807 status = -EPERM; 1808 } 1809 1810 break; 1811 case EWRK3_GET_STATS: { /* Get the driver statistics */ 1812 struct ewrk3_stats *tmp_stats = 1813 kmalloc(sizeof(lp->pktStats), GFP_KERNEL); 1814 if (!tmp_stats) { 1815 status = -ENOMEM; 1816 break; 1817 } 1818 1819 spin_lock_irqsave(&lp->hw_lock, flags); 1820 memcpy(tmp_stats, &lp->pktStats, sizeof(lp->pktStats)); 1821 spin_unlock_irqrestore(&lp->hw_lock, flags); 1822 1823 ioc->len = sizeof(lp->pktStats); 1824 if (copy_to_user(ioc->data, tmp_stats, sizeof(lp->pktStats))) 1825 status = -EFAULT; 1826 kfree(tmp_stats); 1827 break; 1828 } 1829 case EWRK3_CLR_STATS: /* Zero out the driver statistics */ 1830 if (capable(CAP_NET_ADMIN)) { 1831 spin_lock_irqsave(&lp->hw_lock, flags); 1832 memset(&lp->pktStats, 0, sizeof(lp->pktStats)); 1833 spin_unlock_irqrestore(&lp->hw_lock,flags); 1834 } else { 1835 status = -EPERM; 1836 } 1837 1838 break; 1839 case EWRK3_GET_CSR: /* Get the CSR Register contents */ 1840 tmp->addr[0] = inb(EWRK3_CSR); 1841 ioc->len = 1; 1842 if (copy_to_user(ioc->data, tmp->addr, ioc->len)) 1843 status = -EFAULT; 1844 break; 1845 case EWRK3_SET_CSR: /* Set the CSR Register contents */ 1846 if (capable(CAP_NET_ADMIN)) { 1847 if (copy_from_user(tmp->addr, ioc->data, 1)) { 1848 status = -EFAULT; 1849 break; 1850 } 1851 outb(tmp->addr[0], EWRK3_CSR); 1852 } else { 1853 status = -EPERM; 1854 } 1855 1856 break; 1857 case EWRK3_GET_EEPROM: /* Get the EEPROM contents */ 1858 if (capable(CAP_NET_ADMIN)) { 1859 for (i = 0; i < (EEPROM_MAX >> 1); i++) { 1860 tmp->val[i] = (short) Read_EEPROM(iobase, i); 1861 } 1862 i = EEPROM_MAX; 1863 tmp->addr[i++] = inb(EWRK3_CMR); /* Config/Management Reg. */ 1864 for (j = 0; j < ETH_ALEN; j++) { 1865 tmp->addr[i++] = inb(EWRK3_PAR0 + j); 1866 } 1867 ioc->len = EEPROM_MAX + 1 + ETH_ALEN; 1868 if (copy_to_user(ioc->data, tmp->addr, ioc->len)) 1869 status = -EFAULT; 1870 } else { 1871 status = -EPERM; 1872 } 1873 1874 break; 1875 case EWRK3_SET_EEPROM: /* Set the EEPROM contents */ 1876 if (capable(CAP_NET_ADMIN)) { 1877 if (copy_from_user(tmp->addr, ioc->data, EEPROM_MAX)) { 1878 status = -EFAULT; 1879 break; 1880 } 1881 for (i = 0; i < (EEPROM_MAX >> 1); i++) { 1882 Write_EEPROM(tmp->val[i], iobase, i); 1883 } 1884 } else { 1885 status = -EPERM; 1886 } 1887 1888 break; 1889 case EWRK3_GET_CMR: /* Get the CMR Register contents */ 1890 tmp->addr[0] = inb(EWRK3_CMR); 1891 ioc->len = 1; 1892 if (copy_to_user(ioc->data, tmp->addr, ioc->len)) 1893 status = -EFAULT; 1894 break; 1895 case EWRK3_SET_TX_CUT_THRU: /* Set TX cut through mode */ 1896 if (capable(CAP_NET_ADMIN)) { 1897 lp->txc = 1; 1898 } else { 1899 status = -EPERM; 1900 } 1901 1902 break; 1903 case EWRK3_CLR_TX_CUT_THRU: /* Clear TX cut through mode */ 1904 if (capable(CAP_NET_ADMIN)) { 1905 lp->txc = 0; 1906 } else { 1907 status = -EPERM; 1908 } 1909 1910 break; 1911 default: 1912 status = -EOPNOTSUPP; 1913 } 1914 kfree(tmp); 1915 return status; 1916} 1917 1918#ifdef MODULE 1919static struct net_device *ewrk3_devs[MAX_NUM_EWRK3S]; 1920static int ndevs; 1921static int io[MAX_NUM_EWRK3S+1] = { 0x300, 0, }; 1922 1923/* '21' below should really be 'MAX_NUM_EWRK3S' */ 1924module_param_array(io, int, NULL, 0); 1925module_param_array(irq, int, NULL, 0); 1926MODULE_PARM_DESC(io, "EtherWORKS 3 I/O base address(es)"); 1927MODULE_PARM_DESC(irq, "EtherWORKS 3 IRQ number(s)"); 1928 1929static __exit void ewrk3_exit_module(void) 1930{ 1931 int i; 1932 1933 for( i=0; i<ndevs; i++ ) { 1934 struct net_device *dev = ewrk3_devs[i]; 1935 struct ewrk3_private *lp = netdev_priv(dev); 1936 ewrk3_devs[i] = NULL; 1937 unregister_netdev(dev); 1938 release_region(dev->base_addr, EWRK3_TOTAL_SIZE); 1939 iounmap(lp->shmem); 1940 free_netdev(dev); 1941 } 1942} 1943 1944static __init int ewrk3_init_module(void) 1945{ 1946 int i=0; 1947 1948 while( io[i] && irq[i] ) { 1949 struct net_device *dev 1950 = alloc_etherdev(sizeof(struct ewrk3_private)); 1951 1952 if (!dev) 1953 break; 1954 1955 if (ewrk3_probe1(dev, io[i], irq[i]) != 0) { 1956 free_netdev(dev); 1957 break; 1958 } 1959 1960 ewrk3_devs[ndevs++] = dev; 1961 i++; 1962 } 1963 1964 return ndevs ? 0 : -EIO; 1965} 1966 1967 1968/* Hack for breakage in new module stuff */ 1969module_exit(ewrk3_exit_module); 1970module_init(ewrk3_init_module); 1971#endif /* MODULE */ 1972MODULE_LICENSE("GPL"); 1973