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1/* eth16i.c An ICL EtherTeam 16i and 32 EISA ethernet driver for Linux
2
3   Written 1994-1999 by Mika Kuoppala
4
5   Copyright (C) 1994-1999 by Mika Kuoppala
6   Based on skeleton.c and heavily on at1700.c by Donald Becker
7
8   This software may be used and distributed according to the terms
9   of the GNU General Public License, incorporated herein by reference.
10
11   The author may be reached as miku@iki.fi
12
13   This driver supports following cards :
14	- ICL EtherTeam 16i
15	- ICL EtherTeam 32 EISA
16	  (Uses true 32 bit transfers rather than 16i compability mode)
17
18   Example Module usage:
19        insmod eth16i.o io=0x2a0 mediatype=bnc
20
21	mediatype can be one of the following: bnc,tp,dix,auto,eprom
22
23	'auto' will try to autoprobe mediatype.
24	'eprom' will use whatever type defined in eprom.
25
26   I have benchmarked driver with PII/300Mhz as a ftp client
27   and 486/33Mhz as a ftp server. Top speed was 1128.37 kilobytes/sec.
28
29   Sources:
30     - skeleton.c  a sample network driver core for linux,
31       written by Donald Becker <becker@scyld.com>
32     - at1700.c a driver for Allied Telesis AT1700, written
33       by Donald Becker.
34     - e16iSRV.asm a Netware 3.X Server Driver for ICL EtherTeam16i
35       written by Markku Viima
36     - The Fujitsu MB86965 databook.
37
38   Author thanks following persons due to their valueble assistance:
39        Markku Viima (ICL)
40	Ari Valve (ICL)
41	Donald Becker
42	Kurt Huwig <kurt@huwig.de>
43
44   Revision history:
45
46   Version	Date		Description
47
48   0.01         15.12-94        Initial version (card detection)
49   0.02         23.01-95        Interrupt is now hooked correctly
50   0.03         01.02-95        Rewrote initialization part
51   0.04         07.02-95        Base skeleton done...
52                                Made a few changes to signature checking
53                                to make it a bit reliable.
54                                - fixed bug in tx_buf mapping
55                                - fixed bug in initialization (DLC_EN
56                                  wasn't enabled when initialization
57                                  was done.)
58   0.05         08.02-95        If there were more than one packet to send,
59                                transmit was jammed due to invalid
60                                register write...now fixed
61   0.06         19.02-95        Rewrote interrupt handling
62   0.07         13.04-95        Wrote EEPROM read routines
63                                Card configuration now set according to
64                                data read from EEPROM
65   0.08         23.06-95        Wrote part that tries to probe used interface
66                                port if AUTO is selected
67
68   0.09         01.09-95        Added module support
69
70   0.10         04.09-95        Fixed receive packet allocation to work
71                                with kernels > 1.3.x
72
73   0.20		20.09-95	Added support for EtherTeam32 EISA
74
75   0.21         17.10-95        Removed the unnecessary extern
76				init_etherdev() declaration. Some
77				other cleanups.
78
79   0.22		22.02-96	Receive buffer was not flushed
80				correctly when faulty packet was
81				received. Now fixed.
82
83   0.23		26.02-96	Made resetting the adapter
84			 	more reliable.
85
86   0.24		27.02-96	Rewrote faulty packet handling in eth16i_rx
87
88   0.25		22.05-96	kfree() was missing from cleanup_module.
89
90   0.26		11.06-96	Sometimes card was not found by
91				check_signature(). Now made more reliable.
92
93   0.27		23.06-96	Oops. 16 consecutive collisions halted
94				adapter. Now will try to retransmit
95				MAX_COL_16 times before finally giving up.
96
97   0.28	        28.10-97	Added dev_id parameter (NULL) for free_irq
98
99   0.29         29.10-97        Multiple card support for module users
100
101   0.30         30.10-97        Fixed irq allocation bug.
102                                (request_irq moved from probe to open)
103
104   0.30a        21.08-98        Card detection made more relaxed. Driver
105                                had problems with some TCP/IP-PROM boots
106				to find the card. Suggested by
107				Kurt Huwig <kurt@huwig.de>
108
109   0.31         28.08-98        Media interface port can now be selected
110                                with module parameters or kernel
111				boot parameters.
112
113   0.32         31.08-98        IRQ was never freed if open/close
114                                pair wasn't called. Now fixed.
115
116   0.33         10.09-98        When eth16i_open() was called after
117                                eth16i_close() chip never recovered.
118				Now more shallow reset is made on
119				close.
120
121   0.34         29.06-99	Fixed one bad #ifdef.
122				Changed ioaddr -> io for consistency
123
124   0.35         01.07-99        transmit,-receive bytes were never
125                                updated in stats.
126
127   Bugs:
128	In some cases the media interface autoprobing code doesn't find
129	the correct interface type. In this case you can
130	manually choose the interface type in DOS with E16IC.EXE which is
131	configuration software for EtherTeam16i and EtherTeam32 cards.
132	This is also true for IRQ setting. You cannot use module
133	parameter to configure IRQ of the card (yet).
134
135   To do:
136	- Real multicast support
137	- Rewrite the media interface autoprobing code. Its _horrible_ !
138	- Possibly merge all the MB86965 specific code to external
139	  module for use by eth16.c and Donald's at1700.c
140	- IRQ configuration with module parameter. I will do
141	  this when i will get enough info about setting
142	  irq without configuration utility.
143*/
144
145static char *version =
146    "eth16i.c: v0.35 01-Jul-1999 Mika Kuoppala (miku@iki.fi)\n";
147
148#include <linux/module.h>
149#include <linux/kernel.h>
150#include <linux/types.h>
151#include <linux/fcntl.h>
152#include <linux/interrupt.h>
153#include <linux/ioport.h>
154#include <linux/in.h>
155#include <linux/string.h>
156#include <linux/errno.h>
157#include <linux/init.h>
158#include <linux/spinlock.h>
159#include <linux/netdevice.h>
160#include <linux/etherdevice.h>
161#include <linux/skbuff.h>
162#include <linux/bitops.h>
163#include <linux/jiffies.h>
164#include <linux/io.h>
165
166#include <asm/system.h>
167#include <asm/dma.h>
168
169
170
171/* Few macros */
172#define BITSET(ioaddr, bnum)   ((outb(((inb(ioaddr)) | (bnum)), ioaddr)))
173#define BITCLR(ioaddr, bnum)   ((outb(((inb(ioaddr)) & (~(bnum))), ioaddr)))
174
175/* This is the I/O address space for Etherteam 16i adapter. */
176#define ETH16I_IO_EXTENT       32
177
178/* Ticks before deciding that transmit has timed out */
179#define TX_TIMEOUT             (400*HZ/1000)
180
181/* Maximum loop count when receiving packets */
182#define MAX_RX_LOOP            20
183
184/* Some interrupt masks */
185#define ETH16I_INTR_ON	       0xef8a       /* Higher is receive mask */
186#define ETH16I_INTR_OFF	       0x0000
187
188/* Buffers header status byte meanings */
189#define PKT_GOOD               BIT(5)
190#define PKT_GOOD_RMT           BIT(4)
191#define PKT_SHORT              BIT(3)
192#define PKT_ALIGN_ERR          BIT(2)
193#define PKT_CRC_ERR            BIT(1)
194#define PKT_RX_BUF_OVERFLOW    BIT(0)
195
196/* Transmit status register (DLCR0) */
197#define TX_STATUS_REG          0
198#define TX_DONE                BIT(7)
199#define NET_BUSY               BIT(6)
200#define TX_PKT_RCD             BIT(5)
201#define CR_LOST                BIT(4)
202#define TX_JABBER_ERR	       BIT(3)
203#define COLLISION              BIT(2)
204#define COLLISIONS_16          BIT(1)
205
206/* Receive status register (DLCR1) */
207#define RX_STATUS_REG          1
208#define RX_PKT                 BIT(7)  /* Packet received */
209#define BUS_RD_ERR             BIT(6)
210#define SHORT_PKT_ERR          BIT(3)
211#define ALIGN_ERR              BIT(2)
212#define CRC_ERR                BIT(1)
213#define RX_BUF_OVERFLOW        BIT(0)
214
215/* Transmit Interrupt Enable Register (DLCR2) */
216#define TX_INTR_REG            2
217#define TX_INTR_DONE           BIT(7)
218#define TX_INTR_COL            BIT(2)
219#define TX_INTR_16_COL         BIT(1)
220
221/* Receive Interrupt Enable Register (DLCR3) */
222#define RX_INTR_REG            3
223#define RX_INTR_RECEIVE        BIT(7)
224#define RX_INTR_SHORT_PKT      BIT(3)
225#define RX_INTR_CRC_ERR        BIT(1)
226#define RX_INTR_BUF_OVERFLOW   BIT(0)
227
228/* Transmit Mode Register (DLCR4) */
229#define TRANSMIT_MODE_REG      4
230#define LOOPBACK_CONTROL       BIT(1)
231#define CONTROL_OUTPUT         BIT(2)
232
233/* Receive Mode Register (DLCR5) */
234#define RECEIVE_MODE_REG       5
235#define RX_BUFFER_EMPTY        BIT(6)
236#define ACCEPT_BAD_PACKETS     BIT(5)
237#define RECEIVE_SHORT_ADDR     BIT(4)
238#define ACCEPT_SHORT_PACKETS   BIT(3)
239#define REMOTE_RESET           BIT(2)
240
241#define ADDRESS_FILTER_MODE    BIT(1) | BIT(0)
242#define REJECT_ALL             0
243#define ACCEPT_ALL             3
244#define MODE_1                 1            /* NODE ID, BC, MC, 2-24th bit */
245#define MODE_2                 2            /* NODE ID, BC, MC, Hash Table */
246
247/* Configuration Register 0 (DLCR6) */
248#define CONFIG_REG_0           6
249#define DLC_EN                 BIT(7)
250#define SRAM_CYCLE_TIME_100NS  BIT(6)
251#define SYSTEM_BUS_WIDTH_8     BIT(5)       /* 1 = 8bit, 0 = 16bit */
252#define BUFFER_WIDTH_8         BIT(4)       /* 1 = 8bit, 0 = 16bit */
253#define TBS1                   BIT(3)
254#define TBS0                   BIT(2)
255#define SRAM_BS1               BIT(1)       /* 00=8kb,  01=16kb  */
256#define SRAM_BS0               BIT(0)       /* 10=32kb, 11=64kb  */
257
258#ifndef ETH16I_TX_BUF_SIZE                       /* 0 = 2kb, 1 = 4kb  */
259#define ETH16I_TX_BUF_SIZE     3             /* 2 = 8kb, 3 = 16kb */
260#endif
261#define TX_BUF_1x2048          0
262#define TX_BUF_2x2048          1
263#define TX_BUF_2x4098          2
264#define TX_BUF_2x8192          3
265
266/* Configuration Register 1 (DLCR7) */
267#define CONFIG_REG_1           7
268#define POWERUP                BIT(5)
269
270/* Transmit start register */
271#define TRANSMIT_START_REG     10
272#define TRANSMIT_START_RB      2
273#define TX_START               BIT(7)       /* Rest of register bit indicate*/
274                                            /* number of packets in tx buffer*/
275/* Node ID registers (DLCR8-13) */
276#define NODE_ID_0              8
277#define NODE_ID_RB             0
278
279/* Hash Table registers (HT8-15) */
280#define HASH_TABLE_0           8
281#define HASH_TABLE_RB          1
282
283/* Buffer memory ports */
284#define BUFFER_MEM_PORT_LB     8
285#define DATAPORT               BUFFER_MEM_PORT_LB
286#define BUFFER_MEM_PORT_HB     9
287
288/* 16 Collision control register (BMPR11) */
289#define COL_16_REG             11
290#define HALT_ON_16             0x00
291#define RETRANS_AND_HALT_ON_16 0x02
292
293/* Maximum number of attempts to send after 16 concecutive collisions */
294#define MAX_COL_16	       10
295
296/* DMA Burst and Transceiver Mode Register (BMPR13) */
297#define TRANSCEIVER_MODE_REG   13
298#define TRANSCEIVER_MODE_RB    2
299#define IO_BASE_UNLOCK	       BIT(7)
300#define LOWER_SQUELCH_TRESH    BIT(6)
301#define LINK_TEST_DISABLE      BIT(5)
302#define AUI_SELECT             BIT(4)
303#define DIS_AUTO_PORT_SEL      BIT(3)
304
305/* Filter Self Receive Register (BMPR14)  */
306#define FILTER_SELF_RX_REG     14
307#define SKIP_RX_PACKET         BIT(2)
308#define FILTER_SELF_RECEIVE    BIT(0)
309
310/* EEPROM Control Register (BMPR 16) */
311#define EEPROM_CTRL_REG        16
312
313/* EEPROM Data Register (BMPR 17) */
314#define EEPROM_DATA_REG        17
315
316/* NMC93CSx6 EEPROM Control Bits */
317#define CS_0                   0x00
318#define CS_1                   0x20
319#define SK_0                   0x00
320#define SK_1                   0x40
321#define DI_0                   0x00
322#define DI_1                   0x80
323
324/* NMC93CSx6 EEPROM Instructions */
325#define EEPROM_READ            0x80
326
327/* NMC93CSx6 EEPROM Addresses */
328#define E_NODEID_0             0x02
329#define E_NODEID_1             0x03
330#define E_NODEID_2             0x04
331#define E_PORT_SELECT          0x14
332  #define E_PORT_BNC           0x00
333  #define E_PORT_DIX           0x01
334  #define E_PORT_TP            0x02
335  #define E_PORT_AUTO          0x03
336  #define E_PORT_FROM_EPROM    0x04
337#define E_PRODUCT_CFG          0x30
338
339
340/* Macro to slow down io between EEPROM clock transitions */
341#define eeprom_slow_io() do { int _i = 40; while(--_i > 0) { inb(0x80); }}while(0)
342
343/* Jumperless Configuration Register (BMPR19) */
344#define JUMPERLESS_CONFIG      19
345
346/* ID ROM registers, writing to them also resets some parts of chip */
347#define ID_ROM_0               24
348#define ID_ROM_7               31
349#define RESET                  ID_ROM_0
350
351/* This is the I/O address list to be probed when seeking the card */
352static unsigned int eth16i_portlist[] __initdata = {
353	0x260, 0x280, 0x2A0, 0x240, 0x340, 0x320, 0x380, 0x300, 0
354};
355
356static unsigned int eth32i_portlist[] __initdata = {
357	0x1000, 0x2000, 0x3000, 0x4000, 0x5000, 0x6000, 0x7000, 0x8000,
358	0x9000, 0xA000, 0xB000, 0xC000, 0xD000, 0xE000, 0xF000, 0
359};
360
361/* This is the Interrupt lookup table for Eth16i card */
362static unsigned int eth16i_irqmap[] __initdata = { 9, 10, 5, 15, 0 };
363#define NUM_OF_ISA_IRQS    4
364
365/* This is the Interrupt lookup table for Eth32i card */
366static unsigned int eth32i_irqmap[] __initdata = { 3, 5, 7, 9, 10, 11, 12, 15, 0 };
367#define EISA_IRQ_REG	0xc89
368#define NUM_OF_EISA_IRQS   8
369
370static unsigned int eth16i_tx_buf_map[] = { 2048, 2048, 4096, 8192 };
371
372/* Use 0 for production, 1 for verification, >2 for debug */
373#ifndef ETH16I_DEBUG
374#define ETH16I_DEBUG 0
375#endif
376static unsigned int eth16i_debug = ETH16I_DEBUG;
377
378/* Information for each board */
379
380struct eth16i_local {
381	unsigned char     tx_started;
382	unsigned char     tx_buf_busy;
383	unsigned short    tx_queue;  /* Number of packets in transmit buffer */
384	unsigned short    tx_queue_len;
385	unsigned int      tx_buf_size;
386	unsigned long     open_time;
387	unsigned long     tx_buffered_packets;
388	unsigned long     tx_buffered_bytes;
389	unsigned long     col_16;
390	spinlock_t	  lock;
391};
392
393/* Function prototypes */
394
395static int     eth16i_probe1(struct net_device *dev, int ioaddr);
396static int     eth16i_check_signature(int ioaddr);
397static int     eth16i_probe_port(int ioaddr);
398static void    eth16i_set_port(int ioaddr, int porttype);
399static int     eth16i_send_probe_packet(int ioaddr, unsigned char *b, int l);
400static int     eth16i_receive_probe_packet(int ioaddr);
401static int     eth16i_get_irq(int ioaddr);
402static int     eth16i_read_eeprom(int ioaddr, int offset);
403static int     eth16i_read_eeprom_word(int ioaddr);
404static void    eth16i_eeprom_cmd(int ioaddr, unsigned char command);
405static int     eth16i_open(struct net_device *dev);
406static int     eth16i_close(struct net_device *dev);
407static netdev_tx_t eth16i_tx(struct sk_buff *skb, struct net_device *dev);
408static void    eth16i_rx(struct net_device *dev);
409static void    eth16i_timeout(struct net_device *dev);
410static irqreturn_t eth16i_interrupt(int irq, void *dev_id);
411static void    eth16i_reset(struct net_device *dev);
412static void    eth16i_timeout(struct net_device *dev);
413static void    eth16i_skip_packet(struct net_device *dev);
414static void    eth16i_multicast(struct net_device *dev);
415static void    eth16i_select_regbank(unsigned char regbank, int ioaddr);
416static void    eth16i_initialize(struct net_device *dev, int boot);
417
418
419#ifdef MODULE
420static ushort  eth16i_parse_mediatype(const char* s);
421#endif
422
423static char cardname[] __initdata = "ICL EtherTeam 16i/32";
424
425static int __init do_eth16i_probe(struct net_device *dev)
426{
427	int i;
428	int ioaddr;
429	int base_addr = dev->base_addr;
430
431	if(eth16i_debug > 4)
432		printk(KERN_DEBUG "Probing started for %s\n", cardname);
433
434	if(base_addr > 0x1ff)           /* Check only single location */
435		return eth16i_probe1(dev, base_addr);
436	else if(base_addr != 0)         /* Don't probe at all */
437		return -ENXIO;
438
439	/* Seek card from the ISA io address space */
440	for(i = 0; (ioaddr = eth16i_portlist[i]) ; i++)
441		if(eth16i_probe1(dev, ioaddr) == 0)
442			return 0;
443
444	/* Seek card from the EISA io address space */
445	for(i = 0; (ioaddr = eth32i_portlist[i]) ; i++)
446		if(eth16i_probe1(dev, ioaddr) == 0)
447			return 0;
448
449	return -ENODEV;
450}
451
452#ifndef MODULE
453struct net_device * __init eth16i_probe(int unit)
454{
455	struct net_device *dev = alloc_etherdev(sizeof(struct eth16i_local));
456	int err;
457
458	if (!dev)
459		return ERR_PTR(-ENOMEM);
460
461	sprintf(dev->name, "eth%d", unit);
462	netdev_boot_setup_check(dev);
463
464	err = do_eth16i_probe(dev);
465	if (err)
466		goto out;
467	return dev;
468out:
469	free_netdev(dev);
470	return ERR_PTR(err);
471}
472#endif
473
474static const struct net_device_ops eth16i_netdev_ops = {
475	.ndo_open               = eth16i_open,
476	.ndo_stop               = eth16i_close,
477	.ndo_start_xmit    	= eth16i_tx,
478	.ndo_set_multicast_list = eth16i_multicast,
479	.ndo_tx_timeout 	= eth16i_timeout,
480	.ndo_change_mtu		= eth_change_mtu,
481	.ndo_set_mac_address 	= eth_mac_addr,
482	.ndo_validate_addr	= eth_validate_addr,
483};
484
485static int __init eth16i_probe1(struct net_device *dev, int ioaddr)
486{
487	struct eth16i_local *lp = netdev_priv(dev);
488	static unsigned version_printed;
489	int retval;
490
491	/* Let's grab the region */
492	if (!request_region(ioaddr, ETH16I_IO_EXTENT, cardname))
493		return -EBUSY;
494
495	/*
496	  The MB86985 chip has on register which holds information in which
497	  io address the chip lies. First read this register and compare
498	  it to our current io address and if match then this could
499	  be our chip.
500	  */
501
502	if(ioaddr < 0x1000) {
503		if(eth16i_portlist[(inb(ioaddr + JUMPERLESS_CONFIG) & 0x07)]
504		   != ioaddr) {
505			retval = -ENODEV;
506			goto out;
507		}
508	}
509
510	/* Now we will go a bit deeper and try to find the chip's signature */
511
512	if(eth16i_check_signature(ioaddr) != 0) {
513		retval = -ENODEV;
514		goto out;
515	}
516
517	/*
518	   Now it seems that we have found a ethernet chip in this particular
519	   ioaddr. The MB86985 chip has this feature, that when you read a
520	   certain register it will increase it's io base address to next
521	   configurable slot. Now when we have found the chip, first thing is
522	   to make sure that the chip's ioaddr will hold still here.
523	   */
524
525	eth16i_select_regbank(TRANSCEIVER_MODE_RB, ioaddr);
526	outb(0x00, ioaddr + TRANSCEIVER_MODE_REG);
527
528	outb(0x00, ioaddr + RESET);             /* Reset some parts of chip */
529	BITSET(ioaddr + CONFIG_REG_0, BIT(7));  /* Disable the data link */
530
531	if( (eth16i_debug & version_printed++) == 0)
532		printk(KERN_INFO "%s", version);
533
534	dev->base_addr = ioaddr;
535	dev->irq = eth16i_get_irq(ioaddr);
536
537	/* Try to obtain interrupt vector */
538
539	if ((retval = request_irq(dev->irq, (void *)&eth16i_interrupt, 0, cardname, dev))) {
540		printk(KERN_WARNING "%s at %#3x, but is unusable due to conflicting IRQ %d.\n",
541		       cardname, ioaddr, dev->irq);
542		goto out;
543	}
544
545	printk(KERN_INFO "%s: %s at %#3x, IRQ %d, ",
546	       dev->name, cardname, ioaddr, dev->irq);
547
548
549	/* Now we will have to lock the chip's io address */
550	eth16i_select_regbank(TRANSCEIVER_MODE_RB, ioaddr);
551	outb(0x38, ioaddr + TRANSCEIVER_MODE_REG);
552
553	eth16i_initialize(dev, 1); /* Initialize rest of the chip's registers */
554
555	/* Now let's same some energy by shutting down the chip ;) */
556	BITCLR(ioaddr + CONFIG_REG_1, POWERUP);
557
558	/* Initialize the device structure */
559	dev->netdev_ops         = &eth16i_netdev_ops;
560	dev->watchdog_timeo	= TX_TIMEOUT;
561	spin_lock_init(&lp->lock);
562
563	retval = register_netdev(dev);
564	if (retval)
565		goto out1;
566	return 0;
567out1:
568	free_irq(dev->irq, dev);
569out:
570	release_region(ioaddr, ETH16I_IO_EXTENT);
571	return retval;
572}
573
574
575static void eth16i_initialize(struct net_device *dev, int boot)
576{
577	int ioaddr = dev->base_addr;
578	int i, node_w = 0;
579	unsigned char node_byte = 0;
580
581	/* Setup station address */
582	eth16i_select_regbank(NODE_ID_RB, ioaddr);
583	for(i = 0 ; i < 3 ; i++) {
584		unsigned short node_val = eth16i_read_eeprom(ioaddr, E_NODEID_0 + i);
585		((unsigned short *)dev->dev_addr)[i] = ntohs(node_val);
586	}
587
588	for(i = 0; i < 6; i++) {
589		outb( ((unsigned char *)dev->dev_addr)[i], ioaddr + NODE_ID_0 + i);
590		if(boot) {
591			printk("%02x", inb(ioaddr + NODE_ID_0 + i));
592			if(i != 5)
593				printk(":");
594		}
595	}
596
597	/* Now we will set multicast addresses to accept none */
598	eth16i_select_regbank(HASH_TABLE_RB, ioaddr);
599	for(i = 0; i < 8; i++)
600		outb(0x00, ioaddr + HASH_TABLE_0 + i);
601
602	/*
603	  Now let's disable the transmitter and receiver, set the buffer ram
604	  cycle time, bus width and buffer data path width. Also we shall
605	  set transmit buffer size and total buffer size.
606	  */
607
608	eth16i_select_regbank(2, ioaddr);
609
610	node_byte = 0;
611	node_w = eth16i_read_eeprom(ioaddr, E_PRODUCT_CFG);
612
613	if( (node_w & 0xFF00) == 0x0800)
614		node_byte |= BUFFER_WIDTH_8;
615
616	node_byte |= SRAM_BS1;
617
618	if( (node_w & 0x00FF) == 64)
619		node_byte |= SRAM_BS0;
620
621	node_byte |= DLC_EN | SRAM_CYCLE_TIME_100NS | (ETH16I_TX_BUF_SIZE << 2);
622
623	outb(node_byte, ioaddr + CONFIG_REG_0);
624
625	/* We shall halt the transmitting, if 16 collisions are detected */
626	outb(HALT_ON_16, ioaddr + COL_16_REG);
627
628#ifdef MODULE
629	/* if_port already set by init_module() */
630#else
631	dev->if_port = (dev->mem_start < E_PORT_FROM_EPROM) ?
632		dev->mem_start : E_PORT_FROM_EPROM;
633#endif
634
635	/* Set interface port type */
636	if(boot) {
637		char *porttype[] = {"BNC", "DIX", "TP", "AUTO", "FROM_EPROM" };
638
639		switch(dev->if_port)
640		{
641
642		case E_PORT_FROM_EPROM:
643			dev->if_port = eth16i_read_eeprom(ioaddr, E_PORT_SELECT);
644			break;
645
646		case E_PORT_AUTO:
647			dev->if_port = eth16i_probe_port(ioaddr);
648			break;
649
650		case E_PORT_BNC:
651		case E_PORT_TP:
652		case E_PORT_DIX:
653			break;
654		}
655
656		printk(" %s interface.\n", porttype[dev->if_port]);
657
658		eth16i_set_port(ioaddr, dev->if_port);
659	}
660
661	/* Set Receive Mode to normal operation */
662	outb(MODE_2, ioaddr + RECEIVE_MODE_REG);
663}
664
665static int eth16i_probe_port(int ioaddr)
666{
667	int i;
668	int retcode;
669	unsigned char dummy_packet[64];
670
671	/* Powerup the chip */
672	outb(0xc0 | POWERUP, ioaddr + CONFIG_REG_1);
673
674	BITSET(ioaddr + CONFIG_REG_0, DLC_EN);
675
676	eth16i_select_regbank(NODE_ID_RB, ioaddr);
677
678	for(i = 0; i < 6; i++) {
679		dummy_packet[i] = inb(ioaddr + NODE_ID_0 + i);
680		dummy_packet[i+6] = inb(ioaddr + NODE_ID_0 + i);
681	}
682
683	dummy_packet[12] = 0x00;
684	dummy_packet[13] = 0x04;
685	memset(dummy_packet + 14, 0, sizeof(dummy_packet) - 14);
686
687	eth16i_select_regbank(2, ioaddr);
688
689	for(i = 0; i < 3; i++) {
690		BITSET(ioaddr + CONFIG_REG_0, DLC_EN);
691		BITCLR(ioaddr + CONFIG_REG_0, DLC_EN);
692		eth16i_set_port(ioaddr, i);
693
694		if(eth16i_debug > 1)
695			printk(KERN_DEBUG "Set port number %d\n", i);
696
697		retcode = eth16i_send_probe_packet(ioaddr, dummy_packet, 64);
698		if(retcode == 0) {
699			retcode = eth16i_receive_probe_packet(ioaddr);
700			if(retcode != -1) {
701				if(eth16i_debug > 1)
702					printk(KERN_DEBUG "Eth16i interface port found at %d\n", i);
703				return i;
704			}
705		}
706		else {
707			if(eth16i_debug > 1)
708				printk(KERN_DEBUG "TRANSMIT_DONE timeout when probing interface port\n");
709		}
710	}
711
712	if( eth16i_debug > 1)
713		printk(KERN_DEBUG "Using default port\n");
714
715	return E_PORT_BNC;
716}
717
718static void eth16i_set_port(int ioaddr, int porttype)
719{
720	unsigned short temp = 0;
721
722	eth16i_select_regbank(TRANSCEIVER_MODE_RB, ioaddr);
723	outb(LOOPBACK_CONTROL, ioaddr + TRANSMIT_MODE_REG);
724
725	temp |= DIS_AUTO_PORT_SEL;
726
727	switch(porttype) {
728
729	case E_PORT_BNC :
730		temp |= AUI_SELECT;
731		break;
732
733	case E_PORT_TP :
734		break;
735
736	case E_PORT_DIX :
737		temp |= AUI_SELECT;
738		BITSET(ioaddr + TRANSMIT_MODE_REG, CONTROL_OUTPUT);
739		break;
740	}
741
742	outb(temp, ioaddr + TRANSCEIVER_MODE_REG);
743
744	if(eth16i_debug > 1) {
745		printk(KERN_DEBUG "TRANSMIT_MODE_REG = %x\n", inb(ioaddr + TRANSMIT_MODE_REG));
746		printk(KERN_DEBUG "TRANSCEIVER_MODE_REG = %x\n",
747		       inb(ioaddr+TRANSCEIVER_MODE_REG));
748	}
749}
750
751static int eth16i_send_probe_packet(int ioaddr, unsigned char *b, int l)
752{
753	unsigned long starttime;
754
755	outb(0xff, ioaddr + TX_STATUS_REG);
756
757	outw(l, ioaddr + DATAPORT);
758	outsw(ioaddr + DATAPORT, (unsigned short *)b, (l + 1) >> 1);
759
760	starttime = jiffies;
761	outb(TX_START | 1, ioaddr + TRANSMIT_START_REG);
762
763	while( (inb(ioaddr + TX_STATUS_REG) & 0x80) == 0) {
764		if( time_after(jiffies, starttime + TX_TIMEOUT)) {
765			return -1;
766		}
767	}
768
769	return 0;
770}
771
772static int eth16i_receive_probe_packet(int ioaddr)
773{
774	unsigned long starttime;
775
776	starttime = jiffies;
777
778	while((inb(ioaddr + TX_STATUS_REG) & 0x20) == 0) {
779		if( time_after(jiffies, starttime + TX_TIMEOUT)) {
780
781			if(eth16i_debug > 1)
782				printk(KERN_DEBUG "Timeout occurred waiting transmit packet received\n");
783			starttime = jiffies;
784			while((inb(ioaddr + RX_STATUS_REG) & 0x80) == 0) {
785				if( time_after(jiffies, starttime + TX_TIMEOUT)) {
786					if(eth16i_debug > 1)
787						printk(KERN_DEBUG "Timeout occurred waiting receive packet\n");
788					return -1;
789				}
790			}
791
792			if(eth16i_debug > 1)
793				printk(KERN_DEBUG "RECEIVE_PACKET\n");
794			return(0); /* Found receive packet */
795		}
796	}
797
798	if(eth16i_debug > 1) {
799		printk(KERN_DEBUG "TRANSMIT_PACKET_RECEIVED %x\n", inb(ioaddr + TX_STATUS_REG));
800		printk(KERN_DEBUG "RX_STATUS_REG = %x\n", inb(ioaddr + RX_STATUS_REG));
801	}
802
803	return(0); /* Return success */
804}
805
806
807static int __init eth16i_get_irq(int ioaddr)
808{
809	unsigned char cbyte;
810
811	if( ioaddr < 0x1000) {
812		cbyte = inb(ioaddr + JUMPERLESS_CONFIG);
813		return( eth16i_irqmap[ ((cbyte & 0xC0) >> 6) ] );
814	} else {  /* Oh..the card is EISA so method getting IRQ different */
815		unsigned short index = 0;
816		cbyte = inb(ioaddr + EISA_IRQ_REG);
817		while( (cbyte & 0x01) == 0) {
818			cbyte = cbyte >> 1;
819			index++;
820		}
821		return( eth32i_irqmap[ index ] );
822	}
823}
824
825static int __init eth16i_check_signature(int ioaddr)
826{
827	int i;
828	unsigned char creg[4] = { 0 };
829
830	for(i = 0; i < 4 ; i++) {
831
832		creg[i] = inb(ioaddr + TRANSMIT_MODE_REG + i);
833
834		if(eth16i_debug > 1)
835			printk("eth16i: read signature byte %x at %x\n",
836			       creg[i],
837			       ioaddr + TRANSMIT_MODE_REG + i);
838	}
839
840	creg[0] &= 0x0F;      /* Mask collision cnr */
841	creg[2] &= 0x7F;      /* Mask DCLEN bit */
842
843
844	if( !((creg[2] == 0x36) && (creg[3] == 0xE0)) ) {
845		creg[2] &= 0x40;
846		creg[3] &= 0x03;
847
848		if( !((creg[2] == 0x40) && (creg[3] == 0x00)) )
849			return -1;
850	}
851
852	if(eth16i_read_eeprom(ioaddr, E_NODEID_0) != 0)
853		return -1;
854
855	if((eth16i_read_eeprom(ioaddr, E_NODEID_1) & 0xFF00) != 0x4B00)
856		return -1;
857
858	return 0;
859}
860
861static int eth16i_read_eeprom(int ioaddr, int offset)
862{
863	int data = 0;
864
865	eth16i_eeprom_cmd(ioaddr, EEPROM_READ | offset);
866	outb(CS_1, ioaddr + EEPROM_CTRL_REG);
867	data = eth16i_read_eeprom_word(ioaddr);
868	outb(CS_0 | SK_0, ioaddr + EEPROM_CTRL_REG);
869
870	return(data);
871}
872
873static int eth16i_read_eeprom_word(int ioaddr)
874{
875	int i;
876	int data = 0;
877
878	for(i = 16; i > 0; i--) {
879		outb(CS_1 | SK_0, ioaddr + EEPROM_CTRL_REG);
880		eeprom_slow_io();
881		outb(CS_1 | SK_1, ioaddr + EEPROM_CTRL_REG);
882		eeprom_slow_io();
883		data = (data << 1) |
884			((inb(ioaddr + EEPROM_DATA_REG) & DI_1) ? 1 : 0);
885
886		eeprom_slow_io();
887	}
888
889	return(data);
890}
891
892static void eth16i_eeprom_cmd(int ioaddr, unsigned char command)
893{
894	int i;
895
896	outb(CS_0 | SK_0, ioaddr + EEPROM_CTRL_REG);
897	outb(DI_0, ioaddr + EEPROM_DATA_REG);
898	outb(CS_1 | SK_0, ioaddr + EEPROM_CTRL_REG);
899	outb(DI_1, ioaddr + EEPROM_DATA_REG);
900	outb(CS_1 | SK_1, ioaddr + EEPROM_CTRL_REG);
901
902	for(i = 7; i >= 0; i--) {
903		short cmd = ( (command & (1 << i)) ? DI_1 : DI_0 );
904		outb(cmd, ioaddr + EEPROM_DATA_REG);
905		outb(CS_1 | SK_0, ioaddr + EEPROM_CTRL_REG);
906		eeprom_slow_io();
907		outb(CS_1 | SK_1, ioaddr + EEPROM_CTRL_REG);
908		eeprom_slow_io();
909	}
910}
911
912static int eth16i_open(struct net_device *dev)
913{
914	struct eth16i_local *lp = netdev_priv(dev);
915	int ioaddr = dev->base_addr;
916
917	/* Powerup the chip */
918	outb(0xc0 | POWERUP, ioaddr + CONFIG_REG_1);
919
920	/* Initialize the chip */
921	eth16i_initialize(dev, 0);
922
923	/* Set the transmit buffer size */
924	lp->tx_buf_size = eth16i_tx_buf_map[ETH16I_TX_BUF_SIZE & 0x03];
925
926	if(eth16i_debug > 0)
927		printk(KERN_DEBUG "%s: transmit buffer size %d\n",
928		       dev->name, lp->tx_buf_size);
929
930	/* Now enable Transmitter and Receiver sections */
931	BITCLR(ioaddr + CONFIG_REG_0, DLC_EN);
932
933	/* Now switch to register bank 2, for run time operation */
934	eth16i_select_regbank(2, ioaddr);
935
936	lp->open_time = jiffies;
937	lp->tx_started = 0;
938	lp->tx_queue = 0;
939	lp->tx_queue_len = 0;
940
941	/* Turn on interrupts*/
942	outw(ETH16I_INTR_ON, ioaddr + TX_INTR_REG);
943
944	netif_start_queue(dev);
945	return 0;
946}
947
948static int eth16i_close(struct net_device *dev)
949{
950	struct eth16i_local *lp = netdev_priv(dev);
951	int ioaddr = dev->base_addr;
952
953	eth16i_reset(dev);
954
955	/* Turn off interrupts*/
956	outw(ETH16I_INTR_OFF, ioaddr + TX_INTR_REG);
957
958	netif_stop_queue(dev);
959
960	lp->open_time = 0;
961
962	/* Disable transmit and receive */
963	BITSET(ioaddr + CONFIG_REG_0, DLC_EN);
964
965	/* Reset the chip */
966	/* outb(0xff, ioaddr + RESET); */
967	/* outw(0xffff, ioaddr + TX_STATUS_REG);    */
968
969	outb(0x00, ioaddr + CONFIG_REG_1);
970
971	return 0;
972}
973
974static void eth16i_timeout(struct net_device *dev)
975{
976	struct eth16i_local *lp = netdev_priv(dev);
977	int ioaddr = dev->base_addr;
978	/*
979	   If we get here, some higher level has decided that
980	   we are broken. There should really be a "kick me"
981	   function call instead.
982	   */
983
984	outw(ETH16I_INTR_OFF, ioaddr + TX_INTR_REG);
985	printk(KERN_WARNING "%s: transmit timed out with status %04x, %s ?\n",
986	       dev->name,
987	inw(ioaddr + TX_STATUS_REG),  (inb(ioaddr + TX_STATUS_REG) & TX_DONE) ?
988		       "IRQ conflict" : "network cable problem");
989
990	dev->trans_start = jiffies; /* prevent tx timeout */
991
992	/* Let's dump all registers */
993	if(eth16i_debug > 0) {
994		printk(KERN_DEBUG "%s: timeout: %02x %02x %02x %02x %02x %02x %02x %02x.\n",
995		       dev->name, inb(ioaddr + 0),
996		       inb(ioaddr + 1), inb(ioaddr + 2),
997		       inb(ioaddr + 3), inb(ioaddr + 4),
998		       inb(ioaddr + 5),
999		       inb(ioaddr + 6), inb(ioaddr + 7));
1000
1001		printk(KERN_DEBUG "%s: transmit start reg: %02x. collision reg %02x\n",
1002		       dev->name, inb(ioaddr + TRANSMIT_START_REG),
1003		       inb(ioaddr + COL_16_REG));
1004			printk(KERN_DEBUG "lp->tx_queue = %d\n", lp->tx_queue);
1005		printk(KERN_DEBUG "lp->tx_queue_len = %d\n", lp->tx_queue_len);
1006		printk(KERN_DEBUG "lp->tx_started = %d\n", lp->tx_started);
1007	}
1008	dev->stats.tx_errors++;
1009	eth16i_reset(dev);
1010	dev->trans_start = jiffies; /* prevent tx timeout */
1011	outw(ETH16I_INTR_ON, ioaddr + TX_INTR_REG);
1012	netif_wake_queue(dev);
1013}
1014
1015static netdev_tx_t eth16i_tx(struct sk_buff *skb, struct net_device *dev)
1016{
1017	struct eth16i_local *lp = netdev_priv(dev);
1018	int ioaddr = dev->base_addr;
1019	int status = 0;
1020	ushort length = skb->len;
1021	unsigned char *buf;
1022	unsigned long flags;
1023
1024	if (length < ETH_ZLEN) {
1025		if (skb_padto(skb, ETH_ZLEN))
1026			return NETDEV_TX_OK;
1027		length = ETH_ZLEN;
1028	}
1029	buf = skb->data;
1030
1031	netif_stop_queue(dev);
1032
1033	/* Turn off TX interrupts */
1034	outw(ETH16I_INTR_OFF, ioaddr + TX_INTR_REG);
1035
1036	/* We would be better doing the disable_irq tricks the 3c509 does,
1037	   that would make this suck a lot less */
1038
1039	spin_lock_irqsave(&lp->lock, flags);
1040
1041	if( (length + 2) > (lp->tx_buf_size - lp->tx_queue_len)) {
1042		if(eth16i_debug > 0)
1043			printk(KERN_WARNING "%s: Transmit buffer full.\n", dev->name);
1044	}
1045	else {
1046		outw(length, ioaddr + DATAPORT);
1047
1048		if( ioaddr < 0x1000 )
1049			outsw(ioaddr + DATAPORT, buf, (length + 1) >> 1);
1050		else {
1051			unsigned char frag = length % 4;
1052			outsl(ioaddr + DATAPORT, buf, length >> 2);
1053			if( frag != 0 ) {
1054				outsw(ioaddr + DATAPORT, (buf + (length & 0xFFFC)), 1);
1055				if( frag == 3 )
1056					outsw(ioaddr + DATAPORT,
1057					      (buf + (length & 0xFFFC) + 2), 1);
1058			}
1059		}
1060		lp->tx_buffered_packets++;
1061		lp->tx_buffered_bytes = length;
1062		lp->tx_queue++;
1063		lp->tx_queue_len += length + 2;
1064	}
1065	lp->tx_buf_busy = 0;
1066
1067	if(lp->tx_started == 0) {
1068		/* If the transmitter is idle..always trigger a transmit */
1069		outb(TX_START | lp->tx_queue, ioaddr + TRANSMIT_START_REG);
1070		lp->tx_queue = 0;
1071		lp->tx_queue_len = 0;
1072		lp->tx_started = 1;
1073		netif_wake_queue(dev);
1074	}
1075	else if(lp->tx_queue_len < lp->tx_buf_size - (ETH_FRAME_LEN + 2)) {
1076		/* There is still more room for one more packet in tx buffer */
1077		netif_wake_queue(dev);
1078	}
1079
1080	spin_unlock_irqrestore(&lp->lock, flags);
1081
1082	outw(ETH16I_INTR_ON, ioaddr + TX_INTR_REG);
1083	/* Turn TX interrupts back on */
1084	/* outb(TX_INTR_DONE | TX_INTR_16_COL, ioaddr + TX_INTR_REG); */
1085	status = 0;
1086	dev_kfree_skb(skb);
1087	return NETDEV_TX_OK;
1088}
1089
1090static void eth16i_rx(struct net_device *dev)
1091{
1092	int ioaddr = dev->base_addr;
1093	int boguscount = MAX_RX_LOOP;
1094
1095	/* Loop until all packets have been read */
1096	while( (inb(ioaddr + RECEIVE_MODE_REG) & RX_BUFFER_EMPTY) == 0) {
1097
1098		/* Read status byte from receive buffer */
1099		ushort status = inw(ioaddr + DATAPORT);
1100
1101		/* Get the size of the packet from receive buffer */
1102		ushort pkt_len = inw(ioaddr + DATAPORT);
1103
1104		if(eth16i_debug > 4)
1105			printk(KERN_DEBUG "%s: Receiving packet mode %02x status %04x.\n",
1106			       dev->name,
1107			       inb(ioaddr + RECEIVE_MODE_REG), status);
1108
1109		if( !(status & PKT_GOOD) ) {
1110			dev->stats.rx_errors++;
1111
1112			if( (pkt_len < ETH_ZLEN) || (pkt_len > ETH_FRAME_LEN) ) {
1113				dev->stats.rx_length_errors++;
1114				eth16i_reset(dev);
1115				return;
1116			}
1117			else {
1118				eth16i_skip_packet(dev);
1119				dev->stats.rx_dropped++;
1120			}
1121		}
1122		else {   /* Ok so now we should have a good packet */
1123			struct sk_buff *skb;
1124
1125			skb = dev_alloc_skb(pkt_len + 3);
1126			if( skb == NULL ) {
1127				printk(KERN_WARNING "%s: Could'n allocate memory for packet (len %d)\n",
1128				       dev->name, pkt_len);
1129				eth16i_skip_packet(dev);
1130				dev->stats.rx_dropped++;
1131				break;
1132			}
1133
1134			skb_reserve(skb,2);
1135
1136			/*
1137			   Now let's get the packet out of buffer.
1138			   size is (pkt_len + 1) >> 1, cause we are now reading words
1139			   and it have to be even aligned.
1140			   */
1141
1142			if(ioaddr < 0x1000)
1143				insw(ioaddr + DATAPORT, skb_put(skb, pkt_len),
1144				     (pkt_len + 1) >> 1);
1145			else {
1146				unsigned char *buf = skb_put(skb, pkt_len);
1147				unsigned char frag = pkt_len % 4;
1148
1149				insl(ioaddr + DATAPORT, buf, pkt_len >> 2);
1150
1151				if(frag != 0) {
1152					unsigned short rest[2];
1153					rest[0] = inw( ioaddr + DATAPORT );
1154					if(frag == 3)
1155						rest[1] = inw( ioaddr + DATAPORT );
1156
1157					memcpy(buf + (pkt_len & 0xfffc), (char *)rest, frag);
1158				}
1159			}
1160
1161			skb->protocol=eth_type_trans(skb, dev);
1162
1163			if( eth16i_debug > 5 ) {
1164				int i;
1165				printk(KERN_DEBUG "%s: Received packet of length %d.\n",
1166				       dev->name, pkt_len);
1167				for(i = 0; i < 14; i++)
1168					printk(KERN_DEBUG " %02x", skb->data[i]);
1169				printk(KERN_DEBUG ".\n");
1170			}
1171			netif_rx(skb);
1172			dev->stats.rx_packets++;
1173			dev->stats.rx_bytes += pkt_len;
1174
1175		} /* else */
1176
1177		if(--boguscount <= 0)
1178			break;
1179
1180	} /* while */
1181}
1182
1183static irqreturn_t eth16i_interrupt(int irq, void *dev_id)
1184{
1185	struct net_device *dev = dev_id;
1186	struct eth16i_local *lp;
1187	int ioaddr = 0, status;
1188	int handled = 0;
1189
1190	ioaddr = dev->base_addr;
1191	lp = netdev_priv(dev);
1192
1193	/* Turn off all interrupts from adapter */
1194	outw(ETH16I_INTR_OFF, ioaddr + TX_INTR_REG);
1195
1196	/* eth16i_tx won't be called */
1197	spin_lock(&lp->lock);
1198
1199	status = inw(ioaddr + TX_STATUS_REG);      /* Get the status */
1200	outw(status, ioaddr + TX_STATUS_REG);      /* Clear status bits */
1201
1202	if (status)
1203		handled = 1;
1204
1205	if(eth16i_debug > 3)
1206		printk(KERN_DEBUG "%s: Interrupt with status %04x.\n", dev->name, status);
1207
1208	if( status & 0x7f00 ) {
1209
1210		dev->stats.rx_errors++;
1211
1212		if(status & (BUS_RD_ERR << 8) )
1213			printk(KERN_WARNING "%s: Bus read error.\n",dev->name);
1214		if(status & (SHORT_PKT_ERR << 8) )   dev->stats.rx_length_errors++;
1215		if(status & (ALIGN_ERR << 8) )       dev->stats.rx_frame_errors++;
1216		if(status & (CRC_ERR << 8) )	    dev->stats.rx_crc_errors++;
1217		if(status & (RX_BUF_OVERFLOW << 8) ) dev->stats.rx_over_errors++;
1218	}
1219	if( status & 0x001a) {
1220
1221		dev->stats.tx_errors++;
1222
1223		if(status & CR_LOST) dev->stats.tx_carrier_errors++;
1224		if(status & TX_JABBER_ERR) dev->stats.tx_window_errors++;
1225
1226		if(status & COLLISIONS_16) {
1227			if(lp->col_16 < MAX_COL_16) {
1228				lp->col_16++;
1229				dev->stats.collisions++;
1230				/* Resume transmitting, skip failed packet */
1231				outb(0x02, ioaddr + COL_16_REG);
1232			}
1233			else {
1234				printk(KERN_WARNING "%s: bailing out due to many consecutive 16-in-a-row collisions. Network cable problem?\n", dev->name);
1235			}
1236		}
1237	}
1238
1239	if( status & 0x00ff ) {          /* Let's check the transmit status reg */
1240
1241		if(status & TX_DONE) {         /* The transmit has been done */
1242			dev->stats.tx_packets = lp->tx_buffered_packets;
1243			dev->stats.tx_bytes += lp->tx_buffered_bytes;
1244			lp->col_16 = 0;
1245
1246			if(lp->tx_queue) {           /* Is there still packets ? */
1247				/* There was packet(s) so start transmitting and write also
1248				   how many packets there is to be sended */
1249				outb(TX_START | lp->tx_queue, ioaddr + TRANSMIT_START_REG);
1250				lp->tx_queue = 0;
1251				lp->tx_queue_len = 0;
1252				lp->tx_started = 1;
1253			}
1254			else {
1255				lp->tx_started = 0;
1256			}
1257			netif_wake_queue(dev);
1258		}
1259	}
1260
1261	if( ( status & 0x8000 ) ||
1262	    ( (inb(ioaddr + RECEIVE_MODE_REG) & RX_BUFFER_EMPTY) == 0) ) {
1263		eth16i_rx(dev);  /* We have packet in receive buffer */
1264	}
1265
1266	/* Turn interrupts back on */
1267	outw(ETH16I_INTR_ON, ioaddr + TX_INTR_REG);
1268
1269	if(lp->tx_queue_len < lp->tx_buf_size - (ETH_FRAME_LEN + 2)) {
1270		/* There is still more room for one more packet in tx buffer */
1271		netif_wake_queue(dev);
1272	}
1273
1274	spin_unlock(&lp->lock);
1275
1276	return IRQ_RETVAL(handled);
1277}
1278
1279static void eth16i_skip_packet(struct net_device *dev)
1280{
1281	int ioaddr = dev->base_addr;
1282
1283	inw(ioaddr + DATAPORT);
1284	inw(ioaddr + DATAPORT);
1285	inw(ioaddr + DATAPORT);
1286
1287	outb(SKIP_RX_PACKET, ioaddr + FILTER_SELF_RX_REG);
1288	while( inb( ioaddr + FILTER_SELF_RX_REG ) != 0);
1289}
1290
1291static void eth16i_reset(struct net_device *dev)
1292{
1293	struct eth16i_local *lp = netdev_priv(dev);
1294	int ioaddr = dev->base_addr;
1295
1296	if(eth16i_debug > 1)
1297		printk(KERN_DEBUG "%s: Resetting device.\n", dev->name);
1298
1299	BITSET(ioaddr + CONFIG_REG_0, DLC_EN);
1300	outw(0xffff, ioaddr + TX_STATUS_REG);
1301	eth16i_select_regbank(2, ioaddr);
1302
1303	lp->tx_started = 0;
1304	lp->tx_buf_busy = 0;
1305	lp->tx_queue = 0;
1306	lp->tx_queue_len = 0;
1307	BITCLR(ioaddr + CONFIG_REG_0, DLC_EN);
1308}
1309
1310static void eth16i_multicast(struct net_device *dev)
1311{
1312	int ioaddr = dev->base_addr;
1313
1314	if (!netdev_mc_empty(dev) || dev->flags&(IFF_ALLMULTI|IFF_PROMISC))
1315	{
1316		outb(3, ioaddr + RECEIVE_MODE_REG);
1317	} else {
1318		outb(2, ioaddr + RECEIVE_MODE_REG);
1319	}
1320}
1321
1322static void eth16i_select_regbank(unsigned char banknbr, int ioaddr)
1323{
1324	unsigned char data;
1325
1326	data = inb(ioaddr + CONFIG_REG_1);
1327	outb( ((data & 0xF3) | ( (banknbr & 0x03) << 2)), ioaddr + CONFIG_REG_1);
1328}
1329
1330#ifdef MODULE
1331
1332static ushort eth16i_parse_mediatype(const char* s)
1333{
1334	if(!s)
1335		return E_PORT_FROM_EPROM;
1336
1337        if (!strncmp(s, "bnc", 3))
1338		return E_PORT_BNC;
1339        else if (!strncmp(s, "tp", 2))
1340                return E_PORT_TP;
1341        else if (!strncmp(s, "dix", 3))
1342                return E_PORT_DIX;
1343        else if (!strncmp(s, "auto", 4))
1344		return E_PORT_AUTO;
1345	else
1346		return E_PORT_FROM_EPROM;
1347}
1348
1349#define MAX_ETH16I_CARDS 4  /* Max number of Eth16i cards per module */
1350
1351static struct net_device *dev_eth16i[MAX_ETH16I_CARDS];
1352static int io[MAX_ETH16I_CARDS];
1353static char* mediatype[MAX_ETH16I_CARDS];
1354static int debug = -1;
1355
1356MODULE_AUTHOR("Mika Kuoppala <miku@iki.fi>");
1357MODULE_DESCRIPTION("ICL EtherTeam 16i/32 driver");
1358MODULE_LICENSE("GPL");
1359
1360
1361module_param_array(io, int, NULL, 0);
1362MODULE_PARM_DESC(io, "eth16i I/O base address(es)");
1363
1364
1365module_param_array(mediatype, charp, NULL, 0);
1366MODULE_PARM_DESC(mediatype, "eth16i media type of interface(s) (bnc,tp,dix,auto,eprom)");
1367
1368module_param(debug, int, 0);
1369MODULE_PARM_DESC(debug, "eth16i debug level (0-6)");
1370
1371int __init init_module(void)
1372{
1373	int this_dev, found = 0;
1374	struct net_device *dev;
1375
1376	for (this_dev = 0; this_dev < MAX_ETH16I_CARDS; this_dev++) {
1377		dev = alloc_etherdev(sizeof(struct eth16i_local));
1378		if (!dev)
1379			break;
1380
1381		dev->base_addr = io[this_dev];
1382
1383	        if(debug != -1)
1384			eth16i_debug = debug;
1385
1386		if(eth16i_debug > 1)
1387			printk(KERN_NOTICE "eth16i(%d): interface type %s\n", this_dev, mediatype[this_dev] ? mediatype[this_dev] : "none" );
1388
1389		dev->if_port = eth16i_parse_mediatype(mediatype[this_dev]);
1390
1391		if(io[this_dev] == 0) {
1392			if (this_dev != 0) { /* Only autoprobe 1st one */
1393				free_netdev(dev);
1394				break;
1395			}
1396
1397			printk(KERN_NOTICE "eth16i.c: Presently autoprobing (not recommended) for a single card.\n");
1398		}
1399
1400		if (do_eth16i_probe(dev) == 0) {
1401			dev_eth16i[found++] = dev;
1402			continue;
1403		}
1404		printk(KERN_WARNING "eth16i.c No Eth16i card found (i/o = 0x%x).\n",
1405		       io[this_dev]);
1406		free_netdev(dev);
1407		break;
1408	}
1409	if (found)
1410		return 0;
1411	return -ENXIO;
1412}
1413
1414void __exit cleanup_module(void)
1415{
1416	int this_dev;
1417
1418	for(this_dev = 0; this_dev < MAX_ETH16I_CARDS; this_dev++) {
1419		struct net_device *dev = dev_eth16i[this_dev];
1420
1421		if (netdev_priv(dev)) {
1422			unregister_netdev(dev);
1423			free_irq(dev->irq, dev);
1424			release_region(dev->base_addr, ETH16I_IO_EXTENT);
1425			free_netdev(dev);
1426		}
1427	}
1428}
1429#endif /* MODULE */
1430