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1/*******************************************************************************
2
3  Intel PRO/1000 Linux driver
4  Copyright(c) 1999 - 2010 Intel Corporation.
5
6  This program is free software; you can redistribute it and/or modify it
7  under the terms and conditions of the GNU General Public License,
8  version 2, as published by the Free Software Foundation.
9
10  This program is distributed in the hope it will be useful, but WITHOUT
11  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  more details.
14
15  You should have received a copy of the GNU General Public License along with
16  this program; if not, write to the Free Software Foundation, Inc.,
17  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19  The full GNU General Public License is included in this distribution in
20  the file called "COPYING".
21
22  Contact Information:
23  Linux NICS <linux.nics@intel.com>
24  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29/* Linux PRO/1000 Ethernet Driver main header file */
30
31#ifndef _E1000_H_
32#define _E1000_H_
33
34#include <linux/types.h>
35#include <linux/timer.h>
36#include <linux/workqueue.h>
37#include <linux/io.h>
38#include <linux/netdevice.h>
39#include <linux/pci.h>
40#include <linux/pci-aspm.h>
41
42#include "hw.h"
43
44struct e1000_info;
45
46#define e_dbg(format, arg...) \
47	netdev_dbg(hw->adapter->netdev, format, ## arg)
48#define e_err(format, arg...) \
49	netdev_err(adapter->netdev, format, ## arg)
50#define e_info(format, arg...) \
51	netdev_info(adapter->netdev, format, ## arg)
52#define e_warn(format, arg...) \
53	netdev_warn(adapter->netdev, format, ## arg)
54#define e_notice(format, arg...) \
55	netdev_notice(adapter->netdev, format, ## arg)
56
57
58/* Interrupt modes, as used by the IntMode parameter */
59#define E1000E_INT_MODE_LEGACY		0
60#define E1000E_INT_MODE_MSI		1
61#define E1000E_INT_MODE_MSIX		2
62
63/* Tx/Rx descriptor defines */
64#define E1000_DEFAULT_TXD		256
65#define E1000_MAX_TXD			4096
66#define E1000_MIN_TXD			64
67
68#define E1000_DEFAULT_RXD		256
69#define E1000_MAX_RXD			4096
70#define E1000_MIN_RXD			64
71
72#define E1000_MIN_ITR_USECS		10 /* 100000 irq/sec */
73#define E1000_MAX_ITR_USECS		10000 /* 100    irq/sec */
74
75/* Early Receive defines */
76#define E1000_ERT_2048			0x100
77
78#define E1000_FC_PAUSE_TIME		0x0680 /* 858 usec */
79
80/* How many Tx Descriptors do we need to call netif_wake_queue ? */
81/* How many Rx Buffers do we bundle into one write to the hardware ? */
82#define E1000_RX_BUFFER_WRITE		16 /* Must be power of 2 */
83
84#define AUTO_ALL_MODES			0
85#define E1000_EEPROM_APME		0x0400
86
87#define E1000_MNG_VLAN_NONE		(-1)
88
89/* Number of packet split data buffers (not including the header buffer) */
90#define PS_PAGE_BUFFERS			(MAX_PS_BUFFERS - 1)
91
92#define DEFAULT_JUMBO			9234
93
94/* BM/HV Specific Registers */
95#define BM_PORT_CTRL_PAGE                 769
96
97#define PHY_UPPER_SHIFT                   21
98#define BM_PHY_REG(page, reg) \
99	(((reg) & MAX_PHY_REG_ADDRESS) |\
100	 (((page) & 0xFFFF) << PHY_PAGE_SHIFT) |\
101	 (((reg) & ~MAX_PHY_REG_ADDRESS) << (PHY_UPPER_SHIFT - PHY_PAGE_SHIFT)))
102
103/* PHY Wakeup Registers and defines */
104#define BM_RCTL         PHY_REG(BM_WUC_PAGE, 0)
105#define BM_WUC          PHY_REG(BM_WUC_PAGE, 1)
106#define BM_WUFC         PHY_REG(BM_WUC_PAGE, 2)
107#define BM_WUS          PHY_REG(BM_WUC_PAGE, 3)
108#define BM_RAR_L(_i)    (BM_PHY_REG(BM_WUC_PAGE, 16 + ((_i) << 2)))
109#define BM_RAR_M(_i)    (BM_PHY_REG(BM_WUC_PAGE, 17 + ((_i) << 2)))
110#define BM_RAR_H(_i)    (BM_PHY_REG(BM_WUC_PAGE, 18 + ((_i) << 2)))
111#define BM_RAR_CTRL(_i) (BM_PHY_REG(BM_WUC_PAGE, 19 + ((_i) << 2)))
112#define BM_MTA(_i)      (BM_PHY_REG(BM_WUC_PAGE, 128 + ((_i) << 1)))
113
114#define BM_RCTL_UPE           0x0001          /* Unicast Promiscuous Mode */
115#define BM_RCTL_MPE           0x0002          /* Multicast Promiscuous Mode */
116#define BM_RCTL_MO_SHIFT      3               /* Multicast Offset Shift */
117#define BM_RCTL_MO_MASK       (3 << 3)        /* Multicast Offset Mask */
118#define BM_RCTL_BAM           0x0020          /* Broadcast Accept Mode */
119#define BM_RCTL_PMCF          0x0040          /* Pass MAC Control Frames */
120#define BM_RCTL_RFCE          0x0080          /* Rx Flow Control Enable */
121
122#define HV_SCC_UPPER		PHY_REG(778, 16) /* Single Collision Count */
123#define HV_SCC_LOWER		PHY_REG(778, 17)
124#define HV_ECOL_UPPER		PHY_REG(778, 18) /* Excessive Collision Count */
125#define HV_ECOL_LOWER		PHY_REG(778, 19)
126#define HV_MCC_UPPER		PHY_REG(778, 20) /* Multiple Collision Count */
127#define HV_MCC_LOWER		PHY_REG(778, 21)
128#define HV_LATECOL_UPPER	PHY_REG(778, 23) /* Late Collision Count */
129#define HV_LATECOL_LOWER	PHY_REG(778, 24)
130#define HV_COLC_UPPER		PHY_REG(778, 25) /* Collision Count */
131#define HV_COLC_LOWER		PHY_REG(778, 26)
132#define HV_DC_UPPER		PHY_REG(778, 27) /* Defer Count */
133#define HV_DC_LOWER		PHY_REG(778, 28)
134#define HV_TNCRS_UPPER		PHY_REG(778, 29) /* Transmit with no CRS */
135#define HV_TNCRS_LOWER		PHY_REG(778, 30)
136
137#define E1000_FCRTV_PCH     0x05F40 /* PCH Flow Control Refresh Timer Value */
138
139/* BM PHY Copper Specific Status */
140#define BM_CS_STATUS                      17
141#define BM_CS_STATUS_LINK_UP              0x0400
142#define BM_CS_STATUS_RESOLVED             0x0800
143#define BM_CS_STATUS_SPEED_MASK           0xC000
144#define BM_CS_STATUS_SPEED_1000           0x8000
145
146/* 82577 Mobile Phy Status Register */
147#define HV_M_STATUS                       26
148#define HV_M_STATUS_AUTONEG_COMPLETE      0x1000
149#define HV_M_STATUS_SPEED_MASK            0x0300
150#define HV_M_STATUS_SPEED_1000            0x0200
151#define HV_M_STATUS_LINK_UP               0x0040
152
153/* Time to wait before putting the device into D3 if there's no link (in ms). */
154#define LINK_TIMEOUT		100
155
156enum e1000_boards {
157	board_82571,
158	board_82572,
159	board_82573,
160	board_82574,
161	board_82583,
162	board_80003es2lan,
163	board_ich8lan,
164	board_ich9lan,
165	board_ich10lan,
166	board_pchlan,
167	board_pch2lan,
168};
169
170struct e1000_queue_stats {
171	u64 packets;
172	u64 bytes;
173};
174
175struct e1000_ps_page {
176	struct page *page;
177	u64 dma; /* must be u64 - written to hw */
178};
179
180/*
181 * wrappers around a pointer to a socket buffer,
182 * so a DMA handle can be stored along with the buffer
183 */
184struct e1000_buffer {
185	dma_addr_t dma;
186	struct sk_buff *skb;
187	union {
188		/* Tx */
189		struct {
190			unsigned long time_stamp;
191			u16 length;
192			u16 next_to_watch;
193			unsigned int segs;
194			unsigned int bytecount;
195			u16 mapped_as_page;
196		};
197		/* Rx */
198		struct {
199			/* arrays of page information for packet split */
200			struct e1000_ps_page *ps_pages;
201			struct page *page;
202		};
203	};
204};
205
206struct e1000_ring {
207	void *desc;			/* pointer to ring memory  */
208	dma_addr_t dma;			/* phys address of ring    */
209	unsigned int size;		/* length of ring in bytes */
210	unsigned int count;		/* number of desc. in ring */
211
212	u16 next_to_use;
213	u16 next_to_clean;
214
215	u16 head;
216	u16 tail;
217
218	/* array of buffer information structs */
219	struct e1000_buffer *buffer_info;
220
221	char name[IFNAMSIZ + 5];
222	u32 ims_val;
223	u32 itr_val;
224	u16 itr_register;
225	int set_itr;
226
227	struct sk_buff *rx_skb_top;
228
229	struct e1000_queue_stats stats;
230};
231
232/* PHY register snapshot values */
233struct e1000_phy_regs {
234	u16 bmcr;		/* basic mode control register    */
235	u16 bmsr;		/* basic mode status register     */
236	u16 advertise;		/* auto-negotiation advertisement */
237	u16 lpa;		/* link partner ability register  */
238	u16 expansion;		/* auto-negotiation expansion reg */
239	u16 ctrl1000;		/* 1000BASE-T control register    */
240	u16 stat1000;		/* 1000BASE-T status register     */
241	u16 estatus;		/* extended status register       */
242};
243
244/* board specific private data structure */
245struct e1000_adapter {
246	struct timer_list watchdog_timer;
247	struct timer_list phy_info_timer;
248	struct timer_list blink_timer;
249
250	struct work_struct reset_task;
251	struct work_struct watchdog_task;
252
253	const struct e1000_info *ei;
254
255	struct vlan_group *vlgrp;
256	u32 bd_number;
257	u32 rx_buffer_len;
258	u16 mng_vlan_id;
259	u16 link_speed;
260	u16 link_duplex;
261	u16 eeprom_vers;
262
263	/* track device up/down/testing state */
264	unsigned long state;
265
266	/* Interrupt Throttle Rate */
267	u32 itr;
268	u32 itr_setting;
269	u16 tx_itr;
270	u16 rx_itr;
271
272	/*
273	 * Tx
274	 */
275	struct e1000_ring *tx_ring /* One per active queue */
276						____cacheline_aligned_in_smp;
277
278	struct napi_struct napi;
279
280	unsigned int restart_queue;
281	u32 txd_cmd;
282
283	bool detect_tx_hung;
284	u8 tx_timeout_factor;
285
286	u32 tx_int_delay;
287	u32 tx_abs_int_delay;
288
289	unsigned int total_tx_bytes;
290	unsigned int total_tx_packets;
291	unsigned int total_rx_bytes;
292	unsigned int total_rx_packets;
293
294	/* Tx stats */
295	u64 tpt_old;
296	u64 colc_old;
297	u32 gotc;
298	u64 gotc_old;
299	u32 tx_timeout_count;
300	u32 tx_fifo_head;
301	u32 tx_head_addr;
302	u32 tx_fifo_size;
303	u32 tx_dma_failed;
304
305	/*
306	 * Rx
307	 */
308	bool (*clean_rx) (struct e1000_adapter *adapter,
309			  int *work_done, int work_to_do)
310						____cacheline_aligned_in_smp;
311	void (*alloc_rx_buf) (struct e1000_adapter *adapter,
312			      int cleaned_count);
313	struct e1000_ring *rx_ring;
314
315	u32 rx_int_delay;
316	u32 rx_abs_int_delay;
317
318	/* Rx stats */
319	u64 hw_csum_err;
320	u64 hw_csum_good;
321	u64 rx_hdr_split;
322	u32 gorc;
323	u64 gorc_old;
324	u32 alloc_rx_buff_failed;
325	u32 rx_dma_failed;
326
327	unsigned int rx_ps_pages;
328	u16 rx_ps_bsize0;
329	u32 max_frame_size;
330	u32 min_frame_size;
331
332	/* OS defined structs */
333	struct net_device *netdev;
334	struct pci_dev *pdev;
335
336	/* structs defined in e1000_hw.h */
337	struct e1000_hw hw;
338
339	struct e1000_hw_stats stats;
340	struct e1000_phy_info phy_info;
341	struct e1000_phy_stats phy_stats;
342
343	/* Snapshot of PHY registers */
344	struct e1000_phy_regs phy_regs;
345
346	struct e1000_ring test_tx_ring;
347	struct e1000_ring test_rx_ring;
348	u32 test_icr;
349
350	u32 msg_enable;
351	unsigned int num_vectors;
352	struct msix_entry *msix_entries;
353	int int_mode;
354	u32 eiac_mask;
355
356	u32 eeprom_wol;
357	u32 wol;
358	u32 pba;
359	u32 max_hw_frame_size;
360
361	bool fc_autoneg;
362
363	unsigned long led_status;
364
365	unsigned int flags;
366	unsigned int flags2;
367	struct work_struct downshift_task;
368	struct work_struct update_phy_task;
369	struct work_struct led_blink_task;
370	struct work_struct print_hang_task;
371
372	bool idle_check;
373};
374
375struct e1000_info {
376	enum e1000_mac_type	mac;
377	unsigned int		flags;
378	unsigned int		flags2;
379	u32			pba;
380	u32			max_hw_frame_size;
381	s32			(*get_variants)(struct e1000_adapter *);
382	struct e1000_mac_operations *mac_ops;
383	struct e1000_phy_operations *phy_ops;
384	struct e1000_nvm_operations *nvm_ops;
385};
386
387#define FLAG_HAS_AMT                      (1 << 0)
388#define FLAG_HAS_FLASH                    (1 << 1)
389#define FLAG_HAS_HW_VLAN_FILTER           (1 << 2)
390#define FLAG_HAS_WOL                      (1 << 3)
391#define FLAG_HAS_ERT                      (1 << 4)
392#define FLAG_HAS_CTRLEXT_ON_LOAD          (1 << 5)
393#define FLAG_HAS_SWSM_ON_LOAD             (1 << 6)
394#define FLAG_HAS_JUMBO_FRAMES             (1 << 7)
395#define FLAG_READ_ONLY_NVM                (1 << 8)
396#define FLAG_IS_ICH                       (1 << 9)
397#define FLAG_HAS_MSIX                     (1 << 10)
398#define FLAG_HAS_SMART_POWER_DOWN         (1 << 11)
399#define FLAG_IS_QUAD_PORT_A               (1 << 12)
400#define FLAG_IS_QUAD_PORT                 (1 << 13)
401#define FLAG_TIPG_MEDIUM_FOR_80003ESLAN   (1 << 14)
402#define FLAG_APME_IN_WUC                  (1 << 15)
403#define FLAG_APME_IN_CTRL3                (1 << 16)
404#define FLAG_APME_CHECK_PORT_B            (1 << 17)
405#define FLAG_DISABLE_FC_PAUSE_TIME        (1 << 18)
406#define FLAG_NO_WAKE_UCAST                (1 << 19)
407#define FLAG_MNG_PT_ENABLED               (1 << 20)
408#define FLAG_RESET_OVERWRITES_LAA         (1 << 21)
409#define FLAG_TARC_SPEED_MODE_BIT          (1 << 22)
410#define FLAG_TARC_SET_BIT_ZERO            (1 << 23)
411#define FLAG_RX_NEEDS_RESTART             (1 << 24)
412#define FLAG_LSC_GIG_SPEED_DROP           (1 << 25)
413#define FLAG_SMART_POWER_DOWN             (1 << 26)
414#define FLAG_MSI_ENABLED                  (1 << 27)
415#define FLAG_RX_CSUM_ENABLED              (1 << 28)
416#define FLAG_TSO_FORCE                    (1 << 29)
417#define FLAG_RX_RESTART_NOW               (1 << 30)
418#define FLAG_MSI_TEST_FAILED              (1 << 31)
419
420/* CRC Stripping defines */
421#define FLAG2_CRC_STRIPPING               (1 << 0)
422#define FLAG2_HAS_PHY_WAKEUP              (1 << 1)
423#define FLAG2_IS_DISCARDING               (1 << 2)
424#define FLAG2_DISABLE_ASPM_L1             (1 << 3)
425#define FLAG2_HAS_PHY_STATS               (1 << 4)
426#define FLAG2_HAS_EEE                     (1 << 5)
427
428#define E1000_RX_DESC_PS(R, i)	    \
429	(&(((union e1000_rx_desc_packet_split *)((R).desc))[i]))
430#define E1000_GET_DESC(R, i, type)	(&(((struct type *)((R).desc))[i]))
431#define E1000_RX_DESC(R, i)		E1000_GET_DESC(R, i, e1000_rx_desc)
432#define E1000_TX_DESC(R, i)		E1000_GET_DESC(R, i, e1000_tx_desc)
433#define E1000_CONTEXT_DESC(R, i)	E1000_GET_DESC(R, i, e1000_context_desc)
434
435enum e1000_state_t {
436	__E1000_TESTING,
437	__E1000_RESETTING,
438	__E1000_DOWN
439};
440
441enum latency_range {
442	lowest_latency = 0,
443	low_latency = 1,
444	bulk_latency = 2,
445	latency_invalid = 255
446};
447
448extern char e1000e_driver_name[];
449extern const char e1000e_driver_version[];
450
451extern void e1000e_check_options(struct e1000_adapter *adapter);
452extern void e1000e_set_ethtool_ops(struct net_device *netdev);
453
454extern int e1000e_up(struct e1000_adapter *adapter);
455extern void e1000e_down(struct e1000_adapter *adapter);
456extern void e1000e_reinit_locked(struct e1000_adapter *adapter);
457extern void e1000e_reset(struct e1000_adapter *adapter);
458extern void e1000e_power_up_phy(struct e1000_adapter *adapter);
459extern int e1000e_setup_rx_resources(struct e1000_adapter *adapter);
460extern int e1000e_setup_tx_resources(struct e1000_adapter *adapter);
461extern void e1000e_free_rx_resources(struct e1000_adapter *adapter);
462extern void e1000e_free_tx_resources(struct e1000_adapter *adapter);
463extern void e1000e_update_stats(struct e1000_adapter *adapter);
464extern void e1000e_set_interrupt_capability(struct e1000_adapter *adapter);
465extern void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter);
466extern void e1000e_disable_aspm(struct pci_dev *pdev, u16 state);
467
468extern unsigned int copybreak;
469
470extern char *e1000e_get_hw_dev_name(struct e1000_hw *hw);
471
472extern struct e1000_info e1000_82571_info;
473extern struct e1000_info e1000_82572_info;
474extern struct e1000_info e1000_82573_info;
475extern struct e1000_info e1000_82574_info;
476extern struct e1000_info e1000_82583_info;
477extern struct e1000_info e1000_ich8_info;
478extern struct e1000_info e1000_ich9_info;
479extern struct e1000_info e1000_ich10_info;
480extern struct e1000_info e1000_pch_info;
481extern struct e1000_info e1000_pch2_info;
482extern struct e1000_info e1000_es2_info;
483
484extern s32 e1000e_read_pba_num(struct e1000_hw *hw, u32 *pba_num);
485
486extern s32  e1000e_commit_phy(struct e1000_hw *hw);
487
488extern bool e1000e_enable_mng_pass_thru(struct e1000_hw *hw);
489
490extern bool e1000e_get_laa_state_82571(struct e1000_hw *hw);
491extern void e1000e_set_laa_state_82571(struct e1000_hw *hw, bool state);
492
493extern void e1000e_write_protect_nvm_ich8lan(struct e1000_hw *hw);
494extern void e1000e_set_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw,
495						 bool state);
496extern void e1000e_igp3_phy_powerdown_workaround_ich8lan(struct e1000_hw *hw);
497extern void e1000e_gig_downshift_workaround_ich8lan(struct e1000_hw *hw);
498extern void e1000e_disable_gig_wol_ich8lan(struct e1000_hw *hw);
499extern s32 e1000_configure_k1_ich8lan(struct e1000_hw *hw, bool k1_enable);
500extern s32 e1000_lv_jumbo_workaround_ich8lan(struct e1000_hw *hw, bool enable);
501extern void e1000_copy_rx_addrs_to_phy_ich8lan(struct e1000_hw *hw);
502
503extern s32 e1000e_check_for_copper_link(struct e1000_hw *hw);
504extern s32 e1000e_check_for_fiber_link(struct e1000_hw *hw);
505extern s32 e1000e_check_for_serdes_link(struct e1000_hw *hw);
506extern s32 e1000e_setup_led_generic(struct e1000_hw *hw);
507extern s32 e1000e_cleanup_led_generic(struct e1000_hw *hw);
508extern s32 e1000e_led_on_generic(struct e1000_hw *hw);
509extern s32 e1000e_led_off_generic(struct e1000_hw *hw);
510extern s32 e1000e_get_bus_info_pcie(struct e1000_hw *hw);
511extern void e1000_set_lan_id_multi_port_pcie(struct e1000_hw *hw);
512extern void e1000_set_lan_id_single_port(struct e1000_hw *hw);
513extern s32 e1000e_get_speed_and_duplex_copper(struct e1000_hw *hw, u16 *speed, u16 *duplex);
514extern s32 e1000e_get_speed_and_duplex_fiber_serdes(struct e1000_hw *hw, u16 *speed, u16 *duplex);
515extern s32 e1000e_disable_pcie_master(struct e1000_hw *hw);
516extern s32 e1000e_get_auto_rd_done(struct e1000_hw *hw);
517extern s32 e1000e_id_led_init(struct e1000_hw *hw);
518extern void e1000e_clear_hw_cntrs_base(struct e1000_hw *hw);
519extern s32 e1000e_setup_fiber_serdes_link(struct e1000_hw *hw);
520extern s32 e1000e_copper_link_setup_m88(struct e1000_hw *hw);
521extern s32 e1000e_copper_link_setup_igp(struct e1000_hw *hw);
522extern s32 e1000e_setup_link(struct e1000_hw *hw);
523extern void e1000_clear_vfta_generic(struct e1000_hw *hw);
524extern void e1000e_init_rx_addrs(struct e1000_hw *hw, u16 rar_count);
525extern void e1000e_update_mc_addr_list_generic(struct e1000_hw *hw,
526					       u8 *mc_addr_list,
527					       u32 mc_addr_count);
528extern void e1000e_rar_set(struct e1000_hw *hw, u8 *addr, u32 index);
529extern s32 e1000e_set_fc_watermarks(struct e1000_hw *hw);
530extern void e1000e_set_pcie_no_snoop(struct e1000_hw *hw, u32 no_snoop);
531extern s32 e1000e_get_hw_semaphore(struct e1000_hw *hw);
532extern s32 e1000e_valid_led_default(struct e1000_hw *hw, u16 *data);
533extern void e1000e_config_collision_dist(struct e1000_hw *hw);
534extern s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw);
535extern s32 e1000e_force_mac_fc(struct e1000_hw *hw);
536extern s32 e1000e_blink_led(struct e1000_hw *hw);
537extern void e1000_write_vfta_generic(struct e1000_hw *hw, u32 offset, u32 value);
538extern s32 e1000_check_alt_mac_addr_generic(struct e1000_hw *hw);
539extern void e1000e_reset_adaptive(struct e1000_hw *hw);
540extern void e1000e_update_adaptive(struct e1000_hw *hw);
541
542extern s32 e1000e_setup_copper_link(struct e1000_hw *hw);
543extern s32 e1000e_get_phy_id(struct e1000_hw *hw);
544extern void e1000e_put_hw_semaphore(struct e1000_hw *hw);
545extern s32 e1000e_check_reset_block_generic(struct e1000_hw *hw);
546extern s32 e1000e_phy_force_speed_duplex_igp(struct e1000_hw *hw);
547extern s32 e1000e_get_cable_length_igp_2(struct e1000_hw *hw);
548extern s32 e1000e_get_phy_info_igp(struct e1000_hw *hw);
549extern s32 e1000e_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data);
550extern s32 e1000e_read_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset,
551                                          u16 *data);
552extern s32 e1000e_phy_hw_reset_generic(struct e1000_hw *hw);
553extern s32 e1000e_set_d3_lplu_state(struct e1000_hw *hw, bool active);
554extern s32 e1000e_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data);
555extern s32 e1000e_write_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset,
556                                           u16 data);
557extern s32 e1000e_phy_sw_reset(struct e1000_hw *hw);
558extern s32 e1000e_phy_force_speed_duplex_m88(struct e1000_hw *hw);
559extern s32 e1000e_get_cfg_done(struct e1000_hw *hw);
560extern s32 e1000e_get_cable_length_m88(struct e1000_hw *hw);
561extern s32 e1000e_get_phy_info_m88(struct e1000_hw *hw);
562extern s32 e1000e_read_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 *data);
563extern s32 e1000e_write_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 data);
564extern s32 e1000e_phy_init_script_igp3(struct e1000_hw *hw);
565extern enum e1000_phy_type e1000e_get_phy_type_from_id(u32 phy_id);
566extern s32 e1000e_determine_phy_address(struct e1000_hw *hw);
567extern s32 e1000e_write_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 data);
568extern s32 e1000e_read_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data);
569extern s32 e1000e_read_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 *data);
570extern s32 e1000e_write_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 data);
571extern void e1000e_phy_force_speed_duplex_setup(struct e1000_hw *hw, u16 *phy_ctrl);
572extern s32 e1000e_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data);
573extern s32 e1000e_write_kmrn_reg_locked(struct e1000_hw *hw, u32 offset,
574                                        u16 data);
575extern s32 e1000e_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data);
576extern s32 e1000e_read_kmrn_reg_locked(struct e1000_hw *hw, u32 offset,
577                                       u16 *data);
578extern s32 e1000e_phy_has_link_generic(struct e1000_hw *hw, u32 iterations,
579			       u32 usec_interval, bool *success);
580extern s32 e1000e_phy_reset_dsp(struct e1000_hw *hw);
581extern void e1000_power_up_phy_copper(struct e1000_hw *hw);
582extern void e1000_power_down_phy_copper(struct e1000_hw *hw);
583extern s32 e1000e_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data);
584extern s32 e1000e_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data);
585extern s32 e1000e_check_downshift(struct e1000_hw *hw);
586extern s32 e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data);
587extern s32 e1000_read_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset,
588                                        u16 *data);
589extern s32 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data);
590extern s32 e1000_write_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset,
591                                         u16 data);
592extern s32 e1000_link_stall_workaround_hv(struct e1000_hw *hw);
593extern s32 e1000_copper_link_setup_82577(struct e1000_hw *hw);
594extern s32 e1000_check_polarity_82577(struct e1000_hw *hw);
595extern s32 e1000_get_phy_info_82577(struct e1000_hw *hw);
596extern s32 e1000_phy_force_speed_duplex_82577(struct e1000_hw *hw);
597extern s32 e1000_get_cable_length_82577(struct e1000_hw *hw);
598
599extern s32 e1000_check_polarity_m88(struct e1000_hw *hw);
600extern s32 e1000_get_phy_info_ife(struct e1000_hw *hw);
601extern s32 e1000_check_polarity_ife(struct e1000_hw *hw);
602extern s32 e1000_phy_force_speed_duplex_ife(struct e1000_hw *hw);
603extern s32 e1000_check_polarity_igp(struct e1000_hw *hw);
604
605static inline s32 e1000_phy_hw_reset(struct e1000_hw *hw)
606{
607	return hw->phy.ops.reset(hw);
608}
609
610static inline s32 e1000_check_reset_block(struct e1000_hw *hw)
611{
612	return hw->phy.ops.check_reset_block(hw);
613}
614
615static inline s32 e1e_rphy(struct e1000_hw *hw, u32 offset, u16 *data)
616{
617	return hw->phy.ops.read_reg(hw, offset, data);
618}
619
620static inline s32 e1e_wphy(struct e1000_hw *hw, u32 offset, u16 data)
621{
622	return hw->phy.ops.write_reg(hw, offset, data);
623}
624
625static inline s32 e1000_get_cable_length(struct e1000_hw *hw)
626{
627	return hw->phy.ops.get_cable_length(hw);
628}
629
630extern s32 e1000e_acquire_nvm(struct e1000_hw *hw);
631extern s32 e1000e_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data);
632extern s32 e1000e_update_nvm_checksum_generic(struct e1000_hw *hw);
633extern s32 e1000e_poll_eerd_eewr_done(struct e1000_hw *hw, int ee_reg);
634extern s32 e1000e_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words, u16 *data);
635extern s32 e1000e_validate_nvm_checksum_generic(struct e1000_hw *hw);
636extern void e1000e_release_nvm(struct e1000_hw *hw);
637extern void e1000e_reload_nvm(struct e1000_hw *hw);
638extern s32 e1000_read_mac_addr_generic(struct e1000_hw *hw);
639
640static inline s32 e1000e_read_mac_addr(struct e1000_hw *hw)
641{
642	if (hw->mac.ops.read_mac_addr)
643		return hw->mac.ops.read_mac_addr(hw);
644
645	return e1000_read_mac_addr_generic(hw);
646}
647
648static inline s32 e1000_validate_nvm_checksum(struct e1000_hw *hw)
649{
650	return hw->nvm.ops.validate(hw);
651}
652
653static inline s32 e1000e_update_nvm_checksum(struct e1000_hw *hw)
654{
655	return hw->nvm.ops.update(hw);
656}
657
658static inline s32 e1000_read_nvm(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
659{
660	return hw->nvm.ops.read(hw, offset, words, data);
661}
662
663static inline s32 e1000_write_nvm(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
664{
665	return hw->nvm.ops.write(hw, offset, words, data);
666}
667
668static inline s32 e1000_get_phy_info(struct e1000_hw *hw)
669{
670	return hw->phy.ops.get_info(hw);
671}
672
673static inline s32 e1000e_check_mng_mode(struct e1000_hw *hw)
674{
675	return hw->mac.ops.check_mng_mode(hw);
676}
677
678extern bool e1000e_check_mng_mode_generic(struct e1000_hw *hw);
679extern bool e1000e_enable_tx_pkt_filtering(struct e1000_hw *hw);
680extern s32 e1000e_mng_write_dhcp_info(struct e1000_hw *hw, u8 *buffer, u16 length);
681
682static inline u32 __er32(struct e1000_hw *hw, unsigned long reg)
683{
684	return readl(hw->hw_addr + reg);
685}
686
687static inline void __ew32(struct e1000_hw *hw, unsigned long reg, u32 val)
688{
689	writel(val, hw->hw_addr + reg);
690}
691
692#endif /* _E1000_H_ */
693